From d9782f041a951a75f4344ea9cf5f59fa37faa1de Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Wed, 22 Sep 2010 13:15:10 +0100 Subject: [PATCH] --- yaml --- r: 218090 b: refs/heads/master c: a5cad620b36f15ef3aad434712ae290640aae96c h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 74a43efbb351..6eaa59334219 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 5c12a07e8073295ce8b57a822f811ac34e4f8420 +refs/heads/master: a5cad620b36f15ef3aad434712ae290640aae96c diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index e6f7ebfe86e5..b92385498d2c 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -1110,6 +1110,9 @@ void i8xx_disable_fbc(struct drm_device *dev) /* Disable compression */ fbc_ctl = I915_READ(FBC_CONTROL); + if ((fbc_ctl & FBC_CTL_EN) == 0) + return; + fbc_ctl &= ~FBC_CTL_EN; I915_WRITE(FBC_CONTROL, fbc_ctl);