From dad4c784de6374d7a91e7a14ac9447ad02129fa3 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Thu, 10 Sep 2009 14:11:44 +0800 Subject: [PATCH] --- yaml --- r: 172567 b: refs/heads/master c: 8638fac849c181176324f26b4b82e3b96f378dde h: refs/heads/master i: 172565: 8002792fbfffc2cdefeb176b3288f7d71e1a0d45 172563: 6364de74ee4bdd34448bb1f145e7e8cc3e4497ce 172559: 0b56bce4007eaad09a86ba42cbe8fb778309d3b0 v: v3 --- [refs] | 2 +- trunk/drivers/mtd/nand/pxa3xx_nand.c | 10 ++++------ 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index 2958f8f04c98..66912083a534 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 726de6e16d88986db3102ebe6ae277f73df63eaf +refs/heads/master: 8638fac849c181176324f26b4b82e3b96f378dde diff --git a/trunk/drivers/mtd/nand/pxa3xx_nand.c b/trunk/drivers/mtd/nand/pxa3xx_nand.c index a085cd0a6e5e..3b4bc54df695 100644 --- a/trunk/drivers/mtd/nand/pxa3xx_nand.c +++ b/trunk/drivers/mtd/nand/pxa3xx_nand.c @@ -85,10 +85,6 @@ #define NDCB0_CMD1_MASK (0xff) #define NDCB0_ADDR_CYC_SHIFT (16) -/* dma-able I/O address for the NAND data and commands */ -#define NDCB0_DMA_ADDR (0x43100048) -#define NDDB_DMA_ADDR (0x43100040) - /* macros for registers read/write */ #define nand_writel(info, off, val) \ __raw_writel((val), (info)->mmio_base + (off)) @@ -124,6 +120,7 @@ struct pxa3xx_nand_info { struct clk *clk; void __iomem *mmio_base; + unsigned long mmio_phys; unsigned int buf_start; unsigned int buf_count; @@ -524,11 +521,11 @@ static void start_data_dma(struct pxa3xx_nand_info *info, int dir_out) if (dir_out) { desc->dsadr = info->data_buff_phys; - desc->dtadr = NDDB_DMA_ADDR; + desc->dtadr = info->mmio_phys + NDDB; desc->dcmd |= DCMD_INCSRCADDR | DCMD_FLOWTRG; } else { desc->dtadr = info->data_buff_phys; - desc->dsadr = NDDB_DMA_ADDR; + desc->dsadr = info->mmio_phys + NDDB; desc->dcmd |= DCMD_INCTRGADDR | DCMD_FLOWSRC; } @@ -1241,6 +1238,7 @@ static int pxa3xx_nand_probe(struct platform_device *pdev) ret = -ENODEV; goto fail_free_res; } + info->mmio_phys = r->start; ret = pxa3xx_nand_init_buff(info); if (ret)