From dadac28061d831a510a03b8e748ba754c857bdc1 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 21 May 2007 18:09:26 +0800 Subject: [PATCH] --- yaml --- r: 56651 b: refs/heads/master c: ef9256d2831df0896566c3823cd2bdf0e55df984 h: refs/heads/master i: 56649: fd90c126de51f529217fd6ced177be3e8d67daa3 56647: fc673157151dfeb23dc20d42d1654980168f086c v: v3 --- [refs] | 2 +- trunk/arch/blackfin/mach-bf533/head.S | 68 ++++++-------------------- trunk/arch/blackfin/mach-bf537/head.S | 70 ++++++--------------------- trunk/arch/blackfin/mach-bf561/head.S | 70 ++++++--------------------- 4 files changed, 49 insertions(+), 161 deletions(-) diff --git a/[refs] b/[refs] index db8b590dfd1e..37432185d56d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c0fc525dcc407a516132fc11af82375319ebdadb +refs/heads/master: ef9256d2831df0896566c3823cd2bdf0e55df984 diff --git a/trunk/arch/blackfin/mach-bf533/head.S b/trunk/arch/blackfin/mach-bf533/head.S index 7cb8258841d4..1a54ff5f061d 100644 --- a/trunk/arch/blackfin/mach-bf533/head.S +++ b/trunk/arch/blackfin/mach-bf533/head.S @@ -481,66 +481,30 @@ ENTRY(_bfin_reset) [p0] = r0; SSYNC; - /* Disable the WDOG TIMER */ - p0.h = hi(WDOG_CTL); - p0.l = lo(WDOG_CTL); - r0.l = 0xAD6; - w[p0] = r0.l; - SSYNC; - - /* Clear the sticky bit incase it is already set */ - p0.h = hi(WDOG_CTL); - p0.l = lo(WDOG_CTL); - r0.l = 0x8AD6; - w[p0] = r0.l; + /* make sure SYSCR is set to use BMODE */ + P0.h = hi(SYSCR); + P0.l = lo(SYSCR); + R0.l = 0x0; + W[P0] = R0.l; SSYNC; - /* Program the count value */ - R0.l = 0x100; - R0.h = 0x0; - P0.h = hi(WDOG_CNT); - P0.l = lo(WDOG_CNT); - [P0] = R0; + /* issue a system soft reset */ + P1.h = hi(SWRST); + P1.l = lo(SWRST); + R1.l = 0x0007; + W[P1] = R1; SSYNC; - /* Program WDOG_STAT if necessary */ - P0.h = hi(WDOG_CTL); - P0.l = lo(WDOG_CTL); - R0 = W[P0](Z); - CC = BITTST(R0,1); - if !CC JUMP .LWRITESTAT; - CC = BITTST(R0,2); - if !CC JUMP .LWRITESTAT; - JUMP .LSKIP_WRITE; - -.LWRITESTAT: - /* When watch dog timer is enabled, a write to STAT will load the contents of CNT to STAT */ - R0 = 0x0000(z); - P0.h = hi(WDOG_STAT); - P0.l = lo(WDOG_STAT) - [P0] = R0; - SSYNC; - -.LSKIP_WRITE: - /* Enable the reset event */ - P0.h = hi(WDOG_CTL); - P0.l = lo(WDOG_CTL); - R0 = W[P0](Z); - BITCLR(R0,1); - BITCLR(R0,2); - W[P0] = R0.L; - SSYNC; - NOP; - - /* Enable the wdog counter */ - R0 = W[P0](Z); - BITCLR(R0,4); - W[P0] = R0.L; + /* clear system soft reset */ + R0.l = 0x0000; + W[P0] = R0; SSYNC; - IDLE; + /* issue core reset */ + raise 1; RTS; +ENDPROC(_bfin_reset) #if CONFIG_DEBUG_KERNEL_START debug_kernel_start_trap: diff --git a/trunk/arch/blackfin/mach-bf537/head.S b/trunk/arch/blackfin/mach-bf537/head.S index de78e4281aef..aafc686749ed 100644 --- a/trunk/arch/blackfin/mach-bf537/head.S +++ b/trunk/arch/blackfin/mach-bf537/head.S @@ -517,68 +517,30 @@ _delay_lab1_end: [p0] = r0; SSYNC; - /* Disable the WDOG TIMER */ - p0.h = hi(WDOG_CTL); - p0.l = lo(WDOG_CTL); - r0.l = 0xAD6; - w[p0] = r0.l; + /* make sure SYSCR is set to use BMODE */ + P0.h = hi(SYSCR); + P0.l = lo(SYSCR); + R0.l = 0x0; + W[P0] = R0.l; SSYNC; - /* Clear the sticky bit incase it is already set */ - p0.h = hi(WDOG_CTL); - p0.l = lo(WDOG_CTL); - r0.l = 0x8AD6; - w[p0] = r0.l; + /* issue a system soft reset */ + P1.h = hi(SWRST); + P1.l = lo(SWRST); + R1.l = 0x0007; + W[P1] = R1; SSYNC; - /* Program the count value */ - R0.l = 0x100; - R0.h = 0x0; - P0.h = hi(WDOG_CNT); - P0.l = lo(WDOG_CNT); - [P0] = R0; - SSYNC; - - /* Program WDOG_STAT if necessary */ - P0.h = hi(WDOG_CTL); - P0.l = lo(WDOG_CTL); - R0 = W[P0](Z); - CC = BITTST(R0,1); - if !CC JUMP .LWRITESTAT; - CC = BITTST(R0,2); - if !CC JUMP .LWRITESTAT; - JUMP .LSKIP_WRITE; - -.LWRITESTAT: - /* When watch dog timer is enabled, - * a write to STAT will load the contents of CNT to STAT - */ - R0 = 0x0000(z); - P0.h = hi(WDOG_STAT); - P0.l = lo(WDOG_STAT) - [P0] = R0; - SSYNC; - -.LSKIP_WRITE: - /* Enable the reset event */ - P0.h = hi(WDOG_CTL); - P0.l = lo(WDOG_CTL); - R0 = W[P0](Z); - BITCLR(R0,1); - BITCLR(R0,2); - W[P0] = R0.L; - SSYNC; - NOP; - - /* Enable the wdog counter */ - R0 = W[P0](Z); - BITCLR(R0,4); - W[P0] = R0.L; + /* clear system soft reset */ + R0.l = 0x0000; + W[P0] = R0; SSYNC; - IDLE; + /* issue core reset */ + raise 1; RTS; +ENDPROC(_bfin_reset) .data diff --git a/trunk/arch/blackfin/mach-bf561/head.S b/trunk/arch/blackfin/mach-bf561/head.S index 462c39ed8ec5..04f3ac33ab0e 100644 --- a/trunk/arch/blackfin/mach-bf561/head.S +++ b/trunk/arch/blackfin/mach-bf561/head.S @@ -427,68 +427,30 @@ ENTRY(_bfin_reset) [p0] = r0; SSYNC; - /* Disable the WDOG TIMER */ - p0.h = hi(WDOGA_CTL); - p0.l = lo(WDOGA_CTL); - r0.l = 0xAD6; - w[p0] = r0.l; + /* make sure SYSCR is set to use BMODE */ + P0.h = hi(SICA_SYSCR); + P0.l = lo(SICA_SYSCR); + R0.l = 0x0; + W[P0] = R0.l; SSYNC; - /* Clear the sticky bit incase it is already set */ - p0.h = hi(WDOGA_CTL); - p0.l = lo(WDOGA_CTL); - r0.l = 0x8AD6; - w[p0] = r0.l; - SSYNC; - - /* Program the count value */ - R0.l = 0x100; - R0.h = 0x0; - P0.h = hi(WDOGA_CNT); - P0.l = lo(WDOGA_CNT); - [P0] = R0; + /* issue a system soft reset */ + P1.h = hi(SICA_SWRST); + P1.l = lo(SICA_SWRST); + R1.l = 0x0007; + W[P1] = R1; SSYNC; - /* Program WDOG_STAT if necessary */ - P0.h = hi(WDOGA_CTL); - P0.l = lo(WDOGA_CTL); - R0 = W[P0](Z); - CC = BITTST(R0,1); - if !CC JUMP .LWRITESTAT; - CC = BITTST(R0,2); - if !CC JUMP .LWRITESTAT; - JUMP .LSKIP_WRITE; - -.LWRITESTAT: - /* When watch dog timer is enabled, - * a write to STAT will load the contents of CNT to STAT - */ - R0 = 0x0000(z); - P0.h = hi(WDOGA_STAT); - P0.l = lo(WDOGA_STAT) - [P0] = R0; - SSYNC; - -.LSKIP_WRITE: - /* Enable the reset event */ - P0.h = hi(WDOGA_CTL); - P0.l = lo(WDOGA_CTL); - R0 = W[P0](Z); - BITCLR(R0,1); - BITCLR(R0,2); - W[P0] = R0.L; - SSYNC; - NOP; - - /* Enable the wdog counter */ - R0 = W[P0](Z); - BITCLR(R0,4); - W[P0] = R0.L; + /* clear system soft reset */ + R0.l = 0x0000; + W[P0] = R0; SSYNC; - IDLE; + /* issue core reset */ + raise 1; RTS; +ENDPROC(_bfin_reset) .data