From db8cb215c978e65461e84fa66a1e88d9d0f44e79 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Thu, 20 May 2010 08:33:38 +0100 Subject: [PATCH] --- yaml --- r: 198539 b: refs/heads/master c: a901ff715d53c109821cbbd9d7ea1f2a311646a9 h: refs/heads/master i: 198537: 3a558ecd8f9d838ba1fd97892fc3a4167bd5f7f4 198535: 8913df46c372e3418e3672031982c2d0306efe3b v: v3 --- [refs] | 2 +- trunk/arch/arm/mm/cache-v7.S | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 8dc11e2169bd..907b90776806 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e1695307e6b85477afd2421d3b4891ca5bea8300 +refs/heads/master: a901ff715d53c109821cbbd9d7ea1f2a311646a9 diff --git a/trunk/arch/arm/mm/cache-v7.S b/trunk/arch/arm/mm/cache-v7.S index 06a90dcfc60a..37c8157e116e 100644 --- a/trunk/arch/arm/mm/cache-v7.S +++ b/trunk/arch/arm/mm/cache-v7.S @@ -91,7 +91,11 @@ ENTRY(v7_flush_kern_cache_all) THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) bl v7_flush_dcache_all mov r0, #0 +#ifdef CONFIG_SMP + mcr p15, 0, r0, c7, c1, 0 @ invalidate I-cache inner shareable +#else mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate +#endif ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) mov pc, lr