From dc0eb2d56111e24851bbb76dddd45b6a52c646f9 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 19 May 2010 13:40:14 -0700 Subject: [PATCH] --- yaml --- r: 205471 b: refs/heads/master c: a75af580bb1fd261bf63cc00e4b324e17ceb15cf h: refs/heads/master i: 205469: 970c423c74f4b14a21990721b62cf4d017f8791c 205467: 2df054704d9b09a2a891e62a0cf86a74589c37fa 205463: 5a62e8abb5ae2f072004dbe6d2db6700e034177c 205455: ea40522b649491f75a3ba5ffad810dee3ec3433b 205439: abf8a66647a12d9c65b20fd69cdd620c6187e53e v: v3 --- [refs] | 2 +- trunk/arch/x86/include/asm/mrst.h | 7 ++++++- trunk/arch/x86/kernel/mrst.c | 17 ++++++----------- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/[refs] b/[refs] index 4a91b4155441..2de40242e3f5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a875c01944f0d750eeb1ef3133feceb13f13c4b3 +refs/heads/master: a75af580bb1fd261bf63cc00e4b324e17ceb15cf diff --git a/trunk/arch/x86/include/asm/mrst.h b/trunk/arch/x86/include/asm/mrst.h index 67ad31545778..1869c18d15ca 100644 --- a/trunk/arch/x86/include/asm/mrst.h +++ b/trunk/arch/x86/include/asm/mrst.h @@ -11,7 +11,6 @@ #ifndef _ASM_X86_MRST_H #define _ASM_X86_MRST_H extern int pci_mrst_init(void); -extern int mrst_identify_cpu(void); extern int mrst_timer_options __cpuinitdata; int __init sfi_parse_mrtc(struct sfi_table_header *table); @@ -27,6 +26,12 @@ enum mrst_cpu_type { MRST_CPU_CHIP_PENWELL, }; +extern enum mrst_cpu_type __mrst_cpu_chip; +static enum mrst_cpu_type mrst_identify_cpu(void) +{ + return __mrst_cpu_chip; +} + enum mrst_timer_options { MRST_TIMER_DEFAULT, MRST_TIMER_APBT_ONLY, diff --git a/trunk/arch/x86/kernel/mrst.c b/trunk/arch/x86/kernel/mrst.c index 636b53bd4198..967f2686adb0 100644 --- a/trunk/arch/x86/kernel/mrst.c +++ b/trunk/arch/x86/kernel/mrst.c @@ -50,7 +50,8 @@ int mrst_timer_options __cpuinitdata; static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM]; static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM]; -static int mrst_cpu_chip; +enum mrst_cpu_type __mrst_cpu_chip; +EXPORT_SYMBOL_GPL(__mrst_cpu_chip); int sfi_mtimer_num; @@ -233,25 +234,19 @@ void __init mrst_rtc_init(void) sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc); } -int mrst_identify_cpu(void) -{ - return mrst_cpu_chip; -} -EXPORT_SYMBOL_GPL(mrst_identify_cpu); - void __cpuinit mrst_arch_setup(void) { if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27) - mrst_cpu_chip = MRST_CPU_CHIP_PENWELL; + __mrst_cpu_chip = MRST_CPU_CHIP_PENWELL; else if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x26) - mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; + __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; else { pr_err("Unknown Moorestown CPU (%d:%d), default to Lincroft\n", boot_cpu_data.x86, boot_cpu_data.x86_model); - mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; + __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; } pr_debug("Moorestown CPU %s identified\n", - (mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ? + (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ? "Lincroft" : "Penwell"); }