From dc1cbd88d3472238bfba2b02cc1ed4438017c941 Mon Sep 17 00:00:00 2001 From: Bruce Allan Date: Wed, 5 May 2010 22:00:27 +0000 Subject: [PATCH] --- yaml --- r: 194798 b: refs/heads/master c: 627c8a041f7aaaea93c766f69bd61d952a277586 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/e1000e/ich8lan.c | 10 ++++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 9a80c9ce877f..3fe23d25e421 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6dfaa76994e5d49a82afb415bbe1362e901b2b95 +refs/heads/master: 627c8a041f7aaaea93c766f69bd61d952a277586 diff --git a/trunk/drivers/net/e1000e/ich8lan.c b/trunk/drivers/net/e1000e/ich8lan.c index 0bfef8e16a7b..b8c4dce01a04 100644 --- a/trunk/drivers/net/e1000e/ich8lan.c +++ b/trunk/drivers/net/e1000e/ich8lan.c @@ -294,6 +294,16 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) msleep(50); } + /* + * Reset the PHY before any acccess to it. Doing so, ensures that + * the PHY is in a known good state before we read/write PHY registers. + * The generic reset is sufficient here, because we haven't determined + * the PHY type yet. + */ + ret_val = e1000e_phy_hw_reset_generic(hw); + if (ret_val) + goto out; + phy->id = e1000_phy_unknown; ret_val = e1000e_get_phy_id(hw); if (ret_val)