From dc45d71cbf27806a6801b933843fd89852c781ee Mon Sep 17 00:00:00 2001
From: Paul Walmsley <paul@pwsan.com>
Date: Tue, 27 Jan 2009 19:13:12 -0700
Subject: [PATCH] --- yaml --- r: 137324 b: refs/heads/master c:
 ae8578c0194695bd37435249dfed720769a6bbf3 h: refs/heads/master v: v3

---
 [refs]                                | 2 +-
 trunk/arch/arm/mach-omap2/clock34xx.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 91d35f862158..696fe131f7f4 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 6c8fe0b954b198d8e9116b824f7998c00f47c46c
+refs/heads/master: ae8578c0194695bd37435249dfed720769a6bbf3
diff --git a/trunk/arch/arm/mach-omap2/clock34xx.h b/trunk/arch/arm/mach-omap2/clock34xx.h
index c265cdcc86aa..65929cc37406 100644
--- a/trunk/arch/arm/mach-omap2/clock34xx.h
+++ b/trunk/arch/arm/mach-omap2/clock34xx.h
@@ -811,6 +811,8 @@ static struct clk dpll4_m4_ck = {
 	.clksel		= div16_dpll4_clksel,
 	.flags		= RATE_PROPAGATES,
 	.recalc		= &omap2_clksel_recalc,
+	.set_rate	= &omap2_clksel_set_rate,
+	.round_rate	= &omap2_clksel_round_rate,
 };
 
 /* The PWRDN bit is apparently only available on 3430ES2 and above */