From dc969893b1a4d29f593abb5d4f31851772006fef Mon Sep 17 00:00:00 2001 From: Antti Palosaari Date: Mon, 17 Sep 2012 17:53:04 -0300 Subject: [PATCH] --- yaml --- r: 331177 b: refs/heads/master c: 7e688de0006dd02583332c14e07ab2560a92e37d h: refs/heads/master i: 331175: ca66ee9fe925d081cfea1948559eb533a5dbb032 v: v3 --- [refs] | 2 +- trunk/drivers/media/dvb-frontends/rtl2832.c | 4 ++ trunk/drivers/media/dvb-frontends/rtl2832.h | 1 + .../media/dvb-frontends/rtl2832_priv.h | 37 +++++++++++++++++++ 4 files changed, 43 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index b44ed9870144..37512c41e2be 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8acc91cd68e8493ce892c39d9f94afd8bcf9be67 +refs/heads/master: 7e688de0006dd02583332c14e07ab2560a92e37d diff --git a/trunk/drivers/media/dvb-frontends/rtl2832.c b/trunk/drivers/media/dvb-frontends/rtl2832.c index aaf0c29f0229..80c8e5f1182f 100644 --- a/trunk/drivers/media/dvb-frontends/rtl2832.c +++ b/trunk/drivers/media/dvb-frontends/rtl2832.c @@ -468,6 +468,10 @@ static int rtl2832_init(struct dvb_frontend *fe) len = ARRAY_SIZE(rtl2832_tuner_init_tua9001); init = rtl2832_tuner_init_tua9001; break; + case RTL2832_TUNER_E4000: + len = ARRAY_SIZE(rtl2832_tuner_init_e4000); + init = rtl2832_tuner_init_e4000; + break; default: ret = -EINVAL; goto err; diff --git a/trunk/drivers/media/dvb-frontends/rtl2832.h b/trunk/drivers/media/dvb-frontends/rtl2832.h index c4a611868195..785a466eb065 100644 --- a/trunk/drivers/media/dvb-frontends/rtl2832.h +++ b/trunk/drivers/media/dvb-frontends/rtl2832.h @@ -49,6 +49,7 @@ struct rtl2832_config { */ #define RTL2832_TUNER_TUA9001 0x24 #define RTL2832_TUNER_FC0012 0x26 +#define RTL2832_TUNER_E4000 0x27 #define RTL2832_TUNER_FC0013 0x29 u8 tuner; }; diff --git a/trunk/drivers/media/dvb-frontends/rtl2832_priv.h b/trunk/drivers/media/dvb-frontends/rtl2832_priv.h index 5e68955a539c..7d97ce9d2193 100644 --- a/trunk/drivers/media/dvb-frontends/rtl2832_priv.h +++ b/trunk/drivers/media/dvb-frontends/rtl2832_priv.h @@ -302,4 +302,41 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = { {DVBT_IF_AGC_MAN, 0x0}, }; +static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = { + {DVBT_DAGC_TRG_VAL, 0x5a}, + {DVBT_AGC_TARG_VAL_0, 0x0}, + {DVBT_AGC_TARG_VAL_8_1, 0x5a}, + {DVBT_AAGC_LOOP_GAIN, 0x18}, + {DVBT_LOOP_GAIN2_3_0, 0x8}, + {DVBT_LOOP_GAIN2_4, 0x1}, + {DVBT_LOOP_GAIN3, 0x18}, + {DVBT_VTOP1, 0x35}, + {DVBT_VTOP2, 0x21}, + {DVBT_VTOP3, 0x21}, + {DVBT_KRF1, 0x0}, + {DVBT_KRF2, 0x40}, + {DVBT_KRF3, 0x10}, + {DVBT_KRF4, 0x10}, + {DVBT_IF_AGC_MIN, 0x80}, + {DVBT_IF_AGC_MAX, 0x7f}, + {DVBT_RF_AGC_MIN, 0x80}, + {DVBT_RF_AGC_MAX, 0x7f}, + {DVBT_POLAR_RF_AGC, 0x0}, + {DVBT_POLAR_IF_AGC, 0x0}, + {DVBT_AD7_SETTING, 0xe9d4}, + {DVBT_EN_GI_PGA, 0x0}, + {DVBT_THD_LOCK_UP, 0x0}, + {DVBT_THD_LOCK_DW, 0x0}, + {DVBT_THD_UP1, 0x14}, + {DVBT_THD_DW1, 0xec}, + {DVBT_INTER_CNT_LEN, 0xc}, + {DVBT_GI_PGA_STATE, 0x0}, + {DVBT_EN_AGC_PGA, 0x1}, + {DVBT_REG_GPE, 0x1}, + {DVBT_REG_GPO, 0x1}, + {DVBT_REG_MONSEL, 0x1}, + {DVBT_REG_MON, 0x1}, + {DVBT_REG_4MSEL, 0x0}, +}; + #endif /* RTL2832_PRIV_H */