From dccd25aa0c41af49a0a0d4b8772150561efe6fab Mon Sep 17 00:00:00 2001
From: Ralf Baechle <ralf@linux-mips.org>
Date: Thu, 31 May 2007 14:03:45 +0100
Subject: [PATCH] --- yaml --- r: 57583 b: refs/heads/master c:
 6a05888d713dd915d3268000a479e38646aa423f h: refs/heads/master i:   57581:
 559d5bae9378899acc10ae89a9595687248d6f76   57579:
 50577eab7d1fc6f915be4289baab394815512633   57575:
 96e9cc171269991d9bfebf14ac6c279b7e5fc388   57567:
 b2795480bc8734259a1bfaee6a66add37128713b v: v3

---
 [refs]                         | 2 +-
 trunk/arch/mips/kernel/traps.c | 7 +++++++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index a79ab867038d..4677756eea3e 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 8e8a52ed87e5b1fa60108b525774f2a28b4016d5
+refs/heads/master: 6a05888d713dd915d3268000a479e38646aa423f
diff --git a/trunk/arch/mips/kernel/traps.c b/trunk/arch/mips/kernel/traps.c
index 44f0a2c11807..a7a17eb9bfcd 100644
--- a/trunk/arch/mips/kernel/traps.c
+++ b/trunk/arch/mips/kernel/traps.c
@@ -1384,6 +1384,13 @@ void __init per_cpu_trap_init(void)
 		cpu_cache_init();
 		tlb_init();
 #ifdef CONFIG_MIPS_MT_SMTC
+	} else if (!secondaryTC) {
+		/*
+		 * First TC in non-boot VPE must do subset of tlb_init()
+		 * for MMU countrol registers.
+		 */
+		write_c0_pagemask(PM_DEFAULT_MASK);
+		write_c0_wired(0);
 	}
 #endif /* CONFIG_MIPS_MT_SMTC */
 }