From ddc500fcb6042bc8120c6772ae143acff1409b6e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 10 Sep 2010 16:58:42 +0200 Subject: [PATCH] --- yaml --- r: 212524 b: refs/heads/master c: 79901478e0a2854c4becbb2e77f176bd7fa37caa h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-mx5/clock-mx51.c | 30 +++++++++++++++------------- 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/[refs] b/[refs] index b8cee8bdfa6d..2fb2bc0094e2 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9f0c11ee67d9a5ab76c27d2f9dbdd9ee85fbce10 +refs/heads/master: 79901478e0a2854c4becbb2e77f176bd7fa37caa diff --git a/trunk/arch/arm/mach-mx5/clock-mx51.c b/trunk/arch/arm/mach-mx5/clock-mx51.c index 57c10a9926cc..fe658bf5b490 100644 --- a/trunk/arch/arm/mach-mx5/clock-mx51.c +++ b/trunk/arch/arm/mach-mx5/clock-mx51.c @@ -41,34 +41,36 @@ static struct clk usboh3_clk; #define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */ -static int _clk_ccgr_enable(struct clk *clk) +static void _clk_ccgr_setclk(struct clk *clk, unsigned mode) { - u32 reg; + u32 reg = __raw_readl(clk->enable_reg); + + reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift); + reg |= mode << clk->enable_shift; - reg = __raw_readl(clk->enable_reg); - reg |= MXC_CCM_CCGRx_MOD_ON << clk->enable_shift; __raw_writel(reg, clk->enable_reg); +} +static int _clk_ccgr_enable(struct clk *clk) +{ + _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_ON); return 0; } static void _clk_ccgr_disable(struct clk *clk) { - u32 reg; - reg = __raw_readl(clk->enable_reg); - reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift); - __raw_writel(reg, clk->enable_reg); + _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_OFF); +} +static int _clk_ccgr_enable_inrun(struct clk *clk) +{ + _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_IDLE); + return 0; } static void _clk_ccgr_disable_inwait(struct clk *clk) { - u32 reg; - - reg = __raw_readl(clk->enable_reg); - reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift); - reg |= MXC_CCM_CCGRx_MOD_IDLE << clk->enable_shift; - __raw_writel(reg, clk->enable_reg); + _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_IDLE); } /*