From df4d69c32a0fcb72d74abc9f739e4c03af2871eb Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 6 Nov 2009 21:48:12 +0900 Subject: [PATCH] --- yaml --- r: 173854 b: refs/heads/master c: 4cb6d1d6da471d795320cc4a933ce60f415dd1f6 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/i2c/busses/i2c-designware.c | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index d187e9e69f34..a79803a0d656 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0774539948b23984f1c866135ba307fa2c441d0e +refs/heads/master: 4cb6d1d6da471d795320cc4a933ce60f415dd1f6 diff --git a/trunk/drivers/i2c/busses/i2c-designware.c b/trunk/drivers/i2c/busses/i2c-designware.c index 5fce1a07e6c1..0eea0dd35895 100644 --- a/trunk/drivers/i2c/busses/i2c-designware.c +++ b/trunk/drivers/i2c/busses/i2c-designware.c @@ -50,6 +50,8 @@ #define DW_IC_INTR_STAT 0x2c #define DW_IC_INTR_MASK 0x30 #define DW_IC_RAW_INTR_STAT 0x34 +#define DW_IC_RX_TL 0x38 +#define DW_IC_TX_TL 0x3c #define DW_IC_CLR_INTR 0x40 #define DW_IC_CLR_RX_UNDER 0x44 #define DW_IC_CLR_RX_OVER 0x48 @@ -295,6 +297,10 @@ static void i2c_dw_init(struct dw_i2c_dev *dev) writel(lcnt, dev->base + DW_IC_FS_SCL_LCNT); dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); + /* Configure Tx/Rx FIFO threshold levels */ + writel(dev->tx_fifo_depth - 1, dev->base + DW_IC_TX_TL); + writel(0, dev->base + DW_IC_RX_TL); + /* configure the i2c master */ ic_con = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST;