From df86007a189d92b1bd151aad58fdb4b635d4a527 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 23 Nov 2011 20:00:00 +0000 Subject: [PATCH] --- yaml --- r: 276055 b: refs/heads/master c: 33e1e10a5874e735dd2897116ddc222e581e54bf h: refs/heads/master i: 276053: e9426aa19598bf2f70266058143698b29125961b 276051: bdafa3c360e10e1e6f742c15a646485ca834661e 276047: 44efb6d5777d307e42698d885ead044ec6c34b60 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-mxs/clock-mx28.c | 2 +- trunk/arch/arm/tools/mach-types | 1 + 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index ec438e9abffc..64ec10383ddb 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: f475058f48d3acb3c3979311c9532f3113839468 +refs/heads/master: 33e1e10a5874e735dd2897116ddc222e581e54bf diff --git a/trunk/arch/arm/mach-mxs/clock-mx28.c b/trunk/arch/arm/mach-mxs/clock-mx28.c index 229ae3494216..da6e4aad177c 100644 --- a/trunk/arch/arm/mach-mxs/clock-mx28.c +++ b/trunk/arch/arm/mach-mxs/clock-mx28.c @@ -404,7 +404,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ - if (reg | (1 << clk->enable_shift)) { \ + if (reg & (1 << clk->enable_shift)) { \ pr_err("%s: clock is gated\n", __func__); \ return -EINVAL; \ } \ diff --git a/trunk/arch/arm/tools/mach-types b/trunk/arch/arm/tools/mach-types index 5bdeef969847..ccbe16f47227 100644 --- a/trunk/arch/arm/tools/mach-types +++ b/trunk/arch/arm/tools/mach-types @@ -1123,5 +1123,6 @@ blissc MACH_BLISSC BLISSC 3491 thales_adc MACH_THALES_ADC THALES_ADC 3492 ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 atdgp318 MACH_ATDGP318 ATDGP318 3494 +m28evk MACH_M28EVK M28EVK 3613 smdk4212 MACH_SMDK4212 SMDK4212 3638 smdk4412 MACH_SMDK4412 SMDK4412 3765