diff --git a/[refs] b/[refs] index 3d2541cc0c10..7cc3e78e9f1f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 13dda80e48439b446d0bc9bab34b91484bc8f533 +refs/heads/master: b4de921ae6f7bb211868be4f7d56e80ac6da676c diff --git a/trunk/.gitignore b/trunk/.gitignore index de6344e15706..fb2190c61af0 100644 --- a/trunk/.gitignore +++ b/trunk/.gitignore @@ -37,7 +37,6 @@ modules.builtin tags TAGS vmlinux -vmlinuz System.map Module.markers Module.symvers diff --git a/trunk/Documentation/ABI/testing/ima_policy b/trunk/Documentation/ABI/testing/ima_policy index 6cd6daefaaed..6434f0df012e 100644 --- a/trunk/Documentation/ABI/testing/ima_policy +++ b/trunk/Documentation/ABI/testing/ima_policy @@ -20,7 +20,7 @@ Description: lsm: [[subj_user=] [subj_role=] [subj_type=] [obj_user=] [obj_role=] [obj_type=]] - base: func:= [BPRM_CHECK][FILE_MMAP][FILE_CHECK] + base: func:= [BPRM_CHECK][FILE_MMAP][INODE_PERMISSION] mask:= [MAY_READ] [MAY_WRITE] [MAY_APPEND] [MAY_EXEC] fsmagic:= hex value uid:= decimal value @@ -40,11 +40,11 @@ Description: measure func=BPRM_CHECK measure func=FILE_MMAP mask=MAY_EXEC - measure func=FILE_CHECK mask=MAY_READ uid=0 + measure func=INODE_PERM mask=MAY_READ uid=0 The default policy measures all executables in bprm_check, all files mmapped executable in file_mmap, and all files - open for read by root in do_filp_open. + open for read by root in inode_permission. Examples of LSM specific definitions: @@ -54,8 +54,8 @@ Description: dont_measure obj_type=var_log_t dont_measure obj_type=auditd_log_t - measure subj_user=system_u func=FILE_CHECK mask=MAY_READ - measure subj_role=system_r func=FILE_CHECK mask=MAY_READ + measure subj_user=system_u func=INODE_PERM mask=MAY_READ + measure subj_role=system_r func=INODE_PERM mask=MAY_READ Smack: - measure subj_user=_ func=FILE_CHECK mask=MAY_READ + measure subj_user=_ func=INODE_PERM mask=MAY_READ diff --git a/trunk/Documentation/ABI/testing/sysfs-block b/trunk/Documentation/ABI/testing/sysfs-block index 4873c759d535..d2f90334bb93 100644 --- a/trunk/Documentation/ABI/testing/sysfs-block +++ b/trunk/Documentation/ABI/testing/sysfs-block @@ -128,17 +128,3 @@ Description: preferred request size for workloads where sustained throughput is desired. If no optimal I/O size is reported this file contains 0. - -What: /sys/block//queue/nomerges -Date: January 2010 -Contact: -Description: - Standard I/O elevator operations include attempts to - merge contiguous I/Os. For known random I/O loads these - attempts will always fail and result in extra cycles - being spent in the kernel. This allows one to turn off - this behavior on one of two ways: When set to 1, complex - merge checks are disabled, but the simple one-shot merges - with the previous I/O request are enabled. When set to 2, - all merge tries are disabled. The default value is 0 - - which enables all types of merge tries. diff --git a/trunk/Documentation/ABI/testing/sysfs-devices-power b/trunk/Documentation/ABI/testing/sysfs-devices-power deleted file mode 100644 index 6123c523bfd7..000000000000 --- a/trunk/Documentation/ABI/testing/sysfs-devices-power +++ /dev/null @@ -1,79 +0,0 @@ -What: /sys/devices/.../power/ -Date: January 2009 -Contact: Rafael J. Wysocki -Description: - The /sys/devices/.../power directory contains attributes - allowing the user space to check and modify some power - management related properties of given device. - -What: /sys/devices/.../power/wakeup -Date: January 2009 -Contact: Rafael J. Wysocki -Description: - The /sys/devices/.../power/wakeup attribute allows the user - space to check if the device is enabled to wake up the system - from sleep states, such as the memory sleep state (suspend to - RAM) and hibernation (suspend to disk), and to enable or disable - it to do that as desired. - - Some devices support "wakeup" events, which are hardware signals - used to activate the system from a sleep state. Such devices - have one of the following two values for the sysfs power/wakeup - file: - - + "enabled\n" to issue the events; - + "disabled\n" not to do so; - - In that cases the user space can change the setting represented - by the contents of this file by writing either "enabled", or - "disabled" to it. - - For the devices that are not capable of generating system wakeup - events this file contains "\n". In that cases the user space - cannot modify the contents of this file and the device cannot be - enabled to wake up the system. - -What: /sys/devices/.../power/control -Date: January 2009 -Contact: Rafael J. Wysocki -Description: - The /sys/devices/.../power/control attribute allows the user - space to control the run-time power management of the device. - - All devices have one of the following two values for the - power/control file: - - + "auto\n" to allow the device to be power managed at run time; - + "on\n" to prevent the device from being power managed; - - The default for all devices is "auto", which means that they may - be subject to automatic power management, depending on their - drivers. Changing this attribute to "on" prevents the driver - from power managing the device at run time. Doing that while - the device is suspended causes it to be woken up. - -What: /sys/devices/.../power/async -Date: January 2009 -Contact: Rafael J. Wysocki -Description: - The /sys/devices/.../async attribute allows the user space to - enable or diasble the device's suspend and resume callbacks to - be executed asynchronously (ie. in separate threads, in parallel - with the main suspend/resume thread) during system-wide power - transitions (eg. suspend to RAM, hibernation). - - All devices have one of the following two values for the - power/async file: - - + "enabled\n" to permit the asynchronous suspend/resume; - + "disabled\n" to forbid it; - - The value of this attribute may be changed by writing either - "enabled", or "disabled" to it. - - It generally is unsafe to permit the asynchronous suspend/resume - of a device unless it is certain that all of the PM dependencies - of the device are known to the PM core. However, for some - devices this attribute is set to "enabled" by bus type code or - device drivers and in that cases it should be safe to leave the - default value. diff --git a/trunk/Documentation/ABI/testing/sysfs-power b/trunk/Documentation/ABI/testing/sysfs-power index d6a801f45b48..dcff4d0623ad 100644 --- a/trunk/Documentation/ABI/testing/sysfs-power +++ b/trunk/Documentation/ABI/testing/sysfs-power @@ -101,16 +101,3 @@ Description: CAUTION: Using it will cause your machine's real-time (CMOS) clock to be set to a random invalid time after a resume. - -What: /sys/power/pm_async -Date: January 2009 -Contact: Rafael J. Wysocki -Description: - The /sys/power/pm_async file controls the switch allowing the - user space to enable or disable asynchronous suspend and resume - of devices. If enabled, this feature will cause some device - drivers' suspend and resume callbacks to be executed in parallel - with each other and with the main suspend thread. It is enabled - if this file contains "1", which is the default. It may be - disabled by writing "0" to this file, in which case all devices - will be suspended and resumed synchronously. diff --git a/trunk/Documentation/PCI/PCI-DMA-mapping.txt b/trunk/Documentation/DMA-mapping.txt similarity index 100% rename from trunk/Documentation/PCI/PCI-DMA-mapping.txt rename to trunk/Documentation/DMA-mapping.txt diff --git a/trunk/Documentation/DocBook/mtdnand.tmpl b/trunk/Documentation/DocBook/mtdnand.tmpl index 5e7d84b48505..f508a8a27fea 100644 --- a/trunk/Documentation/DocBook/mtdnand.tmpl +++ b/trunk/Documentation/DocBook/mtdnand.tmpl @@ -174,7 +174,7 @@ static struct mtd_info *board_mtd; -static void __iomem *baseaddr; +static unsigned long baseaddr; Static example @@ -182,7 +182,7 @@ static void __iomem *baseaddr; static struct mtd_info board_mtd; static struct nand_chip board_chip; -static void __iomem *baseaddr; +static unsigned long baseaddr; @@ -283,8 +283,8 @@ int __init board_init (void) } /* map physical address */ - baseaddr = ioremap(CHIP_PHYSICAL_ADDRESS, 1024); - if (!baseaddr) { + baseaddr = (unsigned long)ioremap(CHIP_PHYSICAL_ADDRESS, 1024); + if(!baseaddr){ printk("Ioremap to access NAND chip failed\n"); err = -EIO; goto out_mtd; @@ -316,7 +316,7 @@ int __init board_init (void) goto out; out_ior: - iounmap(baseaddr); + iounmap((void *)baseaddr); out_mtd: kfree (board_mtd); out: @@ -341,7 +341,7 @@ static void __exit board_cleanup (void) nand_release (board_mtd); /* unmap physical address */ - iounmap(baseaddr); + iounmap((void *)baseaddr); /* Free the MTD device structure */ kfree (board_mtd); diff --git a/trunk/Documentation/DocBook/v4l/io.xml b/trunk/Documentation/DocBook/v4l/io.xml index e870330cbf77..f92f24323b2a 100644 --- a/trunk/Documentation/DocBook/v4l/io.xml +++ b/trunk/Documentation/DocBook/v4l/io.xml @@ -589,8 +589,7 @@ number of a video input as in &v4l2-input; field A place holder for future extensions and custom (driver defined) buffer types -V4L2_BUF_TYPE_PRIVATE and higher. Applications -should set this to 0. +V4L2_BUF_TYPE_PRIVATE and higher. diff --git a/trunk/Documentation/DocBook/v4l/vidioc-qbuf.xml b/trunk/Documentation/DocBook/v4l/vidioc-qbuf.xml index b843bd7b3897..187081778154 100644 --- a/trunk/Documentation/DocBook/v4l/vidioc-qbuf.xml +++ b/trunk/Documentation/DocBook/v4l/vidioc-qbuf.xml @@ -54,10 +54,12 @@ to enqueue an empty (capturing) or filled (output) buffer in the driver's incoming queue. The semantics depend on the selected I/O method. - To enqueue a buffer applications set the type -field of a &v4l2-buffer; to the same buffer type as was previously used -with &v4l2-format; type and &v4l2-requestbuffers; -type. Applications must also set the + To enqueue a memory mapped +buffer applications set the type field of a +&v4l2-buffer; to the same buffer type as previously &v4l2-format; +type and &v4l2-requestbuffers; +type, the memory +field to V4L2_MEMORY_MMAP and the index field. Valid index numbers range from zero to the number of buffers allocated with &VIDIOC-REQBUFS; (&v4l2-requestbuffers; count) minus one. The @@ -68,19 +70,8 @@ intended for output (type is V4L2_BUF_TYPE_VBI_OUTPUT) applications must also initialize the bytesused, field and -timestamp fields, see for details. -Applications must also set flags to 0. If a driver -supports capturing from specific video inputs and you want to specify a video -input, then flags should be set to -V4L2_BUF_FLAG_INPUT and the field -input must be initialized to the desired input. -The reserved field must be set to 0. - - - To enqueue a memory mapped -buffer applications set the memory -field to V4L2_MEMORY_MMAP. When +timestamp fields. See for details. When VIDIOC_QBUF is called with a pointer to this structure the driver sets the V4L2_BUF_FLAG_MAPPED and @@ -90,10 +81,14 @@ structure the driver sets the &EINVAL;. To enqueue a user pointer -buffer applications set the memory -field to V4L2_MEMORY_USERPTR, the +buffer applications set the type field of a +&v4l2-buffer; to the same buffer type as previously &v4l2-format; +type and &v4l2-requestbuffers; +type, the memory +field to V4L2_MEMORY_USERPTR and the m.userptr field to the address of the -buffer and length to its size. +buffer and length to its size. When the +buffer is intended for output additional fields must be set as above. When VIDIOC_QBUF is called with a pointer to this structure the driver sets the V4L2_BUF_FLAG_QUEUED flag and clears the V4L2_BUF_FLAG_MAPPED and @@ -101,14 +96,13 @@ flag and clears the V4L2_BUF_FLAG_MAPPED and flags field, or it returns an error code. This ioctl locks the memory pages of the buffer in physical memory, they cannot be swapped out to disk. Buffers remain locked until -dequeued, until the &VIDIOC-STREAMOFF; or &VIDIOC-REQBUFS; ioctl is +dequeued, until the &VIDIOC-STREAMOFF; or &VIDIOC-REQBUFS; ioctl are called, or until the device is closed. Applications call the VIDIOC_DQBUF ioctl to dequeue a filled (capturing) or displayed (output) buffer from the driver's outgoing queue. They just set the -type, memory -and reserved +type and memory fields of a &v4l2-buffer; as above, when VIDIOC_DQBUF is called with a pointer to this structure the driver fills the remaining fields or returns an error code. diff --git a/trunk/Documentation/DocBook/v4l/vidioc-querybuf.xml b/trunk/Documentation/DocBook/v4l/vidioc-querybuf.xml index e649805a4908..d834993e6191 100644 --- a/trunk/Documentation/DocBook/v4l/vidioc-querybuf.xml +++ b/trunk/Documentation/DocBook/v4l/vidioc-querybuf.xml @@ -54,13 +54,12 @@ buffer at any time after buffers have been allocated with the &VIDIOC-REQBUFS; ioctl. Applications set the type field - of a &v4l2-buffer; to the same buffer type as was previously used with + of a &v4l2-buffer; to the same buffer type as previously &v4l2-format; type and &v4l2-requestbuffers; type, and the index field. Valid index numbers range from zero to the number of buffers allocated with &VIDIOC-REQBUFS; (&v4l2-requestbuffers; count) minus one. -The reserved field should to set to 0. After calling VIDIOC_QUERYBUF with a pointer to this structure drivers return an error code or fill the rest of the structure. @@ -69,8 +68,8 @@ the structure. V4L2_BUF_FLAG_MAPPED, V4L2_BUF_FLAG_QUEUED and V4L2_BUF_FLAG_DONE flags will be valid. The -memory field will be set to the current -I/O method, the m.offset +memory field will be set to +V4L2_MEMORY_MMAP, the m.offset contains the offset of the buffer from the start of the device memory, the length field its size. The driver may or may not set the remaining fields and flags, they are meaningless in diff --git a/trunk/Documentation/DocBook/v4l/vidioc-reqbufs.xml b/trunk/Documentation/DocBook/v4l/vidioc-reqbufs.xml index 1c0816372074..bab38084454f 100644 --- a/trunk/Documentation/DocBook/v4l/vidioc-reqbufs.xml +++ b/trunk/Documentation/DocBook/v4l/vidioc-reqbufs.xml @@ -54,23 +54,23 @@ I/O. Memory mapped buffers are located in device memory and must be allocated with this ioctl before they can be mapped into the application's address space. User buffers are allocated by applications themselves, and this ioctl is merely used to switch the -driver into user pointer I/O mode and to setup some internal structures. +driver into user pointer I/O mode. - To allocate device buffers applications initialize all -fields of the v4l2_requestbuffers structure. + To allocate device buffers applications initialize three +fields of a v4l2_requestbuffers structure. They set the type field to the respective stream or buffer type, the count field to -the desired number of buffers, memory -must be set to the requested I/O method and the reserved array -must be zeroed. When the ioctl -is called with a pointer to this structure the driver will attempt to allocate -the requested number of buffers and it stores the actual number +the desired number of buffers, and memory +must be set to V4L2_MEMORY_MMAP. When the ioctl +is called with a pointer to this structure the driver attempts to +allocate the requested number of buffers and stores the actual number allocated in the count field. It can be smaller than the number requested, even zero, when the driver runs out -of free memory. A larger number is also possible when the driver requires -more buffers to function correctly. For example video output requires at least two buffers, +of free memory. A larger number is possible when the driver requires +more buffers to function correctly. + For example video output requires at least two buffers, one displayed and one filled by the application. - When the I/O method is not supported the ioctl + When memory mapping I/O is not supported the ioctl returns an &EINVAL;. Applications can call VIDIOC_REQBUFS @@ -81,6 +81,14 @@ in progress, an implicit &VIDIOC-STREAMOFF;. + To negotiate user pointer I/O, applications initialize only +the type field and set +memory to +V4L2_MEMORY_USERPTR. When the ioctl is called +with a pointer to this structure the driver prepares for user pointer +I/O, when this I/O method is not supported the ioctl returns an +&EINVAL;. + struct <structname>v4l2_requestbuffers</structname> @@ -89,7 +97,9 @@ streamoff.--> __u32 count - The number of buffers requested or granted. + The number of buffers requested or granted. This +field is only used when memory is set to +V4L2_MEMORY_MMAP. &v4l2-buf-type; @@ -110,7 +120,7 @@ as the &v4l2-format; type field. See reserved[2] A place holder for future extensions and custom (driver defined) buffer types V4L2_BUF_TYPE_PRIVATE and -higher. This array should be zeroed by applications. +higher. diff --git a/trunk/Documentation/IO-mapping.txt b/trunk/Documentation/IO-mapping.txt index 1b5aa10df845..78a440695e11 100644 --- a/trunk/Documentation/IO-mapping.txt +++ b/trunk/Documentation/IO-mapping.txt @@ -157,7 +157,7 @@ For such memory, you can do things like * access only the 640k-1MB area, so anything else * has to be remapped. */ - void __iomem *baseptr = ioremap(0xFC000000, 1024*1024); + char * baseptr = ioremap(0xFC000000, 1024*1024); /* write a 'A' to the offset 10 of the area */ writeb('A',baseptr+10); diff --git a/trunk/Documentation/RCU/00-INDEX b/trunk/Documentation/RCU/00-INDEX index 71b6f500ddb9..9bb62f7b89c3 100644 --- a/trunk/Documentation/RCU/00-INDEX +++ b/trunk/Documentation/RCU/00-INDEX @@ -6,22 +6,16 @@ checklist.txt - Review Checklist for RCU Patches listRCU.txt - Using RCU to Protect Read-Mostly Linked Lists -lockdep.txt - - RCU and lockdep checking NMI-RCU.txt - Using RCU to Protect Dynamic NMI Handlers -rcubarrier.txt - - RCU and Unloadable Modules -rculist_nulls.txt - - RCU list primitives for use with SLAB_DESTROY_BY_RCU rcuref.txt - Reference-count design for elements of lists/arrays protected by RCU rcu.txt - RCU Concepts +rcubarrier.txt + - Unloading modules that use RCU callbacks RTFP.txt - List of RCU papers (bibliography) going back to 1980. -stallwarn.txt - - RCU CPU stall warnings (CONFIG_RCU_CPU_STALL_DETECTOR) torture.txt - RCU Torture Test Operation (CONFIG_RCU_TORTURE_TEST) trace.txt diff --git a/trunk/Documentation/RCU/RTFP.txt b/trunk/Documentation/RCU/RTFP.txt index 5aea459e3dd6..d2b85237c76e 100644 --- a/trunk/Documentation/RCU/RTFP.txt +++ b/trunk/Documentation/RCU/RTFP.txt @@ -25,10 +25,10 @@ to be referencing the data structure. However, this mechanism was not optimized for modern computer systems, which is not surprising given that these overheads were not so expensive in the mid-80s. Nonetheless, passive serialization appears to be the first deferred-destruction -mechanism to be used in production. Furthermore, the relevant patent -has lapsed, so this approach may be used in non-GPL software, if desired. -(In contrast, implementation of RCU is permitted only in software licensed -under either GPL or LGPL. Sorry!!!) +mechanism to be used in production. Furthermore, the relevant patent has +lapsed, so this approach may be used in non-GPL software, if desired. +(In contrast, use of RCU is permitted only in software licensed under +GPL. Sorry!!!) In 1990, Pugh [Pugh90] noted that explicitly tracking which threads were reading a given data structure permitted deferred free to operate @@ -150,18 +150,6 @@ preemptible RCU [PaulEMcKenney2007PreemptibleRCU], and the three-part LWN "What is RCU?" series [PaulEMcKenney2007WhatIsRCUFundamentally, PaulEMcKenney2008WhatIsRCUUsage, and PaulEMcKenney2008WhatIsRCUAPI]. -2008 saw a journal paper on real-time RCU [DinakarGuniguntala2008IBMSysJ], -a history of how Linux changed RCU more than RCU changed Linux -[PaulEMcKenney2008RCUOSR], and a design overview of hierarchical RCU -[PaulEMcKenney2008HierarchicalRCU]. - -2009 introduced user-level RCU algorithms [PaulEMcKenney2009MaliciousURCU], -which Mathieu Desnoyers is now maintaining [MathieuDesnoyers2009URCU] -[MathieuDesnoyersPhD]. TINY_RCU [PaulEMcKenney2009BloatWatchRCU] made -its appearance, as did expedited RCU [PaulEMcKenney2009expeditedRCU]. -The problem of resizeable RCU-protected hash tables may now be on a path -to a solution [JoshTriplett2009RPHash]. - Bibtex Entries @article{Kung80 @@ -742,11 +730,6 @@ Revised: " } -# -# "What is RCU?" LWN series. -# -######################################################################## - @article{DinakarGuniguntala2008IBMSysJ ,author="D. Guniguntala and P. E. McKenney and J. Triplett and J. Walpole" ,title="The read-copy-update mechanism for supporting real-time applications on shared-memory multiprocessor systems with {Linux}" @@ -837,39 +820,3 @@ Revised: Uniprocessor assumptions allow simplified RCU implementation. " } - -@unpublished{PaulEMcKenney2009expeditedRCU -,Author="Paul E. McKenney" -,Title="[{PATCH} -tip 0/3] expedited 'big hammer' {RCU} grace periods" -,month="June" -,day="25" -,year="2009" -,note="Available: -\url{http://lkml.org/lkml/2009/6/25/306} -[Viewed August 16, 2009]" -,annotation=" - First posting of expedited RCU to be accepted into -tip. -" -} - -@unpublished{JoshTriplett2009RPHash -,Author="Josh Triplett" -,Title="Scalable concurrent hash tables via relativistic programming" -,month="September" -,year="2009" -,note="Linux Plumbers Conference presentation" -,annotation=" - RP fun with hash tables. -" -} - -@phdthesis{MathieuDesnoyersPhD -, title = "Low-Impact Operating System Tracing" -, author = "Mathieu Desnoyers" -, school = "Ecole Polytechnique de Montr\'{e}al" -, month = "December" -, year = 2009 -,note="Available: -\url{http://www.lttng.org/pub/thesis/desnoyers-dissertation-2009-12.pdf} -[Viewed December 9, 2009]" -} diff --git a/trunk/Documentation/RCU/checklist.txt b/trunk/Documentation/RCU/checklist.txt index cbc180f90194..51525a30e8b4 100644 --- a/trunk/Documentation/RCU/checklist.txt +++ b/trunk/Documentation/RCU/checklist.txt @@ -8,12 +8,13 @@ would cause. This list is based on experiences reviewing such patches over a rather long period of time, but improvements are always welcome! 0. Is RCU being applied to a read-mostly situation? If the data - structure is updated more than about 10% of the time, then you - should strongly consider some other approach, unless detailed - performance measurements show that RCU is nonetheless the right - tool for the job. Yes, RCU does reduce read-side overhead by - increasing write-side overhead, which is exactly why normal uses - of RCU will do much more reading than updating. + structure is updated more than about 10% of the time, then + you should strongly consider some other approach, unless + detailed performance measurements show that RCU is nonetheless + the right tool for the job. Yes, you might think of RCU + as simply cutting overhead off of the readers and imposing it + on the writers. That is exactly why normal uses of RCU will + do much more reading than updating. Another exception is where performance is not an issue, and RCU provides a simpler implementation. An example of this situation @@ -34,13 +35,13 @@ over a rather long period of time, but improvements are always welcome! If you choose #b, be prepared to describe how you have handled memory barriers on weakly ordered machines (pretty much all of - them -- even x86 allows later loads to be reordered to precede - earlier stores), and be prepared to explain why this added - complexity is worthwhile. If you choose #c, be prepared to - explain how this single task does not become a major bottleneck on - big multiprocessor machines (for example, if the task is updating - information relating to itself that other tasks can read, there - by definition can be no bottleneck). + them -- even x86 allows reads to be reordered), and be prepared + to explain why this added complexity is worthwhile. If you + choose #c, be prepared to explain how this single task does not + become a major bottleneck on big multiprocessor machines (for + example, if the task is updating information relating to itself + that other tasks can read, there by definition can be no + bottleneck). 2. Do the RCU read-side critical sections make proper use of rcu_read_lock() and friends? These primitives are needed @@ -50,10 +51,8 @@ over a rather long period of time, but improvements are always welcome! actuarial risk of your kernel. As a rough rule of thumb, any dereference of an RCU-protected - pointer must be covered by rcu_read_lock(), rcu_read_lock_bh(), - rcu_read_lock_sched(), or by the appropriate update-side lock. - Disabling of preemption can serve as rcu_read_lock_sched(), but - is less readable. + pointer must be covered by rcu_read_lock() or rcu_read_lock_bh() + or by the appropriate update-side lock. 3. Does the update code tolerate concurrent accesses? @@ -63,27 +62,25 @@ over a rather long period of time, but improvements are always welcome! of ways to handle this concurrency, depending on the situation: a. Use the RCU variants of the list and hlist update - primitives to add, remove, and replace elements on - an RCU-protected list. Alternatively, use the other - RCU-protected data structures that have been added to - the Linux kernel. + primitives to add, remove, and replace elements on an + RCU-protected list. Alternatively, use the RCU-protected + trees that have been added to the Linux kernel. This is almost always the best approach. b. Proceed as in (a) above, but also maintain per-element locks (that are acquired by both readers and writers) that guard per-element state. Of course, fields that - the readers refrain from accessing can be guarded by - some other lock acquired only by updaters, if desired. + the readers refrain from accessing can be guarded by the + update-side lock. This works quite well, also. c. Make updates appear atomic to readers. For example, - pointer updates to properly aligned fields will - appear atomic, as will individual atomic primitives. - Sequences of perations performed under a lock will -not- - appear to be atomic to RCU readers, nor will sequences - of multiple atomic primitives. + pointer updates to properly aligned fields will appear + atomic, as will individual atomic primitives. Operations + performed under a lock and sequences of multiple atomic + primitives will -not- appear to be atomic. This can work, but is starting to get a bit tricky. @@ -101,9 +98,9 @@ over a rather long period of time, but improvements are always welcome! a new structure containing updated values. 4. Weakly ordered CPUs pose special challenges. Almost all CPUs - are weakly ordered -- even x86 CPUs allow later loads to be - reordered to precede earlier stores. RCU code must take all of - the following measures to prevent memory-corruption problems: + are weakly ordered -- even i386 CPUs allow reads to be reordered. + RCU code must take all of the following measures to prevent + memory-corruption problems: a. Readers must maintain proper ordering of their memory accesses. The rcu_dereference() primitive ensures that @@ -116,25 +113,14 @@ over a rather long period of time, but improvements are always welcome! The rcu_dereference() primitive is also an excellent documentation aid, letting the person reading the code know exactly which pointers are protected by RCU. - Please note that compilers can also reorder code, and - they are becoming increasingly aggressive about doing - just that. The rcu_dereference() primitive therefore - also prevents destructive compiler optimizations. - - The rcu_dereference() primitive is used by the - various "_rcu()" list-traversal primitives, such - as the list_for_each_entry_rcu(). Note that it is - perfectly legal (if redundant) for update-side code to - use rcu_dereference() and the "_rcu()" list-traversal - primitives. This is particularly useful in code that - is common to readers and updaters. However, lockdep - will complain if you access rcu_dereference() outside - of an RCU read-side critical section. See lockdep.txt - to learn what to do about this. - - Of course, neither rcu_dereference() nor the "_rcu()" - list-traversal primitives can substitute for a good - concurrency design coordinating among multiple updaters. + + The rcu_dereference() primitive is used by the various + "_rcu()" list-traversal primitives, such as the + list_for_each_entry_rcu(). Note that it is perfectly + legal (if redundant) for update-side code to use + rcu_dereference() and the "_rcu()" list-traversal + primitives. This is particularly useful in code + that is common to readers and updaters. b. If the list macros are being used, the list_add_tail_rcu() and list_add_rcu() primitives must be used in order @@ -149,14 +135,11 @@ over a rather long period of time, but improvements are always welcome! readers. Similarly, if the hlist macros are being used, the hlist_del_rcu() primitive is required. - The list_replace_rcu() and hlist_replace_rcu() primitives - may be used to replace an old structure with a new one - in their respective types of RCU-protected lists. - - d. Rules similar to (4b) and (4c) apply to the "hlist_nulls" - type of RCU-protected linked lists. + The list_replace_rcu() primitive may be used to + replace an old structure with a new one in an + RCU-protected list. - e. Updates must ensure that initialization of a given + d. Updates must ensure that initialization of a given structure happens before pointers to that structure are publicized. Use the rcu_assign_pointer() primitive when publicizing a pointer to a structure that can @@ -168,31 +151,16 @@ over a rather long period of time, but improvements are always welcome! it cannot block. 6. Since synchronize_rcu() can block, it cannot be called from - any sort of irq context. The same rule applies for - synchronize_rcu_bh(), synchronize_sched(), synchronize_srcu(), - synchronize_rcu_expedited(), synchronize_rcu_bh_expedited(), - synchronize_sched_expedite(), and synchronize_srcu_expedited(). - - The expedited forms of these primitives have the same semantics - as the non-expedited forms, but expediting is both expensive - and unfriendly to real-time workloads. Use of the expedited - primitives should be restricted to rare configuration-change - operations that would not normally be undertaken while a real-time - workload is running. - -7. If the updater uses call_rcu() or synchronize_rcu(), then the - corresponding readers must use rcu_read_lock() and - rcu_read_unlock(). If the updater uses call_rcu_bh() or - synchronize_rcu_bh(), then the corresponding readers must - use rcu_read_lock_bh() and rcu_read_unlock_bh(). If the - updater uses call_rcu_sched() or synchronize_sched(), then - the corresponding readers must disable preemption, possibly - by calling rcu_read_lock_sched() and rcu_read_unlock_sched(). - If the updater uses synchronize_srcu(), the the corresponding - readers must use srcu_read_lock() and srcu_read_unlock(), - and with the same srcu_struct. The rules for the expedited - primitives are the same as for their non-expedited counterparts. - Mixing things up will result in confusion and broken kernels. + any sort of irq context. Ditto for synchronize_sched() and + synchronize_srcu(). + +7. If the updater uses call_rcu(), then the corresponding readers + must use rcu_read_lock() and rcu_read_unlock(). If the updater + uses call_rcu_bh(), then the corresponding readers must use + rcu_read_lock_bh() and rcu_read_unlock_bh(). If the updater + uses call_rcu_sched(), then the corresponding readers must + disable preemption. Mixing things up will result in confusion + and broken kernels. One exception to this rule: rcu_read_lock() and rcu_read_unlock() may be substituted for rcu_read_lock_bh() and rcu_read_unlock_bh() @@ -244,8 +212,6 @@ over a rather long period of time, but improvements are always welcome! e. Periodically invoke synchronize_rcu(), permitting a limited number of updates per grace period. - The same cautions apply to call_rcu_bh() and call_rcu_sched(). - 9. All RCU list-traversal primitives, which include rcu_dereference(), list_for_each_entry_rcu(), list_for_each_continue_rcu(), and list_for_each_safe_rcu(), @@ -253,9 +219,7 @@ over a rather long period of time, but improvements are always welcome! must be protected by appropriate update-side locks. RCU read-side critical sections are delimited by rcu_read_lock() and rcu_read_unlock(), or by similar primitives such as - rcu_read_lock_bh() and rcu_read_unlock_bh(), in which case - the matching rcu_dereference() primitive must be used in order - to keep lockdep happy, in this case, rcu_dereference_bh(). + rcu_read_lock_bh() and rcu_read_unlock_bh(). The reason that it is permissible to use RCU list-traversal primitives when the update-side lock is held is that doing so @@ -265,8 +229,7 @@ over a rather long period of time, but improvements are always welcome! 10. Conversely, if you are in an RCU read-side critical section, and you don't hold the appropriate update-side lock, you -must- use the "_rcu()" variants of the list macros. Failing to do so - will break Alpha, cause aggressive compilers to generate bad code, - and confuse people trying to read your code. + will break Alpha and confuse people reading your code. 11. Note that synchronize_rcu() -only- guarantees to wait until all currently executing rcu_read_lock()-protected RCU read-side @@ -276,21 +239,15 @@ over a rather long period of time, but improvements are always welcome! rcu_read_lock()-protected read-side critical sections, do -not- use synchronize_rcu(). - Similarly, disabling preemption is not an acceptable substitute - for rcu_read_lock(). Code that attempts to use preemption - disabling where it should be using rcu_read_lock() will break - in real-time kernel builds. - - If you want to wait for interrupt handlers, NMI handlers, and - code under the influence of preempt_disable(), you instead - need to use synchronize_irq() or synchronize_sched(). + If you want to wait for some of these other things, you might + instead need to use synchronize_irq() or synchronize_sched(). 12. Any lock acquired by an RCU callback must be acquired elsewhere with softirq disabled, e.g., via spin_lock_irqsave(), spin_lock_bh(), etc. Failing to disable irq on a given - acquisition of that lock will result in deadlock as soon as - the RCU softirq handler happens to run your RCU callback while - interrupting that acquisition's critical section. + acquisition of that lock will result in deadlock as soon as the + RCU callback happens to interrupt that acquisition's critical + section. 13. RCU callbacks can be and are executed in parallel. In many cases, the callback code simply wrappers around kfree(), so that this @@ -308,30 +265,29 @@ over a rather long period of time, but improvements are always welcome! not the case, a self-spawning RCU callback would prevent the victim CPU from ever going offline.) -14. SRCU (srcu_read_lock(), srcu_read_unlock(), srcu_dereference(), - synchronize_srcu(), and synchronize_srcu_expedited()) may only - be invoked from process context. Unlike other forms of RCU, it - -is- permissible to block in an SRCU read-side critical section - (demarked by srcu_read_lock() and srcu_read_unlock()), hence the - "SRCU": "sleepable RCU". Please note that if you don't need - to sleep in read-side critical sections, you should be using - RCU rather than SRCU, because RCU is almost always faster and - easier to use than is SRCU. +14. SRCU (srcu_read_lock(), srcu_read_unlock(), and synchronize_srcu()) + may only be invoked from process context. Unlike other forms of + RCU, it -is- permissible to block in an SRCU read-side critical + section (demarked by srcu_read_lock() and srcu_read_unlock()), + hence the "SRCU": "sleepable RCU". Please note that if you + don't need to sleep in read-side critical sections, you should + be using RCU rather than SRCU, because RCU is almost always + faster and easier to use than is SRCU. Also unlike other forms of RCU, explicit initialization and cleanup is required via init_srcu_struct() and cleanup_srcu_struct(). These are passed a "struct srcu_struct" that defines the scope of a given SRCU domain. Once initialized, the srcu_struct is passed to srcu_read_lock(), srcu_read_unlock() - synchronize_srcu(), and synchronize_srcu_expedited(). A given - synchronize_srcu() waits only for SRCU read-side critical - sections governed by srcu_read_lock() and srcu_read_unlock() - calls that have been passed the same srcu_struct. This property - is what makes sleeping read-side critical sections tolerable -- - a given subsystem delays only its own updates, not those of other - subsystems using SRCU. Therefore, SRCU is less prone to OOM the - system than RCU would be if RCU's read-side critical sections - were permitted to sleep. + and synchronize_srcu(). A given synchronize_srcu() waits only + for SRCU read-side critical sections governed by srcu_read_lock() + and srcu_read_unlock() calls that have been passd the same + srcu_struct. This property is what makes sleeping read-side + critical sections tolerable -- a given subsystem delays only + its own updates, not those of other subsystems using SRCU. + Therefore, SRCU is less prone to OOM the system than RCU would + be if RCU's read-side critical sections were permitted to + sleep. The ability to sleep in read-side critical sections does not come for free. First, corresponding srcu_read_lock() and @@ -355,12 +311,12 @@ over a rather long period of time, but improvements are always welcome! destructive operation, and -only- -then- invoke call_rcu(), synchronize_rcu(), or friends. - Because these primitives only wait for pre-existing readers, it - is the caller's responsibility to guarantee that any subsequent - readers will execute safely. + Because these primitives only wait for pre-existing readers, + it is the caller's responsibility to guarantee safety to + any subsequent readers. -16. The various RCU read-side primitives do -not- necessarily contain - memory barriers. You should therefore plan for the CPU - and the compiler to freely reorder code into and out of RCU - read-side critical sections. It is the responsibility of the - RCU update-side primitives to deal with this. +16. The various RCU read-side primitives do -not- contain memory + barriers. The CPU (and in some cases, the compiler) is free + to reorder code into and out of RCU read-side critical sections. + It is the responsibility of the RCU update-side primitives to + deal with this. diff --git a/trunk/Documentation/RCU/lockdep.txt b/trunk/Documentation/RCU/lockdep.txt deleted file mode 100644 index fe24b58627bd..000000000000 --- a/trunk/Documentation/RCU/lockdep.txt +++ /dev/null @@ -1,67 +0,0 @@ -RCU and lockdep checking - -All flavors of RCU have lockdep checking available, so that lockdep is -aware of when each task enters and leaves any flavor of RCU read-side -critical section. Each flavor of RCU is tracked separately (but note -that this is not the case in 2.6.32 and earlier). This allows lockdep's -tracking to include RCU state, which can sometimes help when debugging -deadlocks and the like. - -In addition, RCU provides the following primitives that check lockdep's -state: - - rcu_read_lock_held() for normal RCU. - rcu_read_lock_bh_held() for RCU-bh. - rcu_read_lock_sched_held() for RCU-sched. - srcu_read_lock_held() for SRCU. - -These functions are conservative, and will therefore return 1 if they -aren't certain (for example, if CONFIG_DEBUG_LOCK_ALLOC is not set). -This prevents things like WARN_ON(!rcu_read_lock_held()) from giving false -positives when lockdep is disabled. - -In addition, a separate kernel config parameter CONFIG_PROVE_RCU enables -checking of rcu_dereference() primitives: - - rcu_dereference(p): - Check for RCU read-side critical section. - rcu_dereference_bh(p): - Check for RCU-bh read-side critical section. - rcu_dereference_sched(p): - Check for RCU-sched read-side critical section. - srcu_dereference(p, sp): - Check for SRCU read-side critical section. - rcu_dereference_check(p, c): - Use explicit check expression "c". - rcu_dereference_raw(p) - Don't check. (Use sparingly, if at all.) - -The rcu_dereference_check() check expression can be any boolean -expression, but would normally include one of the rcu_read_lock_held() -family of functions and a lockdep expression. However, any boolean -expression can be used. For a moderately ornate example, consider -the following: - - file = rcu_dereference_check(fdt->fd[fd], - rcu_read_lock_held() || - lockdep_is_held(&files->file_lock) || - atomic_read(&files->count) == 1); - -This expression picks up the pointer "fdt->fd[fd]" in an RCU-safe manner, -and, if CONFIG_PROVE_RCU is configured, verifies that this expression -is used in: - -1. An RCU read-side critical section, or -2. with files->file_lock held, or -3. on an unshared files_struct. - -In case (1), the pointer is picked up in an RCU-safe manner for vanilla -RCU read-side critical sections, in case (2) the ->file_lock prevents -any change from taking place, and finally, in case (3) the current task -is the only task accessing the file_struct, again preventing any change -from taking place. - -There are currently only "universal" versions of the rcu_assign_pointer() -and RCU list-/tree-traversal primitives, which do not (yet) check for -being in an RCU read-side critical section. In the future, separate -versions of these primitives might be created. diff --git a/trunk/Documentation/RCU/rcu.txt b/trunk/Documentation/RCU/rcu.txt index 31852705b586..2a23523ce471 100644 --- a/trunk/Documentation/RCU/rcu.txt +++ b/trunk/Documentation/RCU/rcu.txt @@ -75,8 +75,6 @@ o I hear that RCU is patented? What is with that? search for the string "Patent" in RTFP.txt to find them. Of these, one was allowed to lapse by the assignee, and the others have been contributed to the Linux kernel under GPL. - There are now also LGPL implementations of user-level RCU - available (http://lttng.org/?q=node/18). o I hear that RCU needs work in order to support realtime kernels? @@ -93,4 +91,48 @@ o Where can I find more information on RCU? o What are all these files in this directory? - See 00-INDEX for the list. + + NMI-RCU.txt + + Describes how to use RCU to implement dynamic + NMI handlers, which can be revectored on the fly, + without rebooting. + + RTFP.txt + + List of RCU-related publications and web sites. + + UP.txt + + Discussion of RCU usage in UP kernels. + + arrayRCU.txt + + Describes how to use RCU to protect arrays, with + resizeable arrays whose elements reference other + data structures being of the most interest. + + checklist.txt + + Lists things to check for when inspecting code that + uses RCU. + + listRCU.txt + + Describes how to use RCU to protect linked lists. + This is the simplest and most common use of RCU + in the Linux kernel. + + rcu.txt + + You are reading it! + + rcuref.txt + + Describes how to combine use of reference counts + with RCU. + + whatisRCU.txt + + Overview of how the RCU implementation works. Along + the way, presents a conceptual view of RCU. diff --git a/trunk/Documentation/RCU/stallwarn.txt b/trunk/Documentation/RCU/stallwarn.txt deleted file mode 100644 index 1423d2570d78..000000000000 --- a/trunk/Documentation/RCU/stallwarn.txt +++ /dev/null @@ -1,58 +0,0 @@ -Using RCU's CPU Stall Detector - -The CONFIG_RCU_CPU_STALL_DETECTOR kernel config parameter enables -RCU's CPU stall detector, which detects conditions that unduly delay -RCU grace periods. The stall detector's idea of what constitutes -"unduly delayed" is controlled by a pair of C preprocessor macros: - -RCU_SECONDS_TILL_STALL_CHECK - - This macro defines the period of time that RCU will wait from - the beginning of a grace period until it issues an RCU CPU - stall warning. It is normally ten seconds. - -RCU_SECONDS_TILL_STALL_RECHECK - - This macro defines the period of time that RCU will wait after - issuing a stall warning until it issues another stall warning. - It is normally set to thirty seconds. - -RCU_STALL_RAT_DELAY - - The CPU stall detector tries to make the offending CPU rat on itself, - as this often gives better-quality stack traces. However, if - the offending CPU does not detect its own stall in the number - of jiffies specified by RCU_STALL_RAT_DELAY, then other CPUs will - complain. This is normally set to two jiffies. - -The following problems can result in an RCU CPU stall warning: - -o A CPU looping in an RCU read-side critical section. - -o A CPU looping with interrupts disabled. - -o A CPU looping with preemption disabled. - -o For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel - without invoking schedule(). - -o A bug in the RCU implementation. - -o A hardware failure. This is quite unlikely, but has occurred - at least once in a former life. A CPU failed in a running system, - becoming unresponsive, but not causing an immediate crash. - This resulted in a series of RCU CPU stall warnings, eventually - leading the realization that the CPU had failed. - -The RCU, RCU-sched, and RCU-bh implementations have CPU stall warning. -SRCU does not do so directly, but its calls to synchronize_sched() will -result in RCU-sched detecting any CPU stalls that might be occurring. - -To diagnose the cause of the stall, inspect the stack traces. The offending -function will usually be near the top of the stack. If you have a series -of stall warnings from a single extended stall, comparing the stack traces -can often help determine where the stall is occurring, which will usually -be in the function nearest the top of the stack that stays the same from -trace to trace. - -RCU bugs can often be debugged with the help of CONFIG_RCU_TRACE. diff --git a/trunk/Documentation/RCU/torture.txt b/trunk/Documentation/RCU/torture.txt index 0e50bc2aa1e2..9dba3bb90e60 100644 --- a/trunk/Documentation/RCU/torture.txt +++ b/trunk/Documentation/RCU/torture.txt @@ -30,18 +30,6 @@ MODULE PARAMETERS This module has the following parameters: -fqs_duration Duration (in microseconds) of artificially induced bursts - of force_quiescent_state() invocations. In RCU - implementations having force_quiescent_state(), these - bursts help force races between forcing a given grace - period and that grace period ending on its own. - -fqs_holdoff Holdoff time (in microseconds) between consecutive calls - to force_quiescent_state() within a burst. - -fqs_stutter Wait time (in seconds) between consecutive bursts - of calls to force_quiescent_state(). - irqreaders Says to invoke RCU readers from irq level. This is currently done via timers. Defaults to "1" for variants of RCU that permit this. (Or, more accurately, variants of RCU that do diff --git a/trunk/Documentation/RCU/whatisRCU.txt b/trunk/Documentation/RCU/whatisRCU.txt index 1dc00ee97163..d542ca243b80 100644 --- a/trunk/Documentation/RCU/whatisRCU.txt +++ b/trunk/Documentation/RCU/whatisRCU.txt @@ -323,17 +323,14 @@ used as follows: Defer Protect a. synchronize_rcu() rcu_read_lock() / rcu_read_unlock() - call_rcu() rcu_dereference() + call_rcu() b. call_rcu_bh() rcu_read_lock_bh() / rcu_read_unlock_bh() - rcu_dereference_bh() -c. synchronize_sched() rcu_read_lock_sched() / rcu_read_unlock_sched() - preempt_disable() / preempt_enable() +c. synchronize_sched() preempt_disable() / preempt_enable() local_irq_save() / local_irq_restore() hardirq enter / hardirq exit NMI enter / NMI exit - rcu_dereference_sched() These three mechanisms are used as follows: @@ -783,8 +780,9 @@ Linux-kernel source code, but it helps to have a full list of the APIs, since there does not appear to be a way to categorize them in docbook. Here is the list, by category. -RCU list traversal: +RCU pointer/list traversal: + rcu_dereference list_for_each_entry_rcu hlist_for_each_entry_rcu hlist_nulls_for_each_entry_rcu @@ -810,7 +808,7 @@ RCU: Critical sections Grace period Barrier rcu_read_lock synchronize_net rcu_barrier rcu_read_unlock synchronize_rcu - rcu_dereference synchronize_rcu_expedited + synchronize_rcu_expedited call_rcu @@ -818,7 +816,7 @@ bh: Critical sections Grace period Barrier rcu_read_lock_bh call_rcu_bh rcu_barrier_bh rcu_read_unlock_bh synchronize_rcu_bh - rcu_dereference_bh synchronize_rcu_bh_expedited + synchronize_rcu_bh_expedited sched: Critical sections Grace period Barrier @@ -827,14 +825,12 @@ sched: Critical sections Grace period Barrier rcu_read_unlock_sched call_rcu_sched [preempt_disable] synchronize_sched_expedited [and friends] - rcu_dereference_sched SRCU: Critical sections Grace period Barrier srcu_read_lock synchronize_srcu N/A srcu_read_unlock synchronize_srcu_expedited - srcu_dereference SRCU: Initialization/cleanup init_srcu_struct diff --git a/trunk/Documentation/arm/memory.txt b/trunk/Documentation/arm/memory.txt index eb0fae18ffb1..9d58c7c5eddd 100644 --- a/trunk/Documentation/arm/memory.txt +++ b/trunk/Documentation/arm/memory.txt @@ -59,11 +59,7 @@ PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region. This maps the platforms RAM, and typically maps all platform RAM in a 1:1 relationship. -PKMAP_BASE PAGE_OFFSET-1 Permanent kernel mappings - One way of mapping HIGHMEM pages into kernel - space. - -MODULES_VADDR MODULES_END-1 Kernel module space +TASK_SIZE PAGE_OFFSET-1 Kernel module space Kernel modules inserted via insmod are placed here using dynamic mappings. diff --git a/trunk/Documentation/block/00-INDEX b/trunk/Documentation/block/00-INDEX index a406286f6f3e..961a0513f8c3 100644 --- a/trunk/Documentation/block/00-INDEX +++ b/trunk/Documentation/block/00-INDEX @@ -1,5 +1,7 @@ 00-INDEX - This file +as-iosched.txt + - Anticipatory IO scheduler barrier.txt - I/O Barriers biodoc.txt diff --git a/trunk/Documentation/block/as-iosched.txt b/trunk/Documentation/block/as-iosched.txt new file mode 100644 index 000000000000..738b72be128e --- /dev/null +++ b/trunk/Documentation/block/as-iosched.txt @@ -0,0 +1,172 @@ +Anticipatory IO scheduler +------------------------- +Nick Piggin 13 Sep 2003 + +Attention! Database servers, especially those using "TCQ" disks should +investigate performance with the 'deadline' IO scheduler. Any system with high +disk performance requirements should do so, in fact. + +If you see unusual performance characteristics of your disk systems, or you +see big performance regressions versus the deadline scheduler, please email +me. Database users don't bother unless you're willing to test a lot of patches +from me ;) its a known issue. + +Also, users with hardware RAID controllers, doing striping, may find +highly variable performance results with using the as-iosched. The +as-iosched anticipatory implementation is based on the notion that a disk +device has only one physical seeking head. A striped RAID controller +actually has a head for each physical device in the logical RAID device. + +However, setting the antic_expire (see tunable parameters below) produces +very similar behavior to the deadline IO scheduler. + +Selecting IO schedulers +----------------------- +Refer to Documentation/block/switching-sched.txt for information on +selecting an io scheduler on a per-device basis. + +Anticipatory IO scheduler Policies +---------------------------------- +The as-iosched implementation implements several layers of policies +to determine when an IO request is dispatched to the disk controller. +Here are the policies outlined, in order of application. + +1. one-way Elevator algorithm. + +The elevator algorithm is similar to that used in deadline scheduler, with +the addition that it allows limited backward movement of the elevator +(i.e. seeks backwards). A seek backwards can occur when choosing between +two IO requests where one is behind the elevator's current position, and +the other is in front of the elevator's position. If the seek distance to +the request in back of the elevator is less than half the seek distance to +the request in front of the elevator, then the request in back can be chosen. +Backward seeks are also limited to a maximum of MAXBACK (1024*1024) sectors. +This favors forward movement of the elevator, while allowing opportunistic +"short" backward seeks. + +2. FIFO expiration times for reads and for writes. + +This is again very similar to the deadline IO scheduler. The expiration +times for requests on these lists is tunable using the parameters read_expire +and write_expire discussed below. When a read or a write expires in this way, +the IO scheduler will interrupt its current elevator sweep or read anticipation +to service the expired request. + +3. Read and write request batching + +A batch is a collection of read requests or a collection of write +requests. The as scheduler alternates dispatching read and write batches +to the driver. In the case a read batch, the scheduler submits read +requests to the driver as long as there are read requests to submit, and +the read batch time limit has not been exceeded (read_batch_expire). +The read batch time limit begins counting down only when there are +competing write requests pending. + +In the case of a write batch, the scheduler submits write requests to +the driver as long as there are write requests available, and the +write batch time limit has not been exceeded (write_batch_expire). +However, the length of write batches will be gradually shortened +when read batches frequently exceed their time limit. + +When changing between batch types, the scheduler waits for all requests +from the previous batch to complete before scheduling requests for the +next batch. + +The read and write fifo expiration times described in policy 2 above +are checked only when in scheduling IO of a batch for the corresponding +(read/write) type. So for example, the read FIFO timeout values are +tested only during read batches. Likewise, the write FIFO timeout +values are tested only during write batches. For this reason, +it is generally not recommended for the read batch time +to be longer than the write expiration time, nor for the write batch +time to exceed the read expiration time (see tunable parameters below). + +When the IO scheduler changes from a read to a write batch, +it begins the elevator from the request that is on the head of the +write expiration FIFO. Likewise, when changing from a write batch to +a read batch, scheduler begins the elevator from the first entry +on the read expiration FIFO. + +4. Read anticipation. + +Read anticipation occurs only when scheduling a read batch. +This implementation of read anticipation allows only one read request +to be dispatched to the disk controller at a time. In +contrast, many write requests may be dispatched to the disk controller +at a time during a write batch. It is this characteristic that can make +the anticipatory scheduler perform anomalously with controllers supporting +TCQ, or with hardware striped RAID devices. Setting the antic_expire +queue parameter (see below) to zero disables this behavior, and the +anticipatory scheduler behaves essentially like the deadline scheduler. + +When read anticipation is enabled (antic_expire is not zero), reads +are dispatched to the disk controller one at a time. +At the end of each read request, the IO scheduler examines its next +candidate read request from its sorted read list. If that next request +is from the same process as the request that just completed, +or if the next request in the queue is "very close" to the +just completed request, it is dispatched immediately. Otherwise, +statistics (average think time, average seek distance) on the process +that submitted the just completed request are examined. If it seems +likely that that process will submit another request soon, and that +request is likely to be near the just completed request, then the IO +scheduler will stop dispatching more read requests for up to (antic_expire) +milliseconds, hoping that process will submit a new request near the one +that just completed. If such a request is made, then it is dispatched +immediately. If the antic_expire wait time expires, then the IO scheduler +will dispatch the next read request from the sorted read queue. + +To decide whether an anticipatory wait is worthwhile, the scheduler +maintains statistics for each process that can be used to compute +mean "think time" (the time between read requests), and mean seek +distance for that process. One observation is that these statistics +are associated with each process, but those statistics are not associated +with a specific IO device. So for example, if a process is doing IO +on several file systems on separate devices, the statistics will be +a combination of IO behavior from all those devices. + + +Tuning the anticipatory IO scheduler +------------------------------------ +When using 'as', the anticipatory IO scheduler there are 5 parameters under +/sys/block/*/queue/iosched/. All are units of milliseconds. + +The parameters are: +* read_expire + Controls how long until a read request becomes "expired". It also controls the + interval between which expired requests are served, so set to 50, a request + might take anywhere < 100ms to be serviced _if_ it is the next on the + expired list. Obviously request expiration strategies won't make the disk + go faster. The result basically equates to the timeslice a single reader + gets in the presence of other IO. 100*((seek time / read_expire) + 1) is + very roughly the % streaming read efficiency your disk should get with + multiple readers. + +* read_batch_expire + Controls how much time a batch of reads is given before pending writes are + served. A higher value is more efficient. This might be set below read_expire + if writes are to be given higher priority than reads, but reads are to be + as efficient as possible when there are no writes. Generally though, it + should be some multiple of read_expire. + +* write_expire, and +* write_batch_expire are equivalent to the above, for writes. + +* antic_expire + Controls the maximum amount of time we can anticipate a good read (one + with a short seek distance from the most recently completed request) before + giving up. Many other factors may cause anticipation to be stopped early, + or some processes will not be "anticipated" at all. Should be a bit higher + for big seek time devices though not a linear correspondence - most + processes have only a few ms thinktime. + +In addition to the tunables above there is a read-only file named est_time +which, when read, will show: + + - The probability of a task exiting without a cooperating task + submitting an anticipated IO. + + - The current mean think time. + + - The seek distance used to determine if an incoming IO is better. + diff --git a/trunk/Documentation/block/biodoc.txt b/trunk/Documentation/block/biodoc.txt index 6fab97ea7e6b..8d2158a1c6aa 100644 --- a/trunk/Documentation/block/biodoc.txt +++ b/trunk/Documentation/block/biodoc.txt @@ -186,7 +186,7 @@ a virtual address mapping (unlike the earlier scheme of virtual address do not have a corresponding kernel virtual address space mapping) and low-memory pages. -Note: Please refer to Documentation/PCI/PCI-DMA-mapping.txt for a discussion +Note: Please refer to Documentation/DMA-mapping.txt for a discussion on PCI high mem DMA aspects and mapping of scatter gather lists, and support for 64 bit PCI. diff --git a/trunk/Documentation/block/queue-sysfs.txt b/trunk/Documentation/block/queue-sysfs.txt index f65274081c8d..e164403f60e1 100644 --- a/trunk/Documentation/block/queue-sysfs.txt +++ b/trunk/Documentation/block/queue-sysfs.txt @@ -25,11 +25,11 @@ size allowed by the hardware. nomerges (RW) ------------- -This enables the user to disable the lookup logic involved with IO -merging requests in the block layer. By default (0) all merges are -enabled. When set to 1 only simple one-hit merges will be tried. When -set to 2 no merge algorithms will be tried (including one-hit or more -complex tree/hash lookups). +This enables the user to disable the lookup logic involved with IO merging +requests in the block layer. Merging may still occur through a direct +1-hit cache, since that comes for (almost) free. The IO scheduler will not +waste cycles doing tree/hash lookups for merges if nomerges is 1. Defaults +to 0, enabling all merges. nr_requests (RW) ---------------- diff --git a/trunk/Documentation/cachetlb.txt b/trunk/Documentation/cachetlb.txt index 2b5f823abd03..da42ab414c48 100644 --- a/trunk/Documentation/cachetlb.txt +++ b/trunk/Documentation/cachetlb.txt @@ -88,12 +88,12 @@ changes occur: This is used primarily during fault processing. 5) void update_mmu_cache(struct vm_area_struct *vma, - unsigned long address, pte_t *ptep) + unsigned long address, pte_t pte) At the end of every page fault, this routine is invoked to tell the architecture specific code that a translation - now exists at virtual address "address" for address space - "vma->vm_mm", in the software page tables. + described by "pte" now exists at virtual address "address" + for address space "vma->vm_mm", in the software page tables. A port may use this information in any way it so chooses. For example, it could use this event to pre-load TLB @@ -377,27 +377,3 @@ maps this page at its virtual address. All the functionality of flush_icache_page can be implemented in flush_dcache_page and update_mmu_cache. In 2.7 the hope is to remove this interface completely. - -The final category of APIs is for I/O to deliberately aliased address -ranges inside the kernel. Such aliases are set up by use of the -vmap/vmalloc API. Since kernel I/O goes via physical pages, the I/O -subsystem assumes that the user mapping and kernel offset mapping are -the only aliases. This isn't true for vmap aliases, so anything in -the kernel trying to do I/O to vmap areas must manually manage -coherency. It must do this by flushing the vmap range before doing -I/O and invalidating it after the I/O returns. - - void flush_kernel_vmap_range(void *vaddr, int size) - flushes the kernel cache for a given virtual address range in - the vmap area. This is to make sure that any data the kernel - modified in the vmap range is made visible to the physical - page. The design is to make this area safe to perform I/O on. - Note that this API does *not* also flush the offset map alias - of the area. - - void invalidate_kernel_vmap_range(void *vaddr, int size) invalidates - the cache for a given virtual address range in the vmap area - which prevents the processor from making the cache stale by - speculatively reading data while the I/O was occurring to the - physical pages. This is only necessary for data reads into the - vmap area. diff --git a/trunk/Documentation/cpu-freq/governors.txt b/trunk/Documentation/cpu-freq/governors.txt index 737988fca64d..aed082f49d09 100644 --- a/trunk/Documentation/cpu-freq/governors.txt +++ b/trunk/Documentation/cpu-freq/governors.txt @@ -145,8 +145,8 @@ show_sampling_rate_max: THIS INTERFACE IS DEPRECATED, DON'T USE IT. up_threshold: defines what the average CPU usage between the samplings of 'sampling_rate' needs to be for the kernel to make a decision on whether it should increase the frequency. For example when it is set -to its default value of '95' it means that between the checking -intervals the CPU needs to be on average more than 95% in use to then +to its default value of '80' it means that between the checking +intervals the CPU needs to be on average more than 80% in use to then decide that the CPU frequency needs to be increased. ignore_nice_load: this parameter takes a value of '0' or '1'. When diff --git a/trunk/Documentation/dontdiff b/trunk/Documentation/dontdiff index d9bcffd59433..3ad6acead949 100644 --- a/trunk/Documentation/dontdiff +++ b/trunk/Documentation/dontdiff @@ -69,6 +69,7 @@ av_permissions.h bbootsect bin2c binkernel.spec +binoffset bootsect bounds.h bsetup diff --git a/trunk/Documentation/dvb/get_dvb_firmware b/trunk/Documentation/dvb/get_dvb_firmware index 239cbdbf4d12..14b7b5a3bcb9 100644 --- a/trunk/Documentation/dvb/get_dvb_firmware +++ b/trunk/Documentation/dvb/get_dvb_firmware @@ -26,7 +26,7 @@ use IO::Handle; "dec3000s", "vp7041", "dibusb", "nxt2002", "nxt2004", "or51211", "or51132_qam", "or51132_vsb", "bluebird", "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", - "af9015", "ngene"); + "af9015"); # Check args syntax() if (scalar(@ARGV) != 1); @@ -39,7 +39,7 @@ for ($i=0; $i < scalar(@components); $i++) { die $@ if $@; print STDERR <\n"; print STDERR "Supported components:\n"; - @components = sort @components; for($i=0; $i < scalar(@components); $i++) { print STDERR "\t" . $components[$i] . "\n"; } diff --git a/trunk/Documentation/fault-injection/fault-injection.txt b/trunk/Documentation/fault-injection/fault-injection.txt index 7be15e44d481..079305640790 100644 --- a/trunk/Documentation/fault-injection/fault-injection.txt +++ b/trunk/Documentation/fault-injection/fault-injection.txt @@ -143,8 +143,8 @@ o provide a way to configure fault attributes failslab, fail_page_alloc, and fail_make_request use this way. Helper functions: - init_fault_attr_dentries(entries, attr, name); - void cleanup_fault_attr_dentries(entries); + init_fault_attr_entries(entries, attr, name); + void cleanup_fault_attr_entries(entries); - module parameters diff --git a/trunk/Documentation/feature-removal-schedule.txt b/trunk/Documentation/feature-removal-schedule.txt index 732b1fa48cf2..870d190fe617 100644 --- a/trunk/Documentation/feature-removal-schedule.txt +++ b/trunk/Documentation/feature-removal-schedule.txt @@ -6,6 +6,21 @@ be removed from this file. --------------------------- +What: USER_SCHED +When: 2.6.34 + +Why: USER_SCHED was implemented as a proof of concept for group scheduling. + The effect of USER_SCHED can already be achieved from userspace with + the help of libcgroup. The removal of USER_SCHED will also simplify + the scheduler code with the removal of one major ifdef. There are also + issues USER_SCHED has with USER_NS. A decision was taken not to fix + those and instead remove USER_SCHED. Also new group scheduling + features will not be implemented for USER_SCHED. + +Who: Dhaval Giani + +--------------------------- + What: PRISM54 When: 2.6.34 @@ -49,17 +64,6 @@ Who: Robin Getz & Matt Mackall --------------------------- -What: Deprecated snapshot ioctls -When: 2.6.36 - -Why: The ioctls in kernel/power/user.c were marked as deprecated long time - ago. Now they notify users about that so that they need to replace - their userspace. After some more time, remove them completely. - -Who: Jiri Slaby - ---------------------------- - What: The ieee80211_regdom module parameter When: March 2010 / desktop catchup @@ -489,75 +493,3 @@ Why: These two features use non-standard interfaces. There are the Who: Corentin Chary ---------------------------- - -What: usbvideo quickcam_messenger driver -When: 2.6.35 -Files: drivers/media/video/usbvideo/quickcam_messenger.[ch] -Why: obsolete v4l1 driver replaced by gspca_stv06xx -Who: Hans de Goede - ----------------------------- - -What: ov511 v4l1 driver -When: 2.6.35 -Files: drivers/media/video/ov511.[ch] -Why: obsolete v4l1 driver replaced by gspca_ov519 -Who: Hans de Goede - ----------------------------- - -What: w9968cf v4l1 driver -When: 2.6.35 -Files: drivers/media/video/w9968cf*.[ch] -Why: obsolete v4l1 driver replaced by gspca_ov519 -Who: Hans de Goede - ----------------------------- - -What: ovcamchip sensor framework -When: 2.6.35 -Files: drivers/media/video/ovcamchip/* -Why: Only used by obsoleted v4l1 drivers -Who: Hans de Goede - ----------------------------- - -What: stv680 v4l1 driver -When: 2.6.35 -Files: drivers/media/video/stv680.[ch] -Why: obsolete v4l1 driver replaced by gspca_stv0680 -Who: Hans de Goede - ----------------------------- - -What: zc0301 v4l driver -When: 2.6.35 -Files: drivers/media/video/zc0301/* -Why: Duplicate functionality with the gspca_zc3xx driver, zc0301 only - supports 2 USB-ID's (because it only supports a limited set of - sensors) wich are also supported by the gspca_zc3xx driver - (which supports 53 USB-ID's in total) -Who: Hans de Goede - ----------------------------- - -What: corgikbd, spitzkbd, tosakbd driver -When: 2.6.35 -Files: drivers/input/keyboard/{corgi,spitz,tosa}kbd.c -Why: We now have a generic GPIO based matrix keyboard driver that - are fully capable of handling all the keys on these devices. - The original drivers manipulate the GPIO registers directly - and so are difficult to maintain. -Who: Eric Miao - ----------------------------- - -What: corgi_ssp and corgi_ts driver -When: 2.6.35 -Files: arch/arm/mach-pxa/corgi_ssp.c, drivers/input/touchscreen/corgi_ts.c -Why: The corgi touchscreen is now deprecated in favour of the generic - ads7846.c driver. The noise reduction technique used in corgi_ts.c, - that's to wait till vsync before ADC sampling, is also integrated into - ads7846 driver now. Provided that the original driver is not generic - and is difficult to maintain, it will be removed later. -Who: Eric Miao diff --git a/trunk/Documentation/filesystems/dentry-locking.txt b/trunk/Documentation/filesystems/dentry-locking.txt index 79334ed5daa7..4c0c575a4012 100644 --- a/trunk/Documentation/filesystems/dentry-locking.txt +++ b/trunk/Documentation/filesystems/dentry-locking.txt @@ -62,8 +62,7 @@ changes are : 2. Insertion of a dentry into the hash table is done using hlist_add_head_rcu() which take care of ordering the writes - the writes to the dentry must be visible before the dentry is - inserted. This works in conjunction with hlist_for_each_rcu(), - which has since been replaced by hlist_for_each_entry_rcu(), while + inserted. This works in conjunction with hlist_for_each_rcu() while walking the hash chain. The only requirement is that all initialization to the dentry must be done before hlist_add_head_rcu() since we don't have dcache_lock protection diff --git a/trunk/Documentation/filesystems/ext4.txt b/trunk/Documentation/filesystems/ext4.txt index e1def1786e50..af6885c3c821 100644 --- a/trunk/Documentation/filesystems/ext4.txt +++ b/trunk/Documentation/filesystems/ext4.txt @@ -196,7 +196,7 @@ nobarrier This also requires an IO stack which can support also be used to enable or disable barriers, for consistency with other ext4 mount options. -inode_readahead_blks=n This tuning parameter controls the maximum +inode_readahead=n This tuning parameter controls the maximum number of inode table blocks that ext4's inode table readahead algorithm will pre-read into the buffer cache. The default value is 32 blocks. diff --git a/trunk/Documentation/filesystems/nilfs2.txt b/trunk/Documentation/filesystems/nilfs2.txt index 839efd8a8a8c..4949fcaa6b6a 100644 --- a/trunk/Documentation/filesystems/nilfs2.txt +++ b/trunk/Documentation/filesystems/nilfs2.txt @@ -28,7 +28,7 @@ described in the man pages included in the package. Project web page: http://www.nilfs.org/en/ Download page: http://www.nilfs.org/en/download.html Git tree web page: http://www.nilfs.org/git/ -List info: http://vger.kernel.org/vger-lists.html#linux-nilfs +NILFS mailing lists: http://www.nilfs.org/mailman/listinfo/users Caveats ======= diff --git a/trunk/Documentation/filesystems/proc.txt b/trunk/Documentation/filesystems/proc.txt index 0d07513a67a6..220cc6376ef8 100644 --- a/trunk/Documentation/filesystems/proc.txt +++ b/trunk/Documentation/filesystems/proc.txt @@ -177,6 +177,7 @@ read the file /proc/PID/status: CapBnd: ffffffffffffffff voluntary_ctxt_switches: 0 nonvoluntary_ctxt_switches: 1 + Stack usage: 12 kB This shows you nearly the same information you would get if you viewed it with the ps command. In fact, ps uses the proc file system to obtain its @@ -230,6 +231,7 @@ Table 1-2: Contents of the statm files (as of 2.6.30-rc7) Mems_allowed_list Same as previous, but in "list format" voluntary_ctxt_switches number of voluntary context switches nonvoluntary_ctxt_switches number of non voluntary context switches + Stack usage: stack usage high water mark (round up to page size) .............................................................................. Table 1-3: Contents of the statm files (as of 2.6.8-rc3) diff --git a/trunk/Documentation/hwmon/amc6821 b/trunk/Documentation/hwmon/amc6821 deleted file mode 100644 index ced8359c50f8..000000000000 --- a/trunk/Documentation/hwmon/amc6821 +++ /dev/null @@ -1,102 +0,0 @@ -Kernel driver amc6821 -===================== - -Supported chips: - Texas Instruments AMC6821 - Prefix: 'amc6821' - Addresses scanned: 0x18, 0x19, 0x1a, 0x2c, 0x2d, 0x2e, 0x4c, 0x4d, 0x4e - Datasheet: http://focus.ti.com/docs/prod/folders/print/amc6821.html - -Authors: - Tomaz Mertelj - - -Description ------------ - -This driver implements support for the Texas Instruments amc6821 chip. -The chip has one on-chip and one remote temperature sensor and one pwm fan -regulator. -The pwm can be controlled either from software or automatically. - -The driver provides the following sensor accesses in sysfs: - -temp1_input ro on-chip temperature -temp1_min rw " -temp1_max rw " -temp1_crit rw " -temp1_min_alarm ro " -temp1_max_alarm ro " -temp1_crit_alarm ro " - -temp2_input ro remote temperature -temp2_min rw " -temp2_max rw " -temp2_crit rw " -temp2_min_alarm ro " -temp2_max_alarm ro " -temp2_crit_alarm ro " -temp2_fault ro " - -fan1_input ro tachometer speed -fan1_min rw " -fan1_max rw " -fan1_fault ro " -fan1_div rw Fan divisor can be either 2 or 4. - -pwm1 rw pwm1 -pwm1_enable rw regulator mode, 1=open loop, 2=fan controlled - by remote temperature, 3=fan controlled by - combination of the on-chip temperature and - remote-sensor temperature, -pwm1_auto_channels_temp ro 1 if pwm_enable==2, 3 if pwm_enable==3 -pwm1_auto_point1_pwm ro Hardwired to 0, shared for both - temperature channels. -pwm1_auto_point2_pwm rw This value is shared for both temperature - channels. -pwm1_auto_point3_pwm rw Hardwired to 255, shared for both - temperature channels. - -temp1_auto_point1_temp ro Hardwired to temp2_auto_point1_temp - which is rw. Below this temperature fan stops. -temp1_auto_point2_temp rw The low-temperature limit of the proportional - range. Below this temperature - pwm1 = pwm1_auto_point2_pwm. It can go from - 0 degree C to 124 degree C in steps of - 4 degree C. Read it out after writing to get - the actual value. -temp1_auto_point3_temp rw Above this temperature fan runs at maximum - speed. It can go from temp1_auto_point2_temp. - It can only have certain discrete values - which depend on temp1_auto_point2_temp and - pwm1_auto_point2_pwm. Read it out after - writing to get the actual value. - -temp2_auto_point1_temp rw Must be between 0 degree C and 63 degree C and - it defines the passive cooling temperature. - Below this temperature the fan stops in - the closed loop mode. -temp2_auto_point2_temp rw The low-temperature limit of the proportional - range. Below this temperature - pwm1 = pwm1_auto_point2_pwm. It can go from - 0 degree C to 124 degree C in steps - of 4 degree C. - -temp2_auto_point3_temp rw Above this temperature fan runs at maximum - speed. It can only have certain discrete - values which depend on temp2_auto_point2_temp - and pwm1_auto_point2_pwm. Read it out after - writing to get actual value. - - -Module parameters ------------------ - -If your board has a BIOS that initializes the amc6821 correctly, you should -load the module with: init=0. - -If your board BIOS doesn't initialize the chip, or you want -different settings, you can set the following parameters: -init=1, -pwminv: 0 default pwm output, 1 inverts pwm output. - diff --git a/trunk/Documentation/hwmon/k10temp b/trunk/Documentation/hwmon/k10temp index 6526eee525a6..a7a18d453a51 100644 --- a/trunk/Documentation/hwmon/k10temp +++ b/trunk/Documentation/hwmon/k10temp @@ -3,8 +3,8 @@ Kernel driver k10temp Supported chips: * AMD Family 10h processors: - Socket F: Quad-Core/Six-Core/Embedded Opteron (but see below) - Socket AM2+: Quad-Core Opteron, Phenom (II) X3/X4, Athlon X2 (but see below) + Socket F: Quad-Core/Six-Core/Embedded Opteron + Socket AM2+: Opteron, Phenom (II) X3/X4 Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II Socket S1G3: Athlon II, Sempron, Turion II * AMD Family 11h processors: @@ -36,15 +36,10 @@ Description This driver permits reading of the internal temperature sensor of AMD Family 10h and 11h processors. -All these processors have a sensor, but on those for Socket F or AM2+, -the sensor may return inconsistent values (erratum 319). The driver -will refuse to load on these revisions unless you specify the "force=1" -module parameter. - -Due to technical reasons, the driver can detect only the mainboard's -socket type, not the processor's actual capabilities. Therefore, if you -are using an AM3 processor on an AM2+ mainboard, you can safely use the -"force=1" parameter. +All these processors have a sensor, but on older revisions of Family 10h +processors, the sensor may return inconsistent values (erratum 319). The +driver will refuse to load on these revisions unless you specify the +"force=1" module parameter. There is one temperature measurement value, available as temp1_input in sysfs. It is measured in degrees Celsius with a resolution of 1/8th degree. diff --git a/trunk/Documentation/input/multi-touch-protocol.txt b/trunk/Documentation/input/multi-touch-protocol.txt index 8490480ce432..a12ea3b586e6 100644 --- a/trunk/Documentation/input/multi-touch-protocol.txt +++ b/trunk/Documentation/input/multi-touch-protocol.txt @@ -27,30 +27,12 @@ set of events/packets. A set of ABS_MT events with the desired properties is defined. The events are divided into categories, to allow for partial implementation. The -minimum set consists of ABS_MT_POSITION_X and ABS_MT_POSITION_Y, which -allows for multiple fingers to be tracked. If the device supports it, the -ABS_MT_TOUCH_MAJOR and ABS_MT_WIDTH_MAJOR may be used to provide the size -of the contact area and approaching finger, respectively. - -The TOUCH and WIDTH parameters have a geometrical interpretation; imagine -looking through a window at someone gently holding a finger against the -glass. You will see two regions, one inner region consisting of the part -of the finger actually touching the glass, and one outer region formed by -the perimeter of the finger. The diameter of the inner region is the -ABS_MT_TOUCH_MAJOR, the diameter of the outer region is -ABS_MT_WIDTH_MAJOR. Now imagine the person pressing the finger harder -against the glass. The inner region will increase, and in general, the -ratio ABS_MT_TOUCH_MAJOR / ABS_MT_WIDTH_MAJOR, which is always smaller than -unity, is related to the finger pressure. For pressure-based devices, -ABS_MT_PRESSURE may be used to provide the pressure on the contact area -instead. - -In addition to the MAJOR parameters, the oval shape of the finger can be -described by adding the MINOR parameters, such that MAJOR and MINOR are the -major and minor axis of an ellipse. Finally, the orientation of the oval -shape can be describe with the ORIENTATION parameter. - -The ABS_MT_TOOL_TYPE may be used to specify whether the touching tool is a +minimum set consists of ABS_MT_TOUCH_MAJOR, ABS_MT_POSITION_X and +ABS_MT_POSITION_Y, which allows for multiple fingers to be tracked. If the +device supports it, the ABS_MT_WIDTH_MAJOR may be used to provide the size +of the approaching finger. Anisotropy and direction may be specified with +ABS_MT_TOUCH_MINOR, ABS_MT_WIDTH_MINOR and ABS_MT_ORIENTATION. The +ABS_MT_TOOL_TYPE may be used to specify whether the touching tool is a finger or a pen or something else. Devices with more granular information may specify general shapes as blobs, i.e., as a sequence of rectangular shapes grouped together by an ABS_MT_BLOB_ID. Finally, for the few devices @@ -60,9 +42,11 @@ report finger tracking from hardware [5]. Here is what a minimal event sequence for a two-finger touch would look like: + ABS_MT_TOUCH_MAJOR ABS_MT_POSITION_X ABS_MT_POSITION_Y SYN_MT_REPORT + ABS_MT_TOUCH_MAJOR ABS_MT_POSITION_X ABS_MT_POSITION_Y SYN_MT_REPORT @@ -103,12 +87,6 @@ the contact. The ratio ABS_MT_TOUCH_MAJOR / ABS_MT_WIDTH_MAJOR approximates the notion of pressure. The fingers of the hand and the palm all have different characteristic widths [1]. -ABS_MT_PRESSURE - -The pressure, in arbitrary units, on the contact area. May be used instead -of TOUCH and WIDTH for pressure-based devices or any device with a spatial -signal intensity distribution. - ABS_MT_ORIENTATION The orientation of the ellipse. The value should describe a signed quarter @@ -192,16 +170,6 @@ There are a few devices that support trackingID in hardware. User space can make use of these native identifiers to reduce bandwidth and cpu usage. -Gestures --------- - -In the specific application of creating gesture events, the TOUCH and WIDTH -parameters can be used to, e.g., approximate finger pressure or distinguish -between index finger and thumb. With the addition of the MINOR parameters, -one can also distinguish between a sweeping finger and a pointing finger, -and with ORIENTATION, one can detect twisting of fingers. - - Notes ----- diff --git a/trunk/Documentation/input/sentelic.txt b/trunk/Documentation/input/sentelic.txt index b35affd5c649..f7160a2fb6a2 100644 --- a/trunk/Documentation/input/sentelic.txt +++ b/trunk/Documentation/input/sentelic.txt @@ -1,5 +1,5 @@ -Copyright (C) 2002-2010 Sentelic Corporation. -Last update: Jan-13-2010 +Copyright (C) 2002-2008 Sentelic Corporation. +Last update: Oct-31-2008 ============================================================================== * Finger Sensing Pad Intellimouse Mode(scrolling wheel, 4th and 5th buttons) @@ -44,7 +44,7 @@ B) MSID 6: Horizontal and Vertical scrolling. Packet 1 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| - 1 |Y|X|y|x|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 | | |B|F|r|l|u|d| + 1 |Y|X|y|x|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 | | |B|F|l|r|u|d| |---------------| |---------------| |---------------| |---------------| Byte 1: Bit7 => Y overflow @@ -59,15 +59,15 @@ Byte 2: X Movement(9-bit 2's complement integers) Byte 3: Y Movement(9-bit 2's complement integers) Byte 4: Bit0 => the Vertical scrolling movement downward. Bit1 => the Vertical scrolling movement upward. - Bit2 => the Horizontal scrolling movement leftward. - Bit3 => the Horizontal scrolling movement rightward. + Bit2 => the Vertical scrolling movement rightward. + Bit3 => the Vertical scrolling movement leftward. Bit4 => 1 = 4th mouse button is pressed, Forward one page. 0 = 4th mouse button is not pressed. Bit5 => 1 = 5th mouse button is pressed, Backward one page. 0 = 5th mouse button is not pressed. C) MSID 7: -# FSP uses 2 packets (8 Bytes) to represent Absolute Position. +# FSP uses 2 packets(8 Bytes) data to represent Absolute Position so we have PACKET NUMBER to identify packets. If PACKET NUMBER is 0, the packet is Packet 1. If PACKET NUMBER is 1, the packet is Packet 2. @@ -129,7 +129,7 @@ Byte 3: Message Type => 0x00 (Disabled) Byte 4: Bit7~Bit0 => Don't Care ============================================================================== -* Absolute position for STL3888-Ax. +* Absolute position for STL3888-A0. ============================================================================== Packet 1 (ABSOLUTE POSITION) Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 @@ -179,14 +179,14 @@ Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0]) Bit5~Bit4 => y2_g Bit7~Bit6 => x2_g -Notify Packet for STL3888-Ax +Notify Packet for STL3888-A0 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| 1 |1|0|1|P|1|M|R|L| 2 |C|C|C|C|C|C|C|C| 3 |0|0|F|F|0|0|0|i| 4 |r|l|d|u|0|0|0|0| |---------------| |---------------| |---------------| |---------------| Byte 1: Bit7~Bit6 => 00, Normal data packet - => 01, Absolute coordinates packet + => 01, Absolute coordination packet => 10, Notify packet Bit5 => 1 Bit4 => when in absolute coordinates mode (valid when EN_PKT_GO is 1): @@ -205,106 +205,15 @@ Byte 4: Bit7 => scroll right button Bit6 => scroll left button Bit5 => scroll down button Bit4 => scroll up button - * Note that if gesture and additional buttoni (Bit4~Bit7) - happen at the same time, the button information will not - be sent. - Bit3~Bit0 => Reserved - -Sample sequence of Multi-finger, Multi-coordinate mode: - - notify packet (valid bit == 1), abs pkt 1, abs pkt 2, abs pkt 1, - abs pkt 2, ..., notify packet (valid bit == 0) - -============================================================================== -* Absolute position for STL3888-B0. -============================================================================== -Packet 1(ABSOLUTE POSITION) - Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 -BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| - 1 |0|1|V|F|1|0|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 |r|l|u|d|X|X|Y|Y| - |---------------| |---------------| |---------------| |---------------| - -Byte 1: Bit7~Bit6 => 00, Normal data packet - => 01, Absolute coordinates packet - => 10, Notify packet - Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up. - When both fingers are up, the last two reports have zero valid - bit. - Bit4 => finger up/down information. 1: finger down, 0: finger up. - Bit3 => 1 - Bit2 => finger index, 0 is the first finger, 1 is the second finger. - Bit1 => Right Button, 1 is pressed, 0 is not pressed. - Bit0 => Left Button, 1 is pressed, 0 is not pressed. -Byte 2: X coordinate (xpos[9:2]) -Byte 3: Y coordinate (ypos[9:2]) -Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0]) - Bit3~Bit2 => X coordinate (ypos[1:0]) - Bit4 => scroll down button - Bit5 => scroll up button - Bit6 => scroll left button - Bit7 => scroll right button - -Packet 2 (ABSOLUTE POSITION) - Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 -BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| - 1 |0|1|V|F|1|1|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 |r|l|u|d|X|X|Y|Y| - |---------------| |---------------| |---------------| |---------------| - -Byte 1: Bit7~Bit6 => 00, Normal data packet - => 01, Absolute coordination packet - => 10, Notify packet - Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up. - When both fingers are up, the last two reports have zero valid - bit. - Bit4 => finger up/down information. 1: finger down, 0: finger up. - Bit3 => 1 - Bit2 => finger index, 0 is the first finger, 1 is the second finger. - Bit1 => Right Button, 1 is pressed, 0 is not pressed. - Bit0 => Left Button, 1 is pressed, 0 is not pressed. -Byte 2: X coordinate (xpos[9:2]) -Byte 3: Y coordinate (ypos[9:2]) -Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0]) - Bit3~Bit2 => X coordinate (ypos[1:0]) - Bit4 => scroll down button - Bit5 => scroll up button - Bit6 => scroll left button - Bit7 => scroll right button - -Notify Packet for STL3888-B0 - Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 -BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| - 1 |1|0|1|P|1|M|R|L| 2 |C|C|C|C|C|C|C|C| 3 |0|0|F|F|0|0|0|i| 4 |r|l|u|d|0|0|0|0| - |---------------| |---------------| |---------------| |---------------| - -Byte 1: Bit7~Bit6 => 00, Normal data packet - => 01, Absolute coordination packet - => 10, Notify packet - Bit5 => 1 - Bit4 => when in absolute coordinate mode (valid when EN_PKT_GO is 1): - 0: left button is generated by the on-pad command - 1: left button is generated by the external button - Bit3 => 1 - Bit2 => Middle Button, 1 is pressed, 0 is not pressed. - Bit1 => Right Button, 1 is pressed, 0 is not pressed. - Bit0 => Left Button, 1 is pressed, 0 is not pressed. -Byte 2: Message Type => 0xB7 (Multi Finger, Multi Coordinate mode) -Byte 3: Bit7~Bit6 => Don't care - Bit5~Bit4 => Number of fingers - Bit3~Bit1 => Reserved - Bit0 => 1: enter gesture mode; 0: leaving gesture mode -Byte 4: Bit7 => scroll right button - Bit6 => scroll left button - Bit5 => scroll up button - Bit4 => scroll down button - * Note that if gesture and additional button(Bit4~Bit7) - happen at the same time, the button information will not - be sent. + * Note that if gesture and additional button (Bit4~Bit7) + happen at the same time, the button information will not + be sent. Bit3~Bit0 => Reserved Sample sequence of Multi-finger, Multi-coordinate mode: notify packet (valid bit == 1), abs pkt 1, abs pkt 2, abs pkt 1, - abs pkt 2, ..., notify packet (valid bit == 0) + abs pkt 2, ..., notify packet(valid bit == 0) ============================================================================== * FSP Enable/Disable packet @@ -500,8 +409,7 @@ offset width default r/w name 0: read only, 1: read/write enable (Note that following registers does not require clock gating being enabled prior to write: 05 06 07 08 09 0c 0f 10 11 12 16 17 18 23 2e - 40 41 42 43. In addition to that, this bit must be 1 when gesture - mode is enabled) + 40 41 42 43.) 0x31 RW on-pad command detection bit7 0 RW on-pad command left button down tag @@ -555,10 +463,6 @@ offset width default r/w name absolute coordinates; otherwise, host only receives packets with relative coordinate.) - bit7 0 RW EN_PS2_F2: PS/2 gesture mode 2nd - finger packet enable - 0: disable, 1: enable - 0x43 RW on-pad control bit0 0 RW on-pad control enable 0: disable, 1: enable diff --git a/trunk/Documentation/ioctl/ioctl-number.txt b/trunk/Documentation/ioctl/ioctl-number.txt index 35cf64d4436d..947374977ca5 100644 --- a/trunk/Documentation/ioctl/ioctl-number.txt +++ b/trunk/Documentation/ioctl/ioctl-number.txt @@ -56,11 +56,10 @@ Following this convention is good because: (5) When following the convention, the driver code can use generic code to copy the parameters between user and kernel space. -This table lists ioctls visible from user land for Linux/x86. It contains -most drivers up to 2.6.31, but I know I am missing some. There has been -no attempt to list non-X86 architectures or ioctls from drivers/staging/. +This table lists ioctls visible from user land for Linux/i386. It contains +most drivers up to 2.3.14, but I know I am missing some. -Code Seq#(hex) Include File Comments +Code Seq# Include File Comments ======================================================== 0x00 00-1F linux/fs.h conflict! 0x00 00-1F scsi/scsi_ioctl.h conflict! @@ -70,228 +69,119 @@ Code Seq#(hex) Include File Comments 0x03 all linux/hdreg.h 0x04 D2-DC linux/umsdos_fs.h Dead since 2.6.11, but don't reuse these. 0x06 all linux/lp.h -0x09 all linux/raid/md_u.h -0x10 00-0F drivers/char/s390/vmcp.h +0x09 all linux/md.h 0x12 all linux/fs.h linux/blkpg.h 0x1b all InfiniBand Subsystem 0x20 all drivers/cdrom/cm206.h 0x22 all scsi/sg.h '#' 00-3F IEEE 1394 Subsystem Block for the entire subsystem -'$' 00-0F linux/perf_counter.h, linux/perf_event.h '1' 00-1F PPS kit from Ulrich Windl -'2' 01-04 linux/i2o.h -'3' 00-0F drivers/s390/char/raw3270.h conflict! -'3' 00-1F linux/suspend_ioctls.h conflict! - and kernel/power/user.c '8' all SNP8023 advanced NIC card -'@' 00-0F linux/radeonfb.h conflict! -'@' 00-0F drivers/video/aty/aty128fb.c conflict! -'A' 00-1F linux/apm_bios.h conflict! -'A' 00-0F linux/agpgart.h conflict! - and drivers/char/agp/compat_ioctl.h -'A' 00-7F sound/asound.h conflict! -'B' 00-1F linux/cciss_ioctl.h conflict! -'B' 00-0F include/linux/pmu.h conflict! +'A' 00-1F linux/apm_bios.h 'B' C0-FF advanced bbus -'C' all linux/soundcard.h conflict! -'C' 01-2F linux/capi.h conflict! -'C' F0-FF drivers/net/wan/cosa.h conflict! +'C' all linux/soundcard.h 'D' all arch/s390/include/asm/dasd.h -'D' 40-5F drivers/scsi/dpt/dtpi_ioctl.h -'D' 05 drivers/scsi/pmcraid.h -'E' all linux/input.h conflict! -'E' 00-0F xen/evtchn.h conflict! -'F' all linux/fb.h conflict! -'F' 01-02 drivers/scsi/pmcraid.h conflict! -'F' 20 drivers/video/fsl-diu-fb.h conflict! -'F' 20 drivers/video/intelfb/intelfb.h conflict! -'F' 20 linux/ivtvfb.h conflict! -'F' 20 linux/matroxfb.h conflict! -'F' 20 drivers/video/aty/atyfb_base.c conflict! -'F' 00-0F video/da8xx-fb.h conflict! -'F' 80-8F linux/arcfb.h conflict! -'F' DD video/sstfb.h conflict! -'G' 00-3F drivers/misc/sgi-gru/grulib.h conflict! -'G' 00-0F linux/gigaset_dev.h conflict! -'H' 00-7F linux/hiddev.h conflict! -'H' 00-0F linux/hidraw.h conflict! -'H' 00-0F sound/asound.h conflict! -'H' 20-40 sound/asound_fm.h conflict! -'H' 80-8F sound/sfnt_info.h conflict! -'H' 10-8F sound/emu10k1.h conflict! -'H' 10-1F sound/sb16_csp.h conflict! -'H' 10-1F sound/hda_hwdep.h conflict! -'H' 40-4F sound/hdspm.h conflict! -'H' 40-4F sound/hdsp.h conflict! -'H' 90 sound/usb/usx2y/usb_stream.h -'H' C0-F0 net/bluetooth/hci.h conflict! -'H' C0-DF net/bluetooth/hidp/hidp.h conflict! -'H' C0-DF net/bluetooth/cmtp/cmtp.h conflict! -'H' C0-DF net/bluetooth/bnep/bnep.h conflict! -'I' all linux/isdn.h conflict! -'I' 00-0F drivers/isdn/divert/isdn_divert.h conflict! -'I' 40-4F linux/mISDNif.h conflict! +'E' all linux/input.h +'F' all linux/fb.h +'H' all linux/hiddev.h +'I' all linux/isdn.h 'J' 00-1F drivers/scsi/gdth_ioctl.h 'K' all linux/kd.h -'L' 00-1F linux/loop.h conflict! -'L' 10-1F drivers/scsi/mpt2sas/mpt2sas_ctl.h conflict! -'L' 20-2F linux/usb/vstusb.h +'L' 00-1F linux/loop.h +'L' 20-2F driver/usb/misc/vstusb.h 'L' E0-FF linux/ppdd.h encrypted disk device driver -'M' all linux/soundcard.h conflict! -'M' 01-16 mtd/mtd-abi.h conflict! - and drivers/mtd/mtdchar.c -'M' 01-03 drivers/scsi/megaraid/megaraid_sas.h -'M' 00-0F drivers/video/fsl-diu-fb.h conflict! +'M' all linux/soundcard.h 'N' 00-1F drivers/usb/scanner.h -'O' 00-06 mtd/ubi-user.h UBI -'P' all linux/soundcard.h conflict! -'P' 60-6F sound/sscape_ioctl.h conflict! -'P' 00-0F drivers/usb/class/usblp.c conflict! +'O' 00-02 include/mtd/ubi-user.h UBI +'P' all linux/soundcard.h 'Q' all linux/soundcard.h -'R' 00-1F linux/random.h conflict! -'R' 01 linux/rfkill.h conflict! -'R' 01-0F media/rds.h conflict! -'R' C0-DF net/bluetooth/rfcomm.h +'R' 00-1F linux/random.h 'S' all linux/cdrom.h conflict! 'S' 80-81 scsi/scsi_ioctl.h conflict! 'S' 82-FF scsi/scsi.h conflict! -'S' 00-7F sound/asequencer.h conflict! 'T' all linux/soundcard.h conflict! -'T' 00-AF sound/asound.h conflict! 'T' all arch/x86/include/asm/ioctls.h conflict! -'T' C0-DF linux/if_tun.h conflict! -'U' all sound/asound.h conflict! -'U' 00-0F drivers/media/video/uvc/uvcvideo.h conflict! -'U' 00-CF linux/uinput.h conflict! -'U' 00-EF linux/usbdevice_fs.h -'U' C0-CF drivers/bluetooth/hci_uart.h -'V' all linux/vt.h conflict! -'V' all linux/videodev2.h conflict! -'V' C0 linux/ivtvfb.h conflict! -'V' C0 linux/ivtv.h conflict! -'V' C0 media/davinci/vpfe_capture.h conflict! -'V' C0 media/si4713.h conflict! -'V' C0-CF drivers/media/video/mxb.h conflict! +'U' 00-EF linux/drivers/usb/usb.h +'V' all linux/vt.h 'W' 00-1F linux/watchdog.h conflict! 'W' 00-1F linux/wanrouter.h conflict! -'W' 00-3F sound/asound.h conflict! -'X' all fs/xfs/xfs_fs.h conflict! - and fs/xfs/linux-2.6/xfs_ioctl32.h - and include/linux/falloc.h - and linux/fs.h -'X' all fs/ocfs2/ocfs_fs.h conflict! -'X' 01 linux/pktcdvd.h conflict! +'X' all linux/xfs_fs.h 'Y' all linux/cyclades.h -'Z' 14-15 drivers/message/fusion/mptctl.h -'[' 00-07 linux/usb/tmc.h USB Test and Measurement Devices +'[' 00-07 linux/usb/usbtmc.h USB Test and Measurement Devices -'a' all linux/atm*.h, linux/sonet.h ATM on linux +'a' all ATM on linux -'b' 00-FF conflict! bit3 vme host bridge +'b' 00-FF bit3 vme host bridge -'b' 00-0F media/bt819.h conflict! -'c' all linux/cm4000_cs.h conflict! 'c' 00-7F linux/comstats.h conflict! 'c' 00-7F linux/coda.h conflict! -'c' 00-1F linux/chio.h conflict! -'c' 80-9F arch/s390/include/asm/chsc.h conflict! -'c' A0-AF arch/x86/include/asm/msr.h conflict! +'c' 80-9F arch/s390/include/asm/chsc.h +'c' A0-AF arch/x86/include/asm/msr.h 'd' 00-FF linux/char/drm/drm/h conflict! -'d' 02-40 pcmcia/ds.h conflict! -'d' 10-3F drivers/media/video/dabusb.h conflict! -'d' C0-CF drivers/media/video/saa7191.h conflict! 'd' F0-FF linux/digi1.h 'e' all linux/digi1.h conflict! -'e' 00-1F drivers/net/irda/irtty-sir.h conflict! -'f' 00-1F linux/ext2_fs.h conflict! -'f' 00-1F linux/ext3_fs.h conflict! -'f' 00-0F fs/jfs/jfs_dinode.h conflict! -'f' 00-0F fs/ext4/ext4.h conflict! -'f' 00-0F linux/fs.h conflict! -'f' 00-0F fs/ocfs2/ocfs2_fs.h conflict! -'g' 00-0F linux/usb/gadgetfs.h -'g' 20-2F linux/usb/g_printer.h -'h' 00-7F conflict! Charon filesystem +'e' 00-1F net/irda/irtty.h conflict! +'f' 00-1F linux/ext2_fs.h +'h' 00-7F Charon filesystem -'h' 00-1F linux/hpet.h conflict! -'i' 00-3F linux/i2o-dev.h conflict! -'i' 0B-1F linux/ipmi.h conflict! -'i' 80-8F linux/i8k.h +'i' 00-3F linux/i2o.h 'j' 00-3F linux/joystick.h -'k' 00-0F linux/spi/spidev.h conflict! -'k' 00-05 video/kyro.h conflict! 'l' 00-3F linux/tcfs_fs.h transparent cryptographic file system 'l' 40-7F linux/udf_fs_i.h in development: -'m' 00-09 linux/mmtimer.h conflict! +'m' 00-09 linux/mmtimer.h 'm' all linux/mtio.h conflict! 'm' all linux/soundcard.h conflict! 'm' all linux/synclink.h conflict! -'m' 00-19 drivers/message/fusion/mptctl.h conflict! -'m' 00 drivers/scsi/megaraid/megaraid_ioctl.h conflict! 'm' 00-1F net/irda/irmod.h conflict! -'n' 00-7F linux/ncp_fs.h and fs/ncpfs/ioctl.c +'n' 00-7F linux/ncp_fs.h 'n' 80-8F linux/nilfs2_fs.h NILFS2 -'n' E0-FF linux/matroxfb.h matroxfb +'n' E0-FF video/matrox.h matroxfb 'o' 00-1F fs/ocfs2/ocfs2_fs.h OCFS2 -'o' 00-03 mtd/ubi-user.h conflict! (OCFS2 and UBI overlaps) -'o' 40-41 mtd/ubi-user.h UBI -'o' 01-A1 linux/dvb/*.h DVB +'o' 00-03 include/mtd/ubi-user.h conflict! (OCFS2 and UBI overlaps) +'o' 40-41 include/mtd/ubi-user.h UBI +'o' 01-A1 include/linux/dvb/*.h DVB 'p' 00-0F linux/phantom.h conflict! (OpenHaptics needs this) -'p' 00-1F linux/rtc.h conflict! 'p' 00-3F linux/mc146818rtc.h conflict! 'p' 40-7F linux/nvram.h -'p' 80-9F linux/ppdev.h user-space parport +'p' 80-9F user-space parport -'p' A1-A4 linux/pps.h LinuxPPS +'p' a1-a4 linux/pps.h LinuxPPS 'q' 00-1F linux/serio.h -'q' 80-FF linux/telephony.h Internet PhoneJACK, Internet LineJACK - linux/ixjuser.h -'r' 00-1F linux/msdos_fs.h and fs/fat/dir.c +'q' 80-FF Internet PhoneJACK, Internet LineJACK + +'r' 00-1F linux/msdos_fs.h 's' all linux/cdk.h 't' 00-7F linux/if_ppp.h 't' 80-8F linux/isdn_ppp.h -'t' 90 linux/toshiba.h 'u' 00-1F linux/smb_fs.h -'v' all linux/videodev.h conflict! 'v' 00-1F linux/ext2_fs.h conflict! -'v' 00-1F linux/fs.h conflict! -'v' 00-0F linux/sonypi.h conflict! -'v' C0-CF drivers/media/video/ov511.h conflict! -'v' C0-DF media/pwc-ioctl.h conflict! -'v' C0-FF linux/meye.h conflict! -'v' C0-CF drivers/media/video/zoran/zoran.h conflict! -'v' D0-DF drivers/media/video/cpia2/cpia2dev.h conflict! +'v' all linux/videodev.h conflict! 'w' all CERN SCI driver 'y' 00-1F packet based user level communications -'z' 00-3F CAN bus card conflict! +'z' 00-3F CAN bus card -'z' 40-7F CAN bus card conflict! +'z' 40-7F CAN bus card -'z' 10-4F drivers/s390/crypto/zcrypt_api.h conflict! 0x80 00-1F linux/fb.h 0x81 00-1F linux/videotext.h -0x88 00-3F media/ovcamchip.h 0x89 00-06 arch/x86/include/asm/sockios.h 0x89 0B-DF linux/sockios.h 0x89 E0-EF linux/sockios.h SIOCPROTOPRIVATE range -0x89 E0-EF linux/dn.h PROTOPRIVATE range 0x89 F0-FF linux/sockios.h SIOCDEVPRIVATE range 0x8B all linux/wireless.h 0x8C 00-3F WiNRADiO driver 0x90 00 drivers/cdrom/sbpcd.h -0x92 00-0F drivers/usb/mon/mon_bin.c 0x93 60-7F linux/auto_fs.h -0x94 all fs/btrfs/ioctl.h 0x99 00-0F 537-Addinboard driver 0xA0 all linux/sdp/sdp.h Industrial Device Project @@ -302,22 +192,17 @@ Code Seq#(hex) Include File Comments 0xAB 00-1F linux/nbd.h 0xAC 00-1F linux/raw.h 0xAD 00 Netfilter device in development: - + 0xAE all linux/kvm.h Kernel-based Virtual Machine 0xB0 all RATIO devices in development: 0xB1 00-1F PPPoX -0xC0 00-0F linux/usb/iowarrior.h 0xCB 00-1F CBM serial IEC bus in development: -0xCD 01 linux/reiserfs_fs.h -0xCF 02 fs/cifs/ioctl.c -0xDB 00-0F drivers/char/mwave/mwavepub.h 0xDD 00-3F ZFCP device driver see drivers/s390/scsi/ -0xF3 00-3F drivers/usb/misc/sisusbvga/sisusb.h sisfb (in development) +0xF3 00-3F video/sisfb.h sisfb (in development) 0xF4 00-1F video/mbxfb.h mbxfb -0xFD all linux/dm-ioctl.h diff --git a/trunk/Documentation/kernel-doc-nano-HOWTO.txt b/trunk/Documentation/kernel-doc-nano-HOWTO.txt index 27a52b35d55b..348b9e5e28fc 100644 --- a/trunk/Documentation/kernel-doc-nano-HOWTO.txt +++ b/trunk/Documentation/kernel-doc-nano-HOWTO.txt @@ -214,13 +214,11 @@ The format of the block comment is like this: * (section header: (section description)? )* (*)?*/ -All "description" text can span multiple lines, although the -function_name & its short description are traditionally on a single line. -Description text may also contain blank lines (i.e., lines that contain -only a "*"). - -"section header:" names must be unique per function (or struct, -union, typedef, enum). +The short function description ***cannot be multiline***, but the other +descriptions can be (and they can contain blank lines). If you continue +that initial short description onto a second line, that second line will +appear further down at the beginning of the description section, which is +almost certainly not what you had in mind. Avoid putting a spurious blank line after the function name, or else the description will be repeated! diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt index 8c666d80f0e7..5ba4d9dff113 100644 --- a/trunk/Documentation/kernel-parameters.txt +++ b/trunk/Documentation/kernel-parameters.txt @@ -199,10 +199,6 @@ and is between 256 and 4096 characters. It is defined in the file acpi_display_output=video See above. - acpi_early_pdc_eval [HW,ACPI] Evaluate processor _PDC methods - early. Needed on some platforms to properly - initialize the EC. - acpi_irq_balance [HW,ACPI] ACPI will balance active IRQs default in APIC mode @@ -244,7 +240,7 @@ and is between 256 and 4096 characters. It is defined in the file acpi_sleep= [HW,ACPI] Sleep options Format: { s3_bios, s3_mode, s3_beep, s4_nohwsig, - old_ordering, s4_nonvs, sci_force_enable } + old_ordering, s4_nonvs } See Documentation/power/video.txt for information on s3_bios and s3_mode. s3_beep is for debugging; it makes the PC's speaker beep @@ -257,9 +253,6 @@ and is between 256 and 4096 characters. It is defined in the file of _PTS is used by default). s4_nonvs prevents the kernel from saving/restoring the ACPI NVS memory during hibernation. - sci_force_enable causes the kernel to set SCI_EN directly - on resume from S1/S3 (which is against the ACPI spec, - but some broken systems don't work without it). acpi_use_timer_override [HW,ACPI] Use timer override. For some broken Nvidia NF5 boards @@ -315,11 +308,6 @@ and is between 256 and 4096 characters. It is defined in the file aic79xx= [HW,SCSI] See Documentation/scsi/aic79xx.txt. - alignment= [KNL,ARM] - Allow the default userspace alignment fault handler - behaviour to be specified. Bit 0 enables warnings, - bit 1 enables fixups, and bit 2 sends a segfault. - amd_iommu= [HW,X86-84] Pass parameters to the AMD IOMMU driver in the system. Possible values are: @@ -1738,9 +1726,6 @@ and is between 256 and 4096 characters. It is defined in the file nomfgpt [X86-32] Disable Multi-Function General Purpose Timer usage (for AMD Geode machines). - nopat [X86] Disable PAT (page attribute table extension of - pagetables) support. - norandmaps Don't use address space randomization. Equivalent to echo 0 > /proc/sys/kernel/randomize_va_space @@ -1951,12 +1936,8 @@ and is between 256 and 4096 characters. It is defined in the file IRQ routing is enabled. noacpi [X86] Do not use ACPI for IRQ routing or for PCI scanning. - use_crs [X86] Use PCI host bridge window information - from ACPI. On BIOSes from 2008 or later, this - is enabled by default. If you need to use this, - please report a bug. - nocrs [X86] Ignore PCI host bridge windows from ACPI. - If you need to use this, please report a bug. + use_crs [X86] Use _CRS for PCI resource + allocation. routeirq Do IRQ routing for all PCI devices. This is normally done in pci_enable_device(), so this option is a temporary workaround @@ -2005,14 +1986,6 @@ and is between 256 and 4096 characters. It is defined in the file force Enable ASPM even on devices that claim not to support it. WARNING: Forcing ASPM on may cause system lockups. - pcie_pme= [PCIE,PM] Native PCIe PME signaling options: - off Do not use native PCIe PME signaling. - force Use native PCIe PME signaling even if the BIOS refuses - to allow the kernel to control the relevant PCIe config - registers. - nomsi Do not use MSI for native PCIe PME signaling (this makes - all PCIe root ports use INTx for everything). - pcmv= [HW,PCMCIA] BadgePAD 4 pd. [PARIDE] @@ -2718,13 +2691,6 @@ and is between 256 and 4096 characters. It is defined in the file medium is write-protected). Example: quirks=0419:aaf5:rl,0421:0433:rc - userpte= - [X86] Flags controlling user PTE allocations. - - nohigh = do not allocate PTE pages in - HIGHMEM regardless of setting - of CONFIG_HIGHPTE. - vdso= [X86,SH] vdso=2: enable compat VDSO (default with COMPAT_VDSO) vdso=1: enable VDSO (default) diff --git a/trunk/Documentation/kvm/api.txt b/trunk/Documentation/kvm/api.txt index 2811e452f756..e1a114161027 100644 --- a/trunk/Documentation/kvm/api.txt +++ b/trunk/Documentation/kvm/api.txt @@ -685,7 +685,7 @@ struct kvm_vcpu_events { __u8 pad; } nmi; __u32 sipi_vector; - __u32 flags; + __u32 flags; /* must be zero */ }; 4.30 KVM_SET_VCPU_EVENTS @@ -701,14 +701,6 @@ vcpu. See KVM_GET_VCPU_EVENTS for the data structure. -Fields that may be modified asynchronously by running VCPUs can be excluded -from the update. These fields are nmi.pending and sipi_vector. Keep the -corresponding bits in the flags field cleared to suppress overwriting the -current in-kernel state. The bits are: - -KVM_VCPUEVENT_VALID_NMI_PENDING - transfer nmi.pending to the kernel -KVM_VCPUEVENT_VALID_SIPI_VECTOR - transfer sipi_vector - 5. The kvm_run structure diff --git a/trunk/Documentation/laptops/thinkpad-acpi.txt b/trunk/Documentation/laptops/thinkpad-acpi.txt index 75afa1229fd7..169091f75e6d 100644 --- a/trunk/Documentation/laptops/thinkpad-acpi.txt +++ b/trunk/Documentation/laptops/thinkpad-acpi.txt @@ -1092,8 +1092,8 @@ WARNING: its level up and down at every change. -Volume control (Console Audio control) --------------------------------------- +Volume control +-------------- procfs: /proc/acpi/ibm/volume ALSA: "ThinkPad Console Audio Control", default ID: "ThinkPadEC" @@ -1110,53 +1110,9 @@ the desktop environment to just provide on-screen-display feedback. Software volume control should be done only in the main AC97/HDA mixer. - -About the ThinkPad Console Audio control: - -ThinkPads have a built-in amplifier and muting circuit that drives the -console headphone and speakers. This circuit is after the main AC97 -or HDA mixer in the audio path, and under exclusive control of the -firmware. - -ThinkPads have three special hotkeys to interact with the console -audio control: volume up, volume down and mute. - -It is worth noting that the normal way the mute function works (on -ThinkPads that do not have a "mute LED") is: - -1. Press mute to mute. It will *always* mute, you can press it as - many times as you want, and the sound will remain mute. - -2. Press either volume key to unmute the ThinkPad (it will _not_ - change the volume, it will just unmute). - -This is a very superior design when compared to the cheap software-only -mute-toggle solution found on normal consumer laptops: you can be -absolutely sure the ThinkPad will not make noise if you press the mute -button, no matter the previous state. - -The IBM ThinkPads, and the earlier Lenovo ThinkPads have variable-gain -amplifiers driving the speakers and headphone output, and the firmware -also handles volume control for the headphone and speakers on these -ThinkPads without any help from the operating system (this volume -control stage exists after the main AC97 or HDA mixer in the audio -path). - -The newer Lenovo models only have firmware mute control, and depend on -the main HDA mixer to do volume control (which is done by the operating -system). In this case, the volume keys are filtered out for unmute -key press (there are some firmware bugs in this area) and delivered as -normal key presses to the operating system (thinkpad-acpi is not -involved). - - -The ThinkPad-ACPI volume control: - -The preferred way to interact with the Console Audio control is the -ALSA interface. - -The legacy procfs interface allows one to read the current state, -and if volume control is enabled, accepts the following commands: +This feature allows volume control on ThinkPad models with a digital +volume knob (when available, not all models have it), as well as +mute/unmute control. The available commands are: echo up >/proc/acpi/ibm/volume echo down >/proc/acpi/ibm/volume @@ -1165,10 +1121,12 @@ and if volume control is enabled, accepts the following commands: echo 'level ' >/proc/acpi/ibm/volume The number range is 0 to 14 although not all of them may be -distinct. To unmute the volume after the mute command, use either the +distinct. The unmute the volume after the mute command, use either the up or down command (the level command will not unmute the volume), or the unmute command. +The current volume level and mute state is shown in the file. + You can use the volume_capabilities parameter to tell the driver whether your thinkpad has volume control or mute-only control: volume_capabilities=1 for mixers with mute and volume control, diff --git a/trunk/Documentation/lguest/lguest.c b/trunk/Documentation/lguest/lguest.c index 3119f5db75bd..42208511b5c0 100644 --- a/trunk/Documentation/lguest/lguest.c +++ b/trunk/Documentation/lguest/lguest.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include diff --git a/trunk/Documentation/networking/3c509.txt b/trunk/Documentation/networking/3c509.txt index 3c45d5dcd63b..0643e3b7168c 100644 --- a/trunk/Documentation/networking/3c509.txt +++ b/trunk/Documentation/networking/3c509.txt @@ -48,11 +48,11 @@ for LILO parameters for doing this: This configures the first found 3c509 card for IRQ 10, base I/O 0x310, and transceiver type 3 (10base2). The flag "0x3c509" must be set to avoid conflicts with other card types when overriding the I/O address. When the driver is -loaded as a module, only the IRQ may be overridden. For example, -setting two cards to IRQ10 and IRQ11 is done by using the irq module -option: +loaded as a module, only the IRQ and transceiver setting may be overridden. +For example, setting two cards to 10base2/IRQ10 and AUI/IRQ11 is done by using +the xcvr and irq module options: - options 3c509 irq=10,11 + options 3c509 xcvr=3,1 irq=10,11 (2) Full-duplex mode @@ -77,8 +77,6 @@ operation. itself full-duplex capable. This is almost certainly one of two things: a full- duplex-capable Ethernet switch (*not* a hub), or a full-duplex-capable NIC on another system that's connected directly to the 3c509B via a crossover cable. - -Full-duplex mode can be enabled using 'ethtool'. /////Extremely important caution concerning full-duplex mode///// Understand that the 3c509B's hardware's full-duplex support is much more @@ -115,8 +113,6 @@ This insured that merely upgrading the driver from an earlier version would never automatically enable full-duplex mode in an existing installation; it must always be explicitly enabled via one of these code in order to be activated. - -The transceiver type can be changed using 'ethtool'. (4a) Interpretation of error messages and common problems diff --git a/trunk/Documentation/networking/ip-sysctl.txt b/trunk/Documentation/networking/ip-sysctl.txt index e87f3cdc8a6a..006b39dec87d 100644 --- a/trunk/Documentation/networking/ip-sysctl.txt +++ b/trunk/Documentation/networking/ip-sysctl.txt @@ -1074,10 +1074,10 @@ regen_max_retry - INTEGER Default: 5 max_addresses - INTEGER - Maximum number of autoconfigured addresses per interface. Setting - to zero disables the limitation. It is not recommended to set this - value too large (or to zero) because it would be an easy way to - crash the kernel by allowing too many addresses to be created. + Number of maximum addresses per interface. 0 disables limitation. + It is recommended not set too large value (or 0) because it would + be too easy way to crash kernel to allow to create too much of + autoconfigured addresses. Default: 16 disable_ipv6 - BOOLEAN diff --git a/trunk/Documentation/pcmcia/locking.txt b/trunk/Documentation/pcmcia/locking.txt deleted file mode 100644 index 68f622bc4064..000000000000 --- a/trunk/Documentation/pcmcia/locking.txt +++ /dev/null @@ -1,118 +0,0 @@ -This file explains the locking and exclusion scheme used in the PCCARD -and PCMCIA subsystems. - - -A) Overview, Locking Hierarchy: -=============================== - -pcmcia_socket_list_rwsem - protects only the list of sockets -- skt_mutex - serializes card insert / ejection - - ops_mutex - serializes socket operation - - -B) Exclusion -============ - -The following functions and callbacks to struct pcmcia_socket must -be called with "skt_mutex" held: - - socket_detect_change() - send_event() - socket_reset() - socket_shutdown() - socket_setup() - socket_remove() - socket_insert() - socket_early_resume() - socket_late_resume() - socket_resume() - socket_suspend() - - struct pcmcia_callback *callback - -The following functions and callbacks to struct pcmcia_socket must -be called with "ops_mutex" held: - - socket_reset() - socket_setup() - - struct pccard_operations *ops - struct pccard_resource_ops *resource_ops; - -Note that send_event() and struct pcmcia_callback *callback must not be -called with "ops_mutex" held. - - -C) Protection -============= - -1. Global Data: ---------------- -struct list_head pcmcia_socket_list; - -protected by pcmcia_socket_list_rwsem; - - -2. Per-Socket Data: -------------------- -The resource_ops and their data are protected by ops_mutex. - -The "main" struct pcmcia_socket is protected as follows (read-only fields -or single-use fields not mentioned): - -- by pcmcia_socket_list_rwsem: - struct list_head socket_list; - -- by thread_lock: - unsigned int thread_events; - -- by skt_mutex: - u_int suspended_state; - void (*tune_bridge); - struct pcmcia_callback *callback; - int resume_status; - -- by ops_mutex: - socket_state_t socket; - u_int state; - u_short lock_count; - pccard_mem_map cis_mem; - void __iomem *cis_virt; - struct { } irq; - io_window_t io[]; - pccard_mem_map win[]; - struct list_head cis_cache; - size_t fake_cis_len; - u8 *fake_cis; - u_int irq_mask; - void (*zoom_video); - int (*power_hook); - u8 resource...; - struct list_head devices_list; - u8 device_count; - struct pcmcia_state; - - -3. Per PCMCIA-device Data: --------------------------- - -The "main" struct pcmcia_devie is protected as follows (read-only fields -or single-use fields not mentioned): - - -- by pcmcia_socket->ops_mutex: - struct list_head socket_device_list; - struct config_t *function_config; - u16 _irq:1; - u16 _io:1; - u16 _win:4; - u16 _locked:1; - u16 allow_func_id_match:1; - u16 suspended:1; - u16 _removed:1; - -- by the PCMCIA driver: - io_req_t io; - irq_req_t irq; - config_req_t conf; - window_handle_t win; diff --git a/trunk/Documentation/powerpc/dts-bindings/fsl/mpc5121-psc.txt b/trunk/Documentation/powerpc/dts-bindings/fsl/mpc5121-psc.txt deleted file mode 100644 index 8832e8798912..000000000000 --- a/trunk/Documentation/powerpc/dts-bindings/fsl/mpc5121-psc.txt +++ /dev/null @@ -1,70 +0,0 @@ -MPC5121 PSC Device Tree Bindings - -PSC in UART mode ----------------- - -For PSC in UART mode the needed PSC serial devices -are specified by fsl,mpc5121-psc-uart nodes in the -fsl,mpc5121-immr SoC node. Additionally the PSC FIFO -Controller node fsl,mpc5121-psc-fifo is requered there: - -fsl,mpc5121-psc-uart nodes --------------------------- - -Required properties : - - compatible : Should contain "fsl,mpc5121-psc-uart" and "fsl,mpc5121-psc" - - cell-index : Index of the PSC in hardware - - reg : Offset and length of the register set for the PSC device - - interrupts : where a is the interrupt number of the - PSC FIFO Controller and b is a field that represents an - encoding of the sense and level information for the interrupt. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - -Recommended properties : - - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4) - - fsl,tx-fifo-size : the size of the TX fifo slice (a multiple of 4) - - -fsl,mpc5121-psc-fifo node -------------------------- - -Required properties : - - compatible : Should be "fsl,mpc5121-psc-fifo" - - reg : Offset and length of the register set for the PSC - FIFO Controller - - interrupts : where a is the interrupt number of the - PSC FIFO Controller and b is a field that represents an - encoding of the sense and level information for the interrupt. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - - -Example for a board using PSC0 and PSC1 devices in serial mode: - -serial@11000 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <0>; - reg = <0x11000 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; -}; - -serial@11100 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <1>; - reg = <0x11100 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; -}; - -pscfifo@11f00 { - compatible = "fsl,mpc5121-psc-fifo"; - reg = <0x11f00 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; -}; diff --git a/trunk/Documentation/powerpc/dts-bindings/fsl/spi.txt b/trunk/Documentation/powerpc/dts-bindings/fsl/spi.txt index 80510c018eea..e7d9a344c4f4 100644 --- a/trunk/Documentation/powerpc/dts-bindings/fsl/spi.txt +++ b/trunk/Documentation/powerpc/dts-bindings/fsl/spi.txt @@ -13,11 +13,6 @@ Required properties: - interrupt-parent : the phandle for the interrupt controller that services interrupts for this device. -Optional properties: -- gpios : specifies the gpio pins to be used for chipselects. - The gpios will be referred to as reg = in the SPI child nodes. - If unspecified, a single SPI device without a chip select can be used. - Example: spi@4c0 { cell-index = <0>; @@ -26,6 +21,4 @@ Example: interrupts = <82 0>; interrupt-parent = <700>; mode = "cpu"; - gpios = <&gpio 18 1 // device reg=<0> - &gpio 19 1>; // device reg=<1> }; diff --git a/trunk/Documentation/powerpc/ptrace.txt b/trunk/Documentation/powerpc/ptrace.txt deleted file mode 100644 index f4a5499b7bc6..000000000000 --- a/trunk/Documentation/powerpc/ptrace.txt +++ /dev/null @@ -1,134 +0,0 @@ -GDB intends to support the following hardware debug features of BookE -processors: - -4 hardware breakpoints (IAC) -2 hardware watchpoints (read, write and read-write) (DAC) -2 value conditions for the hardware watchpoints (DVC) - -For that, we need to extend ptrace so that GDB can query and set these -resources. Since we're extending, we're trying to create an interface -that's extendable and that covers both BookE and server processors, so -that GDB doesn't need to special-case each of them. We added the -following 3 new ptrace requests. - -1. PTRACE_PPC_GETHWDEBUGINFO - -Query for GDB to discover the hardware debug features. The main info to -be returned here is the minimum alignment for the hardware watchpoints. -BookE processors don't have restrictions here, but server processors have -an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid -adding special cases to GDB based on what it sees in AUXV. - -Since we're at it, we added other useful info that the kernel can return to -GDB: this query will return the number of hardware breakpoints, hardware -watchpoints and whether it supports a range of addresses and a condition. -The query will fill the following structure provided by the requesting process: - -struct ppc_debug_info { - unit32_t version; - unit32_t num_instruction_bps; - unit32_t num_data_bps; - unit32_t num_condition_regs; - unit32_t data_bp_alignment; - unit32_t sizeof_condition; /* size of the DVC register */ - uint64_t features; /* bitmask of the individual flags */ -}; - -features will have bits indicating whether there is support for: - -#define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1 -#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2 -#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4 -#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8 - -2. PTRACE_SETHWDEBUG - -Sets a hardware breakpoint or watchpoint, according to the provided structure: - -struct ppc_hw_breakpoint { - uint32_t version; -#define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1 -#define PPC_BREAKPOINT_TRIGGER_READ 0x2 -#define PPC_BREAKPOINT_TRIGGER_WRITE 0x4 - uint32_t trigger_type; /* only some combinations allowed */ -#define PPC_BREAKPOINT_MODE_EXACT 0x0 -#define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1 -#define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2 -#define PPC_BREAKPOINT_MODE_MASK 0x3 - uint32_t addr_mode; /* address match mode */ - -#define PPC_BREAKPOINT_CONDITION_MODE 0x3 -#define PPC_BREAKPOINT_CONDITION_NONE 0x0 -#define PPC_BREAKPOINT_CONDITION_AND 0x1 -#define PPC_BREAKPOINT_CONDITION_EXACT 0x1 /* different name for the same thing as above */ -#define PPC_BREAKPOINT_CONDITION_OR 0x2 -#define PPC_BREAKPOINT_CONDITION_AND_OR 0x3 -#define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000 /* byte enable bits */ -#define PPC_BREAKPOINT_CONDITION_BE(n) (1<<((n)+16)) - uint32_t condition_mode; /* break/watchpoint condition flags */ - - uint64_t addr; - uint64_t addr2; - uint64_t condition_value; -}; - -A request specifies one event, not necessarily just one register to be set. -For instance, if the request is for a watchpoint with a condition, both the -DAC and DVC registers will be set in the same request. - -With this GDB can ask for all kinds of hardware breakpoints and watchpoints -that the BookE supports. COMEFROM breakpoints available in server processors -are not contemplated, but that is out of the scope of this work. - -ptrace will return an integer (handle) uniquely identifying the breakpoint or -watchpoint just created. This integer will be used in the PTRACE_DELHWDEBUG -request to ask for its removal. Return -ENOSPC if the requested breakpoint -can't be allocated on the registers. - -Some examples of using the structure to: - -- set a breakpoint in the first breakpoint register - - p.version = PPC_DEBUG_CURRENT_VERSION; - p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE; - p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; - p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; - p.addr = (uint64_t) address; - p.addr2 = 0; - p.condition_value = 0; - -- set a watchpoint which triggers on reads in the second watchpoint register - - p.version = PPC_DEBUG_CURRENT_VERSION; - p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ; - p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; - p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; - p.addr = (uint64_t) address; - p.addr2 = 0; - p.condition_value = 0; - -- set a watchpoint which triggers only with a specific value - - p.version = PPC_DEBUG_CURRENT_VERSION; - p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ; - p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; - p.condition_mode = PPC_BREAKPOINT_CONDITION_AND | PPC_BREAKPOINT_CONDITION_BE_ALL; - p.addr = (uint64_t) address; - p.addr2 = 0; - p.condition_value = (uint64_t) condition; - -- set a ranged hardware breakpoint - - p.version = PPC_DEBUG_CURRENT_VERSION; - p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE; - p.addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE; - p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; - p.addr = (uint64_t) begin_range; - p.addr2 = (uint64_t) end_range; - p.condition_value = 0; - -3. PTRACE_DELHWDEBUG - -Takes an integer which identifies an existing breakpoint or watchpoint -(i.e., the value returned from PTRACE_SETHWDEBUG), and deletes the -corresponding breakpoint or watchpoint.. diff --git a/trunk/Documentation/s390/CommonIO b/trunk/Documentation/s390/CommonIO index d378cba66456..339207d11d95 100644 --- a/trunk/Documentation/s390/CommonIO +++ b/trunk/Documentation/s390/CommonIO @@ -87,12 +87,6 @@ Command line parameters compatibility, by the device number in hexadecimal (0xabcd or abcd). Device numbers given as 0xabcd will be interpreted as 0.0.abcd. -* /proc/cio_settle - - A write request to this file is blocked until all queued cio actions are - handled. This will allow userspace to wait for pending work affecting - device availability after changing cio_ignore or the hardware configuration. - * For some of the information present in the /proc filesystem in 2.4 (namely, /proc/subchannels and /proc/chpids), see driver-model.txt. Information formerly in /proc/irq_count is now in /proc/interrupts. diff --git a/trunk/Documentation/s390/driver-model.txt b/trunk/Documentation/s390/driver-model.txt index ed265cf54cde..bde473df748d 100644 --- a/trunk/Documentation/s390/driver-model.txt +++ b/trunk/Documentation/s390/driver-model.txt @@ -223,8 +223,8 @@ touched by the driver - it should use the ccwgroup device's driver_data for its private data. To implement a ccwgroup driver, please refer to include/asm/ccwgroup.h. Keep in -mind that most drivers will need to implement both a ccwgroup and a ccw -driver. +mind that most drivers will need to implement both a ccwgroup and a ccw driver +(unless you have a meta ccw driver, like cu3088 for lcs and ctc). 2. Channel paths diff --git a/trunk/Documentation/scsi/ChangeLog.megaraid_sas b/trunk/Documentation/scsi/ChangeLog.megaraid_sas index 30023568805e..17ffa0607712 100644 --- a/trunk/Documentation/scsi/ChangeLog.megaraid_sas +++ b/trunk/Documentation/scsi/ChangeLog.megaraid_sas @@ -1,19 +1,3 @@ -1 Release Date : Thur. Oct 29, 2009 09:12:45 PST 2009 - - (emaild-id:megaraidlinux@lsi.com) - Bo Yang - -2 Current Version : 00.00.04.17.1-rc1 -3 Older Version : 00.00.04.12 - -1. Add the pad_0 in mfi frame structure to 0 to fix the - context value larger than 32bit value issue. - -2. Add the logic drive list to the driver. Driver will - keep the logic drive list internal after driver load. - -3. driver fixed the device update issue after get the AEN - PD delete/ADD, LD add/delete from FW. - 1 Release Date : Tues. July 28, 2009 10:12:45 PST 2009 - (emaild-id:megaraidlinux@lsi.com) Bo Yang diff --git a/trunk/Documentation/sound/alsa/ALSA-Configuration.txt b/trunk/Documentation/sound/alsa/ALSA-Configuration.txt index 33df82e3a398..8923597bd2bd 100644 --- a/trunk/Documentation/sound/alsa/ALSA-Configuration.txt +++ b/trunk/Documentation/sound/alsa/ALSA-Configuration.txt @@ -482,9 +482,6 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. reference_rate - reference sample rate, 44100 or 48000 (default) multiple - multiple to ref. sample rate, 1 or 2 (default) - subsystem - override the PCI SSID for probing; the value - consists of SSVID << 16 | SSDID. The default is - zero, which means no override. This module supports multiple cards. @@ -1126,21 +1123,6 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. This module supports multiple cards, autoprobe and ISA PnP. - Module snd-jazz16 - ------------------- - - Module for Media Vision Jazz16 chipset. The chipset consists of 3 chips: - MVD1216 + MVA416 + MVA514. - - port - port # for SB DSP chip (0x210,0x220,0x230,0x240,0x250,0x260) - irq - IRQ # for SB DSP chip (3,5,7,9,10,15) - dma8 - DMA # for SB DSP chip (1,3) - dma16 - DMA # for SB DSP chip (5,7) - mpu_port - MPU-401 port # (0x300,0x310,0x320,0x330) - mpu_irq - MPU-401 irq # (2,3,5,7) - - This module supports multiple cards. - Module snd-korg1212 ------------------- @@ -1809,13 +1791,6 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. The power-management is supported. - Module snd-ua101 - ---------------- - - Module for the Edirol UA-101 audio/MIDI interface. - - This module supports multiple devices, autoprobe and hotplugging. - Module snd-usb-audio -------------------- @@ -1948,7 +1923,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. ------------------- Module for sound cards based on the Asus AV100/AV200 chips, - i.e., Xonar D1, DX, D2, D2X, DS, HDAV1.3 (Deluxe), Essence ST + i.e., Xonar D1, DX, D2, D2X, HDAV1.3 (Deluxe), Essence ST (Deluxe) and Essence STX. This module supports autoprobe and multiple cards. diff --git a/trunk/Documentation/sound/alsa/HD-Audio-Models.txt b/trunk/Documentation/sound/alsa/HD-Audio-Models.txt index 1d38b0dfba95..e72cee9e2a71 100644 --- a/trunk/Documentation/sound/alsa/HD-Audio-Models.txt +++ b/trunk/Documentation/sound/alsa/HD-Audio-Models.txt @@ -124,8 +124,6 @@ ALC882/883/885/888/889 asus-a7m ASUS A7M macpro MacPro support mb5 Macbook 5,1 - macmini3 Macmini 3,1 - mba21 Macbook Air 2,1 mbp3 Macbook Pro rev3 imac24 iMac 24'' with jack detection imac91 iMac 9,1 @@ -281,16 +279,13 @@ Conexant 5051 laptop Basic Laptop config (default) hp HP Spartan laptop hp-dv6736 HP dv6736 - hp-f700 HP Compaq Presario F700 lenovo-x200 Lenovo X200 laptop - toshiba Toshiba Satellite M300 Conexant 5066 ============= laptop Basic Laptop config (default) dell-laptop Dell laptops olpc-xo-1_5 OLPC XO 1.5 - ideapad Lenovo IdeaPad U150 STAC9200 ======== diff --git a/trunk/Documentation/sound/alsa/HD-Audio.txt b/trunk/Documentation/sound/alsa/HD-Audio.txt index f4dd3bf99d12..6325bec06a72 100644 --- a/trunk/Documentation/sound/alsa/HD-Audio.txt +++ b/trunk/Documentation/sound/alsa/HD-Audio.txt @@ -452,33 +452,6 @@ Similarly, the lines after `[verb]` are parsed as `init_verbs` sysfs entries, and the lines after `[hint]` are parsed as `hints` sysfs entries, respectively. -Another example to override the codec vendor id from 0x12345678 to -0xdeadbeef is like below: ------------------------------------------------------------------------- - [codec] - 0x12345678 0xabcd1234 2 - - [vendor_id] - 0xdeadbeef ------------------------------------------------------------------------- - -In the similar way, you can override the codec subsystem_id via -`[subsystem_id]`, the revision id via `[revision_id]` line. -Also, the codec chip name can be rewritten via `[chip_name]` line. ------------------------------------------------------------------------- - [codec] - 0x12345678 0xabcd1234 2 - - [subsystem_id] - 0xffff1111 - - [revision_id] - 0x10 - - [chip_name] - My-own NEWS-0002 ------------------------------------------------------------------------- - The hd-audio driver reads the file via request_firmware(). Thus, a patch file has to be located on the appropriate firmware path, typically, /lib/firmware. For example, when you pass the option diff --git a/trunk/Documentation/sound/alsa/Procfile.txt b/trunk/Documentation/sound/alsa/Procfile.txt index 07301de12cc4..719a819f8cc2 100644 --- a/trunk/Documentation/sound/alsa/Procfile.txt +++ b/trunk/Documentation/sound/alsa/Procfile.txt @@ -95,7 +95,7 @@ card*/pcm*/xrun_debug It takes an integer value, can be changed by writing to this file, such as - # echo 5 > /proc/asound/card0/pcm0p/xrun_debug + # cat 5 > /proc/asound/card0/pcm0p/xrun_debug The value consists of the following bit flags: bit 0 = Enable XRUN/jiffies debug messages diff --git a/trunk/Documentation/trace/ftrace-design.txt b/trunk/Documentation/trace/ftrace-design.txt index f1f81afee8a0..641a1ef2a7ff 100644 --- a/trunk/Documentation/trace/ftrace-design.txt +++ b/trunk/Documentation/trace/ftrace-design.txt @@ -1,6 +1,5 @@ function tracer guts ==================== - By Mike Frysinger Introduction ------------ @@ -54,14 +53,14 @@ size of the mcount call that is embedded in the function). For example, if the function foo() calls bar(), when the bar() function calls mcount(), the arguments mcount() will pass to the tracer are: "frompc" - the address bar() will use to return to foo() - "selfpc" - the address bar() (with mcount() size adjustment) + "selfpc" - the address bar() (with _mcount() size adjustment) Also keep in mind that this mcount function will be called *a lot*, so optimizing for the default case of no tracer will help the smooth running of your system when tracing is disabled. So the start of the mcount function is -typically the bare minimum with checking things before returning. That also -means the code flow should usually be kept linear (i.e. no branching in the nop -case). This is of course an optimization and not a hard requirement. +typically the bare min with checking things before returning. That also means +the code flow should usually kept linear (i.e. no branching in the nop case). +This is of course an optimization and not a hard requirement. Here is some pseudo code that should help (these functions should actually be implemented in assembly): @@ -132,10 +131,10 @@ some functions to save (hijack) and restore the return address. The mcount function should check the function pointers ftrace_graph_return (compare to ftrace_stub) and ftrace_graph_entry (compare to -ftrace_graph_entry_stub). If either of those is not set to the relevant stub +ftrace_graph_entry_stub). If either of those are not set to the relevant stub function, call the arch-specific function ftrace_graph_caller which in turn calls the arch-specific function prepare_ftrace_return. Neither of these -function names is strictly required, but you should use them anyway to stay +function names are strictly required, but you should use them anyways to stay consistent across the architecture ports -- easier to compare & contrast things. @@ -145,7 +144,7 @@ but the first argument should be a pointer to the "frompc". Typically this is located on the stack. This allows the function to hijack the return address temporarily to have it point to the arch-specific function return_to_handler. That function will simply call the common ftrace_return_to_handler function and -that will return the original return address with which you can return to the +that will return the original return address with which, you can return to the original call site. Here is the updated mcount pseudo code: @@ -174,16 +173,14 @@ void ftrace_graph_caller(void) unsigned long *frompc = &...; unsigned long selfpc = - MCOUNT_INSN_SIZE; - /* passing frame pointer up is optional -- see below */ - prepare_ftrace_return(frompc, selfpc, frame_pointer); + prepare_ftrace_return(frompc, selfpc); /* restore all state needed by the ABI */ } #endif -For information on how to implement prepare_ftrace_return(), simply look at the -x86 version (the frame pointer passing is optional; see the next section for -more information). The only architecture-specific piece in it is the setup of +For information on how to implement prepare_ftrace_return(), simply look at +the x86 version. The only architecture-specific piece in it is the setup of the fault recovery table (the asm(...) code). The rest should be the same across architectures. @@ -208,23 +205,6 @@ void return_to_handler(void) #endif -HAVE_FUNCTION_GRAPH_FP_TEST ---------------------------- - -An arch may pass in a unique value (frame pointer) to both the entering and -exiting of a function. On exit, the value is compared and if it does not -match, then it will panic the kernel. This is largely a sanity check for bad -code generation with gcc. If gcc for your port sanely updates the frame -pointer under different opitmization levels, then ignore this option. - -However, adding support for it isn't terribly difficult. In your assembly code -that calls prepare_ftrace_return(), pass the frame pointer as the 3rd argument. -Then in the C version of that function, do what the x86 port does and pass it -along to ftrace_push_return_trace() instead of a stub value of 0. - -Similarly, when you call ftrace_return_to_handler(), pass it the frame pointer. - - HAVE_FTRACE_NMI_ENTER --------------------- @@ -238,10 +218,11 @@ HAVE_SYSCALL_TRACEPOINTS You need very few things to get the syscalls tracing in an arch. -- Support HAVE_ARCH_TRACEHOOK (see arch/Kconfig). - Have a NR_syscalls variable in that provides the number of syscalls supported by the arch. -- Support the TIF_SYSCALL_TRACEPOINT thread flags. +- Implement arch_syscall_addr() that resolves a syscall address from a + syscall number. +- Support the TIF_SYSCALL_TRACEPOINT thread flags - Put the trace_sys_enter() and trace_sys_exit() tracepoints calls from ptrace in the ptrace syscalls tracing path. - Tag this arch as HAVE_SYSCALL_TRACEPOINTS. diff --git a/trunk/Documentation/trace/ftrace.txt b/trunk/Documentation/trace/ftrace.txt index bab3040da548..8179692fbb90 100644 --- a/trunk/Documentation/trace/ftrace.txt +++ b/trunk/Documentation/trace/ftrace.txt @@ -1625,7 +1625,7 @@ If I am only interested in sys_nanosleep and hrtimer_interrupt: # echo sys_nanosleep hrtimer_interrupt \ > set_ftrace_filter - # echo function > current_tracer + # echo ftrace > current_tracer # echo 1 > tracing_enabled # usleep 1 # echo 0 > tracing_enabled diff --git a/trunk/Documentation/trace/kprobetrace.txt b/trunk/Documentation/trace/kprobetrace.txt index a9100b28eb84..47aabeebbdf6 100644 --- a/trunk/Documentation/trace/kprobetrace.txt +++ b/trunk/Documentation/trace/kprobetrace.txt @@ -24,7 +24,6 @@ Synopsis of kprobe_events ------------------------- p[:[GRP/]EVENT] SYMBOL[+offs]|MEMADDR [FETCHARGS] : Set a probe r[:[GRP/]EVENT] SYMBOL[+0] [FETCHARGS] : Set a return probe - -:[GRP/]EVENT : Clear a probe GRP : Group name. If omitted, use "kprobes" for it. EVENT : Event name. If omitted, the event name is generated @@ -38,12 +37,15 @@ Synopsis of kprobe_events @SYM[+|-offs] : Fetch memory at SYM +|- offs (SYM should be a data symbol) $stackN : Fetch Nth entry of stack (N >= 0) $stack : Fetch stack address. - $retval : Fetch return value.(*) - +|-offs(FETCHARG) : Fetch memory at FETCHARG +|- offs address.(**) + $argN : Fetch function argument. (N >= 0)(*) + $retval : Fetch return value.(**) + +|-offs(FETCHARG) : Fetch memory at FETCHARG +|- offs address.(***) NAME=FETCHARG: Set NAME as the argument name of FETCHARG. - (*) only for return probe. - (**) this is useful for fetching a field of data structures. + (*) aN may not correct on asmlinkaged functions and at the middle of + function body. + (**) only for return probe. + (***) this is useful for fetching a field of data structures. Per-Probe Event Filtering @@ -80,16 +82,13 @@ Usage examples To add a probe as a new event, write a new definition to kprobe_events as below. - echo 'p:myprobe do_sys_open dfd=%ax filename=%dx flags=%cx mode=+4($stack)' > /sys/kernel/debug/tracing/kprobe_events + echo p:myprobe do_sys_open dfd=$arg0 filename=$arg1 flags=$arg2 mode=$arg3 > /sys/kernel/debug/tracing/kprobe_events This sets a kprobe on the top of do_sys_open() function with recording -1st to 4th arguments as "myprobe" event. Note, which register/stack entry is -assigned to each function argument depends on arch-specific ABI. If you unsure -the ABI, please try to use probe subcommand of perf-tools (you can find it -under tools/perf/). -As this example shows, users can choose more familiar names for each arguments. +1st to 4th arguments as "myprobe" event. As this example shows, users can +choose more familiar names for each arguments. - echo 'r:myretprobe do_sys_open $retval' >> /sys/kernel/debug/tracing/kprobe_events + echo r:myretprobe do_sys_open $retval >> /sys/kernel/debug/tracing/kprobe_events This sets a kretprobe on the return point of do_sys_open() function with recording return value as "myretprobe" event. @@ -98,24 +97,23 @@ recording return value as "myretprobe" event. cat /sys/kernel/debug/tracing/events/kprobes/myprobe/format name: myprobe -ID: 780 +ID: 75 format: - field:unsigned short common_type; offset:0; size:2; signed:0; - field:unsigned char common_flags; offset:2; size:1; signed:0; - field:unsigned char common_preempt_count; offset:3; size:1;signed:0; - field:int common_pid; offset:4; size:4; signed:1; - field:int common_lock_depth; offset:8; size:4; signed:1; + field:unsigned short common_type; offset:0; size:2; + field:unsigned char common_flags; offset:2; size:1; + field:unsigned char common_preempt_count; offset:3; size:1; + field:int common_pid; offset:4; size:4; + field:int common_tgid; offset:8; size:4; - field:unsigned long __probe_ip; offset:12; size:4; signed:0; - field:int __probe_nargs; offset:16; size:4; signed:1; - field:unsigned long dfd; offset:20; size:4; signed:0; - field:unsigned long filename; offset:24; size:4; signed:0; - field:unsigned long flags; offset:28; size:4; signed:0; - field:unsigned long mode; offset:32; size:4; signed:0; + field: unsigned long ip; offset:16;tsize:8; + field: int nargs; offset:24;tsize:4; + field: unsigned long dfd; offset:32;tsize:8; + field: unsigned long filename; offset:40;tsize:8; + field: unsigned long flags; offset:48;tsize:8; + field: unsigned long mode; offset:56;tsize:8; +print fmt: "(%lx) dfd=%lx filename=%lx flags=%lx mode=%lx", REC->ip, REC->dfd, REC->filename, REC->flags, REC->mode -print fmt: "(%lx) dfd=%lx filename=%lx flags=%lx mode=%lx", REC->__probe_ip, -REC->dfd, REC->filename, REC->flags, REC->mode You can see that the event has 4 arguments as in the expressions you specified. @@ -123,12 +121,6 @@ REC->dfd, REC->filename, REC->flags, REC->mode This clears all probe points. - Or, - - echo -:myprobe >> kprobe_events - - This clears probe points selectively. - Right after definition, each event is disabled by default. For tracing these events, you need to enable it. @@ -154,3 +146,4 @@ events, you need to enable it. returns from SYMBOL(e.g. "sys_open+0x1b/0x1d <- do_sys_open" means kernel returns from do_sys_open to sys_open+0x1b). + diff --git a/trunk/Documentation/trace/mmiotrace.txt b/trunk/Documentation/trace/mmiotrace.txt index 664e7386d89e..162effbfbdec 100644 --- a/trunk/Documentation/trace/mmiotrace.txt +++ b/trunk/Documentation/trace/mmiotrace.txt @@ -44,8 +44,7 @@ Check for lost events. Usage ----- -Make sure debugfs is mounted to /sys/kernel/debug. -If not (requires root privileges): +Make sure debugfs is mounted to /sys/kernel/debug. If not, (requires root privileges) $ mount -t debugfs debugfs /sys/kernel/debug Check that the driver you are about to trace is not loaded. @@ -92,7 +91,7 @@ $ dmesg > dmesg.txt $ tar zcf pciid-nick-mmiotrace.tar.gz mydump.txt lspci.txt dmesg.txt and then send the .tar.gz file. The trace compresses considerably. Replace "pciid" and "nick" with the PCI ID or model name of your piece of hardware -under investigation and your nickname. +under investigation and your nick name. How Mmiotrace Works @@ -101,7 +100,7 @@ How Mmiotrace Works Access to hardware IO-memory is gained by mapping addresses from PCI bus by calling one of the ioremap_*() functions. Mmiotrace is hooked into the __ioremap() function and gets called whenever a mapping is created. Mapping is -an event that is recorded into the trace log. Note that ISA range mappings +an event that is recorded into the trace log. Note, that ISA range mappings are not caught, since the mapping always exists and is returned directly. MMIO accesses are recorded via page faults. Just before __ioremap() returns, @@ -123,11 +122,11 @@ Trace Log Format ---------------- The raw log is text and easily filtered with e.g. grep and awk. One record is -one line in the log. A record starts with a keyword, followed by keyword- -dependent arguments. Arguments are separated by a space, or continue until the +one line in the log. A record starts with a keyword, followed by keyword +dependant arguments. Arguments are separated by a space, or continue until the end of line. The format for version 20070824 is as follows: -Explanation Keyword Space-separated arguments +Explanation Keyword Space separated arguments --------------------------------------------------------------------------- read event R width, timestamp, map id, physical, value, PC, PID @@ -137,7 +136,7 @@ iounmap event UNMAP timestamp, map id, PC, PID marker MARK timestamp, text version VERSION the string "20070824" info for reader LSPCI one line from lspci -v -PCI address map PCIDEV space-separated /proc/bus/pci/devices data +PCI address map PCIDEV space separated /proc/bus/pci/devices data unk. opcode UNKNOWN timestamp, map id, physical, data, PC, PID Timestamp is in seconds with decimals. Physical is a PCI bus address, virtual diff --git a/trunk/Documentation/trace/ring-buffer-design.txt b/trunk/Documentation/trace/ring-buffer-design.txt index d299ff31df57..5b1d23d604c5 100644 --- a/trunk/Documentation/trace/ring-buffer-design.txt +++ b/trunk/Documentation/trace/ring-buffer-design.txt @@ -33,9 +33,9 @@ head_page - a pointer to the page that the reader will use next tail_page - a pointer to the page that will be written to next -commit_page - a pointer to the page with the last finished non-nested write. +commit_page - a pointer to the page with the last finished non nested write. -cmpxchg - hardware-assisted atomic transaction that performs the following: +cmpxchg - hardware assisted atomic transaction that performs the following: A = B iff previous A == C @@ -52,15 +52,15 @@ The Generic Ring Buffer The ring buffer can be used in either an overwrite mode or in producer/consumer mode. -Producer/consumer mode is where if the producer were to fill up the +Producer/consumer mode is where the producer were to fill up the buffer before the consumer could free up anything, the producer will stop writing to the buffer. This will lose most recent events. -Overwrite mode is where if the producer were to fill up the buffer +Overwrite mode is where the produce were to fill up the buffer before the consumer could free up anything, the producer will overwrite the older data. This will lose the oldest events. -No two writers can write at the same time (on the same per-cpu buffer), +No two writers can write at the same time (on the same per cpu buffer), but a writer may interrupt another writer, but it must finish writing before the previous writer may continue. This is very important to the algorithm. The writers act like a "stack". The way interrupts works @@ -79,16 +79,16 @@ the interrupt doing a write as well. Readers can happen at any time. But no two readers may run at the same time, nor can a reader preempt/interrupt another reader. A reader -cannot preempt/interrupt a writer, but it may read/consume from the +can not preempt/interrupt a writer, but it may read/consume from the buffer at the same time as a writer is writing, but the reader must be on another processor to do so. A reader may read on its own processor and can be preempted by a writer. -A writer can preempt a reader, but a reader cannot preempt a writer. +A writer can preempt a reader, but a reader can not preempt a writer. But a reader can read the buffer at the same time (on another processor) as a writer. -The ring buffer is made up of a list of pages held together by a linked list. +The ring buffer is made up of a list of pages held together by a link list. At initialization a reader page is allocated for the reader that is not part of the ring buffer. @@ -102,7 +102,7 @@ the head page. The reader has its own page to use. At start up time, this page is allocated but is not attached to the list. When the reader wants -to read from the buffer, if its page is empty (like it is on start-up), +to read from the buffer, if its page is empty (like it is on start up) it will swap its page with the head_page. The old reader page will become part of the ring buffer and the head_page will be removed. The page after the inserted page (old reader_page) will become the @@ -206,7 +206,7 @@ The main pointers: commit page - the page that last finished a write. -The commit page only is updated by the outermost writer in the +The commit page only is updated by the outer most writer in the writer stack. A writer that preempts another writer will not move the commit page. @@ -281,7 +281,7 @@ with the previous write. The commit pointer points to the last write location that was committed without preempting another write. When a write that preempted another write is committed, it only becomes a pending commit -and will not be a full commit until all writes have been committed. +and will not be a full commit till all writes have been committed. The commit page points to the page that has the last full commit. The tail page points to the page with the last write (before @@ -292,7 +292,7 @@ be several pages ahead. If the tail page catches up to the commit page then no more writes may take place (regardless of the mode of the ring buffer: overwrite and produce/consumer). -The order of pages is: +The order of pages are: head page commit page @@ -311,7 +311,7 @@ Possible scenario: There is a special case that the head page is after either the commit page and possibly the tail page. That is when the commit (and tail) page has been swapped with the reader page. This is because the head page is always -part of the ring buffer, but the reader page is not. Whenever there +part of the ring buffer, but the reader page is not. When ever there has been less than a full page that has been committed inside the ring buffer, and a reader swaps out a page, it will be swapping out the commit page. @@ -338,7 +338,7 @@ and a reader swaps out a page, it will be swapping out the commit page. In this case, the head page will not move when the tail and commit move back into the ring buffer. -The reader cannot swap a page into the ring buffer if the commit page +The reader can not swap a page into the ring buffer if the commit page is still on that page. If the read meets the last commit (real commit not pending or reserved), then there is nothing more to read. The buffer is considered empty until another full commit finishes. @@ -395,7 +395,7 @@ The main idea behind the lockless algorithm is to combine the moving of the head_page pointer with the swapping of pages with the reader. State flags are placed inside the pointer to the page. To do this, each page must be aligned in memory by 4 bytes. This will allow the 2 -least significant bits of the address to be used as flags, since +least significant bits of the address to be used as flags. Since they will always be zero for the address. To get the address, simply mask out the flags. @@ -460,7 +460,7 @@ When the reader tries to swap the page with the ring buffer, it will also use cmpxchg. If the flag bit in the pointer to the head page does not have the HEADER flag set, the compare will fail and the reader will need to look for the new head page and try again. -Note, the flags UPDATE and HEADER are never set at the same time. +Note, the flag UPDATE and HEADER are never set at the same time. The reader swaps the reader page as follows: @@ -539,7 +539,7 @@ updated to the reader page. | +-----------------------------+ | +------------------------------------+ -Another important point: The page that the reader page points back to +Another important point. The page that the reader page points back to by its previous pointer (the one that now points to the new head page) never points back to the reader page. That is because the reader page is not part of the ring buffer. Traversing the ring buffer via the next pointers @@ -572,7 +572,7 @@ not be able to swap the head page from the buffer, nor will it be able to move the head page, until the writer is finished with the move. This eliminates any races that the reader can have on the writer. The reader -must spin, and this is why the reader cannot preempt the writer. +must spin, and this is why the reader can not preempt the writer. tail page | @@ -659,9 +659,9 @@ before pushing the head page. If it is, then it can be assumed that the tail page wrapped the buffer, and we must drop new writes. This is not a race condition, because the commit page can only be moved -by the outermost writer (the writer that was preempted). +by the outter most writer (the writer that was preempted). This means that the commit will not move while a writer is moving the -tail page. The reader cannot swap the reader page if it is also being +tail page. The reader can not swap the reader page if it is also being used as the commit page. The reader can simply check that the commit is off the reader page. Once the commit page leaves the reader page it will never go back on it unless a reader does another swap with the @@ -733,7 +733,7 @@ The write converts the head page pointer to UPDATE. --->| |<---| |<---| |<---| |<--- +---+ +---+ +---+ +---+ -But if a nested writer preempts here, it will see that the next +But if a nested writer preempts here. It will see that the next page is a head page, but it is also nested. It will detect that it is nested and will save that information. The detection is the fact that it sees the UPDATE flag instead of a HEADER or NORMAL @@ -761,7 +761,7 @@ to NORMAL. --->| |<---| |<---| |<---| |<--- +---+ +---+ +---+ +---+ -After the nested writer finishes, the outermost writer will convert +After the nested writer finishes, the outer most writer will convert the UPDATE pointer to NORMAL. @@ -812,7 +812,7 @@ head page. +---+ +---+ +---+ +---+ The nested writer moves the tail page forward. But does not set the old -update page to NORMAL because it is not the outermost writer. +update page to NORMAL because it is not the outer most writer. tail page | @@ -892,7 +892,7 @@ It will return to the first writer. --->| |<---| |<---| |<---| |<--- +---+ +---+ +---+ +---+ -The first writer cannot know atomically if the tail page moved +The first writer can not know atomically test if the tail page moved while it updates the HEAD page. It will then update the head page to what it thinks is the new head page. @@ -923,9 +923,9 @@ if the tail page is either where it use to be or on the next page: --->| |<---| |<---| |<---| |<--- +---+ +---+ +---+ +---+ -If tail page != A and tail page != B, then it must reset the pointer -back to NORMAL. The fact that it only needs to worry about nested -writers means that it only needs to check this after setting the HEAD page. +If tail page != A and tail page does not equal B, then it must reset the +pointer back to NORMAL. The fact that it only needs to worry about +nested writers, it only needs to check this after setting the HEAD page. (first writer) @@ -939,7 +939,7 @@ writers means that it only needs to check this after setting the HEAD page. +---+ +---+ +---+ +---+ Now the writer can update the head page. This is also why the head page must -remain in UPDATE and only reset by the outermost writer. This prevents +remain in UPDATE and only reset by the outer most writer. This prevents the reader from seeing the incorrect head page. diff --git a/trunk/Documentation/trace/tracepoint-analysis.txt b/trunk/Documentation/trace/tracepoint-analysis.txt index 87bee3c129ba..5eb4e487e667 100644 --- a/trunk/Documentation/trace/tracepoint-analysis.txt +++ b/trunk/Documentation/trace/tracepoint-analysis.txt @@ -10,8 +10,8 @@ Tracepoints (see Documentation/trace/tracepoints.txt) can be used without creating custom kernel modules to register probe functions using the event tracing infrastructure. -Simplistically, tracepoints represent important events that can be -taken in conjunction with other tracepoints to build a "Big Picture" of +Simplistically, tracepoints will represent an important event that when can +be taken in conjunction with other tracepoints to build a "Big Picture" of what is going on within the system. There are a large number of methods for gathering and interpreting these events. Lacking any current Best Practises, this document describes some of the methods that can be used. @@ -33,12 +33,12 @@ calling will give a fair indication of the number of events available. -2.2 PCL (Performance Counters for Linux) +2.2 PCL ------- -Discovery and enumeration of all counters and events, including tracepoints, +Discovery and enumeration of all counters and events, including tracepoints are available with the perf tool. Getting a list of available events is a -simple case of: +simple case of $ perf list 2>&1 | grep Tracepoint ext4:ext4_free_inode [Tracepoint event] @@ -49,19 +49,19 @@ simple case of: [ .... remaining output snipped .... ] -3. Enabling Events +2. Enabling Events ================== -3.1 System-Wide Event Enabling +2.1 System-Wide Event Enabling ------------------------------ See Documentation/trace/events.txt for a proper description on how events can be enabled system-wide. A short example of enabling all events related -to page allocation would look something like: +to page allocation would look something like $ for i in `find /sys/kernel/debug/tracing/events -name "enable" | grep mm_`; do echo 1 > $i; done -3.2 System-Wide Event Enabling with SystemTap +2.2 System-Wide Event Enabling with SystemTap --------------------------------------------- In SystemTap, tracepoints are accessible using the kernel.trace() function @@ -86,7 +86,7 @@ were allocating the pages. print_count() } -3.3 System-Wide Event Enabling with PCL +2.3 System-Wide Event Enabling with PCL --------------------------------------- By specifying the -a switch and analysing sleep, the system-wide events @@ -107,16 +107,16 @@ for a duration of time can be examined. Similarly, one could execute a shell and exit it as desired to get a report at that point. -3.4 Local Event Enabling +2.4 Local Event Enabling ------------------------ Documentation/trace/ftrace.txt describes how to enable events on a per-thread basis using set_ftrace_pid. -3.5 Local Event Enablement with PCL +2.5 Local Event Enablement with PCL ----------------------------------- -Events can be activated and tracked for the duration of a process on a local +Events can be activate and tracked for the duration of a process on a local basis using PCL such as follows. $ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \ @@ -131,18 +131,18 @@ basis using PCL such as follows. 0.973913387 seconds time elapsed -4. Event Filtering +3. Event Filtering ================== Documentation/trace/ftrace.txt covers in-depth how to filter events in ftrace. Obviously using grep and awk of trace_pipe is an option as well as any script reading trace_pipe. -5. Analysing Event Variances with PCL +4. Analysing Event Variances with PCL ===================================== Any workload can exhibit variances between runs and it can be important -to know what the standard deviation is. By and large, this is left to the +to know what the standard deviation in. By and large, this is left to the performance analyst to do it by hand. In the event that the discrete event occurrences are useful to the performance analyst, then perf can be used. @@ -166,7 +166,7 @@ In the event that some higher-level event is required that depends on some aggregation of discrete events, then a script would need to be developed. Using --repeat, it is also possible to view how events are fluctuating over -time on a system-wide basis using -a and sleep. +time on a system wide basis using -a and sleep. $ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \ -e kmem:mm_pagevec_free \ @@ -180,7 +180,7 @@ time on a system-wide basis using -a and sleep. 1.002251757 seconds time elapsed ( +- 0.005% ) -6. Higher-Level Analysis with Helper Scripts +5. Higher-Level Analysis with Helper Scripts ============================================ When events are enabled the events that are triggering can be read from @@ -190,11 +190,11 @@ be gathered on-line as appropriate. Examples of post-processing might include o Reading information from /proc for the PID that triggered the event o Deriving a higher-level event from a series of lower-level events. - o Calculating latencies between two events + o Calculate latencies between two events Documentation/trace/postprocess/trace-pagealloc-postprocess.pl is an example script that can read trace_pipe from STDIN or a copy of a trace. When used -on-line, it can be interrupted once to generate a report without exiting +on-line, it can be interrupted once to generate a report without existing and twice to exit. Simplistically, the script just reads STDIN and counts up events but it @@ -212,12 +212,12 @@ also can do more such as processes, the parent process responsible for creating all the helpers can be identified -7. Lower-Level Analysis with PCL +6. Lower-Level Analysis with PCL ================================ -There may also be a requirement to identify what functions within a program +There may also be a requirement to identify what functions with a program were generating events within the kernel. To begin this sort of analysis, the -data must be recorded. At the time of writing, this required root: +data must be recorded. At the time of writing, this required root $ perf record -c 1 \ -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \ @@ -253,11 +253,11 @@ perf report. # (For more details, try: perf report --sort comm,dso,symbol) # -According to this, the vast majority of events triggered on events -within the VDSO. With simple binaries, this will often be the case so let's +According to this, the vast majority of events occured triggered on events +within the VDSO. With simple binaries, this will often be the case so lets take a slightly different example. In the course of writing this, it was -noticed that X was generating an insane amount of page allocations so let's look -at it: +noticed that X was generating an insane amount of page allocations so lets look +at it $ perf record -c 1 -f \ -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \ @@ -280,8 +280,8 @@ This was interrupted after a few seconds and # (For more details, try: perf report --sort comm,dso,symbol) # -So, almost half of the events are occurring in a library. To get an idea which -symbol: +So, almost half of the events are occuring in a library. To get an idea which +symbol. $ perf report --sort comm,dso,symbol # Samples: 27666 @@ -297,7 +297,7 @@ symbol: 0.01% Xorg /opt/gfx-test/lib/libpixman-1.so.0.13.1 [.] get_fast_path 0.00% Xorg [kernel] [k] ftrace_trace_userstack -To see where within the function pixmanFillsse2 things are going wrong: +To see where within the function pixmanFillsse2 things are going wrong $ perf annotate pixmanFillsse2 [ ... ] diff --git a/trunk/Documentation/vgaarbiter.txt b/trunk/Documentation/vgaarbiter.txt index 43a9b0694fdd..987f9b0a5ece 100644 --- a/trunk/Documentation/vgaarbiter.txt +++ b/trunk/Documentation/vgaarbiter.txt @@ -103,7 +103,7 @@ I.2 libpciaccess ---------------- To use the vga arbiter char device it was implemented an API inside the -libpciaccess library. One field was added to struct pci_device (each device +libpciaccess library. One fieldd was added to struct pci_device (each device on the system): /* the type of resource decoded by the device */ diff --git a/trunk/Documentation/video4linux/CARDLIST.cx23885 b/trunk/Documentation/video4linux/CARDLIST.cx23885 index 16ca030e1185..7539e8fa1ffd 100644 --- a/trunk/Documentation/video4linux/CARDLIST.cx23885 +++ b/trunk/Documentation/video4linux/CARDLIST.cx23885 @@ -26,4 +26,3 @@ 25 -> Compro VideoMate E800 [1858:e800] 26 -> Hauppauge WinTV-HVR1290 [0070:8551] 27 -> Mygica X8558 PRO DMB-TH [14f1:8578] - 28 -> LEADTEK WinFast PxTV1200 [107d:6f22] diff --git a/trunk/Documentation/video4linux/CARDLIST.saa7134 b/trunk/Documentation/video4linux/CARDLIST.saa7134 index b4a767060ed7..fce1e7eb0474 100644 --- a/trunk/Documentation/video4linux/CARDLIST.saa7134 +++ b/trunk/Documentation/video4linux/CARDLIST.saa7134 @@ -174,4 +174,3 @@ 173 -> Zolid Hybrid TV Tuner PCI [1131:2004] 174 -> Asus Europa Hybrid OEM [1043:4847] 175 -> Leadtek Winfast DTV1000S [107d:6655] -176 -> Beholder BeholdTV 505 RDS [0000:5051] diff --git a/trunk/Documentation/video4linux/CARDLIST.tuner b/trunk/Documentation/video4linux/CARDLIST.tuner index 9b2e0dd6017e..e0d298fe8830 100644 --- a/trunk/Documentation/video4linux/CARDLIST.tuner +++ b/trunk/Documentation/video4linux/CARDLIST.tuner @@ -81,4 +81,3 @@ tuner=80 - Philips FQ1216LME MK3 PAL/SECAM w/active loopthrough tuner=81 - Partsnic (Daewoo) PTI-5NF05 tuner=82 - Philips CU1216L tuner=83 - NXP TDA18271 -tuner=84 - Sony BTF-Pxn01Z diff --git a/trunk/Documentation/video4linux/README.tlg2300 b/trunk/Documentation/video4linux/README.tlg2300 deleted file mode 100644 index 416ccb93d8c9..000000000000 --- a/trunk/Documentation/video4linux/README.tlg2300 +++ /dev/null @@ -1,47 +0,0 @@ -tlg2300 release notes -==================== - -This is a v4l2/dvb device driver for the tlg2300 chip. - - -current status -============== - -video - - support mmap and read().(no overlay) - -audio - - The driver will register a ALSA card for the audio input. - -vbi - - Works for almost TV norms. - -dvb-t - - works for DVB-T - -FM - - Works for radio. - ---------------------------------------------------------------------------- -TESTED APPLICATIONS: - --VLC1.0.4 test the video and dvb. The GUI is friendly to use. - --Mplayer test the video. - --Mplayer test the FM. The mplayer should be compiled with --enable-radio and - --enable-radio-capture. - The command runs as this(The alsa audio registers to card 1): - #mplayer radio://103.7/capture/ -radio adevice=hw=1,0:arate=48000 \ - -rawaudio rate=48000:channels=2 - ---------------------------------------------------------------------------- -KNOWN PROBLEMS: -about preemphasis: - You can set the preemphasis for radio by the following command: - #v4l2-ctl -d /dev/radio0 --set-ctrl=pre_emphasis_settings=1 - - "pre_emphasis_settings=1" means that you select the 50us. If you want - to select the 75us, please use "pre_emphasis_settings=2" - - diff --git a/trunk/Documentation/video4linux/gspca.txt b/trunk/Documentation/video4linux/gspca.txt index 181b9e6fd984..1800a62cf135 100644 --- a/trunk/Documentation/video4linux/gspca.txt +++ b/trunk/Documentation/video4linux/gspca.txt @@ -42,7 +42,6 @@ ov519 041e:4064 Creative Live! VISTA VF0420 ov519 041e:4067 Creative Live! Cam Video IM (VF0350) ov519 041e:4068 Creative Live! VISTA VF0470 spca561 0458:7004 Genius VideoCAM Express V2 -sn9c2028 0458:7005 Genius Smart 300, version 2 sunplus 0458:7006 Genius Dsc 1.3 Smart zc3xx 0458:7007 Genius VideoCam V2 zc3xx 0458:700c Genius VideoCam V3 @@ -110,7 +109,6 @@ sunplus 04a5:3003 Benq DC 1300 sunplus 04a5:3008 Benq DC 1500 sunplus 04a5:300a Benq DC 3410 spca500 04a5:300c Benq DC 1016 -benq 04a5:3035 Benq DC E300 finepix 04cb:0104 Fujifilm FinePix 4800 finepix 04cb:0109 Fujifilm FinePix A202 finepix 04cb:010b Fujifilm FinePix A203 @@ -144,7 +142,6 @@ sunplus 04fc:5360 Sunplus Generic spca500 04fc:7333 PalmPixDC85 sunplus 04fc:ffff Pure DigitalDakota spca501 0506:00df 3Com HomeConnect Lite -sunplus 052b:1507 Megapixel 5 Pretec DC-1007 sunplus 052b:1513 Megapix V4 sunplus 052b:1803 MegaImage VI tv8532 0545:808b Veo Stingray @@ -154,7 +151,6 @@ sunplus 0546:3191 Polaroid Ion 80 sunplus 0546:3273 Polaroid PDC2030 ov519 054c:0154 Sonny toy4 ov519 054c:0155 Sonny toy5 -cpia1 0553:0002 CPIA CPiA (version1) based cameras zc3xx 055f:c005 Mustek Wcam300A spca500 055f:c200 Mustek Gsmart 300 sunplus 055f:c211 Kowa Bs888e Microcamera @@ -192,7 +188,8 @@ spca500 06bd:0404 Agfa CL20 spca500 06be:0800 Optimedia sunplus 06d6:0031 Trust 610 LCD PowerC@m Zoom spca506 06e1:a190 ADS Instant VCD -ov534_9 06f8:3003 Hercules Dualpix HD Weblog +ov534 06f8:3002 Hercules Blog Webcam +ov534 06f8:3003 Hercules Dualpix HD Weblog sonixj 06f8:3004 Hercules Classic Silver sonixj 06f8:3008 Hercules Deluxe Optical Glass pac7302 06f8:3009 Hercules Classic Link @@ -207,7 +204,6 @@ sunplus 0733:2221 Mercury Digital Pro 3.1p sunplus 0733:3261 Concord 3045 spca536a sunplus 0733:3281 Cyberpix S550V spca506 0734:043b 3DeMon USB Capture aka -cpia1 0813:0001 QX3 camera ov519 0813:0002 Dual Mode USB Camera Plus spca500 084d:0003 D-Link DSC-350 spca500 08ca:0103 Aiptek PocketDV @@ -229,8 +225,7 @@ sunplus 08ca:2050 Medion MD 41437 sunplus 08ca:2060 Aiptek PocketDV5300 tv8532 0923:010f ICM532 cams mars 093a:050f Mars-Semi Pc-Camera -mr97310a 093a:010e All known CIF cams with this ID -mr97310a 093a:010f All known VGA cams with this ID +mr97310a 093a:010f Sakar Digital no. 77379 pac207 093a:2460 Qtec Webcam 100 pac207 093a:2461 HP Webcam pac207 093a:2463 Philips SPC 220 NC @@ -307,7 +302,6 @@ sonixj 0c45:613b Surfer SN-206 sonixj 0c45:613c Sonix Pccam168 sonixj 0c45:6143 Sonix Pccam168 sonixj 0c45:6148 Digitus DA-70811/ZSMC USB PC Camera ZS211/Microdia -sonixj 0c45:614a Frontech E-Ccam (JIL-2225) sn9c20x 0c45:6240 PC Camera (SN9C201 + MT9M001) sn9c20x 0c45:6242 PC Camera (SN9C201 + MT9M111) sn9c20x 0c45:6248 PC Camera (SN9C201 + OV9655) @@ -330,10 +324,6 @@ sn9c20x 0c45:62b0 PC Camera (SN9C202 + MT9V011/MT9V111/MT9V112) sn9c20x 0c45:62b3 PC Camera (SN9C202 + OV9655) sn9c20x 0c45:62bb PC Camera (SN9C202 + OV7660) sn9c20x 0c45:62bc PC Camera (SN9C202 + HV7131R) -sn9c2028 0c45:8001 Wild Planet Digital Spy Camera -sn9c2028 0c45:8003 Sakar #11199, #6637x, #67480 keychain cams -sn9c2028 0c45:8008 Mini-Shotz ms-350 -sn9c2028 0c45:800a Vivitar Vivicam 3350B sunplus 0d64:0303 Sunplus FashionCam DXG ov519 0e96:c001 TRUST 380 USB2 SPACEC@M etoms 102c:6151 Qcam Sangha CIF @@ -351,11 +341,10 @@ spca501 1776:501c Arowana 300K CMOS Camera t613 17a1:0128 TASCORP JPEG Webcam, NGS Cyclops vc032x 17ef:4802 Lenovo Vc0323+MI1310_SOC pac207 2001:f115 D-Link DSB-C120 -sq905c 2770:9050 Disney pix micro (CIF) -sq905c 2770:9052 Disney pix micro 2 (VGA) -sq905c 2770:905c All 11 known cameras with this ID -sq905 2770:9120 All 24 known cameras with this ID -sq905c 2770:913d All 4 known cameras with this ID +sq905c 2770:9050 sq905c +sq905c 2770:905c DualCamera +sq905 2770:9120 Argus Digital Camera DC1512 +sq905c 2770:913d sq905c spca500 2899:012c Toptro Industrial ov519 8020:ef04 ov519 spca508 8086:0110 Intel Easy PC Camera diff --git a/trunk/Documentation/video4linux/v4l2-framework.txt b/trunk/Documentation/video4linux/v4l2-framework.txt index 5155700c206b..74d677c8b036 100644 --- a/trunk/Documentation/video4linux/v4l2-framework.txt +++ b/trunk/Documentation/video4linux/v4l2-framework.txt @@ -599,13 +599,99 @@ video_device::minor fields. video buffer helper functions ----------------------------- -The v4l2 core API provides a set of standard methods (called "videobuf") -for dealing with video buffers. Those methods allow a driver to implement -read(), mmap() and overlay() in a consistent way. There are currently -methods for using video buffers on devices that supports DMA with -scatter/gather method (videobuf-dma-sg), DMA with linear access -(videobuf-dma-contig), and vmalloced buffers, mostly used on USB drivers -(videobuf-vmalloc). - -Please see Documentation/video4linux/videobuf for more information on how -to use the videobuf layer. +The v4l2 core API provides a standard method for dealing with video +buffers. Those methods allow a driver to implement read(), mmap() and +overlay() on a consistent way. + +There are currently methods for using video buffers on devices that +supports DMA with scatter/gather method (videobuf-dma-sg), DMA with +linear access (videobuf-dma-contig), and vmalloced buffers, mostly +used on USB drivers (videobuf-vmalloc). + +Any driver using videobuf should provide operations (callbacks) for +four handlers: + +ops->buf_setup - calculates the size of the video buffers and avoid they + to waste more than some maximum limit of RAM; +ops->buf_prepare - fills the video buffer structs and calls + videobuf_iolock() to alloc and prepare mmaped memory; +ops->buf_queue - advices the driver that another buffer were + requested (by read() or by QBUF); +ops->buf_release - frees any buffer that were allocated. + +In order to use it, the driver need to have a code (generally called at +interrupt context) that will properly handle the buffer request lists, +announcing that a new buffer were filled. + +The irq handling code should handle the videobuf task lists, in order +to advice videobuf that a new frame were filled, in order to honor to a +request. The code is generally like this one: + if (list_empty(&dma_q->active)) + return; + + buf = list_entry(dma_q->active.next, struct vbuffer, vb.queue); + + if (!waitqueue_active(&buf->vb.done)) + return; + + /* Some logic to handle the buf may be needed here */ + + list_del(&buf->vb.queue); + do_gettimeofday(&buf->vb.ts); + wake_up(&buf->vb.done); + +Those are the videobuffer functions used on drivers, implemented on +videobuf-core: + +- Videobuf init functions + videobuf_queue_sg_init() + Initializes the videobuf infrastructure. This function should be + called before any other videobuf function on drivers that uses DMA + Scatter/Gather buffers. + + videobuf_queue_dma_contig_init + Initializes the videobuf infrastructure. This function should be + called before any other videobuf function on drivers that need DMA + contiguous buffers. + + videobuf_queue_vmalloc_init() + Initializes the videobuf infrastructure. This function should be + called before any other videobuf function on USB (and other drivers) + that need a vmalloced type of videobuf. + +- videobuf_iolock() + Prepares the videobuf memory for the proper method (read, mmap, overlay). + +- videobuf_queue_is_busy() + Checks if a videobuf is streaming. + +- videobuf_queue_cancel() + Stops video handling. + +- videobuf_mmap_free() + frees mmap buffers. + +- videobuf_stop() + Stops video handling, ends mmap and frees mmap and other buffers. + +- V4L2 api functions. Those functions correspond to VIDIOC_foo ioctls: + videobuf_reqbufs(), videobuf_querybuf(), videobuf_qbuf(), + videobuf_dqbuf(), videobuf_streamon(), videobuf_streamoff(). + +- V4L1 api function (corresponds to VIDIOCMBUF ioctl): + videobuf_cgmbuf() + This function is used to provide backward compatibility with V4L1 + API. + +- Some help functions for read()/poll() operations: + videobuf_read_stream() + For continuous stream read() + videobuf_read_one() + For snapshot read() + videobuf_poll_stream() + polling help function + +The better way to understand it is to take a look at vivi driver. One +of the main reasons for vivi is to be a videobuf usage example. the +vivi_thread_tick() does the task that the IRQ callback would do on PCI +drivers (or the irq callback on USB). diff --git a/trunk/Documentation/video4linux/videobuf b/trunk/Documentation/video4linux/videobuf deleted file mode 100644 index 17a1f9abf260..000000000000 --- a/trunk/Documentation/video4linux/videobuf +++ /dev/null @@ -1,360 +0,0 @@ -An introduction to the videobuf layer -Jonathan Corbet -Current as of 2.6.33 - -The videobuf layer functions as a sort of glue layer between a V4L2 driver -and user space. It handles the allocation and management of buffers for -the storage of video frames. There is a set of functions which can be used -to implement many of the standard POSIX I/O system calls, including read(), -poll(), and, happily, mmap(). Another set of functions can be used to -implement the bulk of the V4L2 ioctl() calls related to streaming I/O, -including buffer allocation, queueing and dequeueing, and streaming -control. Using videobuf imposes a few design decisions on the driver -author, but the payback comes in the form of reduced code in the driver and -a consistent implementation of the V4L2 user-space API. - -Buffer types - -Not all video devices use the same kind of buffers. In fact, there are (at -least) three common variations: - - - Buffers which are scattered in both the physical and (kernel) virtual - address spaces. (Almost) all user-space buffers are like this, but it - makes great sense to allocate kernel-space buffers this way as well when - it is possible. Unfortunately, it is not always possible; working with - this kind of buffer normally requires hardware which can do - scatter/gather DMA operations. - - - Buffers which are physically scattered, but which are virtually - contiguous; buffers allocated with vmalloc(), in other words. These - buffers are just as hard to use for DMA operations, but they can be - useful in situations where DMA is not available but virtually-contiguous - buffers are convenient. - - - Buffers which are physically contiguous. Allocation of this kind of - buffer can be unreliable on fragmented systems, but simpler DMA - controllers cannot deal with anything else. - -Videobuf can work with all three types of buffers, but the driver author -must pick one at the outset and design the driver around that decision. - -[It's worth noting that there's a fourth kind of buffer: "overlay" buffers -which are located within the system's video memory. The overlay -functionality is considered to be deprecated for most use, but it still -shows up occasionally in system-on-chip drivers where the performance -benefits merit the use of this technique. Overlay buffers can be handled -as a form of scattered buffer, but there are very few implementations in -the kernel and a description of this technique is currently beyond the -scope of this document.] - -Data structures, callbacks, and initialization - -Depending on which type of buffers are being used, the driver should -include one of the following files: - - /* Physically scattered */ - /* vmalloc() buffers */ - /* Physically contiguous */ - -The driver's data structure describing a V4L2 device should include a -struct videobuf_queue instance for the management of the buffer queue, -along with a list_head for the queue of available buffers. There will also -need to be an interrupt-safe spinlock which is used to protect (at least) -the queue. - -The next step is to write four simple callbacks to help videobuf deal with -the management of buffers: - - struct videobuf_queue_ops { - int (*buf_setup)(struct videobuf_queue *q, - unsigned int *count, unsigned int *size); - int (*buf_prepare)(struct videobuf_queue *q, - struct videobuf_buffer *vb, - enum v4l2_field field); - void (*buf_queue)(struct videobuf_queue *q, - struct videobuf_buffer *vb); - void (*buf_release)(struct videobuf_queue *q, - struct videobuf_buffer *vb); - }; - -buf_setup() is called early in the I/O process, when streaming is being -initiated; its purpose is to tell videobuf about the I/O stream. The count -parameter will be a suggested number of buffers to use; the driver should -check it for rationality and adjust it if need be. As a practical rule, a -minimum of two buffers are needed for proper streaming, and there is -usually a maximum (which cannot exceed 32) which makes sense for each -device. The size parameter should be set to the expected (maximum) size -for each frame of data. - -Each buffer (in the form of a struct videobuf_buffer pointer) will be -passed to buf_prepare(), which should set the buffer's size, width, height, -and field fields properly. If the buffer's state field is -VIDEOBUF_NEEDS_INIT, the driver should pass it to: - - int videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb, - struct v4l2_framebuffer *fbuf); - -Among other things, this call will usually allocate memory for the buffer. -Finally, the buf_prepare() function should set the buffer's state to -VIDEOBUF_PREPARED. - -When a buffer is queued for I/O, it is passed to buf_queue(), which should -put it onto the driver's list of available buffers and set its state to -VIDEOBUF_QUEUED. Note that this function is called with the queue spinlock -held; if it tries to acquire it as well things will come to a screeching -halt. Yes, this is the voice of experience. Note also that videobuf may -wait on the first buffer in the queue; placing other buffers in front of it -could again gum up the works. So use list_add_tail() to enqueue buffers. - -Finally, buf_release() is called when a buffer is no longer intended to be -used. The driver should ensure that there is no I/O active on the buffer, -then pass it to the appropriate free routine(s): - - /* Scatter/gather drivers */ - int videobuf_dma_unmap(struct videobuf_queue *q, - struct videobuf_dmabuf *dma); - int videobuf_dma_free(struct videobuf_dmabuf *dma); - - /* vmalloc drivers */ - void videobuf_vmalloc_free (struct videobuf_buffer *buf); - - /* Contiguous drivers */ - void videobuf_dma_contig_free(struct videobuf_queue *q, - struct videobuf_buffer *buf); - -One way to ensure that a buffer is no longer under I/O is to pass it to: - - int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr); - -Here, vb is the buffer, non_blocking indicates whether non-blocking I/O -should be used (it should be zero in the buf_release() case), and intr -controls whether an interruptible wait is used. - -File operations - -At this point, much of the work is done; much of the rest is slipping -videobuf calls into the implementation of the other driver callbacks. The -first step is in the open() function, which must initialize the -videobuf queue. The function to use depends on the type of buffer used: - - void videobuf_queue_sg_init(struct videobuf_queue *q, - struct videobuf_queue_ops *ops, - struct device *dev, - spinlock_t *irqlock, - enum v4l2_buf_type type, - enum v4l2_field field, - unsigned int msize, - void *priv); - - void videobuf_queue_vmalloc_init(struct videobuf_queue *q, - struct videobuf_queue_ops *ops, - struct device *dev, - spinlock_t *irqlock, - enum v4l2_buf_type type, - enum v4l2_field field, - unsigned int msize, - void *priv); - - void videobuf_queue_dma_contig_init(struct videobuf_queue *q, - struct videobuf_queue_ops *ops, - struct device *dev, - spinlock_t *irqlock, - enum v4l2_buf_type type, - enum v4l2_field field, - unsigned int msize, - void *priv); - -In each case, the parameters are the same: q is the queue structure for the -device, ops is the set of callbacks as described above, dev is the device -structure for this video device, irqlock is an interrupt-safe spinlock to -protect access to the data structures, type is the buffer type used by the -device (cameras will use V4L2_BUF_TYPE_VIDEO_CAPTURE, for example), field -describes which field is being captured (often V4L2_FIELD_NONE for -progressive devices), msize is the size of any containing structure used -around struct videobuf_buffer, and priv is a private data pointer which -shows up in the priv_data field of struct videobuf_queue. Note that these -are void functions which, evidently, are immune to failure. - -V4L2 capture drivers can be written to support either of two APIs: the -read() system call and the rather more complicated streaming mechanism. As -a general rule, it is necessary to support both to ensure that all -applications have a chance of working with the device. Videobuf makes it -easy to do that with the same code. To implement read(), the driver need -only make a call to one of: - - ssize_t videobuf_read_one(struct videobuf_queue *q, - char __user *data, size_t count, - loff_t *ppos, int nonblocking); - - ssize_t videobuf_read_stream(struct videobuf_queue *q, - char __user *data, size_t count, - loff_t *ppos, int vbihack, int nonblocking); - -Either one of these functions will read frame data into data, returning the -amount actually read; the difference is that videobuf_read_one() will only -read a single frame, while videobuf_read_stream() will read multiple frames -if they are needed to satisfy the count requested by the application. A -typical driver read() implementation will start the capture engine, call -one of the above functions, then stop the engine before returning (though a -smarter implementation might leave the engine running for a little while in -anticipation of another read() call happening in the near future). - -The poll() function can usually be implemented with a direct call to: - - unsigned int videobuf_poll_stream(struct file *file, - struct videobuf_queue *q, - poll_table *wait); - -Note that the actual wait queue eventually used will be the one associated -with the first available buffer. - -When streaming I/O is done to kernel-space buffers, the driver must support -the mmap() system call to enable user space to access the data. In many -V4L2 drivers, the often-complex mmap() implementation simplifies to a -single call to: - - int videobuf_mmap_mapper(struct videobuf_queue *q, - struct vm_area_struct *vma); - -Everything else is handled by the videobuf code. - -The release() function requires two separate videobuf calls: - - void videobuf_stop(struct videobuf_queue *q); - int videobuf_mmap_free(struct videobuf_queue *q); - -The call to videobuf_stop() terminates any I/O in progress - though it is -still up to the driver to stop the capture engine. The call to -videobuf_mmap_free() will ensure that all buffers have been unmapped; if -so, they will all be passed to the buf_release() callback. If buffers -remain mapped, videobuf_mmap_free() returns an error code instead. The -purpose is clearly to cause the closing of the file descriptor to fail if -buffers are still mapped, but every driver in the 2.6.32 kernel cheerfully -ignores its return value. - -ioctl() operations - -The V4L2 API includes a very long list of driver callbacks to respond to -the many ioctl() commands made available to user space. A number of these -- those associated with streaming I/O - turn almost directly into videobuf -calls. The relevant helper functions are: - - int videobuf_reqbufs(struct videobuf_queue *q, - struct v4l2_requestbuffers *req); - int videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b); - int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b); - int videobuf_dqbuf(struct videobuf_queue *q, struct v4l2_buffer *b, - int nonblocking); - int videobuf_streamon(struct videobuf_queue *q); - int videobuf_streamoff(struct videobuf_queue *q); - int videobuf_cgmbuf(struct videobuf_queue *q, struct video_mbuf *mbuf, - int count); - -So, for example, a VIDIOC_REQBUFS call turns into a call to the driver's -vidioc_reqbufs() callback which, in turn, usually only needs to locate the -proper struct videobuf_queue pointer and pass it to videobuf_reqbufs(). -These support functions can replace a great deal of buffer management -boilerplate in a lot of V4L2 drivers. - -The vidioc_streamon() and vidioc_streamoff() functions will be a bit more -complex, of course, since they will also need to deal with starting and -stopping the capture engine. videobuf_cgmbuf(), called from the driver's -vidiocgmbuf() function, only exists if the V4L1 compatibility module has -been selected with CONFIG_VIDEO_V4L1_COMPAT, so its use must be surrounded -with #ifdef directives. - -Buffer allocation - -Thus far, we have talked about buffers, but have not looked at how they are -allocated. The scatter/gather case is the most complex on this front. For -allocation, the driver can leave buffer allocation entirely up to the -videobuf layer; in this case, buffers will be allocated as anonymous -user-space pages and will be very scattered indeed. If the application is -using user-space buffers, no allocation is needed; the videobuf layer will -take care of calling get_user_pages() and filling in the scatterlist array. - -If the driver needs to do its own memory allocation, it should be done in -the vidioc_reqbufs() function, *after* calling videobuf_reqbufs(). The -first step is a call to: - - struct videobuf_dmabuf *videobuf_to_dma(struct videobuf_buffer *buf); - -The returned videobuf_dmabuf structure (defined in -) includes a couple of relevant fields: - - struct scatterlist *sglist; - int sglen; - -The driver must allocate an appropriately-sized scatterlist array and -populate it with pointers to the pieces of the allocated buffer; sglen -should be set to the length of the array. - -Drivers using the vmalloc() method need not (and cannot) concern themselves -with buffer allocation at all; videobuf will handle those details. The -same is normally true of contiguous-DMA drivers as well; videobuf will -allocate the buffers (with dma_alloc_coherent()) when it sees fit. That -means that these drivers may be trying to do high-order allocations at any -time, an operation which is not always guaranteed to work. Some drivers -play tricks by allocating DMA space at system boot time; videobuf does not -currently play well with those drivers. - -As of 2.6.31, contiguous-DMA drivers can work with a user-supplied buffer, -as long as that buffer is physically contiguous. Normal user-space -allocations will not meet that criterion, but buffers obtained from other -kernel drivers, or those contained within huge pages, will work with these -drivers. - -Filling the buffers - -The final part of a videobuf implementation has no direct callback - it's -the portion of the code which actually puts frame data into the buffers, -usually in response to interrupts from the device. For all types of -drivers, this process works approximately as follows: - - - Obtain the next available buffer and make sure that somebody is actually - waiting for it. - - - Get a pointer to the memory and put video data there. - - - Mark the buffer as done and wake up the process waiting for it. - -Step (1) above is done by looking at the driver-managed list_head structure -- the one which is filled in the buf_queue() callback. Because starting -the engine and enqueueing buffers are done in separate steps, it's possible -for the engine to be running without any buffers available - in the -vmalloc() case especially. So the driver should be prepared for the list -to be empty. It is equally possible that nobody is yet interested in the -buffer; the driver should not remove it from the list or fill it until a -process is waiting on it. That test can be done by examining the buffer's -done field (a wait_queue_head_t structure) with waitqueue_active(). - -A buffer's state should be set to VIDEOBUF_ACTIVE before being mapped for -DMA; that ensures that the videobuf layer will not try to do anything with -it while the device is transferring data. - -For scatter/gather drivers, the needed memory pointers will be found in the -scatterlist structure described above. Drivers using the vmalloc() method -can get a memory pointer with: - - void *videobuf_to_vmalloc(struct videobuf_buffer *buf); - -For contiguous DMA drivers, the function to use is: - - dma_addr_t videobuf_to_dma_contig(struct videobuf_buffer *buf); - -The contiguous DMA API goes out of its way to hide the kernel-space address -of the DMA buffer from drivers. - -The final step is to set the size field of the relevant videobuf_buffer -structure to the actual size of the captured image, set state to -VIDEOBUF_DONE, then call wake_up() on the done queue. At this point, the -buffer is owned by the videobuf layer and the driver should not touch it -again. - -Developers who are interested in more information can go into the relevant -header files; there are a few low-level functions declared there which have -not been talked about here. Also worthwhile is the vivi driver -(drivers/media/video/vivi.c), which is maintained as an example of how V4L2 -drivers should be written. Vivi only uses the vmalloc() API, but it's good -enough to get started with. Note also that all of these calls are exported -GPL-only, so they will not be available to non-GPL kernel modules. diff --git a/trunk/Documentation/x86/x86_64/boot-options.txt b/trunk/Documentation/x86/x86_64/boot-options.txt index 7fbbaf85f5b7..29a6ff8bc7d3 100644 --- a/trunk/Documentation/x86/x86_64/boot-options.txt +++ b/trunk/Documentation/x86/x86_64/boot-options.txt @@ -166,13 +166,19 @@ NUMA numa=noacpi Don't parse the SRAT table for NUMA setup - numa=fake=[MG] - If given as a memory unit, fills all system RAM with nodes of - size interleaved over physical nodes. - - numa=fake= - If given as an integer, fills all system RAM with N fake nodes - interleaved over physical nodes. + numa=fake=CMDLINE + If a number, fakes CMDLINE nodes and ignores NUMA setup of the + actual machine. Otherwise, system memory is configured + depending on the sizes and coefficients listed. For example: + numa=fake=2*512,1024,4*256,*128 + gives two 512M nodes, a 1024M node, four 256M nodes, and the + rest split into 128M chunks. If the last character of CMDLINE + is a *, the remaining memory is divided up equally among its + coefficient: + numa=fake=2*512,2* + gives two 512M nodes and the rest split into two nodes. + Otherwise, the remaining system RAM is allocated to an + additional node. ACPI diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index f520dd0862b1..745643b8c344 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -221,7 +221,6 @@ F: drivers/net/acenic* ACER ASPIRE ONE TEMPERATURE AND FAN DRIVER M: Peter Feuerer -L: platform-driver-x86@vger.kernel.org W: http://piie.net/?section=acerhdf S: Maintained F: drivers/platform/x86/acerhdf.c @@ -229,7 +228,6 @@ F: drivers/platform/x86/acerhdf.c ACER WMI LAPTOP EXTRAS M: Carlos Corbacho L: aceracpi@googlegroups.com (subscribers-only) -L: platform-driver-x86@vger.kernel.org W: http://code.google.com/p/aceracpi S: Maintained F: drivers/platform/x86/acer-wmi.c @@ -290,7 +288,7 @@ F: drivers/acpi/video.c ACPI WMI DRIVER M: Carlos Corbacho -L: platform-driver-x86@vger.kernel.org +L: linux-acpi@vger.kernel.org W: http://www.lesswatts.org/projects/acpi/ S: Maintained F: drivers/platform/x86/wmi.c @@ -412,8 +410,9 @@ F: drivers/i2c/busses/i2c-ali1563.c ALPHA PORT M: Richard Henderson +S: Odd Fixes for 2.4; Maintained for 2.6. M: Ivan Kokshaysky -M: Matt Turner +S: Maintained for 2.4; PCI support for 2.6. L: linux-alpha@vger.kernel.org F: arch/alpha/ @@ -618,10 +617,10 @@ M: Richard Purdie S: Maintained ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE -M: Paulius Zaleckas +M: Paulius Zaleckas L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) T: git git://gitorious.org/linux-gemini/mainline.git -S: Odd Fixes +S: Maintained F: arch/arm/mach-gemini/ ARM/EBSA110 MACHINE SUPPORT @@ -643,9 +642,9 @@ T: topgit git://git.openezx.org/openezx.git F: arch/arm/mach-pxa/ezx.c ARM/FARADAY FA526 PORT -M: Paulius Zaleckas +M: Paulius Zaleckas L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -S: Odd Fixes +S: Maintained F: arch/arm/mm/*-fa* ARM/FOOTBRIDGE ARCHITECTURE @@ -970,7 +969,6 @@ ASUS ACPI EXTRAS DRIVER M: Corentin Chary M: Karol Kozimor L: acpi4asus-user@lists.sourceforge.net -L: platform-driver-x86@vger.kernel.org W: http://acpi4asus.sf.net S: Maintained F: drivers/platform/x86/asus_acpi.c @@ -984,13 +982,13 @@ F: drivers/hwmon/asb100.c ASUS LAPTOP EXTRAS DRIVER M: Corentin Chary L: acpi4asus-user@lists.sourceforge.net -L: platform-driver-x86@vger.kernel.org W: http://acpi4asus.sf.net S: Maintained F: drivers/platform/x86/asus-laptop.c ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API M: Dan Williams +M: Maciej Sosnowski W: http://sourceforge.net/projects/xscaleiop S: Supported F: Documentation/crypto/async-tx-api.txt @@ -1474,13 +1472,6 @@ L: linux-scsi@vger.kernel.org S: Supported F: drivers/scsi/fnic/ -CMPC ACPI DRIVER -M: Thadeu Lima de Souza Cascardo -M: Daniel Oliveira Nascimento -L: platform-driver-x86@vger.kernel.org -S: Supported -F: drivers/platform/x86/classmate-laptop.c - CODA FILE SYSTEM M: Jan Harkes M: coda@cs.cmu.edu @@ -1521,7 +1512,6 @@ F: drivers/pci/hotplug/cpcihp_generic.c COMPAL LAPTOP SUPPORT M: Cezary Jackiewicz -L: platform-driver-x86@vger.kernel.org S: Maintained F: drivers/platform/x86/compal-laptop.c @@ -1642,8 +1632,9 @@ S: Maintained F: sound/pci/cs5535audio/ CX18 VIDEO4LINUX DRIVER +M: Hans Verkuil M: Andy Walls -L: ivtv-devel@ivtvdriver.org (moderated for non-subscribers) +L: ivtv-devel@ivtvdriver.org L: linux-media@vger.kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git W: http://linuxtv.org @@ -1739,9 +1730,10 @@ F: include/linux/tfrc.h F: net/dccp/ DECnet NETWORK LAYER +M: Christine Caulfield W: http://linux-decnet.sourceforge.net L: linux-decnet-user@lists.sourceforge.net -S: Orphan +S: Maintained F: Documentation/networking/decnet.txt F: net/decnet/ @@ -1752,7 +1744,6 @@ F: drivers/net/defxx.* DELL LAPTOP DRIVER M: Matthew Garrett -L: platform-driver-x86@vger.kernel.org S: Maintained F: drivers/platform/x86/dell-laptop.c @@ -1828,6 +1819,7 @@ S: Supported F: fs/dlm/ DMA GENERIC OFFLOAD ENGINE SUBSYSTEM +M: Maciej Sosnowski M: Dan Williams S: Supported F: drivers/dma/ @@ -2035,7 +2027,6 @@ F: drivers/edac/r82600_edac.c EEEPC LAPTOP EXTRAS DRIVER M: Corentin Chary L: acpi4asus-user@lists.sourceforge.net -L: platform-driver-x86@vger.kernel.org W: http://acpi4asus.sf.net S: Maintained F: drivers/platform/x86/eeepc-laptop.c @@ -2149,17 +2140,6 @@ S: Supported F: Documentation/fault-injection/ F: lib/fault-inject.c -FCOE SUBSYSTEM (libfc, libfcoe, fcoe) -M: Robert Love -L: devel@open-fcoe.org -W: www.Open-FCoE.org -S: Supported -F: drivers/scsi/libfc/ -F: drivers/scsi/fcoe/ -F: include/scsi/fc/ -F: include/scsi/libfc.h -F: include/scsi/libfcoe.h - FILE LOCKING (flock() and fcntl()/lockf()) M: Matthew Wilcox L: linux-fsdevel@vger.kernel.org @@ -2183,9 +2163,10 @@ F: drivers/hwmon/f75375s.c F: include/linux/f75375s.h FIREWIRE SUBSYSTEM +M: Kristian Hoegsberg M: Stefan Richter L: linux1394-devel@lists.sourceforge.net -W: http://ieee1394.wiki.kernel.org/ +W: http://www.linux1394.org/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git S: Maintained F: drivers/firewire/ @@ -2314,7 +2295,7 @@ F: arch/frv/ FUJITSU LAPTOP EXTRAS M: Jonathan Woithe -L: platform-driver-x86@vger.kernel.org +L: linux-acpi@vger.kernel.org S: Maintained F: drivers/platform/x86/fujitsu-laptop.c @@ -2412,18 +2393,6 @@ L: linuxppc-dev@ozlabs.org S: Odd Fixes F: drivers/char/hvc_* -VIRTIO CONSOLE DRIVER -M: Amit Shah -L: virtualization@lists.linux-foundation.org -S: Maintained -F: drivers/char/virtio_console.c - -iSCSI BOOT FIRMWARE TABLE (iBFT) DRIVER -M: Peter Jones -M: Konrad Rzeszutek Wilk -S: Maintained -F: drivers/firmware/iscsi_ibft* - GSPCA FINEPIX SUBDRIVER M: Frank Zago L: linux-media@vger.kernel.org @@ -2592,7 +2561,6 @@ F: drivers/net/wireless/hostap/ HP COMPAQ TC1100 TABLET WMI EXTRAS DRIVER M: Carlos Corbacho -L: platform-driver-x86@vger.kernel.org S: Odd Fixes F: drivers/platform/x86/tc1100-wmi.c @@ -2731,14 +2699,22 @@ S: Supported F: drivers/idle/i7300_idle.c IEEE 1394 SUBSYSTEM +M: Ben Collins M: Stefan Richter L: linux1394-devel@lists.sourceforge.net -W: http://ieee1394.wiki.kernel.org/ +W: http://www.linux1394.org/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git -S: Obsolete +S: Maintained F: Documentation/debugging-via-ohci1394.txt F: drivers/ieee1394/ +IEEE 1394 RAW I/O DRIVER +M: Dan Dennedy +M: Stefan Richter +L: linux1394-devel@lists.sourceforge.net +S: Maintained +F: drivers/ieee1394/raw1394* + IEEE 802.15.4 SUBSYSTEM M: Dmitry Eremin-Solenikov M: Sergey Lapin @@ -2803,7 +2779,7 @@ F: drivers/video/i810/ INTEL MENLOW THERMAL DRIVER M: Sujith Thomas -L: platform-driver-x86@vger.kernel.org +L: linux-acpi@vger.kernel.org W: http://www.lesswatts.org/projects/acpi/ S: Supported F: drivers/platform/x86/intel_menlow.c @@ -2815,7 +2791,7 @@ F: arch/x86/kernel/microcode_core.c F: arch/x86/kernel/microcode_intel.c INTEL I/OAT DMA DRIVER -M: Dan Williams +M: Maciej Sosnowski S: Supported F: drivers/dma/ioat* @@ -2853,11 +2829,10 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ixp2000/ -INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe) +INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/ixgb/ixgbe) M: Jeff Kirsher M: Jesse Brandeburg M: Bruce Allan -M: Alex Duyck M: PJ Waskiewicz M: John Ronciak L: e1000-devel@lists.sourceforge.net @@ -2867,7 +2842,6 @@ F: drivers/net/e100.c F: drivers/net/e1000/ F: drivers/net/e1000e/ F: drivers/net/igb/ -F: drivers/net/igbvf/ F: drivers/net/ixgb/ F: drivers/net/ixgbe/ @@ -3041,8 +3015,8 @@ S: Maintained F: drivers/isdn/hardware/eicon/ IVTV VIDEO4LINUX DRIVER -M: Andy Walls -L: ivtv-devel@ivtvdriver.org (moderated for non-subscribers) +M: Hans Verkuil +L: ivtv-devel@ivtvdriver.org L: linux-media@vger.kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git W: http://www.ivtvdriver.org @@ -3442,10 +3416,8 @@ S: Maintained F: drivers/scsi/sym53c8xx_2/ LTP (Linux Test Project) -M: Rishikesh K Rajak -M: Garrett Cooper -M: Mike Frysinger -M: Subrata Modak +M: Subrata Modak +M: Mike Frysinger L: ltp-list@lists.sourceforge.net (subscribers-only) W: http://ltp.sourceforge.net/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/galak/ltp.git @@ -3521,9 +3493,9 @@ S: Maintained F: drivers/net/wireless/libertas/ MARVELL MV643XX ETHERNET DRIVER -M: Lennert Buytenhek +M: Lennert Buytenhek L: netdev@vger.kernel.org -S: Maintained +S: Supported F: drivers/net/mv643xx_eth.* F: include/linux/mv643xx.h @@ -3669,18 +3641,11 @@ F: drivers/char/mxser.* MSI LAPTOP SUPPORT M: Lennart Poettering -L: platform-driver-x86@vger.kernel.org W: https://tango.0pointer.de/mailman/listinfo/s270-linux W: http://0pointer.de/lennart/tchibo.html S: Maintained F: drivers/platform/x86/msi-laptop.c -MSI WMI SUPPORT -M: Anisse Astier -L: platform-driver-x86@vger.kernel.org -S: Supported -F: drivers/platform/x86/msi-wmi.c - MULTIFUNCTION DEVICES (MFD) M: Samuel Ortiz T: git git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6.git @@ -3871,7 +3836,6 @@ NETWORKING DRIVERS L: netdev@vger.kernel.org W: http://www.linuxfoundation.org/en/Net T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6.git -T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6.git S: Odd Fixes F: drivers/net/ F: include/linux/if_* @@ -3907,7 +3871,7 @@ F: drivers/net/ni5010.* NILFS2 FILESYSTEM M: KONISHI Ryusuke -L: linux-nilfs@vger.kernel.org +L: users@nilfs.org W: http://www.nilfs.org/en/ S: Supported F: Documentation/filesystems/nilfs2.txt @@ -3974,20 +3938,29 @@ S: Maintained F: sound/soc/omap/ OMAP FRAMEBUFFER SUPPORT -M: Tomi Valkeinen +M: Imre Deak L: linux-fbdev@vger.kernel.org L: linux-omap@vger.kernel.org S: Maintained F: drivers/video/omap/ -OMAP DISPLAY SUBSYSTEM and FRAMEBUFFER SUPPORT (DSS2) +OMAP DISPLAY SUBSYSTEM SUPPORT (DSS2) M: Tomi Valkeinen L: linux-omap@vger.kernel.org -L: linux-fbdev@vger.kernel.org +L: linux-fbdev@vger.kernel.org (moderated for non-subscribers) S: Maintained -F: drivers/video/omap2/ +F: drivers/video/omap2/dss/ +F: drivers/video/omap2/vrfb.c +F: drivers/video/omap2/vram.c F: Documentation/arm/OMAP/DSS +OMAP FRAMEBUFFER SUPPORT (FOR DSS2) +M: Tomi Valkeinen +L: linux-omap@vger.kernel.org +L: linux-fbdev@vger.kernel.org (moderated for non-subscribers) +S: Maintained +F: drivers/video/omap2/omapfb/ + OMAP MMC SUPPORT M: Jarkko Lavinen L: linux-omap@vger.kernel.org @@ -4130,7 +4103,6 @@ F: drivers/i2c/busses/i2c-pasemi.c PANASONIC LAPTOP ACPI EXTRAS DRIVER M: Harald Welte -L: platform-driver-x86@vger.kernel.org S: Maintained F: drivers/platform/x86/panasonic-laptop.c @@ -4544,7 +4516,7 @@ F: drivers/net/wireless/ray* RCUTORTURE MODULE M: Josh Triplett M: "Paul E. McKenney" -S: Supported +S: Maintained F: Documentation/RCU/torture.txt F: kernel/rcutorture.c @@ -4569,12 +4541,11 @@ M: Dipankar Sarma M: "Paul E. McKenney" W: http://www.rdrop.com/users/paulmck/rclock/ S: Supported -F: Documentation/RCU/ -F: include/linux/rcu* -F: include/linux/srcu* -F: kernel/rcu* -F: kernel/srcu* -X: kernel/rcutorture.c +F: Documentation/RCU/rcu.txt +F: Documentation/RCU/rcuref.txt +F: include/linux/rcupdate.h +F: include/linux/srcu.h +F: kernel/rcupdate.c REAL TIME CLOCK DRIVER M: Paul Gortmaker @@ -4712,13 +4683,6 @@ F: drivers/media/common/saa7146* F: drivers/media/video/*7146* F: include/media/*7146* -TLG2300 VIDEO4LINUX-2 DRIVER -M: Huang Shijie -M: Kang Yong -M: Zhang Xiaobing -S: Supported -F: drivers/media/video/tlg2300 - SC1200 WDT DRIVER M: Zwane Mwaikambo S: Maintained @@ -5077,7 +5041,7 @@ F: include/linux/ssb/ SONY VAIO CONTROL DEVICE DRIVER M: Mattia Dongili -L: platform-driver-x86@vger.kernel.org +L: linux-acpi@vger.kernel.org W: http://www.linux.it/~malattia/wiki/index.php/Sony_drivers S: Maintained F: Documentation/laptops/sony-laptop.txt @@ -5283,7 +5247,6 @@ F: arch/xtensa/ THINKPAD ACPI EXTRAS DRIVER M: Henrique de Moraes Holschuh L: ibm-acpi-devel@lists.sourceforge.net -L: platform-driver-x86@vger.kernel.org W: http://ibm-acpi.sourceforge.net W: http://thinkwiki.org/wiki/Ibm-acpi T: git git://repo.or.cz/linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git @@ -5337,12 +5300,10 @@ F: security/tomoyo/ TOPSTAR LAPTOP EXTRAS DRIVER M: Herton Ronaldo Krzesinski -L: platform-driver-x86@vger.kernel.org S: Maintained F: drivers/platform/x86/topstar-laptop.c TOSHIBA ACPI EXTRAS DRIVER -L: platform-driver-x86@vger.kernel.org S: Orphan F: drivers/platform/x86/toshiba_acpi.c @@ -6070,12 +6031,6 @@ S: Maintained F: Documentation/x86/ F: arch/x86/ -X86 PLATFORM DRIVERS -M: Matthew Garrett -L: platform-driver-x86@vger.kernel.org -S: Maintained -F: drivers/platform/x86 - XEN HYPERVISOR INTERFACE M: Jeremy Fitzhardinge M: Chris Wright diff --git a/trunk/Makefile b/trunk/Makefile index 1b24895212d8..e6b06cbeb47e 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 33 -EXTRAVERSION = +EXTRAVERSION = -rc1 NAME = Man-Eating Seals of Antiquity # *DOCUMENTATION* @@ -18,9 +18,10 @@ MAKEFLAGS += -rR --no-print-directory # Avoid funny character set dependencies unexport LC_ALL +LC_CTYPE=C LC_COLLATE=C LC_NUMERIC=C -export LC_COLLATE LC_NUMERIC +export LC_CTYPE LC_COLLATE LC_NUMERIC # We are using a recursive build, so we need to do a little thinking # to get the ordering right. diff --git a/trunk/arch/Kconfig b/trunk/arch/Kconfig index 215e46073c45..9d055b4f0585 100644 --- a/trunk/arch/Kconfig +++ b/trunk/arch/Kconfig @@ -3,9 +3,11 @@ # config OPROFILE - tristate "OProfile system profiling" + tristate "OProfile system profiling (EXPERIMENTAL)" depends on PROFILING depends on HAVE_OPROFILE + depends on TRACING_SUPPORT + select TRACING select RING_BUFFER select RING_BUFFER_ALLOW_SWAP help @@ -15,6 +17,20 @@ config OPROFILE If unsure, say N. +config OPROFILE_IBS + bool "OProfile AMD IBS support (EXPERIMENTAL)" + default n + depends on OPROFILE && SMP && X86 + help + Instruction-Based Sampling (IBS) is a new profiling + technique that provides rich, precise program performance + information. IBS is introduced by AMD Family10h processors + (AMD Opteron Quad-Core processor "Barcelona") to overcome + the limitations of conventional performance counter + sampling. + + If unsure, say N. + config OPROFILE_EVENT_MULTIPLEX bool "OProfile multiplexing support (EXPERIMENTAL)" default n @@ -105,14 +121,6 @@ config HAVE_DMA_ATTRS config USE_GENERIC_SMP_HELPERS bool -config HAVE_REGS_AND_STACK_ACCESS_API - bool - help - This symbol should be selected by an architecure if it supports - the API needed to access registers and stack entries from pt_regs, - declared in asm/ptrace.h - For example the kprobes-based event tracer needs this API. - config HAVE_CLK bool help diff --git a/trunk/arch/alpha/include/asm/pgtable.h b/trunk/arch/alpha/include/asm/pgtable.h index 71a243294142..3f0c59f6d8aa 100644 --- a/trunk/arch/alpha/include/asm/pgtable.h +++ b/trunk/arch/alpha/include/asm/pgtable.h @@ -329,7 +329,7 @@ extern pgd_t swapper_pg_dir[1024]; * tables contain all the necessary information. */ extern inline void update_mmu_cache(struct vm_area_struct * vma, - unsigned long address, pte_t *ptep) + unsigned long address, pte_t pte) { } diff --git a/trunk/arch/alpha/include/asm/topology.h b/trunk/arch/alpha/include/asm/topology.h index 9251e13e144f..36b3a30ba0e5 100644 --- a/trunk/arch/alpha/include/asm/topology.h +++ b/trunk/arch/alpha/include/asm/topology.h @@ -28,9 +28,6 @@ static const struct cpumask *cpumask_of_node(int node) { int cpu; - if (node == -1) - return cpu_all_mask; - cpumask_clear(&node_to_cpumask_map[node]); for_each_online_cpu(cpu) { diff --git a/trunk/arch/alpha/kernel/pci.c b/trunk/arch/alpha/kernel/pci.c index c9ab94ee1ca8..a91ba28999b5 100644 --- a/trunk/arch/alpha/kernel/pci.c +++ b/trunk/arch/alpha/kernel/pci.c @@ -126,8 +126,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_final); #define MB (1024*KB) #define GB (1024*MB) -resource_size_t -pcibios_align_resource(void *data, const struct resource *res, +void +pcibios_align_resource(void *data, struct resource *res, resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; @@ -184,7 +184,7 @@ pcibios_align_resource(void *data, const struct resource *res, } } - return start; + res->start = start; } #undef KB #undef MB diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 3b181284970f..233a222752c0 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -12,17 +12,12 @@ config ARM select HAVE_IDE select RTC_LIB select SYS_SUPPORTS_APM_EMULATION - select GENERIC_ATOMIC64 if (!CPU_32v6K) select HAVE_OPROFILE select HAVE_ARCH_KGDB select HAVE_KPROBES if (!XIP_KERNEL) select HAVE_KRETPROBES if (HAVE_KPROBES) select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) select HAVE_GENERIC_DMA_COHERENT - select HAVE_KERNEL_GZIP - select HAVE_KERNEL_LZO - select HAVE_PERF_EVENTS - select PERF_USE_VMALLOC help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and @@ -55,9 +50,6 @@ config HAVE_TCM bool select GENERIC_ALLOCATOR -config HAVE_PROC_CPU - bool - config NO_IOPORT bool @@ -167,11 +159,6 @@ config ARCH_MTD_XIP config GENERIC_HARDIRQS_NO__DO_IRQ def_bool y -config ARM_L1_CACHE_SHIFT_6 - bool - help - Setting ARM L1 cache line size to 64 Bytes. - if OPROFILE config OPROFILE_ARMV6 @@ -561,20 +548,10 @@ config ARCH_W90X900 -config ARCH_NUC93X - bool "Nuvoton NUC93X CPU" - select CPU_ARM926T - select HAVE_CLK - select COMMON_CLKDEV - help - Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a - low-power and high performance MPEG-4/JPEG multimedia controller chip. - config ARCH_PNX4008 bool "Philips Nexperia PNX4008 Mobile" select CPU_ARM926T select HAVE_CLK - select COMMON_CLKDEV help This enables support for Philips PNX4008 mobile platform. @@ -659,7 +636,6 @@ config ARCH_S5PC1XX select GENERIC_GPIO select HAVE_CLK select CPU_V7 - select ARM_L1_CACHE_SHIFT_6 help Samsung S5PC1XX series based systems @@ -712,7 +688,6 @@ config ARCH_DAVINCI select HAVE_IDE select COMMON_CLKDEV select GENERIC_ALLOCATOR - select ARCH_HAS_HOLES_MEMORYMODEL help Support for TI's DaVinci platform. @@ -724,7 +699,6 @@ config ARCH_OMAP select ARCH_HAS_CPUFREQ select GENERIC_TIME select GENERIC_CLOCKEVENTS - select ARCH_HAS_HOLES_MEMORYMODEL help Support for TI's OMAP platform (OMAP1 and OMAP2). @@ -752,26 +726,14 @@ config ARCH_U8500 endchoice -source "arch/arm/mach-aaec2000/Kconfig" - -source "arch/arm/mach-at91/Kconfig" - -source "arch/arm/mach-bcmring/Kconfig" - source "arch/arm/mach-clps711x/Kconfig" -source "arch/arm/mach-davinci/Kconfig" - -source "arch/arm/mach-dove/Kconfig" - source "arch/arm/mach-ep93xx/Kconfig" source "arch/arm/mach-footbridge/Kconfig" source "arch/arm/mach-gemini/Kconfig" -source "arch/arm/mach-h720x/Kconfig" - source "arch/arm/mach-integrator/Kconfig" source "arch/arm/mach-iop32x/Kconfig" @@ -786,28 +748,16 @@ source "arch/arm/mach-ixp2000/Kconfig" source "arch/arm/mach-ixp23xx/Kconfig" -source "arch/arm/mach-kirkwood/Kconfig" - -source "arch/arm/mach-ks8695/Kconfig" - -source "arch/arm/mach-lh7a40x/Kconfig" - source "arch/arm/mach-loki/Kconfig" -source "arch/arm/mach-msm/Kconfig" - source "arch/arm/mach-mv78xx0/Kconfig" -source "arch/arm/plat-mxc/Kconfig" - -source "arch/arm/mach-netx/Kconfig" - -source "arch/arm/mach-nomadik/Kconfig" -source "arch/arm/plat-nomadik/Kconfig" +source "arch/arm/mach-pxa/Kconfig" +source "arch/arm/plat-pxa/Kconfig" -source "arch/arm/mach-ns9xxx/Kconfig" +source "arch/arm/mach-mmp/Kconfig" -source "arch/arm/mach-nuc93x/Kconfig" +source "arch/arm/mach-sa1100/Kconfig" source "arch/arm/plat-omap/Kconfig" @@ -817,14 +767,9 @@ source "arch/arm/mach-omap2/Kconfig" source "arch/arm/mach-orion5x/Kconfig" -source "arch/arm/mach-pxa/Kconfig" -source "arch/arm/plat-pxa/Kconfig" - -source "arch/arm/mach-mmp/Kconfig" - -source "arch/arm/mach-realview/Kconfig" +source "arch/arm/mach-kirkwood/Kconfig" -source "arch/arm/mach-sa1100/Kconfig" +source "arch/arm/mach-dove/Kconfig" source "arch/arm/plat-samsung/Kconfig" source "arch/arm/plat-s3c24xx/Kconfig" @@ -852,14 +797,41 @@ if ARCH_S5PC1XX source "arch/arm/mach-s5pc100/Kconfig" endif -source "arch/arm/mach-u300/Kconfig" +source "arch/arm/mach-lh7a40x/Kconfig" -source "arch/arm/mach-ux500/Kconfig" +source "arch/arm/mach-h720x/Kconfig" source "arch/arm/mach-versatile/Kconfig" +source "arch/arm/mach-aaec2000/Kconfig" + +source "arch/arm/mach-realview/Kconfig" + +source "arch/arm/mach-at91/Kconfig" + +source "arch/arm/plat-mxc/Kconfig" + +source "arch/arm/mach-nomadik/Kconfig" +source "arch/arm/plat-nomadik/Kconfig" + +source "arch/arm/mach-netx/Kconfig" + +source "arch/arm/mach-ns9xxx/Kconfig" + +source "arch/arm/mach-davinci/Kconfig" + +source "arch/arm/mach-ks8695/Kconfig" + +source "arch/arm/mach-msm/Kconfig" + +source "arch/arm/mach-u300/Kconfig" + source "arch/arm/mach-w90x900/Kconfig" +source "arch/arm/mach-bcmring/Kconfig" + +source "arch/arm/mach-ux500/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool @@ -891,11 +863,6 @@ config XSCALE_PMU depends on CPU_XSCALE && !XSCALE_PMU_TIMER default y -config CPU_HAS_PMU - depends on CPU_V6 || CPU_V7 || XSCALE_PMU - default y - bool - if !MMU source "arch/arm/Kconfig-nommu" endif @@ -950,19 +917,6 @@ config ARM_ERRATA_460075 ACTLR register. Note that setting specific bits in the ACTLR register may not be available in non-secure mode. -config PL310_ERRATA_588369 - bool "Clean & Invalidate maintenance operations do not invalidate clean lines" - depends on CACHE_L2X0 && ARCH_OMAP4 - help - The PL310 L2 cache controller implements three types of Clean & - Invalidate maintenance operations: by Physical Address - (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). - They are architecturally defined to behave as the execution of a - clean operation followed immediately by an invalidate operation, - both performing to the same memory location. This functionality - is not correctly implemented in PL310 as clean lines are not - invalidated as a result of these operations. Note that this errata - uses Texas Instrument's secure monitor api. endmenu source "arch/arm/common/Kconfig" @@ -1213,14 +1167,6 @@ config HIGHPTE depends on HIGHMEM depends on !OUTER_CACHE -config HW_PERF_EVENTS - bool "Enable hardware performance counter support for perf events" - depends on PERF_EVENTS && CPU_HAS_PMU && (CPU_V6 || CPU_V7) - default y - help - Enable hardware performance counter support for perf events. If - disabled, perf events will use software events only. - source "mm/Kconfig" config LEDS @@ -1280,7 +1226,6 @@ config ALIGNMENT_TRAP bool depends on CPU_CP15_MMU default y if !ARCH_EBSA110 - select HAVE_PROC_CPU if PROC_FS help ARM processors cannot fetch/store information which is not naturally aligned on the bus, i.e., a 4 byte fetch must start at an diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index 81f54ca30788..e9da08483b3c 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -94,7 +94,7 @@ CFLAGS_ABI +=-funwind-tables endif ifeq ($(CONFIG_THUMB2_KERNEL),y) -AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it) +AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=thumb,-Wa$(comma)-mauto-it) AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb @@ -146,7 +146,6 @@ machine-$(CONFIG_ARCH_MX1) := mx1 machine-$(CONFIG_ARCH_MX2) := mx2 machine-$(CONFIG_ARCH_MX25) := mx25 machine-$(CONFIG_ARCH_MX3) := mx3 -machine-$(CONFIG_ARCH_MXC91231) := mxc91231 machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NOMADIK) := nomadik machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx @@ -171,14 +170,13 @@ machine-$(CONFIG_ARCH_U300) := u300 machine-$(CONFIG_ARCH_U8500) := ux500 machine-$(CONFIG_ARCH_VERSATILE) := versatile machine-$(CONFIG_ARCH_W90X900) := w90x900 -machine-$(CONFIG_ARCH_NUC93X) := nuc93x machine-$(CONFIG_FOOTBRIDGE) := footbridge +machine-$(CONFIG_ARCH_MXC91231) := mxc91231 # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. plat-$(CONFIG_ARCH_MXC) := mxc plat-$(CONFIG_ARCH_OMAP) := omap -plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx plat-$(CONFIG_PLAT_IOP) := iop plat-$(CONFIG_PLAT_NOMADIK) := nomadik plat-$(CONFIG_PLAT_ORION) := orion @@ -186,6 +184,7 @@ plat-$(CONFIG_PLAT_PXA) := pxa plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung +plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. diff --git a/trunk/arch/arm/boot/compressed/Makefile b/trunk/arch/arm/boot/compressed/Makefile index 97c89e7de7d3..ce39dc540085 100644 --- a/trunk/arch/arm/boot/compressed/Makefile +++ b/trunk/arch/arm/boot/compressed/Makefile @@ -5,7 +5,7 @@ # HEAD = head.o -OBJS = misc.o decompress.o +OBJS = misc.o FONTC = $(srctree)/drivers/video/console/font_acorn_8x8.c # @@ -63,12 +63,8 @@ endif SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ -suffix_$(CONFIG_KERNEL_GZIP) = gzip -suffix_$(CONFIG_KERNEL_LZO) = lzo - -targets := vmlinux vmlinux.lds \ - piggy.$(suffix_y) piggy.$(suffix_y).o \ - font.o font.c head.o misc.o $(OBJS) +targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ + head.o misc.o $(OBJS) ifeq ($(CONFIG_FUNCTION_TRACER),y) ORIG_CFLAGS := $(KBUILD_CFLAGS) @@ -91,30 +87,22 @@ endif ifneq ($(PARAMS_PHYS),) LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS) endif -# ? -LDFLAGS_vmlinux += -p -# Report unresolved symbol references -LDFLAGS_vmlinux += --no-undefined -# Delete all temporary local symbols -LDFLAGS_vmlinux += -X -# Next argument is a linker script -LDFLAGS_vmlinux += -T - -# For __aeabi_uidivmod -lib1funcs = $(obj)/lib1funcs.o - -$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE - $(call cmd,shipped) +LDFLAGS_vmlinux += -p --no-undefined -X \ + $(shell $(CC) $(KBUILD_CFLAGS) --print-libgcc-file-name) -T + +# Don't allow any static data in misc.o, which +# would otherwise mess up our GOT table +CFLAGS_misc.o := -Dstatic= -$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \ - $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE +$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.o \ + $(addprefix $(obj)/, $(OBJS)) FORCE $(call if_changed,ld) @: -$(obj)/piggy.$(suffix_y): $(obj)/../Image FORCE - $(call if_changed,$(suffix_y)) +$(obj)/piggy.gz: $(obj)/../Image FORCE + $(call if_changed,gzip) -$(obj)/piggy.$(suffix_y).o: $(obj)/piggy.$(suffix_y) FORCE +$(obj)/piggy.o: $(obj)/piggy.gz FORCE CFLAGS_font.o := -Dstatic= diff --git a/trunk/arch/arm/boot/compressed/decompress.c b/trunk/arch/arm/boot/compressed/decompress.c deleted file mode 100644 index 0da382f33157..000000000000 --- a/trunk/arch/arm/boot/compressed/decompress.c +++ /dev/null @@ -1,45 +0,0 @@ -#define _LINUX_STRING_H_ - -#include /* for inline */ -#include /* for size_t */ -#include /* for NULL */ -#include -#include - -extern unsigned long free_mem_ptr; -extern unsigned long free_mem_end_ptr; -extern void error(char *); - -#define STATIC static - -#define ARCH_HAS_DECOMP_WDOG - -/* Diagnostic functions */ -#ifdef DEBUG -# define Assert(cond,msg) {if(!(cond)) error(msg);} -# define Trace(x) fprintf x -# define Tracev(x) {if (verbose) fprintf x ;} -# define Tracevv(x) {if (verbose>1) fprintf x ;} -# define Tracec(c,x) {if (verbose && (c)) fprintf x ;} -# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} -#else -# define Assert(cond,msg) -# define Trace(x) -# define Tracev(x) -# define Tracevv(x) -# define Tracec(c,x) -# define Tracecv(c,x) -#endif - -#ifdef CONFIG_KERNEL_GZIP -#include "../../../../lib/decompress_inflate.c" -#endif - -#ifdef CONFIG_KERNEL_LZO -#include "../../../../lib/decompress_unlzo.c" -#endif - -void do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x)) -{ - decompress(input, len, NULL, NULL, output, NULL, error); -} diff --git a/trunk/arch/arm/boot/compressed/head.S b/trunk/arch/arm/boot/compressed/head.S index 99b75aa1c2ec..d356af7cef82 100644 --- a/trunk/arch/arm/boot/compressed/head.S +++ b/trunk/arch/arm/boot/compressed/head.S @@ -22,27 +22,19 @@ #if defined(CONFIG_DEBUG_ICEDCC) #ifdef CONFIG_CPU_V6 - .macro loadsp, rb, tmp + .macro loadsp, rb .endm .macro writeb, ch, rb mcr p14, 0, \ch, c0, c5, 0 .endm -#elif defined(CONFIG_CPU_V7) - .macro loadsp, rb, tmp - .endm - .macro writeb, ch, rb -wait: mrc p14, 0, pc, c0, c1, 0 - bcs wait - mcr p14, 0, \ch, c0, c5, 0 - .endm #elif defined(CONFIG_CPU_XSCALE) - .macro loadsp, rb, tmp + .macro loadsp, rb .endm .macro writeb, ch, rb mcr p14, 0, \ch, c8, c0, 0 .endm #else - .macro loadsp, rb, tmp + .macro loadsp, rb .endm .macro writeb, ch, rb mcr p14, 0, \ch, c1, c0, 0 @@ -58,7 +50,7 @@ wait: mrc p14, 0, pc, c0, c1, 0 .endm #if defined(CONFIG_ARCH_SA1100) - .macro loadsp, rb, tmp + .macro loadsp, rb mov \rb, #0x80000000 @ physical base address #ifdef CONFIG_DEBUG_LL_SER3 add \rb, \rb, #0x00050000 @ Ser3 @@ -67,13 +59,13 @@ wait: mrc p14, 0, pc, c0, c1, 0 #endif .endm #elif defined(CONFIG_ARCH_S3C2410) - .macro loadsp, rb, tmp + .macro loadsp, rb mov \rb, #0x50000000 add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT .endm #else - .macro loadsp, rb, tmp - addruart \rb, \tmp + .macro loadsp, rb + addruart \rb .endm #endif #endif @@ -1025,7 +1017,7 @@ phex: adr r3, phexbuf strb r2, [r3, r1] b 1b -puts: loadsp r3, r1 +puts: loadsp r3 1: ldrb r2, [r0], #1 teq r2, #0 moveq pc, lr @@ -1042,7 +1034,7 @@ puts: loadsp r3, r1 putc: mov r2, r0 mov r0, #0 - loadsp r3, r1 + loadsp r3 b 2b memdump: mov r12, r0 diff --git a/trunk/arch/arm/boot/compressed/misc.c b/trunk/arch/arm/boot/compressed/misc.c index d32bc71c1f78..17153b54613b 100644 --- a/trunk/arch/arm/boot/compressed/misc.c +++ b/trunk/arch/arm/boot/compressed/misc.c @@ -18,16 +18,11 @@ unsigned int __machine_arch_type; -#define _LINUX_STRING_H_ - #include /* for inline */ #include /* for size_t */ #include /* for NULL */ -#include #include -#include - #ifdef STANDALONE_DEBUG #define putstr printf #else @@ -53,18 +48,6 @@ static void icedcc_putc(int ch) asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); } - -#elif defined(CONFIG_CPU_V7) - -static void icedcc_putc(int ch) -{ - asm( - "wait: mrc p14, 0, pc, c0, c1, 0 \n\ - bcs wait \n\ - mcr p14, 0, %0, c0, c5, 0 " - : : "r" (ch)); -} - #elif defined(CONFIG_CPU_XSCALE) static void icedcc_putc(int ch) @@ -100,6 +83,7 @@ static void icedcc_putc(int ch) #endif #define putc(ch) icedcc_putc(ch) +#define flush() do { } while (0) #endif static void putstr(const char *ptr) @@ -117,7 +101,57 @@ static void putstr(const char *ptr) #endif -void *memcpy(void *__dest, __const void *__src, size_t __n) +#define __ptr_t void * + +#define memzero(s,n) __memzero(s,n) + +/* + * Optimised C version of memzero for the ARM. + */ +void __memzero (__ptr_t s, size_t n) +{ + union { void *vp; unsigned long *ulp; unsigned char *ucp; } u; + int i; + + u.vp = s; + + for (i = n >> 5; i > 0; i--) { + *u.ulp++ = 0; + *u.ulp++ = 0; + *u.ulp++ = 0; + *u.ulp++ = 0; + *u.ulp++ = 0; + *u.ulp++ = 0; + *u.ulp++ = 0; + *u.ulp++ = 0; + } + + if (n & 1 << 4) { + *u.ulp++ = 0; + *u.ulp++ = 0; + *u.ulp++ = 0; + *u.ulp++ = 0; + } + + if (n & 1 << 3) { + *u.ulp++ = 0; + *u.ulp++ = 0; + } + + if (n & 1 << 2) + *u.ulp++ = 0; + + if (n & 1 << 1) { + *u.ucp++ = 0; + *u.ucp++ = 0; + } + + if (n & 1) + *u.ucp++ = 0; +} + +static inline __ptr_t memcpy(__ptr_t __dest, __const __ptr_t __src, + size_t __n) { int i = 0; unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src; @@ -154,20 +188,122 @@ void *memcpy(void *__dest, __const void *__src, size_t __n) /* * gzip delarations */ +#define OF(args) args +#define STATIC static + +typedef unsigned char uch; +typedef unsigned short ush; +typedef unsigned long ulg; + +#define WSIZE 0x8000 /* Window size must be at least 32k, */ + /* and a power of two */ + +static uch *inbuf; /* input buffer */ +static uch window[WSIZE]; /* Sliding window buffer */ + +static unsigned insize; /* valid bytes in inbuf */ +static unsigned inptr; /* index of next byte to be processed in inbuf */ +static unsigned outcnt; /* bytes in output buffer */ + +/* gzip flag byte */ +#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */ +#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */ +#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ +#define ORIG_NAME 0x08 /* bit 3 set: original file name present */ +#define COMMENT 0x10 /* bit 4 set: file comment present */ +#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */ +#define RESERVED 0xC0 /* bit 6,7: reserved */ + +#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) + +/* Diagnostic functions */ +#ifdef DEBUG +# define Assert(cond,msg) {if(!(cond)) error(msg);} +# define Trace(x) fprintf x +# define Tracev(x) {if (verbose) fprintf x ;} +# define Tracevv(x) {if (verbose>1) fprintf x ;} +# define Tracec(c,x) {if (verbose && (c)) fprintf x ;} +# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} +#else +# define Assert(cond,msg) +# define Trace(x) +# define Tracev(x) +# define Tracevv(x) +# define Tracec(c,x) +# define Tracecv(c,x) +#endif + +static int fill_inbuf(void); +static void flush_window(void); +static void error(char *m); + extern char input_data[]; extern char input_data_end[]; -unsigned char *output_data; -unsigned long output_ptr; +static uch *output_data; +static ulg output_ptr; +static ulg bytes_out; + +static void error(char *m); + +static void putstr(const char *); + +extern int end; +static ulg free_mem_ptr; +static ulg free_mem_end_ptr; + +#ifdef STANDALONE_DEBUG +#define NO_INFLATE_MALLOC +#endif + +#define ARCH_HAS_DECOMP_WDOG + +#include "../../../../lib/inflate.c" + +/* =========================================================================== + * Fill the input buffer. This is called only when the buffer is empty + * and at least one byte is really needed. + */ +int fill_inbuf(void) +{ + if (insize != 0) + error("ran out of input data"); + + inbuf = input_data; + insize = &input_data_end[0] - &input_data[0]; + + inptr = 1; + return inbuf[0]; +} -unsigned long free_mem_ptr; -unsigned long free_mem_end_ptr; +/* =========================================================================== + * Write the output window window[0..outcnt-1] and update crc and bytes_out. + * (Used for the decompressed data only.) + */ +void flush_window(void) +{ + ulg c = crc; + unsigned n; + uch *in, *out, ch; + + in = window; + out = &output_data[output_ptr]; + for (n = 0; n < outcnt; n++) { + ch = *out++ = *in++; + c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8); + } + crc = c; + bytes_out += (ulg)outcnt; + output_ptr += (ulg)outcnt; + outcnt = 0; + putstr("."); +} #ifndef arch_error #define arch_error(x) #endif -void error(char *x) +static void error(char *x) { arch_error(x); @@ -178,35 +314,22 @@ void error(char *x) while(1); /* Halt */ } -asmlinkage void __div0(void) -{ - error("Attempting division by 0!"); -} - -extern void do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x)); - #ifndef STANDALONE_DEBUG -unsigned long -decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p, - unsigned long free_mem_ptr_end_p, - int arch_id) +ulg +decompress_kernel(ulg output_start, ulg free_mem_ptr_p, ulg free_mem_ptr_end_p, + int arch_id) { - unsigned char *tmp; - - output_data = (unsigned char *)output_start; + output_data = (uch *)output_start; /* Points to kernel start */ free_mem_ptr = free_mem_ptr_p; free_mem_end_ptr = free_mem_ptr_end_p; __machine_arch_type = arch_id; arch_decomp_setup(); - tmp = (unsigned char *) (((unsigned long)input_data_end) - 4); - output_ptr = get_unaligned_le32(tmp); - + makecrc(); putstr("Uncompressing Linux..."); - do_decompress(input_data, input_data_end - input_data, - output_data, error); + gunzip(); putstr(" done, booting the kernel.\n"); return output_ptr; } @@ -218,10 +341,11 @@ int main() { output_data = output_buffer; + makecrc(); putstr("Uncompressing Linux..."); - decompress(input_data, input_data_end - input_data, - NULL, NULL, output_data, NULL, error); + gunzip(); putstr("done.\n"); return 0; } #endif + diff --git a/trunk/arch/arm/boot/compressed/piggy.lzo.S b/trunk/arch/arm/boot/compressed/piggy.S similarity index 68% rename from trunk/arch/arm/boot/compressed/piggy.lzo.S rename to trunk/arch/arm/boot/compressed/piggy.S index a425ad95959a..54c951800ebd 100644 --- a/trunk/arch/arm/boot/compressed/piggy.lzo.S +++ b/trunk/arch/arm/boot/compressed/piggy.S @@ -1,6 +1,6 @@ .section .piggydata,#alloc .globl input_data input_data: - .incbin "arch/arm/boot/compressed/piggy.lzo" + .incbin "arch/arm/boot/compressed/piggy.gz" .globl input_data_end input_data_end: diff --git a/trunk/arch/arm/boot/compressed/piggy.gzip.S b/trunk/arch/arm/boot/compressed/piggy.gzip.S deleted file mode 100644 index a68adf91a165..000000000000 --- a/trunk/arch/arm/boot/compressed/piggy.gzip.S +++ /dev/null @@ -1,6 +0,0 @@ - .section .piggydata,#alloc - .globl input_data -input_data: - .incbin "arch/arm/boot/compressed/piggy.gzip" - .globl input_data_end -input_data_end: diff --git a/trunk/arch/arm/boot/compressed/vmlinux.lds.in b/trunk/arch/arm/boot/compressed/vmlinux.lds.in index 7ca9ecff652f..a5924b9b88bd 100644 --- a/trunk/arch/arm/boot/compressed/vmlinux.lds.in +++ b/trunk/arch/arm/boot/compressed/vmlinux.lds.in @@ -14,13 +14,6 @@ SECTIONS /DISCARD/ : { *(.ARM.exidx*) *(.ARM.extab*) - /* - * Discard any r/w data - this produces a link error if we have any, - * which is required for PIC decompression. Local data generates - * GOTOFF relocations, which prevents it being relocated independently - * of the text/got segments. - */ - *(.data) } . = TEXT_START; @@ -47,6 +40,7 @@ SECTIONS .got : { *(.got) } _got_end = .; .got.plt : { *(.got.plt) } + .data : { *(.data) } _edata = .; . = BSS_START; diff --git a/trunk/arch/arm/common/clkdev.c b/trunk/arch/arm/common/clkdev.c index 446b696196e3..aae5bc01acc8 100644 --- a/trunk/arch/arm/common/clkdev.c +++ b/trunk/arch/arm/common/clkdev.c @@ -99,16 +99,6 @@ void clkdev_add(struct clk_lookup *cl) } EXPORT_SYMBOL(clkdev_add); -void __init clkdev_add_table(struct clk_lookup *cl, size_t num) -{ - mutex_lock(&clocks_mutex); - while (num--) { - list_add_tail(&cl->node, &clocks); - cl++; - } - mutex_unlock(&clocks_mutex); -} - #define MAX_DEV_ID 20 #define MAX_CON_ID 16 diff --git a/trunk/arch/arm/common/dmabounce.c b/trunk/arch/arm/common/dmabounce.c index cc0a932bbea9..bc90364a96c7 100644 --- a/trunk/arch/arm/common/dmabounce.c +++ b/trunk/arch/arm/common/dmabounce.c @@ -277,7 +277,7 @@ static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size, * We don't need to sync the DMA buffer since * it was allocated via the coherent allocators. */ - __dma_single_cpu_to_dev(ptr, size, dir); + dma_cache_maint(ptr, size, dir); } return dma_addr; @@ -312,11 +312,9 @@ static inline void unmap_single(struct device *dev, dma_addr_t dma_addr, * we need to ensure that the data will be coherent * with user mappings. */ - __cpuc_flush_dcache_area(ptr, size); + __cpuc_flush_kernel_dcache_area(ptr, size); } free_safe_buffer(dev->archdata.dmabounce, buf); - } else { - __dma_single_dev_to_cpu(dma_to_virt(dev, dma_addr), size, dir); } } diff --git a/trunk/arch/arm/common/vic.c b/trunk/arch/arm/common/vic.c index 1cf999ade4bc..f232941de8ab 100644 --- a/trunk/arch/arm/common/vic.c +++ b/trunk/arch/arm/common/vic.c @@ -18,7 +18,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ - #include #include #include @@ -29,6 +28,48 @@ #include #include +static void vic_ack_irq(unsigned int irq) +{ + void __iomem *base = get_irq_chip_data(irq); + irq &= 31; + writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); + /* moreover, clear the soft-triggered, in case it was the reason */ + writel(1 << irq, base + VIC_INT_SOFT_CLEAR); +} + +static void vic_mask_irq(unsigned int irq) +{ + void __iomem *base = get_irq_chip_data(irq); + irq &= 31; + writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); +} + +static void vic_unmask_irq(unsigned int irq) +{ + void __iomem *base = get_irq_chip_data(irq); + irq &= 31; + writel(1 << irq, base + VIC_INT_ENABLE); +} + +/** + * vic_init2 - common initialisation code + * @base: Base of the VIC. + * + * Common initialisation code for registeration + * and resume. +*/ +static void vic_init2(void __iomem *base) +{ + int i; + + for (i = 0; i < 16; i++) { + void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); + writel(VIC_VECT_CNTL_ENABLE | i, reg); + } + + writel(32, base + VIC_PL190_DEF_VECT_ADDR); +} + #if defined(CONFIG_PM) /** * struct vic_device - VIC PM device @@ -58,34 +99,13 @@ struct vic_device { /* we cannot allocate memory when VICs are initially registered */ static struct vic_device vic_devices[CONFIG_ARM_VIC_NR]; -static int vic_id; - static inline struct vic_device *to_vic(struct sys_device *sys) { return container_of(sys, struct vic_device, sysdev); } -#endif /* CONFIG_PM */ - -/** - * vic_init2 - common initialisation code - * @base: Base of the VIC. - * - * Common initialisation code for registeration - * and resume. -*/ -static void vic_init2(void __iomem *base) -{ - int i; - for (i = 0; i < 16; i++) { - void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); - writel(VIC_VECT_CNTL_ENABLE | i, reg); - } - - writel(32, base + VIC_PL190_DEF_VECT_ADDR); -} +static int vic_id; -#if defined(CONFIG_PM) static int vic_class_resume(struct sys_device *dev) { struct vic_device *vic = to_vic(dev); @@ -138,6 +158,31 @@ struct sysdev_class vic_class = { .resume = vic_class_resume, }; +/** + * vic_pm_register - Register a VIC for later power management control + * @base: The base address of the VIC. + * @irq: The base IRQ for the VIC. + * @resume_sources: bitmask of interrupts allowed for resume sources. + * + * Register the VIC with the system device tree so that it can be notified + * of suspend and resume requests and ensure that the correct actions are + * taken to re-instate the settings on resume. + */ +static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) +{ + struct vic_device *v; + + if (vic_id >= ARRAY_SIZE(vic_devices)) + printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); + else { + v = &vic_devices[vic_id]; + v->base = base; + v->resume_sources = resume_sources; + v->irq = irq; + vic_id++; + } +} + /** * vic_pm_init - initicall to register VIC pm * @@ -174,60 +219,9 @@ static int __init vic_pm_init(void) return 0; } -late_initcall(vic_pm_init); - -/** - * vic_pm_register - Register a VIC for later power management control - * @base: The base address of the VIC. - * @irq: The base IRQ for the VIC. - * @resume_sources: bitmask of interrupts allowed for resume sources. - * - * Register the VIC with the system device tree so that it can be notified - * of suspend and resume requests and ensure that the correct actions are - * taken to re-instate the settings on resume. - */ -static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) -{ - struct vic_device *v; - - if (vic_id >= ARRAY_SIZE(vic_devices)) - printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); - else { - v = &vic_devices[vic_id]; - v->base = base; - v->resume_sources = resume_sources; - v->irq = irq; - vic_id++; - } -} -#else -static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } -#endif /* CONFIG_PM */ - -static void vic_ack_irq(unsigned int irq) -{ - void __iomem *base = get_irq_chip_data(irq); - irq &= 31; - writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); - /* moreover, clear the soft-triggered, in case it was the reason */ - writel(1 << irq, base + VIC_INT_SOFT_CLEAR); -} -static void vic_mask_irq(unsigned int irq) -{ - void __iomem *base = get_irq_chip_data(irq); - irq &= 31; - writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); -} - -static void vic_unmask_irq(unsigned int irq) -{ - void __iomem *base = get_irq_chip_data(irq); - irq &= 31; - writel(1 << irq, base + VIC_INT_ENABLE); -} +late_initcall(vic_pm_init); -#if defined(CONFIG_PM) static struct vic_device *vic_from_irq(unsigned int irq) { struct vic_device *v = vic_devices; @@ -261,7 +255,10 @@ static int vic_set_wake(unsigned int irq, unsigned int on) return 0; } + #else +static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } + #define vic_set_wake NULL #endif /* CONFIG_PM */ @@ -273,62 +270,9 @@ static struct irq_chip vic_chip = { .set_wake = vic_set_wake, }; -/* - * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. - * The original cell has 32 interrupts, while the modified one has 64, - * replocating two blocks 0x00..0x1f in 0x20..0x3f. In that case - * the probe function is called twice, with base set to offset 000 - * and 020 within the page. We call this "second block". - */ -static void __init vic_init_st(void __iomem *base, unsigned int irq_start, - u32 vic_sources) -{ - unsigned int i; - int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; - - /* Disable all interrupts initially. */ - - writel(0, base + VIC_INT_SELECT); - writel(0, base + VIC_INT_ENABLE); - writel(~0, base + VIC_INT_ENABLE_CLEAR); - writel(0, base + VIC_IRQ_STATUS); - writel(0, base + VIC_ITCR); - writel(~0, base + VIC_INT_SOFT_CLEAR); - - /* - * Make sure we clear all existing interrupts. The vector registers - * in this cell are after the second block of general registers, - * so we can address them using standard offsets, but only from - * the second base address, which is 0x20 in the page - */ - if (vic_2nd_block) { - writel(0, base + VIC_PL190_VECT_ADDR); - for (i = 0; i < 19; i++) { - unsigned int value; - - value = readl(base + VIC_PL190_VECT_ADDR); - writel(value, base + VIC_PL190_VECT_ADDR); - } - /* ST has 16 vectors as well, but we don't enable them by now */ - for (i = 0; i < 16; i++) { - void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); - writel(0, reg); - } - - writel(32, base + VIC_PL190_DEF_VECT_ADDR); - } - - for (i = 0; i < 32; i++) { - if (vic_sources & (1 << i)) { - unsigned int irq = irq_start + i; - - set_irq_chip(irq, &vic_chip); - set_irq_chip_data(irq, base); - set_irq_handler(irq, handle_level_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - } - } -} +/* The PL190 cell from ARM has been modified by ST, so handle both here */ +static void vik_init_st(void __iomem *base, unsigned int irq_start, + u32 vic_sources); /** * vic_init - initialise a vectored interrupt controller @@ -355,7 +299,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, switch(vendor) { case AMBA_VENDOR_ST: - vic_init_st(base, irq_start, vic_sources); + vik_init_st(base, irq_start, vic_sources); return; default: printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n"); @@ -399,3 +343,60 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, vic_pm_register(base, irq_start, resume_sources); } + +/* + * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. + * The original cell has 32 interrupts, while the modified one has 64, + * replocating two blocks 0x00..0x1f in 0x20..0x3f. In that case + * the probe function is called twice, with base set to offset 000 + * and 020 within the page. We call this "second block". + */ +static void __init vik_init_st(void __iomem *base, unsigned int irq_start, + u32 vic_sources) +{ + unsigned int i; + int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; + + /* Disable all interrupts initially. */ + + writel(0, base + VIC_INT_SELECT); + writel(0, base + VIC_INT_ENABLE); + writel(~0, base + VIC_INT_ENABLE_CLEAR); + writel(0, base + VIC_IRQ_STATUS); + writel(0, base + VIC_ITCR); + writel(~0, base + VIC_INT_SOFT_CLEAR); + + /* + * Make sure we clear all existing interrupts. The vector registers + * in this cell are after the second block of general registers, + * so we can address them using standard offsets, but only from + * the second base address, which is 0x20 in the page + */ + if (vic_2nd_block) { + writel(0, base + VIC_PL190_VECT_ADDR); + for (i = 0; i < 19; i++) { + unsigned int value; + + value = readl(base + VIC_PL190_VECT_ADDR); + writel(value, base + VIC_PL190_VECT_ADDR); + } + /* ST has 16 vectors as well, but we don't enable them by now */ + for (i = 0; i < 16; i++) { + void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); + writel(0, reg); + } + + writel(32, base + VIC_PL190_DEF_VECT_ADDR); + } + + for (i = 0; i < 32; i++) { + if (vic_sources & (1 << i)) { + unsigned int irq = irq_start + i; + + set_irq_chip(irq, &vic_chip); + set_irq_chip_data(irq, base); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + } +} diff --git a/trunk/arch/arm/configs/acs5k_defconfig b/trunk/arch/arm/configs/acs5k_defconfig index 6e32a85641a7..1cab4e79d368 100644 --- a/trunk/arch/arm/configs/acs5k_defconfig +++ b/trunk/arch/arm/configs/acs5k_defconfig @@ -187,6 +187,7 @@ CONFIG_MACH_ACS5K=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM922T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/acs5k_tiny_defconfig b/trunk/arch/arm/configs/acs5k_tiny_defconfig index b34b1eabac3b..8e3d084afd78 100644 --- a/trunk/arch/arm/configs/acs5k_tiny_defconfig +++ b/trunk/arch/arm/configs/acs5k_tiny_defconfig @@ -186,6 +186,7 @@ CONFIG_MACH_ACS5K=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM922T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/afeb9260_defconfig b/trunk/arch/arm/configs/afeb9260_defconfig index 64fe7f10c12a..f7a272cb3da0 100644 --- a/trunk/arch/arm/configs/afeb9260_defconfig +++ b/trunk/arch/arm/configs/afeb9260_defconfig @@ -227,6 +227,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/am200epdkit_defconfig b/trunk/arch/arm/configs/am200epdkit_defconfig index 30927cac6a9a..5e68420f4680 100644 --- a/trunk/arch/arm/configs/am200epdkit_defconfig +++ b/trunk/arch/arm/configs/am200epdkit_defconfig @@ -189,6 +189,7 @@ CONFIG_PXA25x=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/am3517_evm_defconfig b/trunk/arch/arm/configs/am3517_evm_defconfig index abe9966781ce..ad54e92dd436 100644 --- a/trunk/arch/arm/configs/am3517_evm_defconfig +++ b/trunk/arch/arm/configs/am3517_evm_defconfig @@ -233,6 +233,7 @@ CONFIG_MACH_OMAP3517EVM=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/ams_delta_defconfig b/trunk/arch/arm/configs/ams_delta_defconfig index 3b3a3775bbf4..e8f7380b67d6 100644 --- a/trunk/arch/arm/configs/ams_delta_defconfig +++ b/trunk/arch/arm/configs/ams_delta_defconfig @@ -210,6 +210,7 @@ CONFIG_OMAP_ARM_150MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM925T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/assabet_defconfig b/trunk/arch/arm/configs/assabet_defconfig index daa75bc98d46..c66dd399e426 100644 --- a/trunk/arch/arm/configs/assabet_defconfig +++ b/trunk/arch/arm/configs/assabet_defconfig @@ -101,6 +101,7 @@ CONFIG_SA1100_ASSABET=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/at572d940hfek_defconfig b/trunk/arch/arm/configs/at572d940hfek_defconfig deleted file mode 100644 index 76d724b8041a..000000000000 --- a/trunk/arch/arm/configs/at572d940hfek_defconfig +++ /dev/null @@ -1,1640 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.28-rc7 -# Fri Dec 5 10:58:47 2008 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_MMU=y -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="-AT572D940HF" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_TASKSTATS=y -# CONFIG_TASK_DELAY_ACCT is not set -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -CONFIG_AUDIT=y -# CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_CGROUPS=y -# CONFIG_CGROUP_DEBUG is not set -# CONFIG_CGROUP_NS is not set -# CONFIG_CGROUP_FREEZER is not set -# CONFIG_CGROUP_DEVICE is not set -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_RT_GROUP_SCHED=y -# CONFIG_USER_SCHED is not set -CONFIG_CGROUP_SCHED=y -CONFIG_CGROUP_CPUACCT=y -# CONFIG_RESOURCE_COUNTERS is not set -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_RELAY=y -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_COMPAT_BRK=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_ANON_INODES=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -CONFIG_MARKERS=y -CONFIG_OPROFILE=m -CONFIG_HAVE_OPROFILE=y -CONFIG_KPROBES=y -CONFIG_KRETPROBES=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_KMOD=y -CONFIG_BLOCK=y -# CONFIG_LBD is not set -CONFIG_BLK_DEV_IO_TRACE=y -# CONFIG_LSF is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_CLASSIC_RCU=y -# CONFIG_FREEZER is not set - -# -# System Type -# -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -CONFIG_ARCH_AT91=y -# CONFIG_ARCH_CLPS7500 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM is not set - -# -# Boot options -# - -# -# Power management -# - -# -# Atmel AT91 System-on-Chip -# -# CONFIG_ARCH_AT91RM9200 is not set -# CONFIG_ARCH_AT91SAM9260 is not set -# CONFIG_ARCH_AT91SAM9261 is not set -# CONFIG_ARCH_AT91SAM9263 is not set -# CONFIG_ARCH_AT91SAM9RL is not set -# CONFIG_ARCH_AT91SAM9G20 is not set -# CONFIG_ARCH_AT91CAP9 is not set -# CONFIG_ARCH_AT91X40 is not set -CONFIG_ARCH_AT572D940HF=y -CONFIG_AT91_PMC_UNIT=y - -# -# AT572D940HF Board Type -# -CONFIG_MACH_AT572D940HFEB=y - -# -# AT91 Board Options -# -# CONFIG_MTD_AT91_DATAFLASH_CARD is not set -# CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16 is not set -CONFIG_NUM_SERIAL=3 - -# -# AT91 Feature Selections -# -CONFIG_AT91_PROGRAMMABLE_CLOCKS=y -CONFIG_AT91_TIMER_HZ=100 -CONFIG_AT91_EARLY_DBGU=y -# CONFIG_AT91_EARLY_USART0 is not set -# CONFIG_AT91_EARLY_USART1 is not set -# CONFIG_AT91_EARLY_USART2 is not set -# CONFIG_AT91_EARLY_USART3 is not set -# CONFIG_AT91_EARLY_USART4 is not set -# CONFIG_AT91_EARLY_USART5 is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_ARM926T=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_NOIFAR=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -# CONFIG_OUTER_CACHE is not set - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PREEMPT=y -CONFIG_HZ=100 -# CONFIG_AEABI is not set -CONFIG_ARCH_FLATMEM_HAS_HOLES=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4096 -CONFIG_RESOURCES_64BIT=y -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -CONFIG_UNEVICTABLE_LRU=y -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_CMDLINE="mem=48M console=ttyS0 initrd=0x21100000,3145728 root=/dev/ram0 rw ip=172.16.1.181" -# CONFIG_XIP_KERNEL is not set -CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y - -# -# CPU Power Management -# -# CONFIG_CPU_IDLE is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_FPE_NWFPE=y -CONFIG_FPE_NWFPE_XP=y -# CONFIG_FPE_FASTFPE is not set -# CONFIG_VFP is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set -# CONFIG_ARTHUR is not set - -# -# Power management options -# -# CONFIG_PM is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=m -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_MSG is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -# CONFIG_SCTP_HMAC_NONE is not set -# CONFIG_SCTP_HMAC_SHA1 is not set -CONFIG_SCTP_HMAC_MD5=y -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -CONFIG_NET_PKTGEN=m -CONFIG_NET_TCPPROBE=m -# CONFIG_HAMRADIO is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -CONFIG_CAN_DEBUG_DEVICES=y -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -# CONFIG_PHONET is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -CONFIG_WIRELESS_OLD_REGULATORY=y -CONFIG_WIRELESS_EXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -# CONFIG_MAC80211 is not set -CONFIG_IEEE80211=m -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=m -# CONFIG_IEEE80211_CRYPT_CCMP is not set -# CONFIG_IEEE80211_CRYPT_TKIP is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_SYS_HYPERVISOR is not set -CONFIG_CONNECTOR=m -CONFIG_MTD=m -CONFIG_MTD_DEBUG=y -CONFIG_MTD_DEBUG_VERBOSE=1 -CONFIG_MTD_CONCAT=m -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=m -CONFIG_MTD_BLKDEVS=m -CONFIG_MTD_BLOCK=m -CONFIG_MTD_BLOCK_RO=m -CONFIG_FTL=m -CONFIG_NFTL=m -CONFIG_NFTL_RW=y -CONFIG_INFTL=m -CONFIG_RFD_FTL=m -CONFIG_SSFDC=m -CONFIG_MTD_OOPS=m - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=m -CONFIG_MTD_JEDECPROBE=m -CONFIG_MTD_GEN_PROBE=m -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=m -CONFIG_MTD_CFI_AMDSTD=m -CONFIG_MTD_CFI_STAA=m -CONFIG_MTD_CFI_UTIL=m -CONFIG_MTD_RAM=m -CONFIG_MTD_ROM=m -CONFIG_MTD_ABSENT=m - -# -# Mapping drivers for chip access -# -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHYSMAP=m -CONFIG_MTD_PHYSMAP_START=0x8000000 -CONFIG_MTD_PHYSMAP_LEN=0x4000000 -CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -# CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_IMPA7 is not set -CONFIG_MTD_PLATRAM=m - -# -# Self-contained MTD device drivers -# -CONFIG_MTD_DATAFLASH=m -# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set -# CONFIG_MTD_DATAFLASH_OTP is not set -CONFIG_MTD_M25P80=m -CONFIG_M25PXX_USE_FAST_READ=y -CONFIG_MTD_SLRAM=m -CONFIG_MTD_PHRAM=m -CONFIG_MTD_MTDRAM=m -CONFIG_MTDRAM_TOTAL_SIZE=4096 -CONFIG_MTDRAM_ERASE_SIZE=128 -CONFIG_MTD_BLOCK2MTD=m - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=m -CONFIG_MTD_NAND_VERIFY_WRITE=y -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_IDS=m -CONFIG_MTD_NAND_DISKONCHIP=m -# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set -CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 -# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set -# CONFIG_MTD_NAND_ATMEL is not set -CONFIG_MTD_NAND_NANDSIM=m -CONFIG_MTD_NAND_PLATFORM=m -CONFIG_MTD_ALAUDA=m -# CONFIG_MTD_ONENAND is not set - -# -# UBI - Unsorted block images -# -CONFIG_MTD_UBI=m -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_RESERVE=1 -CONFIG_MTD_UBI_GLUEBI=y - -# -# UBI debugging options -# -# CONFIG_MTD_UBI_DEBUG is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=65536 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -CONFIG_MISC_DEVICES=y -CONFIG_ATMEL_TCLIB=y -CONFIG_ATMEL_TCB_CLKSRC=y -CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0 -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_ICS932S401 is not set -CONFIG_ATMEL_SSC=m -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_C2PORT is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -CONFIG_SCSI=m -CONFIG_SCSI_DMA=y -CONFIG_SCSI_TGT=m -# CONFIG_SCSI_NETLINK is not set -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=m -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=m -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_CHR_DEV_SG=m -CONFIG_CHR_DEV_SCH=m - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -CONFIG_MACVLAN=m -CONFIG_EQUALIZER=m -CONFIG_TUN=m -CONFIG_VETH=m -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -CONFIG_BROADCOM_PHY=m -CONFIG_ICPLUS_PHY=m -# CONFIG_REALTEK_PHY is not set -# CONFIG_FIXED_PHY is not set -CONFIG_MDIO_BITBANG=m -CONFIG_NET_ETHERNET=y -CONFIG_MII=m -CONFIG_MACB=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_DM9000 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_SMC911X is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set - -# -# Wireless LAN -# -CONFIG_WLAN_PRE80211=y -CONFIG_STRIP=m -CONFIG_WLAN_80211=y -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -CONFIG_LIBERTAS_SDIO=m -# CONFIG_LIBERTAS_DEBUG is not set -CONFIG_USB_ZD1201=m -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_IWLWIFI_LEDS is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y - -# -# USB Network Adapters -# -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_CDCETHER=m -CONFIG_USB_NET_DM9601=m -# CONFIG_USB_NET_SMSC95XX is not set -CONFIG_USB_NET_GL620A=m -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET=m -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -CONFIG_INPUT_POLLDEV=m - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=m -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=m -CONFIG_INPUT_EVBUG=m - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y -CONFIG_KEYBOARD_SUNKBD=m -CONFIG_KEYBOARD_LKKBD=m -CONFIG_KEYBOARD_XTKBD=m -CONFIG_KEYBOARD_NEWTON=m -CONFIG_KEYBOARD_STOWAWAY=m -CONFIG_KEYBOARD_GPIO=m -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=m -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_SERIAL=m -CONFIG_MOUSE_APPLETOUCH=m -# CONFIG_MOUSE_BCM5974 is not set -CONFIG_MOUSE_VSXXXAA=m -CONFIG_MOUSE_GPIO=m -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -CONFIG_INPUT_UINPUT=m - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=m -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIO_RAW=m -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_DEVKMEM=y -CONFIG_SERIAL_NONSTANDARD=y -CONFIG_N_HDLC=m -# CONFIG_RISCOM8 is not set -CONFIG_SPECIALIX=m -CONFIG_RIO=m -# CONFIG_RIO_OLDPCI is not set -CONFIG_STALDRV=y - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -CONFIG_SERIAL_ATMEL_PDC=y -# CONFIG_SERIAL_ATMEL_TTYAT is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -CONFIG_IPMI_HANDLER=m -# CONFIG_IPMI_PANIC_EVENT is not set -CONFIG_IPMI_DEVICE_INTERFACE=m -CONFIG_IPMI_SI=m -CONFIG_IPMI_WATCHDOG=m -CONFIG_IPMI_POWEROFF=m -CONFIG_HW_RANDOM=y -CONFIG_NVRAM=m -CONFIG_R3964=m -CONFIG_RAW_DRIVER=m -CONFIG_MAX_RAW_DEVS=256 -CONFIG_TCG_TPM=m -CONFIG_TCG_NSC=m -CONFIG_TCG_ATMEL=m -CONFIG_I2C=m -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -CONFIG_DS1682=m -# CONFIG_AT24 is not set -CONFIG_SENSORS_EEPROM=m -CONFIG_SENSORS_PCF8574=m -# CONFIG_PCF8575 is not set -# CONFIG_SENSORS_PCA9539 is not set -CONFIG_SENSORS_PCF8591=m -CONFIG_SENSORS_MAX6875=m -CONFIG_SENSORS_TSL2550=m -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -CONFIG_SPI_ATMEL=y -CONFIG_SPI_BITBANG=m - -# -# SPI Protocol Masters -# -CONFIG_SPI_AT25=m -CONFIG_SPI_SPIDEV=m -# CONFIG_SPI_TLE62X0 is not set -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set -# CONFIG_WATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM8350_I2C is not set - -# -# Multimedia devices -# - -# -# Multimedia core support -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set - -# -# Multimedia drivers -# -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_SOUND=m -CONFIG_SOUND_OSS_CORE=y -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_SEQUENCER=m -CONFIG_SND_SEQ_DUMMY=m -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -# CONFIG_SND_PCM_OSS_PLUGINS is not set -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_SUPPORT_OLD_API=y -# CONFIG_SND_VERBOSE_PROCFS is not set -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_DRIVERS=y -CONFIG_SND_DUMMY=m -CONFIG_SND_VIRMIDI=m -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -CONFIG_SND_SPI=y -# CONFIG_SND_AT73C213 is not set -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -# CONFIG_SND_SOC is not set -# CONFIG_SOUND_PRIME is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=m -# CONFIG_HID_DEBUG is not set -CONFIG_HIDRAW=y - -# -# USB Input Devices -# -CONFIG_USB_HID=m -# CONFIG_HID_PID is not set -CONFIG_USB_HIDDEV=y - -# -# USB HID Boot Protocol drivers -# -CONFIG_USB_KBD=m -CONFIG_USB_MOUSE=m - -# -# Special HID drivers -# -CONFIG_HID_COMPAT=y -CONFIG_HID_A4TECH=m -CONFIG_HID_APPLE=m -CONFIG_HID_BELKIN=m -CONFIG_HID_BRIGHT=m -CONFIG_HID_CHERRY=m -CONFIG_HID_CHICONY=m -CONFIG_HID_CYPRESS=m -CONFIG_HID_DELL=m -CONFIG_HID_EZKEY=m -CONFIG_HID_GYRATION=m -CONFIG_HID_LOGITECH=m -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -CONFIG_HID_MICROSOFT=m -CONFIG_HID_MONTEREY=m -CONFIG_HID_PANTHERLORD=m -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=m -CONFIG_HID_SAMSUNG=m -CONFIG_HID_SONY=m -CONFIG_HID_SUNPLUS=m -# CONFIG_THRUSTMASTER_FF is not set -# CONFIG_ZEROPLUS_FF is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_DYNAMIC_MINORS=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -# CONFIG_USB_MUSB_HDRC is not set -# CONFIG_USB_GADGET_MUSB_HDRC is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; -# - -# -# see USB_STORAGE Help for more information -# -CONFIG_USB_STORAGE=m -# CONFIG_USB_STORAGE_DEBUG is not set -CONFIG_USB_STORAGE_DATAFAB=y -CONFIG_USB_STORAGE_FREECOM=y -CONFIG_USB_STORAGE_ISD200=y -CONFIG_USB_STORAGE_DPCM=y -CONFIG_USB_STORAGE_USBAT=y -CONFIG_USB_STORAGE_SDDR09=y -CONFIG_USB_STORAGE_SDDR55=y -CONFIG_USB_STORAGE_JUMPSHOT=y -CONFIG_USB_STORAGE_ALAUDA=y -# CONFIG_USB_STORAGE_ONETOUCH is not set -CONFIG_USB_STORAGE_KARMA=y -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -CONFIG_USB_LIBUSUAL=y - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -CONFIG_USB_EZUSB=y -CONFIG_USB_SERIAL_GENERIC=y -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_CH341 is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP2101 is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_FUNSOFT is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_MOTOROLA is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -CONFIG_USB_SERIAL_PL2303=m -# CONFIG_USB_SERIAL_OTI6858 is not set -CONFIG_USB_SERIAL_SPCP8X5=m -# CONFIG_USB_SERIAL_HP4X is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OPTION is not set -# CONFIG_USB_SERIAL_OMNINET is not set -CONFIG_USB_SERIAL_DEBUG=m - -# -# USB Miscellaneous drivers -# -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_ADUTUX=m -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGET is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -CONFIG_USB_TEST=m -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_DEBUG_FILES=y -CONFIG_USB_GADGET_DEBUG_FS=y -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_SELECTED=y -CONFIG_USB_GADGET_AT91=y -CONFIG_USB_AT91=m -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -# CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -# CONFIG_USB_GADGET_DUALSPEED is not set -CONFIG_USB_ZERO=m -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -CONFIG_USB_G_SERIAL=m -CONFIG_USB_MIDI_GADGET=m -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=m -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -CONFIG_MMC_AT91=y -CONFIG_MMC_SPI=m -# CONFIG_MEMSTICK is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=m -# CONFIG_LEDS_PCA955X is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=m -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -CONFIG_RTC_INTF_DEV_UIE_EMUL=y -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -CONFIG_RTC_DRV_DS1307=m -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -CONFIG_RTC_DRV_DS1305=y -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_AT91SAM9 is not set -# CONFIG_DMADEVICES is not set -# CONFIG_REGULATOR is not set -# CONFIG_UIO is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -CONFIG_JBD_DEBUG=y -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -CONFIG_REISERFS_CHECK=y -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -CONFIG_REISERFS_FS_SECURITY=y -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_FILE_LOCKING=y -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -CONFIG_FUSE_FS=m -CONFIG_GENERIC_ACL=y - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=m -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_JFFS2_CMODE_NONE is not set -# CONFIG_JFFS2_CMODE_PRIORITY is not set -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_CMODE_FAVOURLZO=y -# CONFIG_UBIFS_FS is not set -CONFIG_CRAMFS=m -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_LOCKD=m -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_ACL_SUPPORT=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=m -CONFIG_SUNRPC_GSS=m -# CONFIG_SUNRPC_REGISTER_V4 is not set -CONFIG_RPCSEC_GSS_KRB5=m -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -CONFIG_CIFS=m -# CONFIG_CIFS_STATS is not set -CONFIG_CIFS_WEAK_PW_HASH=y -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_EXPERIMENTAL is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -CONFIG_UNIXWARE_DISKLABEL=y -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y -CONFIG_SGI_PARTITION=y -# CONFIG_ULTRIX_PARTITION is not set -CONFIG_SUN_PARTITION=y -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="cp437" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -CONFIG_NLS_CODEPAGE_850=m -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=m -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -CONFIG_UNUSED_SYMBOLS=y -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -CONFIG_FRAME_POINTER=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_LATENCYTOP is not set -CONFIG_SYSCTL_SYSCALL_CHECK=y -CONFIG_HAVE_FUNCTION_TRACER=y - -# -# Tracers -# -# CONFIG_DYNAMIC_PRINTK_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_DEBUG_USER is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -CONFIG_SECURITYFS=y -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_FIPS is not set -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_GF128MUL=m -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=m -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_XCBC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=m -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_CRC_CCITT=m -CONFIG_CRC16=m -# CONFIG_CRC_T10DIF is not set -CONFIG_CRC_ITU_T=m -CONFIG_CRC32=y -CONFIG_CRC7=m -CONFIG_LIBCRC32C=m -CONFIG_AUDIT_GENERIC=y -CONFIG_ZLIB_INFLATE=m -CONFIG_ZLIB_DEFLATE=m -CONFIG_LZO_COMPRESS=m -CONFIG_LZO_DECOMPRESS=m -CONFIG_REED_SOLOMON=m -CONFIG_REED_SOLOMON_DEC16=y -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/trunk/arch/arm/configs/at91cap9adk_defconfig b/trunk/arch/arm/configs/at91cap9adk_defconfig index b1ab50bee461..bc6bd9f6174d 100644 --- a/trunk/arch/arm/configs/at91cap9adk_defconfig +++ b/trunk/arch/arm/configs/at91cap9adk_defconfig @@ -181,6 +181,7 @@ CONFIG_AT91_TIMER_HZ=100 # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/at91rm9200dk_defconfig b/trunk/arch/arm/configs/at91rm9200dk_defconfig index 1fffec86a113..c97e1022ada1 100644 --- a/trunk/arch/arm/configs/at91rm9200dk_defconfig +++ b/trunk/arch/arm/configs/at91rm9200dk_defconfig @@ -130,6 +130,7 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/at91rm9200ek_defconfig b/trunk/arch/arm/configs/at91rm9200ek_defconfig index c846a795d1d5..9f7a99ace514 100644 --- a/trunk/arch/arm/configs/at91rm9200ek_defconfig +++ b/trunk/arch/arm/configs/at91rm9200ek_defconfig @@ -129,6 +129,7 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/at91sam9260ek_defconfig b/trunk/arch/arm/configs/at91sam9260ek_defconfig index 472ea11eedf1..98e2f3de4bc5 100644 --- a/trunk/arch/arm/configs/at91sam9260ek_defconfig +++ b/trunk/arch/arm/configs/at91sam9260ek_defconfig @@ -188,6 +188,7 @@ CONFIG_AT91_TIMER_HZ=100 # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/at91sam9261ek_defconfig b/trunk/arch/arm/configs/at91sam9261ek_defconfig index 4ecde429cf15..149456142392 100644 --- a/trunk/arch/arm/configs/at91sam9261ek_defconfig +++ b/trunk/arch/arm/configs/at91sam9261ek_defconfig @@ -181,6 +181,7 @@ CONFIG_AT91_TIMER_HZ=100 # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/at91sam9263ek_defconfig b/trunk/arch/arm/configs/at91sam9263ek_defconfig index 9b792b60c7ff..21599f3c6275 100644 --- a/trunk/arch/arm/configs/at91sam9263ek_defconfig +++ b/trunk/arch/arm/configs/at91sam9263ek_defconfig @@ -181,6 +181,7 @@ CONFIG_AT91_TIMER_HZ=100 # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/at91sam9g20ek_defconfig b/trunk/arch/arm/configs/at91sam9g20ek_defconfig index 64ce106d53eb..7e018a04c31b 100644 --- a/trunk/arch/arm/configs/at91sam9g20ek_defconfig +++ b/trunk/arch/arm/configs/at91sam9g20ek_defconfig @@ -187,6 +187,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/at91sam9rlek_defconfig b/trunk/arch/arm/configs/at91sam9rlek_defconfig index 90e48bfda16f..e2df81a3e804 100644 --- a/trunk/arch/arm/configs/at91sam9rlek_defconfig +++ b/trunk/arch/arm/configs/at91sam9rlek_defconfig @@ -179,6 +179,7 @@ CONFIG_AT91_TIMER_HZ=100 # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/ateb9200_defconfig b/trunk/arch/arm/configs/ateb9200_defconfig index 6315534976cf..a19e824cf7f8 100644 --- a/trunk/arch/arm/configs/ateb9200_defconfig +++ b/trunk/arch/arm/configs/ateb9200_defconfig @@ -132,6 +132,7 @@ CONFIG_MACH_ATEB9200=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/badge4_defconfig b/trunk/arch/arm/configs/badge4_defconfig index b175b6b8feb4..f264846218a2 100644 --- a/trunk/arch/arm/configs/badge4_defconfig +++ b/trunk/arch/arm/configs/badge4_defconfig @@ -103,6 +103,7 @@ CONFIG_SA1100_BADGE4=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/bcmring_defconfig b/trunk/arch/arm/configs/bcmring_defconfig index 1e12167c89b7..bcc0bac551a5 100644 --- a/trunk/arch/arm/configs/bcmring_defconfig +++ b/trunk/arch/arm/configs/bcmring_defconfig @@ -181,6 +181,7 @@ CONFIG_BCM_ZRELADDR=0x8000 # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y CONFIG_CPU_32v6K=y CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/cam60_defconfig b/trunk/arch/arm/configs/cam60_defconfig index eef33de3ca12..8448108347cf 100644 --- a/trunk/arch/arm/configs/cam60_defconfig +++ b/trunk/arch/arm/configs/cam60_defconfig @@ -196,6 +196,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/carmeva_defconfig b/trunk/arch/arm/configs/carmeva_defconfig index b6a706306781..d392833b31fb 100644 --- a/trunk/arch/arm/configs/carmeva_defconfig +++ b/trunk/arch/arm/configs/carmeva_defconfig @@ -97,6 +97,7 @@ CONFIG_MACH_CARMEVA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/cerfcube_defconfig b/trunk/arch/arm/configs/cerfcube_defconfig index d662cab9cc21..2b4c0668b1b4 100644 --- a/trunk/arch/arm/configs/cerfcube_defconfig +++ b/trunk/arch/arm/configs/cerfcube_defconfig @@ -105,6 +105,7 @@ CONFIG_SA1100_CERF_FLASH_16MB=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/cm_t35_defconfig b/trunk/arch/arm/configs/cm_t35_defconfig index 893cd267e075..e42c5c873eb2 100644 --- a/trunk/arch/arm/configs/cm_t35_defconfig +++ b/trunk/arch/arm/configs/cm_t35_defconfig @@ -236,6 +236,7 @@ CONFIG_MACH_CM_T35=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/cm_x2xx_defconfig b/trunk/arch/arm/configs/cm_x2xx_defconfig index 47d22d09e70e..797b790cba78 100644 --- a/trunk/arch/arm/configs/cm_x2xx_defconfig +++ b/trunk/arch/arm/configs/cm_x2xx_defconfig @@ -205,6 +205,7 @@ CONFIG_PXA_SSP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/cm_x300_defconfig b/trunk/arch/arm/configs/cm_x300_defconfig index a334069c7904..a0170867130e 100644 --- a/trunk/arch/arm/configs/cm_x300_defconfig +++ b/trunk/arch/arm/configs/cm_x300_defconfig @@ -247,6 +247,7 @@ CONFIG_PLAT_PXA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSC3=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/colibri_pxa270_defconfig b/trunk/arch/arm/configs/colibri_pxa270_defconfig index c962870b3f85..4cf3bde1c522 100644 --- a/trunk/arch/arm/configs/colibri_pxa270_defconfig +++ b/trunk/arch/arm/configs/colibri_pxa270_defconfig @@ -204,6 +204,7 @@ CONFIG_PXA27x=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/colibri_pxa300_defconfig b/trunk/arch/arm/configs/colibri_pxa300_defconfig index 11fdb5afdec7..4774a36fa740 100644 --- a/trunk/arch/arm/configs/colibri_pxa300_defconfig +++ b/trunk/arch/arm/configs/colibri_pxa300_defconfig @@ -212,6 +212,7 @@ CONFIG_PXA3xx=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSC3=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/collie_defconfig b/trunk/arch/arm/configs/collie_defconfig index 26e458d82634..1aa62249031b 100644 --- a/trunk/arch/arm/configs/collie_defconfig +++ b/trunk/arch/arm/configs/collie_defconfig @@ -125,6 +125,7 @@ CONFIG_SA1100_COLLIE=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/corgi_defconfig b/trunk/arch/arm/configs/corgi_defconfig index 5e4069f42754..d6cd165e9310 100644 --- a/trunk/arch/arm/configs/corgi_defconfig +++ b/trunk/arch/arm/configs/corgi_defconfig @@ -214,6 +214,7 @@ CONFIG_PXA_HAVE_BOARD_IRQS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/cpu9260_defconfig b/trunk/arch/arm/configs/cpu9260_defconfig index c9137aaf23a9..601e7f3d5e97 100644 --- a/trunk/arch/arm/configs/cpu9260_defconfig +++ b/trunk/arch/arm/configs/cpu9260_defconfig @@ -229,6 +229,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/cpu9g20_defconfig b/trunk/arch/arm/configs/cpu9g20_defconfig index d2344799171a..b5b9cbbc6977 100644 --- a/trunk/arch/arm/configs/cpu9g20_defconfig +++ b/trunk/arch/arm/configs/cpu9g20_defconfig @@ -219,6 +219,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/cpuat91_defconfig b/trunk/arch/arm/configs/cpuat91_defconfig index 1f8dda6e37c3..4901827253fb 100644 --- a/trunk/arch/arm/configs/cpuat91_defconfig +++ b/trunk/arch/arm/configs/cpuat91_defconfig @@ -230,6 +230,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/csb337_defconfig b/trunk/arch/arm/configs/csb337_defconfig index f095040dab07..29f68c2effe6 100644 --- a/trunk/arch/arm/configs/csb337_defconfig +++ b/trunk/arch/arm/configs/csb337_defconfig @@ -193,6 +193,7 @@ CONFIG_AT91_TIMER_HZ=128 # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/csb637_defconfig b/trunk/arch/arm/configs/csb637_defconfig index 507154016fc8..f7b60ceed6c7 100644 --- a/trunk/arch/arm/configs/csb637_defconfig +++ b/trunk/arch/arm/configs/csb637_defconfig @@ -215,6 +215,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/da8xx_omapl_defconfig b/trunk/arch/arm/configs/da8xx_omapl_defconfig index e14c99c2b574..50bd25a10f0d 100644 --- a/trunk/arch/arm/configs/da8xx_omapl_defconfig +++ b/trunk/arch/arm/configs/da8xx_omapl_defconfig @@ -225,6 +225,7 @@ CONFIG_DAVINCI_RESET_CLOCKS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/davinci_all_defconfig b/trunk/arch/arm/configs/davinci_all_defconfig index 625035fd0a6c..bd656e8e6e4c 100644 --- a/trunk/arch/arm/configs/davinci_all_defconfig +++ b/trunk/arch/arm/configs/davinci_all_defconfig @@ -223,6 +223,7 @@ CONFIG_DAVINCI_RESET_CLOCKS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/dove_defconfig b/trunk/arch/arm/configs/dove_defconfig index b7b2ab088dd9..b3a491675d59 100644 --- a/trunk/arch/arm/configs/dove_defconfig +++ b/trunk/arch/arm/configs/dove_defconfig @@ -186,6 +186,7 @@ CONFIG_PLAT_ORION=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y CONFIG_CPU_32v6K=y CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/ebsa110_defconfig b/trunk/arch/arm/configs/ebsa110_defconfig index d5e827969118..afcfff6140f2 100644 --- a/trunk/arch/arm/configs/ebsa110_defconfig +++ b/trunk/arch/arm/configs/ebsa110_defconfig @@ -83,6 +83,7 @@ CONFIG_ARCH_EBSA110=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA110=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/ecbat91_defconfig b/trunk/arch/arm/configs/ecbat91_defconfig index 25dd53b7cefd..ca520733bdb0 100644 --- a/trunk/arch/arm/configs/ecbat91_defconfig +++ b/trunk/arch/arm/configs/ecbat91_defconfig @@ -186,6 +186,7 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/edb7211_defconfig b/trunk/arch/arm/configs/edb7211_defconfig index e3a6cd32669d..6ba7355ff85b 100644 --- a/trunk/arch/arm/configs/edb7211_defconfig +++ b/trunk/arch/arm/configs/edb7211_defconfig @@ -90,6 +90,7 @@ CONFIG_ARCH_EP7211=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM720T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_LV4T=y diff --git a/trunk/arch/arm/configs/em_x270_defconfig b/trunk/arch/arm/configs/em_x270_defconfig index 2bee932439f6..e9955b786c80 100644 --- a/trunk/arch/arm/configs/em_x270_defconfig +++ b/trunk/arch/arm/configs/em_x270_defconfig @@ -202,6 +202,7 @@ CONFIG_PXA_SSP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/ep93xx_defconfig b/trunk/arch/arm/configs/ep93xx_defconfig index 35d735ede9b8..3fb083b81b0a 100644 --- a/trunk/arch/arm/configs/ep93xx_defconfig +++ b/trunk/arch/arm/configs/ep93xx_defconfig @@ -198,6 +198,7 @@ CONFIG_EP93XX_EARLY_UART1=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/eseries_pxa_defconfig b/trunk/arch/arm/configs/eseries_pxa_defconfig index 74baf5709290..b6c5cbbf4c85 100644 --- a/trunk/arch/arm/configs/eseries_pxa_defconfig +++ b/trunk/arch/arm/configs/eseries_pxa_defconfig @@ -203,6 +203,7 @@ CONFIG_PXA_HAVE_BOARD_IRQS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/ezx_defconfig b/trunk/arch/arm/configs/ezx_defconfig index 9e9057c5a2a3..492f29aba332 100644 --- a/trunk/arch/arm/configs/ezx_defconfig +++ b/trunk/arch/arm/configs/ezx_defconfig @@ -240,6 +240,7 @@ CONFIG_PLAT_PXA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/footbridge_defconfig b/trunk/arch/arm/configs/footbridge_defconfig index 04d97937afe2..6ace512fa101 100644 --- a/trunk/arch/arm/configs/footbridge_defconfig +++ b/trunk/arch/arm/configs/footbridge_defconfig @@ -95,6 +95,7 @@ CONFIG_ARCH_EBSA285=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA110=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/fortunet_defconfig b/trunk/arch/arm/configs/fortunet_defconfig index d58142bf6fa1..65dc73a88c43 100644 --- a/trunk/arch/arm/configs/fortunet_defconfig +++ b/trunk/arch/arm/configs/fortunet_defconfig @@ -88,6 +88,7 @@ CONFIG_ARCH_FORTUNET=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM720T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_LV4T=y diff --git a/trunk/arch/arm/configs/h3600_defconfig b/trunk/arch/arm/configs/h3600_defconfig index a8ad8fbe1188..efa78e144e5c 100644 --- a/trunk/arch/arm/configs/h3600_defconfig +++ b/trunk/arch/arm/configs/h3600_defconfig @@ -205,6 +205,7 @@ CONFIG_SA1100_H3600=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/h5000_defconfig b/trunk/arch/arm/configs/h5000_defconfig index 5bb73728fad6..649baa370495 100644 --- a/trunk/arch/arm/configs/h5000_defconfig +++ b/trunk/arch/arm/configs/h5000_defconfig @@ -206,6 +206,7 @@ CONFIG_PXA25x=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/h7201_defconfig b/trunk/arch/arm/configs/h7201_defconfig index 09a6c6a27bdc..116920aecef7 100644 --- a/trunk/arch/arm/configs/h7201_defconfig +++ b/trunk/arch/arm/configs/h7201_defconfig @@ -87,6 +87,7 @@ CONFIG_CPU_H7201=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM720T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_LV4T=y diff --git a/trunk/arch/arm/configs/h7202_defconfig b/trunk/arch/arm/configs/h7202_defconfig index fedc52bd22b3..0e739af52713 100644 --- a/trunk/arch/arm/configs/h7202_defconfig +++ b/trunk/arch/arm/configs/h7202_defconfig @@ -91,6 +91,7 @@ CONFIG_CPU_H7202=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM720T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_LV4T=y diff --git a/trunk/arch/arm/configs/hackkit_defconfig b/trunk/arch/arm/configs/hackkit_defconfig index 2da1acf41f4b..db0708d5cbea 100644 --- a/trunk/arch/arm/configs/hackkit_defconfig +++ b/trunk/arch/arm/configs/hackkit_defconfig @@ -103,6 +103,7 @@ CONFIG_SA1100_HACKKIT=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/htcherald_defconfig b/trunk/arch/arm/configs/htcherald_defconfig index e0ef0d121aac..1b39691b816f 100644 --- a/trunk/arch/arm/configs/htcherald_defconfig +++ b/trunk/arch/arm/configs/htcherald_defconfig @@ -241,6 +241,7 @@ CONFIG_OMAP_ARM_195MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM925T=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v4T=y diff --git a/trunk/arch/arm/configs/igep0020_defconfig b/trunk/arch/arm/configs/igep0020_defconfig index a192248c6dd6..c97f8d0ded48 100644 --- a/trunk/arch/arm/configs/igep0020_defconfig +++ b/trunk/arch/arm/configs/igep0020_defconfig @@ -238,6 +238,7 @@ CONFIG_MACH_IGEP0020=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/integrator_defconfig b/trunk/arch/arm/configs/integrator_defconfig index 6b0d04395639..3ce96e60b409 100644 --- a/trunk/arch/arm/configs/integrator_defconfig +++ b/trunk/arch/arm/configs/integrator_defconfig @@ -92,6 +92,7 @@ CONFIG_ARCH_INTEGRATOR_AP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM720T=y CONFIG_CPU_ARM920T=y # CONFIG_CPU_ARM922T is not set diff --git a/trunk/arch/arm/configs/iop13xx_defconfig b/trunk/arch/arm/configs/iop13xx_defconfig index 3c040cc9f3b6..89c17761726b 100644 --- a/trunk/arch/arm/configs/iop13xx_defconfig +++ b/trunk/arch/arm/configs/iop13xx_defconfig @@ -163,6 +163,7 @@ CONFIG_PLAT_IOP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSC3=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/iop32x_defconfig b/trunk/arch/arm/configs/iop32x_defconfig index 62a854996be1..d70177b38f5f 100644 --- a/trunk/arch/arm/configs/iop32x_defconfig +++ b/trunk/arch/arm/configs/iop32x_defconfig @@ -168,6 +168,7 @@ CONFIG_PLAT_IOP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/iop33x_defconfig b/trunk/arch/arm/configs/iop33x_defconfig index 0bc23ece4c2f..ed2d59d01829 100644 --- a/trunk/arch/arm/configs/iop33x_defconfig +++ b/trunk/arch/arm/configs/iop33x_defconfig @@ -198,6 +198,7 @@ CONFIG_PLAT_IOP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/ixp2000_defconfig b/trunk/arch/arm/configs/ixp2000_defconfig index 8b5b5764a228..57526c15e854 100644 --- a/trunk/arch/arm/configs/ixp2000_defconfig +++ b/trunk/arch/arm/configs/ixp2000_defconfig @@ -151,6 +151,7 @@ CONFIG_ARCH_IXDP2X01=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/ixp23xx_defconfig b/trunk/arch/arm/configs/ixp23xx_defconfig index 59c11c93180f..ef97561ed75b 100644 --- a/trunk/arch/arm/configs/ixp23xx_defconfig +++ b/trunk/arch/arm/configs/ixp23xx_defconfig @@ -145,6 +145,7 @@ CONFIG_MACH_ROADRUNNER=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSC3=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/ixp4xx_defconfig b/trunk/arch/arm/configs/ixp4xx_defconfig index a907ad50ad33..95cd8dfb5f1e 100644 --- a/trunk/arch/arm/configs/ixp4xx_defconfig +++ b/trunk/arch/arm/configs/ixp4xx_defconfig @@ -189,6 +189,7 @@ CONFIG_IXP4XX_NPE=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/jornada720_defconfig b/trunk/arch/arm/configs/jornada720_defconfig index d1f1646e23c5..df9bfbea8612 100644 --- a/trunk/arch/arm/configs/jornada720_defconfig +++ b/trunk/arch/arm/configs/jornada720_defconfig @@ -202,6 +202,7 @@ CONFIG_SA1100_SSP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/kafa_defconfig b/trunk/arch/arm/configs/kafa_defconfig index f661e765d9ba..9f92fc527f59 100644 --- a/trunk/arch/arm/configs/kafa_defconfig +++ b/trunk/arch/arm/configs/kafa_defconfig @@ -132,6 +132,7 @@ CONFIG_MACH_KAFA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/kb9202_defconfig b/trunk/arch/arm/configs/kb9202_defconfig index 668ba59946d9..605a8462f172 100644 --- a/trunk/arch/arm/configs/kb9202_defconfig +++ b/trunk/arch/arm/configs/kb9202_defconfig @@ -230,6 +230,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/kirkwood_defconfig b/trunk/arch/arm/configs/kirkwood_defconfig index 5fc44c94b0ad..bcfade33bca9 100644 --- a/trunk/arch/arm/configs/kirkwood_defconfig +++ b/trunk/arch/arm/configs/kirkwood_defconfig @@ -201,6 +201,7 @@ CONFIG_PLAT_ORION=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_FEROCEON=y # CONFIG_CPU_FEROCEON_OLD_ID is not set CONFIG_CPU_32v5=y diff --git a/trunk/arch/arm/configs/ks8695_defconfig b/trunk/arch/arm/configs/ks8695_defconfig index e6f2276904f2..d25c41bab06c 100644 --- a/trunk/arch/arm/configs/ks8695_defconfig +++ b/trunk/arch/arm/configs/ks8695_defconfig @@ -186,6 +186,7 @@ CONFIG_MACH_DSM320=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM922T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/lart_defconfig b/trunk/arch/arm/configs/lart_defconfig index af7595176939..56ae56899d2e 100644 --- a/trunk/arch/arm/configs/lart_defconfig +++ b/trunk/arch/arm/configs/lart_defconfig @@ -99,6 +99,7 @@ CONFIG_SA1100_LART=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/loki_defconfig b/trunk/arch/arm/configs/loki_defconfig index 6df7b147161c..b720fcffbcd4 100644 --- a/trunk/arch/arm/configs/loki_defconfig +++ b/trunk/arch/arm/configs/loki_defconfig @@ -174,6 +174,7 @@ CONFIG_PLAT_ORION=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_FEROCEON=y # CONFIG_CPU_FEROCEON_OLD_ID is not set CONFIG_CPU_32v5=y diff --git a/trunk/arch/arm/configs/lpd270_defconfig b/trunk/arch/arm/configs/lpd270_defconfig index aeb768615347..1a38d8e3fe66 100644 --- a/trunk/arch/arm/configs/lpd270_defconfig +++ b/trunk/arch/arm/configs/lpd270_defconfig @@ -143,6 +143,7 @@ CONFIG_PXA27x=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/lpd7a400_defconfig b/trunk/arch/arm/configs/lpd7a400_defconfig index 6116feea2e12..f8ac29d5c654 100644 --- a/trunk/arch/arm/configs/lpd7a400_defconfig +++ b/trunk/arch/arm/configs/lpd7a400_defconfig @@ -95,6 +95,7 @@ CONFIG_LPD7A40X_CPLD_SSP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM922T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/lpd7a404_defconfig b/trunk/arch/arm/configs/lpd7a404_defconfig index 142cccdd971e..7a2e932da1c6 100644 --- a/trunk/arch/arm/configs/lpd7a404_defconfig +++ b/trunk/arch/arm/configs/lpd7a404_defconfig @@ -117,6 +117,7 @@ CONFIG_ARCH_LH7A404=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM922T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/lubbock_defconfig b/trunk/arch/arm/configs/lubbock_defconfig index 75c6293376bb..e544bfbbde5d 100644 --- a/trunk/arch/arm/configs/lubbock_defconfig +++ b/trunk/arch/arm/configs/lubbock_defconfig @@ -92,6 +92,7 @@ CONFIG_PXA25x=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/lusl7200_defconfig b/trunk/arch/arm/configs/lusl7200_defconfig index c1a1fb049a7c..42f6a77bc3c0 100644 --- a/trunk/arch/arm/configs/lusl7200_defconfig +++ b/trunk/arch/arm/configs/lusl7200_defconfig @@ -82,6 +82,7 @@ CONFIG_ARCH_L7200=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM720T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_LV4T=y diff --git a/trunk/arch/arm/configs/magician_defconfig b/trunk/arch/arm/configs/magician_defconfig index 8e9a7232bc42..957fd5fa27ca 100644 --- a/trunk/arch/arm/configs/magician_defconfig +++ b/trunk/arch/arm/configs/magician_defconfig @@ -204,6 +204,7 @@ CONFIG_PXA_HAVE_BOARD_IRQS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/mainstone_defconfig b/trunk/arch/arm/configs/mainstone_defconfig index 1cddb6178496..cc8c95b99292 100644 --- a/trunk/arch/arm/configs/mainstone_defconfig +++ b/trunk/arch/arm/configs/mainstone_defconfig @@ -93,6 +93,7 @@ CONFIG_IWMMXT=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/mini2440_defconfig b/trunk/arch/arm/configs/mini2440_defconfig index d2a90eb844a9..e49ed40f3be7 100644 --- a/trunk/arch/arm/configs/mini2440_defconfig +++ b/trunk/arch/arm/configs/mini2440_defconfig @@ -256,6 +256,7 @@ CONFIG_MACH_MINI2440=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/msm_defconfig b/trunk/arch/arm/configs/msm_defconfig index fe25e3b9a45a..cc3b06ee24f9 100644 --- a/trunk/arch/arm/configs/msm_defconfig +++ b/trunk/arch/arm/configs/msm_defconfig @@ -155,6 +155,7 @@ CONFIG_MSM_SMD=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y # CONFIG_CPU_32v6K is not set CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/mv78xx0_defconfig b/trunk/arch/arm/configs/mv78xx0_defconfig index 6afa2c108eaa..398274b0771a 100644 --- a/trunk/arch/arm/configs/mv78xx0_defconfig +++ b/trunk/arch/arm/configs/mv78xx0_defconfig @@ -181,6 +181,7 @@ CONFIG_PLAT_ORION=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_FEROCEON=y CONFIG_CPU_FEROCEON_OLD_ID=y CONFIG_CPU_32v5=y diff --git a/trunk/arch/arm/configs/mx1_defconfig b/trunk/arch/arm/configs/mx1_defconfig index f5750703b707..0200d67e30ba 100644 --- a/trunk/arch/arm/configs/mx1_defconfig +++ b/trunk/arch/arm/configs/mx1_defconfig @@ -190,6 +190,7 @@ CONFIG_MXC_IRQ_PRIOR=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/mx1ads_defconfig b/trunk/arch/arm/configs/mx1ads_defconfig index 3cabbb6d9276..577d7e1b5d42 100644 --- a/trunk/arch/arm/configs/mx1ads_defconfig +++ b/trunk/arch/arm/configs/mx1ads_defconfig @@ -88,6 +88,7 @@ CONFIG_ARCH_MX1ADS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/mx21_defconfig b/trunk/arch/arm/configs/mx21_defconfig index 1ecd6276e0f1..4b04290d8e81 100644 --- a/trunk/arch/arm/configs/mx21_defconfig +++ b/trunk/arch/arm/configs/mx21_defconfig @@ -185,6 +185,7 @@ CONFIG_MXC_PWM=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/mx27_defconfig b/trunk/arch/arm/configs/mx27_defconfig index edfdd6faf800..75263a83741c 100644 --- a/trunk/arch/arm/configs/mx27_defconfig +++ b/trunk/arch/arm/configs/mx27_defconfig @@ -207,6 +207,7 @@ CONFIG_MXC_PWM=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/mx31pdk_defconfig b/trunk/arch/arm/configs/mx31pdk_defconfig index d40953798d9e..95ffc0db95a0 100644 --- a/trunk/arch/arm/configs/mx31pdk_defconfig +++ b/trunk/arch/arm/configs/mx31pdk_defconfig @@ -173,6 +173,7 @@ CONFIG_MACH_MX31_3DS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y # CONFIG_CPU_32v6K is not set CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/mx3_defconfig b/trunk/arch/arm/configs/mx3_defconfig index 8a06bc64fe59..7734ccab2119 100644 --- a/trunk/arch/arm/configs/mx3_defconfig +++ b/trunk/arch/arm/configs/mx3_defconfig @@ -218,6 +218,7 @@ CONFIG_ARCH_MXC_IOMUX_V3=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y # CONFIG_CPU_32v6K is not set CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/n770_defconfig b/trunk/arch/arm/configs/n770_defconfig index 75cae18fbcb6..a1657b73683f 100644 --- a/trunk/arch/arm/configs/n770_defconfig +++ b/trunk/arch/arm/configs/n770_defconfig @@ -210,6 +210,7 @@ CONFIG_OMAP_ARM_216MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/n8x0_defconfig b/trunk/arch/arm/configs/n8x0_defconfig index e6f667c5e58a..264f52b5c52d 100644 --- a/trunk/arch/arm/configs/n8x0_defconfig +++ b/trunk/arch/arm/configs/n8x0_defconfig @@ -232,6 +232,7 @@ CONFIG_MACH_NOKIA_N8X0=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y # CONFIG_CPU_32v6K is not set CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/neocore926_defconfig b/trunk/arch/arm/configs/neocore926_defconfig index d165c757e44c..e0e4e98b5aa2 100644 --- a/trunk/arch/arm/configs/neocore926_defconfig +++ b/trunk/arch/arm/configs/neocore926_defconfig @@ -218,6 +218,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/neponset_defconfig b/trunk/arch/arm/configs/neponset_defconfig index 171265ed02ef..36cd62edd05c 100644 --- a/trunk/arch/arm/configs/neponset_defconfig +++ b/trunk/arch/arm/configs/neponset_defconfig @@ -103,6 +103,7 @@ CONFIG_ASSABET_NEPONSET=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/netwinder_defconfig b/trunk/arch/arm/configs/netwinder_defconfig index 78f58a99c5a3..c1a63a35c58d 100644 --- a/trunk/arch/arm/configs/netwinder_defconfig +++ b/trunk/arch/arm/configs/netwinder_defconfig @@ -89,6 +89,7 @@ CONFIG_FOOTBRIDGE_HOST=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA110=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/netx_defconfig b/trunk/arch/arm/configs/netx_defconfig index 2a97e361ec7b..61d0fc5b2417 100644 --- a/trunk/arch/arm/configs/netx_defconfig +++ b/trunk/arch/arm/configs/netx_defconfig @@ -122,6 +122,7 @@ CONFIG_MACH_NXEB500HMI=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/nhk8815_defconfig b/trunk/arch/arm/configs/nhk8815_defconfig index 92d90862f5ed..600cb270f2bf 100644 --- a/trunk/arch/arm/configs/nhk8815_defconfig +++ b/trunk/arch/arm/configs/nhk8815_defconfig @@ -191,6 +191,7 @@ CONFIG_I2C_BITBANG_8815NHK=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/nuc910_defconfig b/trunk/arch/arm/configs/nuc910_defconfig index f80848a929ae..5245655a0ad3 100644 --- a/trunk/arch/arm/configs/nuc910_defconfig +++ b/trunk/arch/arm/configs/nuc910_defconfig @@ -180,6 +180,7 @@ CONFIG_MACH_W90P910EVB=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/nuc950_defconfig b/trunk/arch/arm/configs/nuc950_defconfig index 97300ec478dd..df1de9b45ca4 100644 --- a/trunk/arch/arm/configs/nuc950_defconfig +++ b/trunk/arch/arm/configs/nuc950_defconfig @@ -201,6 +201,7 @@ CONFIG_MACH_W90P950EVB=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/nuc960_defconfig b/trunk/arch/arm/configs/nuc960_defconfig index aa7e128f5d79..4b2cd9eae9bc 100644 --- a/trunk/arch/arm/configs/nuc960_defconfig +++ b/trunk/arch/arm/configs/nuc960_defconfig @@ -201,6 +201,7 @@ CONFIG_MACH_W90N960EVB=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/omap3_beagle_defconfig b/trunk/arch/arm/configs/omap3_beagle_defconfig index c7999f5b1c9a..9cfae374e041 100644 --- a/trunk/arch/arm/configs/omap3_beagle_defconfig +++ b/trunk/arch/arm/configs/omap3_beagle_defconfig @@ -213,6 +213,7 @@ CONFIG_MACH_OMAP3_BEAGLE=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/omap3_defconfig b/trunk/arch/arm/configs/omap3_defconfig index 367be98a6aef..2af28eab9060 100644 --- a/trunk/arch/arm/configs/omap3_defconfig +++ b/trunk/arch/arm/configs/omap3_defconfig @@ -245,6 +245,7 @@ CONFIG_MACH_OMAP_3630SDP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/omap3_evm_defconfig b/trunk/arch/arm/configs/omap3_evm_defconfig index 86cc4bea616b..e190fc8b9a7c 100644 --- a/trunk/arch/arm/configs/omap3_evm_defconfig +++ b/trunk/arch/arm/configs/omap3_evm_defconfig @@ -220,6 +220,7 @@ CONFIG_MACH_OMAP3EVM=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/omap3_pandora_defconfig b/trunk/arch/arm/configs/omap3_pandora_defconfig index f74eb9a1d191..b7a8d9fa49db 100644 --- a/trunk/arch/arm/configs/omap3_pandora_defconfig +++ b/trunk/arch/arm/configs/omap3_pandora_defconfig @@ -211,6 +211,7 @@ CONFIG_MACH_OMAP3_PANDORA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/omap3_touchbook_defconfig b/trunk/arch/arm/configs/omap3_touchbook_defconfig index 74fe6be9c5ec..7c8515e65c02 100644 --- a/trunk/arch/arm/configs/omap3_touchbook_defconfig +++ b/trunk/arch/arm/configs/omap3_touchbook_defconfig @@ -246,6 +246,7 @@ CONFIG_MACH_OMAP3_TOUCHBOOK=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/omap_2430sdp_defconfig b/trunk/arch/arm/configs/omap_2430sdp_defconfig index 45b4ebae3056..640e9afc4630 100644 --- a/trunk/arch/arm/configs/omap_2430sdp_defconfig +++ b/trunk/arch/arm/configs/omap_2430sdp_defconfig @@ -197,6 +197,7 @@ CONFIG_MACH_OMAP_2430SDP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y # CONFIG_CPU_32v6K is not set CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/omap_3430sdp_defconfig b/trunk/arch/arm/configs/omap_3430sdp_defconfig index bb2917e5cb47..592457cfbbe5 100644 --- a/trunk/arch/arm/configs/omap_3430sdp_defconfig +++ b/trunk/arch/arm/configs/omap_3430sdp_defconfig @@ -232,6 +232,7 @@ CONFIG_MACH_OMAP_3430SDP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/omap_3630sdp_defconfig b/trunk/arch/arm/configs/omap_3630sdp_defconfig index d25c3d4424ca..e836c8a00148 100644 --- a/trunk/arch/arm/configs/omap_3630sdp_defconfig +++ b/trunk/arch/arm/configs/omap_3630sdp_defconfig @@ -236,6 +236,7 @@ CONFIG_MACH_OMAP_3630SDP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/omap_4430sdp_defconfig b/trunk/arch/arm/configs/omap_4430sdp_defconfig index c48d7b893869..2319113c86bf 100644 --- a/trunk/arch/arm/configs/omap_4430sdp_defconfig +++ b/trunk/arch/arm/configs/omap_4430sdp_defconfig @@ -220,6 +220,7 @@ CONFIG_MACH_OMAP_4430SDP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y @@ -242,13 +243,10 @@ CONFIG_CPU_CP15_MMU=y # CONFIG_CPU_DCACHE_DISABLE is not set # CONFIG_CPU_BPREDICT_DISABLE is not set CONFIG_HAS_TLS_REG=y -CONFIG_OUTER_CACHE=y -CONFIG_CACHE_L2X0=y CONFIG_ARM_L1_CACHE_SHIFT=5 # CONFIG_ARM_ERRATA_430973 is not set # CONFIG_ARM_ERRATA_458693 is not set # CONFIG_ARM_ERRATA_460075 is not set -CONFIG_PL310_ERRATA_588369=y CONFIG_ARM_GIC=y # diff --git a/trunk/arch/arm/configs/omap_apollon_2420_defconfig b/trunk/arch/arm/configs/omap_apollon_2420_defconfig index cc86342896a0..ac7adf34c54a 100644 --- a/trunk/arch/arm/configs/omap_apollon_2420_defconfig +++ b/trunk/arch/arm/configs/omap_apollon_2420_defconfig @@ -196,6 +196,7 @@ CONFIG_MACH_OMAP_APOLLON=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y # CONFIG_CPU_32v6K is not set CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/omap_generic_1510_defconfig b/trunk/arch/arm/configs/omap_generic_1510_defconfig index 61744e507e47..ccdc661b5856 100644 --- a/trunk/arch/arm/configs/omap_generic_1510_defconfig +++ b/trunk/arch/arm/configs/omap_generic_1510_defconfig @@ -205,6 +205,7 @@ CONFIG_OMAP_ARM_168MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM925T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/omap_generic_1610_defconfig b/trunk/arch/arm/configs/omap_generic_1610_defconfig index d773857ed0cd..0c42c8955047 100644 --- a/trunk/arch/arm/configs/omap_generic_1610_defconfig +++ b/trunk/arch/arm/configs/omap_generic_1610_defconfig @@ -207,6 +207,7 @@ CONFIG_OMAP_ARM_192MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/omap_generic_1710_defconfig b/trunk/arch/arm/configs/omap_generic_1710_defconfig index 6ec487e6e027..0a00a708a4fc 100644 --- a/trunk/arch/arm/configs/omap_generic_1710_defconfig +++ b/trunk/arch/arm/configs/omap_generic_1710_defconfig @@ -201,6 +201,7 @@ CONFIG_OMAP_ARM_192MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/omap_generic_2420_defconfig b/trunk/arch/arm/configs/omap_generic_2420_defconfig index 7218b96c0b76..cf4073b47aaa 100644 --- a/trunk/arch/arm/configs/omap_generic_2420_defconfig +++ b/trunk/arch/arm/configs/omap_generic_2420_defconfig @@ -191,6 +191,7 @@ CONFIG_ARCH_OMAP2420=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y # CONFIG_CPU_32v6K is not set CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/omap_h2_1610_defconfig b/trunk/arch/arm/configs/omap_h2_1610_defconfig index 523189586a4b..74dbdc644d32 100644 --- a/trunk/arch/arm/configs/omap_h2_1610_defconfig +++ b/trunk/arch/arm/configs/omap_h2_1610_defconfig @@ -231,6 +231,7 @@ CONFIG_OMAP_ARM_60MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/omap_h4_2420_defconfig b/trunk/arch/arm/configs/omap_h4_2420_defconfig index b12b406c1960..a4aab8e4c29b 100644 --- a/trunk/arch/arm/configs/omap_h4_2420_defconfig +++ b/trunk/arch/arm/configs/omap_h4_2420_defconfig @@ -201,6 +201,7 @@ CONFIG_MACH_OMAP_H4=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y # CONFIG_CPU_32v6K is not set CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/omap_innovator_1510_defconfig b/trunk/arch/arm/configs/omap_innovator_1510_defconfig index e9c140821256..0cfe363e3365 100644 --- a/trunk/arch/arm/configs/omap_innovator_1510_defconfig +++ b/trunk/arch/arm/configs/omap_innovator_1510_defconfig @@ -205,6 +205,7 @@ CONFIG_OMAP_ARM_168MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM925T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/omap_innovator_1610_defconfig b/trunk/arch/arm/configs/omap_innovator_1610_defconfig index fea9319ed7fd..95d9f2be53e0 100644 --- a/trunk/arch/arm/configs/omap_innovator_1610_defconfig +++ b/trunk/arch/arm/configs/omap_innovator_1610_defconfig @@ -206,6 +206,7 @@ CONFIG_OMAP_ARM_192MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/omap_ldp_defconfig b/trunk/arch/arm/configs/omap_ldp_defconfig index 0efb4b044fff..9139532c3be7 100644 --- a/trunk/arch/arm/configs/omap_ldp_defconfig +++ b/trunk/arch/arm/configs/omap_ldp_defconfig @@ -214,6 +214,7 @@ CONFIG_MACH_OMAP_LDP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/omap_osk_5912_defconfig b/trunk/arch/arm/configs/omap_osk_5912_defconfig index 556fcca1b1db..6b3b5c610da0 100644 --- a/trunk/arch/arm/configs/omap_osk_5912_defconfig +++ b/trunk/arch/arm/configs/omap_osk_5912_defconfig @@ -212,6 +212,7 @@ CONFIG_OMAP_ARM_192MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/omap_perseus2_730_defconfig b/trunk/arch/arm/configs/omap_perseus2_730_defconfig index 9a15d5da57f9..b94800c0e000 100644 --- a/trunk/arch/arm/configs/omap_perseus2_730_defconfig +++ b/trunk/arch/arm/configs/omap_perseus2_730_defconfig @@ -199,6 +199,7 @@ CONFIG_OMAP_ARM_182MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/omap_zoom2_defconfig b/trunk/arch/arm/configs/omap_zoom2_defconfig index a82e81332a03..4b00a4306812 100644 --- a/trunk/arch/arm/configs/omap_zoom2_defconfig +++ b/trunk/arch/arm/configs/omap_zoom2_defconfig @@ -222,6 +222,7 @@ CONFIG_MACH_OMAP_ZOOM2=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/omap_zoom3_defconfig b/trunk/arch/arm/configs/omap_zoom3_defconfig index a3e3c8274c9b..0d7e37a3651b 100644 --- a/trunk/arch/arm/configs/omap_zoom3_defconfig +++ b/trunk/arch/arm/configs/omap_zoom3_defconfig @@ -236,6 +236,7 @@ CONFIG_MACH_OMAP_ZOOM3=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/onearm_defconfig b/trunk/arch/arm/configs/onearm_defconfig index 19b91dedc7fe..f8701fadb600 100644 --- a/trunk/arch/arm/configs/onearm_defconfig +++ b/trunk/arch/arm/configs/onearm_defconfig @@ -161,6 +161,7 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/orion5x_defconfig b/trunk/arch/arm/configs/orion5x_defconfig index 85b05d3e279b..5383cd0dff54 100644 --- a/trunk/arch/arm/configs/orion5x_defconfig +++ b/trunk/arch/arm/configs/orion5x_defconfig @@ -210,6 +210,7 @@ CONFIG_PLAT_ORION=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_FEROCEON=y CONFIG_CPU_FEROCEON_OLD_ID=y CONFIG_CPU_32v5=y diff --git a/trunk/arch/arm/configs/overo_defconfig b/trunk/arch/arm/configs/overo_defconfig index bf06d3660a30..b3ea2c4c0f91 100644 --- a/trunk/arch/arm/configs/overo_defconfig +++ b/trunk/arch/arm/configs/overo_defconfig @@ -217,6 +217,7 @@ CONFIG_MACH_OVERO=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/palmte_defconfig b/trunk/arch/arm/configs/palmte_defconfig index feffaa2deae2..40fc6a778e00 100644 --- a/trunk/arch/arm/configs/palmte_defconfig +++ b/trunk/arch/arm/configs/palmte_defconfig @@ -196,6 +196,7 @@ CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM925T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/palmtt_defconfig b/trunk/arch/arm/configs/palmtt_defconfig index 55d5b7dfb7a6..e54ced41217e 100644 --- a/trunk/arch/arm/configs/palmtt_defconfig +++ b/trunk/arch/arm/configs/palmtt_defconfig @@ -176,6 +176,7 @@ CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM925T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/palmz71_defconfig b/trunk/arch/arm/configs/palmz71_defconfig index 6efc7465a76c..08e14068fff7 100644 --- a/trunk/arch/arm/configs/palmz71_defconfig +++ b/trunk/arch/arm/configs/palmz71_defconfig @@ -200,6 +200,7 @@ CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM925T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/palmz72_defconfig b/trunk/arch/arm/configs/palmz72_defconfig index 6d162b137ce8..a0dc37c05dea 100644 --- a/trunk/arch/arm/configs/palmz72_defconfig +++ b/trunk/arch/arm/configs/palmz72_defconfig @@ -209,6 +209,7 @@ CONFIG_PXA_PWM=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/pcm027_defconfig b/trunk/arch/arm/configs/pcm027_defconfig index fa153f2711bb..05ad96a43b1d 100644 --- a/trunk/arch/arm/configs/pcm027_defconfig +++ b/trunk/arch/arm/configs/pcm027_defconfig @@ -168,6 +168,7 @@ CONFIG_PXA27x=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/picotux200_defconfig b/trunk/arch/arm/configs/picotux200_defconfig index 6e7155c122a4..9018f0f298aa 100644 --- a/trunk/arch/arm/configs/picotux200_defconfig +++ b/trunk/arch/arm/configs/picotux200_defconfig @@ -168,6 +168,7 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/pleb_defconfig b/trunk/arch/arm/configs/pleb_defconfig index dbfabb5eede8..f2d2dda25949 100644 --- a/trunk/arch/arm/configs/pleb_defconfig +++ b/trunk/arch/arm/configs/pleb_defconfig @@ -100,6 +100,7 @@ CONFIG_SA1100_PLEB=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/pnx4008_defconfig b/trunk/arch/arm/configs/pnx4008_defconfig index 2f7b9ce7dad3..67b5f1e15f4a 100644 --- a/trunk/arch/arm/configs/pnx4008_defconfig +++ b/trunk/arch/arm/configs/pnx4008_defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_PNX4008=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/pxa168_defconfig b/trunk/arch/arm/configs/pxa168_defconfig index 791b8c39aefc..db5faeaec96c 100644 --- a/trunk/arch/arm/configs/pxa168_defconfig +++ b/trunk/arch/arm/configs/pxa168_defconfig @@ -184,6 +184,7 @@ CONFIG_PLAT_PXA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_MOHAWK=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/pxa255-idp_defconfig b/trunk/arch/arm/configs/pxa255-idp_defconfig index 3365c5d77cad..46e5089df0ae 100644 --- a/trunk/arch/arm/configs/pxa255-idp_defconfig +++ b/trunk/arch/arm/configs/pxa255-idp_defconfig @@ -92,6 +92,7 @@ CONFIG_PXA25x=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/pxa3xx_defconfig b/trunk/arch/arm/configs/pxa3xx_defconfig index 82ca6c80d6af..733b851e5b7e 100644 --- a/trunk/arch/arm/configs/pxa3xx_defconfig +++ b/trunk/arch/arm/configs/pxa3xx_defconfig @@ -240,6 +240,7 @@ CONFIG_PLAT_PXA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSC3=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/pxa910_defconfig b/trunk/arch/arm/configs/pxa910_defconfig index 94e20fe6dbde..8c7e299f1d66 100644 --- a/trunk/arch/arm/configs/pxa910_defconfig +++ b/trunk/arch/arm/configs/pxa910_defconfig @@ -184,6 +184,7 @@ CONFIG_PLAT_PXA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_MOHAWK=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/qil-a9260_defconfig b/trunk/arch/arm/configs/qil-a9260_defconfig index 12d0d64e3216..9b32d0eb89ba 100644 --- a/trunk/arch/arm/configs/qil-a9260_defconfig +++ b/trunk/arch/arm/configs/qil-a9260_defconfig @@ -195,6 +195,7 @@ CONFIG_AT91_EARLY_USART0=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/realview-smp_defconfig b/trunk/arch/arm/configs/realview-smp_defconfig index 123701754d42..21db4b3ec8ff 100644 --- a/trunk/arch/arm/configs/realview-smp_defconfig +++ b/trunk/arch/arm/configs/realview-smp_defconfig @@ -186,6 +186,7 @@ CONFIG_REALVIEW_HIGH_PHYS_OFFSET=y # # Processor Type # +CONFIG_CPU_32=y # CONFIG_CPU_ARM926T is not set CONFIG_CPU_V6=y CONFIG_CPU_32v6K=y diff --git a/trunk/arch/arm/configs/realview_defconfig b/trunk/arch/arm/configs/realview_defconfig index a509a5e59d2c..9a75c30b910d 100644 --- a/trunk/arch/arm/configs/realview_defconfig +++ b/trunk/arch/arm/configs/realview_defconfig @@ -184,6 +184,7 @@ CONFIG_MACH_REALVIEW_PB1176=y # # Processor Type # +CONFIG_CPU_32=y # CONFIG_CPU_ARM926T is not set CONFIG_CPU_V6=y # CONFIG_CPU_32v6K is not set diff --git a/trunk/arch/arm/configs/rpc_defconfig b/trunk/arch/arm/configs/rpc_defconfig index e9124a000393..a29d61fe4c6a 100644 --- a/trunk/arch/arm/configs/rpc_defconfig +++ b/trunk/arch/arm/configs/rpc_defconfig @@ -150,6 +150,7 @@ CONFIG_ARCH_ACORN=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM610=y CONFIG_CPU_ARM710=y CONFIG_CPU_SA110=y diff --git a/trunk/arch/arm/configs/rx51_defconfig b/trunk/arch/arm/configs/rx51_defconfig index b6eeebb31761..155973426025 100644 --- a/trunk/arch/arm/configs/rx51_defconfig +++ b/trunk/arch/arm/configs/rx51_defconfig @@ -212,6 +212,7 @@ CONFIG_MACH_NOKIA_RX51=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/s3c2410_defconfig b/trunk/arch/arm/configs/s3c2410_defconfig index 2f10dae02796..b49810461e41 100644 --- a/trunk/arch/arm/configs/s3c2410_defconfig +++ b/trunk/arch/arm/configs/s3c2410_defconfig @@ -277,6 +277,7 @@ CONFIG_MACH_SMDK2443=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v4T=y diff --git a/trunk/arch/arm/configs/s3c6400_defconfig b/trunk/arch/arm/configs/s3c6400_defconfig index f56e50fab79b..32860609e057 100644 --- a/trunk/arch/arm/configs/s3c6400_defconfig +++ b/trunk/arch/arm/configs/s3c6400_defconfig @@ -192,6 +192,7 @@ CONFIG_SMDK6410_SD_CH0=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_V6=y CONFIG_CPU_32v6K=y CONFIG_CPU_32v6=y diff --git a/trunk/arch/arm/configs/s5pc100_defconfig b/trunk/arch/arm/configs/s5pc100_defconfig index dc108afc060c..b0d7d3d3a5e3 100644 --- a/trunk/arch/arm/configs/s5pc100_defconfig +++ b/trunk/arch/arm/configs/s5pc100_defconfig @@ -202,6 +202,7 @@ CONFIG_MACH_SMDKC100=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/sam9_l9260_defconfig b/trunk/arch/arm/configs/sam9_l9260_defconfig index 81b290ad5d25..1174e2764875 100644 --- a/trunk/arch/arm/configs/sam9_l9260_defconfig +++ b/trunk/arch/arm/configs/sam9_l9260_defconfig @@ -175,6 +175,7 @@ CONFIG_MTD_AT91_DATAFLASH_CARD=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/shannon_defconfig b/trunk/arch/arm/configs/shannon_defconfig index 7c49bc352462..984f7096a533 100644 --- a/trunk/arch/arm/configs/shannon_defconfig +++ b/trunk/arch/arm/configs/shannon_defconfig @@ -99,6 +99,7 @@ CONFIG_SA1100_SHANNON=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/shark_defconfig b/trunk/arch/arm/configs/shark_defconfig index 46de1247d127..90235bf7a1de 100644 --- a/trunk/arch/arm/configs/shark_defconfig +++ b/trunk/arch/arm/configs/shark_defconfig @@ -173,6 +173,7 @@ CONFIG_ARCH_SHARK=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA110=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/simpad_defconfig b/trunk/arch/arm/configs/simpad_defconfig index ee25e6344151..685d2b513206 100644 --- a/trunk/arch/arm/configs/simpad_defconfig +++ b/trunk/arch/arm/configs/simpad_defconfig @@ -101,6 +101,7 @@ CONFIG_SA1100_SIMPAD=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y diff --git a/trunk/arch/arm/configs/spitz_defconfig b/trunk/arch/arm/configs/spitz_defconfig index 7d894894194f..745c68ffb885 100644 --- a/trunk/arch/arm/configs/spitz_defconfig +++ b/trunk/arch/arm/configs/spitz_defconfig @@ -212,6 +212,7 @@ CONFIG_PXA_SSP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/stmp378x_defconfig b/trunk/arch/arm/configs/stmp378x_defconfig index b1a3a97d46ee..44461f197a17 100644 --- a/trunk/arch/arm/configs/stmp378x_defconfig +++ b/trunk/arch/arm/configs/stmp378x_defconfig @@ -193,6 +193,7 @@ CONFIG_MACH_STMP378X=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/stmp37xx_defconfig b/trunk/arch/arm/configs/stmp37xx_defconfig index a3751c9e1416..401279d531d5 100644 --- a/trunk/arch/arm/configs/stmp37xx_defconfig +++ b/trunk/arch/arm/configs/stmp37xx_defconfig @@ -182,6 +182,7 @@ CONFIG_MACH_STMP37XX=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/sx1_defconfig b/trunk/arch/arm/configs/sx1_defconfig index 8a9e7e6bd03b..25b007ff8bab 100644 --- a/trunk/arch/arm/configs/sx1_defconfig +++ b/trunk/arch/arm/configs/sx1_defconfig @@ -210,6 +210,7 @@ CONFIG_OMAP_ARM_168MHZ=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM925T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/tct_hammer_defconfig b/trunk/arch/arm/configs/tct_hammer_defconfig index dccf14b4ee02..9d32faef05f6 100644 --- a/trunk/arch/arm/configs/tct_hammer_defconfig +++ b/trunk/arch/arm/configs/tct_hammer_defconfig @@ -215,6 +215,7 @@ CONFIG_MACH_TCT_HAMMER=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/trizeps4_defconfig b/trunk/arch/arm/configs/trizeps4_defconfig index 1e8f5a211856..b6f838197816 100644 --- a/trunk/arch/arm/configs/trizeps4_defconfig +++ b/trunk/arch/arm/configs/trizeps4_defconfig @@ -156,6 +156,7 @@ CONFIG_PXA27x=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/u300_defconfig b/trunk/arch/arm/configs/u300_defconfig index 9155196e623b..953ba0297fc4 100644 --- a/trunk/arch/arm/configs/u300_defconfig +++ b/trunk/arch/arm/configs/u300_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.33-rc2 -# Wed Jan 6 00:01:36 2010 +# Linux kernel version: 2.6.32-rc5 +# Sat Oct 17 23:32:24 2009 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -46,7 +46,6 @@ CONFIG_SYSVIPC_SYSCTL=y # CONFIG_TREE_RCU=y # CONFIG_TREE_PREEMPT_RCU is not set -# CONFIG_TINY_RCU is not set # CONFIG_RCU_TRACE is not set CONFIG_RCU_FANOUT=32 # CONFIG_RCU_FANOUT_EXACT is not set @@ -120,41 +119,14 @@ CONFIG_BLOCK=y # IO Schedulers # CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set CONFIG_IOSCHED_DEADLINE=y # CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set CONFIG_DEFAULT_DEADLINE=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="deadline" -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_UNLOCK is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_UNLOCK is not set -# CONFIG_INLINE_READ_UNLOCK_BH is not set -# CONFIG_INLINE_READ_UNLOCK_IRQ is not set -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_UNLOCK is not set -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -# CONFIG_MUTEX_SPIN_ON_OWNER is not set # CONFIG_FREEZER is not set # @@ -183,7 +155,6 @@ CONFIG_MMU=y # CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_DOVE is not set # CONFIG_ARCH_KIRKWOOD is not set # CONFIG_ARCH_LOKI is not set # CONFIG_ARCH_MV78XX0 is not set @@ -206,7 +177,6 @@ CONFIG_ARCH_U300=y # CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set # CONFIG_ARCH_BCMRING is not set -# CONFIG_ARCH_U8500 is not set # # ST-Ericsson AB U300/U330/U335/U365 Platform @@ -237,6 +207,7 @@ CONFIG_MACH_U300_SPIDUMMY=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y @@ -295,10 +266,12 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 +CONFIG_SPLIT_PTLOCK_CPUS=4096 # CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ALIGNMENT_TRAP=y @@ -527,21 +500,14 @@ CONFIG_MTD_NAND_IDS=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set - -# -# DRBD disabled because PROC_FS, INET or CONNECTOR not selected -# # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set CONFIG_MISC_DEVICES=y -# CONFIG_AD525X_DPOT is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_ISL29003 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set # CONFIG_C2PORT is not set # @@ -552,7 +518,6 @@ CONFIG_MISC_DEVICES=y # CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set -# CONFIG_IWMC3200TOP is not set CONFIG_HAVE_IDE=y # CONFIG_IDE is not set @@ -575,7 +540,6 @@ CONFIG_HAVE_IDE=y CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces @@ -682,6 +646,7 @@ CONFIG_I2C_STU300=y # # Miscellaneous I2C Chip support # +# CONFIG_DS1682 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set @@ -697,8 +662,6 @@ CONFIG_SPI_MASTER=y # CONFIG_SPI_BITBANG is not set # CONFIG_SPI_GPIO is not set CONFIG_SPI_PL022=y -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set # # SPI Protocol Masters @@ -746,7 +709,6 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_MFD_T7L66XB is not set # CONFIG_MFD_TC6387XB is not set # CONFIG_PMIC_DA903X is not set -# CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X is not set # CONFIG_MFD_WM8350_I2C is not set @@ -755,8 +717,6 @@ CONFIG_SSB_POSSIBLE=y CONFIG_AB3100_CORE=y CONFIG_AB3100_OTP=y # CONFIG_EZX_PCAP is not set -# CONFIG_MFD_88PM8607 is not set -# CONFIG_AB4500_CORE is not set CONFIG_REGULATOR=y # CONFIG_REGULATOR_DEBUG is not set # CONFIG_REGULATOR_FIXED_VOLTAGE is not set @@ -764,7 +724,6 @@ CONFIG_REGULATOR=y # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set # CONFIG_REGULATOR_BQ24022 is not set # CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_LP3971 is not set CONFIG_REGULATOR_AB3100=y # CONFIG_REGULATOR_TPS65023 is not set @@ -882,9 +841,7 @@ CONFIG_LEDS_CLASS=y # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_REGULATOR is not set # CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set # # LED Triggers @@ -926,7 +883,6 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8581 is not set @@ -956,9 +912,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_M48T86 is not set # CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set # CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_V3020 is not set CONFIG_RTC_DRV_AB3100=y @@ -973,15 +927,6 @@ CONFIG_DMADEVICES=y # # DMA Devices # -CONFIG_COH901318=y -CONFIG_DMA_ENGINE=y - -# -# DMA Clients -# -# CONFIG_NET_DMA is not set -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_DMATEST is not set # CONFIG_AUXDISPLAY is not set # CONFIG_UIO is not set @@ -1074,7 +1019,7 @@ CONFIG_MISC_FILESYSTEMS=y CONFIG_MSDOS_PARTITION=y CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_437 is not set # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set # CONFIG_NLS_CODEPAGE_850 is not set @@ -1191,7 +1136,6 @@ CONFIG_ARM_UNWIND=y # CONFIG_DEBUG_ERRORS is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_DEBUG_LL is not set -# CONFIG_OC_ETM is not set # # Security options @@ -1199,11 +1143,7 @@ CONFIG_ARM_UNWIND=y # CONFIG_KEYS is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" +# CONFIG_SECURITY_FILE_CAPABILITIES is not set # CONFIG_CRYPTO is not set # CONFIG_BINARY_PRINTF is not set diff --git a/trunk/arch/arm/configs/u8500_defconfig b/trunk/arch/arm/configs/u8500_defconfig index 727aff9fe347..15fde22ce3f3 100644 --- a/trunk/arch/arm/configs/u8500_defconfig +++ b/trunk/arch/arm/configs/u8500_defconfig @@ -201,6 +201,7 @@ CONFIG_MACH_U8500_MOP=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_32v6K=y CONFIG_CPU_V7=y CONFIG_CPU_32v7=y diff --git a/trunk/arch/arm/configs/usb-a9260_defconfig b/trunk/arch/arm/configs/usb-a9260_defconfig index 87b700e2db84..fd7774033d64 100644 --- a/trunk/arch/arm/configs/usb-a9260_defconfig +++ b/trunk/arch/arm/configs/usb-a9260_defconfig @@ -195,6 +195,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/usb-a9263_defconfig b/trunk/arch/arm/configs/usb-a9263_defconfig index 7f018edd2480..e7c19dd92557 100644 --- a/trunk/arch/arm/configs/usb-a9263_defconfig +++ b/trunk/arch/arm/configs/usb-a9263_defconfig @@ -187,6 +187,7 @@ CONFIG_AT91_EARLY_DBGU=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/versatile_defconfig b/trunk/arch/arm/configs/versatile_defconfig index a1af0b972c0d..b11c5da3996c 100644 --- a/trunk/arch/arm/configs/versatile_defconfig +++ b/trunk/arch/arm/configs/versatile_defconfig @@ -117,6 +117,7 @@ CONFIG_MACH_VERSATILE_AB=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y diff --git a/trunk/arch/arm/configs/viper_defconfig b/trunk/arch/arm/configs/viper_defconfig index 909887ae524c..6ab5dd5868de 100644 --- a/trunk/arch/arm/configs/viper_defconfig +++ b/trunk/arch/arm/configs/viper_defconfig @@ -204,6 +204,7 @@ CONFIG_PXA_HAVE_ISA_IRQS=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/xcep_defconfig b/trunk/arch/arm/configs/xcep_defconfig index 84a72ac222cf..33bb7250946b 100644 --- a/trunk/arch/arm/configs/xcep_defconfig +++ b/trunk/arch/arm/configs/xcep_defconfig @@ -208,6 +208,7 @@ CONFIG_PLAT_PXA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/configs/yl9200_defconfig b/trunk/arch/arm/configs/yl9200_defconfig index 3b627aadeb54..9192e5977674 100644 --- a/trunk/arch/arm/configs/yl9200_defconfig +++ b/trunk/arch/arm/configs/yl9200_defconfig @@ -183,6 +183,7 @@ CONFIG_MACH_YL9200=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_ARM920T=y CONFIG_CPU_32v4T=y CONFIG_CPU_ABRT_EV4T=y diff --git a/trunk/arch/arm/configs/zeus_defconfig b/trunk/arch/arm/configs/zeus_defconfig index fca5ff68ea67..823b11e7091a 100644 --- a/trunk/arch/arm/configs/zeus_defconfig +++ b/trunk/arch/arm/configs/zeus_defconfig @@ -271,6 +271,7 @@ CONFIG_PLAT_PXA=y # # Processor Type # +CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y diff --git a/trunk/arch/arm/include/asm/atomic.h b/trunk/arch/arm/include/asm/atomic.h index e8ddec2cb158..d0daeab2234e 100644 --- a/trunk/arch/arm/include/asm/atomic.h +++ b/trunk/arch/arm/include/asm/atomic.h @@ -235,234 +235,6 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) #define smp_mb__before_atomic_inc() smp_mb() #define smp_mb__after_atomic_inc() smp_mb() -#ifndef CONFIG_GENERIC_ATOMIC64 -typedef struct { - u64 __aligned(8) counter; -} atomic64_t; - -#define ATOMIC64_INIT(i) { (i) } - -static inline u64 atomic64_read(atomic64_t *v) -{ - u64 result; - - __asm__ __volatile__("@ atomic64_read\n" -" ldrexd %0, %H0, [%1]" - : "=&r" (result) - : "r" (&v->counter) - ); - - return result; -} - -static inline void atomic64_set(atomic64_t *v, u64 i) -{ - u64 tmp; - - __asm__ __volatile__("@ atomic64_set\n" -"1: ldrexd %0, %H0, [%1]\n" -" strexd %0, %2, %H2, [%1]\n" -" teq %0, #0\n" -" bne 1b" - : "=&r" (tmp) - : "r" (&v->counter), "r" (i) - : "cc"); -} - -static inline void atomic64_add(u64 i, atomic64_t *v) -{ - u64 result; - unsigned long tmp; - - __asm__ __volatile__("@ atomic64_add\n" -"1: ldrexd %0, %H0, [%2]\n" -" adds %0, %0, %3\n" -" adc %H0, %H0, %H3\n" -" strexd %1, %0, %H0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (result), "=&r" (tmp) - : "r" (&v->counter), "r" (i) - : "cc"); -} - -static inline u64 atomic64_add_return(u64 i, atomic64_t *v) -{ - u64 result; - unsigned long tmp; - - smp_mb(); - - __asm__ __volatile__("@ atomic64_add_return\n" -"1: ldrexd %0, %H0, [%2]\n" -" adds %0, %0, %3\n" -" adc %H0, %H0, %H3\n" -" strexd %1, %0, %H0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (result), "=&r" (tmp) - : "r" (&v->counter), "r" (i) - : "cc"); - - smp_mb(); - - return result; -} - -static inline void atomic64_sub(u64 i, atomic64_t *v) -{ - u64 result; - unsigned long tmp; - - __asm__ __volatile__("@ atomic64_sub\n" -"1: ldrexd %0, %H0, [%2]\n" -" subs %0, %0, %3\n" -" sbc %H0, %H0, %H3\n" -" strexd %1, %0, %H0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (result), "=&r" (tmp) - : "r" (&v->counter), "r" (i) - : "cc"); -} - -static inline u64 atomic64_sub_return(u64 i, atomic64_t *v) -{ - u64 result; - unsigned long tmp; - - smp_mb(); - - __asm__ __volatile__("@ atomic64_sub_return\n" -"1: ldrexd %0, %H0, [%2]\n" -" subs %0, %0, %3\n" -" sbc %H0, %H0, %H3\n" -" strexd %1, %0, %H0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (result), "=&r" (tmp) - : "r" (&v->counter), "r" (i) - : "cc"); - - smp_mb(); - - return result; -} - -static inline u64 atomic64_cmpxchg(atomic64_t *ptr, u64 old, u64 new) -{ - u64 oldval; - unsigned long res; - - smp_mb(); - - do { - __asm__ __volatile__("@ atomic64_cmpxchg\n" - "ldrexd %1, %H1, [%2]\n" - "mov %0, #0\n" - "teq %1, %3\n" - "teqeq %H1, %H3\n" - "strexdeq %0, %4, %H4, [%2]" - : "=&r" (res), "=&r" (oldval) - : "r" (&ptr->counter), "r" (old), "r" (new) - : "cc"); - } while (res); - - smp_mb(); - - return oldval; -} - -static inline u64 atomic64_xchg(atomic64_t *ptr, u64 new) -{ - u64 result; - unsigned long tmp; - - smp_mb(); - - __asm__ __volatile__("@ atomic64_xchg\n" -"1: ldrexd %0, %H0, [%2]\n" -" strexd %1, %3, %H3, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (result), "=&r" (tmp) - : "r" (&ptr->counter), "r" (new) - : "cc"); - - smp_mb(); - - return result; -} - -static inline u64 atomic64_dec_if_positive(atomic64_t *v) -{ - u64 result; - unsigned long tmp; - - smp_mb(); - - __asm__ __volatile__("@ atomic64_dec_if_positive\n" -"1: ldrexd %0, %H0, [%2]\n" -" subs %0, %0, #1\n" -" sbc %H0, %H0, #0\n" -" teq %H0, #0\n" -" bmi 2f\n" -" strexd %1, %0, %H0, [%2]\n" -" teq %1, #0\n" -" bne 1b\n" -"2:" - : "=&r" (result), "=&r" (tmp) - : "r" (&v->counter) - : "cc"); - - smp_mb(); - - return result; -} - -static inline int atomic64_add_unless(atomic64_t *v, u64 a, u64 u) -{ - u64 val; - unsigned long tmp; - int ret = 1; - - smp_mb(); - - __asm__ __volatile__("@ atomic64_add_unless\n" -"1: ldrexd %0, %H0, [%3]\n" -" teq %0, %4\n" -" teqeq %H0, %H4\n" -" moveq %1, #0\n" -" beq 2f\n" -" adds %0, %0, %5\n" -" adc %H0, %H0, %H5\n" -" strexd %2, %0, %H0, [%3]\n" -" teq %2, #0\n" -" bne 1b\n" -"2:" - : "=&r" (val), "=&r" (ret), "=&r" (tmp) - : "r" (&v->counter), "r" (u), "r" (a) - : "cc"); - - if (ret) - smp_mb(); - - return ret; -} - -#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) -#define atomic64_inc(v) atomic64_add(1LL, (v)) -#define atomic64_inc_return(v) atomic64_add_return(1LL, (v)) -#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) -#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0) -#define atomic64_dec(v) atomic64_sub(1LL, (v)) -#define atomic64_dec_return(v) atomic64_sub_return(1LL, (v)) -#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) -#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL) - -#else /* !CONFIG_GENERIC_ATOMIC64 */ -#include -#endif #include #endif #endif diff --git a/trunk/arch/arm/include/asm/cacheflush.h b/trunk/arch/arm/include/asm/cacheflush.h index 72da7e045c6b..730aefcfbee3 100644 --- a/trunk/arch/arm/include/asm/cacheflush.h +++ b/trunk/arch/arm/include/asm/cacheflush.h @@ -42,8 +42,7 @@ #endif #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ - defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \ - defined(CONFIG_CPU_ARM1026) + defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) # define MULTI_CACHE 1 #endif @@ -155,16 +154,16 @@ * Please note that the implementation of these, and the required * effects are cache-type (VIVT/VIPT/PIPT) specific. * - * flush_kern_all() + * flush_cache_kern_all() * * Unconditionally clean and invalidate the entire cache. * - * flush_user_all() + * flush_cache_user_mm(mm) * * Clean and invalidate all user space cache entries * before a change of page tables. * - * flush_user_range(start, end, flags) + * flush_cache_user_range(start, end, flags) * * Clean and invalidate a range of cache entries in the * specified address space before a change of page tables. @@ -180,22 +179,23 @@ * - start - virtual start address * - end - virtual end address * - * coherent_user_range(start, end) + * DMA Cache Coherency + * =================== * - * Ensure coherency between the Icache and the Dcache in the - * region described by start, end. If you have non-snooping - * Harvard caches, you need to implement this function. + * dma_inv_range(start, end) + * + * Invalidate (discard) the specified virtual address range. + * May not write back any entries. If 'start' or 'end' + * are not cache line aligned, those lines must be written + * back. * - start - virtual start address * - end - virtual end address * - * flush_kern_dcache_area(kaddr, size) - * - * Ensure that the data held in page is written back. - * - kaddr - page address - * - size - region size + * dma_clean_range(start, end) * - * DMA Cache Coherency - * =================== + * Clean (write back) the specified virtual address range. + * - start - virtual start address + * - end - virtual end address * * dma_flush_range(start, end) * @@ -213,9 +213,8 @@ struct cpu_cache_fns { void (*coherent_user_range)(unsigned long, unsigned long); void (*flush_kern_dcache_area)(void *, size_t); - void (*dma_map_area)(const void *, size_t, int); - void (*dma_unmap_area)(const void *, size_t, int); - + void (*dma_inv_range)(const void *, const void *); + void (*dma_clean_range)(const void *, const void *); void (*dma_flush_range)(const void *, const void *); }; @@ -245,8 +244,8 @@ extern struct cpu_cache_fns cpu_cache; * is visible to DMA, or data written by DMA to system memory is * visible to the CPU. */ -#define dmac_map_area cpu_cache.dma_map_area -#define dmac_unmap_area cpu_cache.dma_unmap_area +#define dmac_inv_range cpu_cache.dma_inv_range +#define dmac_clean_range cpu_cache.dma_clean_range #define dmac_flush_range cpu_cache.dma_flush_range #else @@ -271,12 +270,12 @@ extern void __cpuc_flush_dcache_area(void *, size_t); * is visible to DMA, or data written by DMA to system memory is * visible to the CPU. */ -#define dmac_map_area __glue(_CACHE,_dma_map_area) -#define dmac_unmap_area __glue(_CACHE,_dma_unmap_area) +#define dmac_inv_range __glue(_CACHE,_dma_inv_range) +#define dmac_clean_range __glue(_CACHE,_dma_clean_range) #define dmac_flush_range __glue(_CACHE,_dma_flush_range) -extern void dmac_map_area(const void *, size_t, int); -extern void dmac_unmap_area(const void *, size_t, int); +extern void dmac_inv_range(const void *, const void *); +extern void dmac_clean_range(const void *, const void *); extern void dmac_flush_range(const void *, const void *); #endif @@ -317,8 +316,12 @@ static inline void outer_flush_range(unsigned long start, unsigned long end) * processes address space. Really, we want to allow our "user * space" model to handle this. */ -extern void copy_to_user_page(struct vm_area_struct *, struct page *, - unsigned long, void *, const void *, unsigned long); +#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ + do { \ + memcpy(dst, src, len); \ + flush_ptrace_access(vma, page, vaddr, dst, len, 1);\ + } while (0) + #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ do { \ memcpy(dst, src, len); \ @@ -352,6 +355,17 @@ vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig } } +static inline void +vivt_flush_ptrace_access(struct vm_area_struct *vma, struct page *page, + unsigned long uaddr, void *kaddr, + unsigned long len, int write) +{ + if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { + unsigned long addr = (unsigned long)kaddr; + __cpuc_coherent_kern_range(addr, addr + len); + } +} + #ifndef CONFIG_CPU_CACHE_VIPT #define flush_cache_mm(mm) \ vivt_flush_cache_mm(mm) @@ -359,10 +373,15 @@ vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig vivt_flush_cache_range(vma,start,end) #define flush_cache_page(vma,addr,pfn) \ vivt_flush_cache_page(vma,addr,pfn) +#define flush_ptrace_access(vma,page,ua,ka,len,write) \ + vivt_flush_ptrace_access(vma,page,ua,ka,len,write) #else extern void flush_cache_mm(struct mm_struct *mm); extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn); +extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, + unsigned long uaddr, void *kaddr, + unsigned long len, int write); #endif #define flush_cache_dup_mm(mm) flush_cache_mm(mm) @@ -413,16 +432,6 @@ static inline void __flush_icache_all(void) : "r" (0)); #endif } -static inline void flush_kernel_vmap_range(void *addr, int size) -{ - if ((cache_is_vivt() || cache_is_vipt_aliasing())) - __cpuc_flush_dcache_area(addr, (size_t)size); -} -static inline void invalidate_kernel_vmap_range(void *addr, int size) -{ - if ((cache_is_vivt() || cache_is_vipt_aliasing())) - __cpuc_flush_dcache_area(addr, (size_t)size); -} #define ARCH_HAS_FLUSH_ANON_PAGE static inline void flush_anon_page(struct vm_area_struct *vma, diff --git a/trunk/arch/arm/include/asm/clkdev.h b/trunk/arch/arm/include/asm/clkdev.h index 7a0690da5e63..b6ec7c627b39 100644 --- a/trunk/arch/arm/include/asm/clkdev.h +++ b/trunk/arch/arm/include/asm/clkdev.h @@ -27,7 +27,4 @@ struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id, void clkdev_add(struct clk_lookup *cl); void clkdev_drop(struct clk_lookup *cl); -void clkdev_add_table(struct clk_lookup *, size_t); -int clk_add_alias(const char *, const char *, char *, struct device *); - #endif diff --git a/trunk/arch/arm/include/asm/cpu.h b/trunk/arch/arm/include/asm/cpu.h index 793968173bef..634b2d7c612a 100644 --- a/trunk/arch/arm/include/asm/cpu.h +++ b/trunk/arch/arm/include/asm/cpu.h @@ -11,7 +11,6 @@ #define __ASM_ARM_CPU_H #include -#include struct cpuinfo_arm { struct cpu cpu; diff --git a/trunk/arch/arm/include/asm/dma-mapping.h b/trunk/arch/arm/include/asm/dma-mapping.h index 256ee1c9f51a..a96300bf83fd 100644 --- a/trunk/arch/arm/include/asm/dma-mapping.h +++ b/trunk/arch/arm/include/asm/dma-mapping.h @@ -57,58 +57,18 @@ static inline dma_addr_t virt_to_dma(struct device *dev, void *addr) #endif /* - * The DMA API is built upon the notion of "buffer ownership". A buffer - * is either exclusively owned by the CPU (and therefore may be accessed - * by it) or exclusively owned by the DMA device. These helper functions - * represent the transitions between these two ownership states. + * DMA-consistent mapping functions. These allocate/free a region of + * uncached, unwrite-buffered mapped memory space for use with DMA + * devices. This is the "generic" version. The PCI specific version + * is in pci.h * - * Note, however, that on later ARMs, this notion does not work due to - * speculative prefetches. We model our approach on the assumption that - * the CPU does do speculative prefetches, which means we clean caches - * before transfers and delay cache invalidation until transfer completion. - * - * Private support functions: these are not part of the API and are - * liable to change. Drivers must not use these. + * Note: Drivers should NOT use this function directly, as it will break + * platforms with CONFIG_DMABOUNCE. + * Use the driver DMA support - see dma-mapping.h (dma_sync_*) */ -static inline void __dma_single_cpu_to_dev(const void *kaddr, size_t size, - enum dma_data_direction dir) -{ - extern void ___dma_single_cpu_to_dev(const void *, size_t, - enum dma_data_direction); - - if (!arch_is_coherent()) - ___dma_single_cpu_to_dev(kaddr, size, dir); -} - -static inline void __dma_single_dev_to_cpu(const void *kaddr, size_t size, - enum dma_data_direction dir) -{ - extern void ___dma_single_dev_to_cpu(const void *, size_t, - enum dma_data_direction); - - if (!arch_is_coherent()) - ___dma_single_dev_to_cpu(kaddr, size, dir); -} - -static inline void __dma_page_cpu_to_dev(struct page *page, unsigned long off, - size_t size, enum dma_data_direction dir) -{ - extern void ___dma_page_cpu_to_dev(struct page *, unsigned long, - size_t, enum dma_data_direction); - - if (!arch_is_coherent()) - ___dma_page_cpu_to_dev(page, off, size, dir); -} - -static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off, - size_t size, enum dma_data_direction dir) -{ - extern void ___dma_page_dev_to_cpu(struct page *, unsigned long, - size_t, enum dma_data_direction); - - if (!arch_is_coherent()) - ___dma_page_dev_to_cpu(page, off, size, dir); -} +extern void dma_cache_maint(const void *kaddr, size_t size, int rw); +extern void dma_cache_maint_page(struct page *page, unsigned long offset, + size_t size, int rw); /* * Return whether the given device DMA address mask can be supported @@ -344,7 +304,8 @@ static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, { BUG_ON(!valid_dma_direction(dir)); - __dma_single_cpu_to_dev(cpu_addr, size, dir); + if (!arch_is_coherent()) + dma_cache_maint(cpu_addr, size, dir); return virt_to_dma(dev, cpu_addr); } @@ -368,7 +329,8 @@ static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, { BUG_ON(!valid_dma_direction(dir)); - __dma_page_cpu_to_dev(page, offset, size, dir); + if (!arch_is_coherent()) + dma_cache_maint_page(page, offset, size, dir); return page_to_dma(dev, page) + offset; } @@ -390,7 +352,7 @@ static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, static inline void dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size, enum dma_data_direction dir) { - __dma_single_dev_to_cpu(dma_to_virt(dev, handle), size, dir); + /* nothing to do */ } /** @@ -410,8 +372,7 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t handle, static inline void dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size, enum dma_data_direction dir) { - __dma_page_dev_to_cpu(dma_to_page(dev, handle), handle & ~PAGE_MASK, - size, dir); + /* nothing to do */ } #endif /* CONFIG_DMABOUNCE */ @@ -439,10 +400,7 @@ static inline void dma_sync_single_range_for_cpu(struct device *dev, { BUG_ON(!valid_dma_direction(dir)); - if (!dmabounce_sync_for_cpu(dev, handle, offset, size, dir)) - return; - - __dma_single_dev_to_cpu(dma_to_virt(dev, handle) + offset, size, dir); + dmabounce_sync_for_cpu(dev, handle, offset, size, dir); } static inline void dma_sync_single_range_for_device(struct device *dev, @@ -454,7 +412,8 @@ static inline void dma_sync_single_range_for_device(struct device *dev, if (!dmabounce_sync_for_device(dev, handle, offset, size, dir)) return; - __dma_single_cpu_to_dev(dma_to_virt(dev, handle) + offset, size, dir); + if (!arch_is_coherent()) + dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir); } static inline void dma_sync_single_for_cpu(struct device *dev, diff --git a/trunk/arch/arm/include/asm/dma.h b/trunk/arch/arm/include/asm/dma.h index ca51143f97f1..7edf3536df24 100644 --- a/trunk/arch/arm/include/asm/dma.h +++ b/trunk/arch/arm/include/asm/dma.h @@ -138,12 +138,12 @@ extern int get_dma_residue(unsigned int chan); #define NO_DMA 255 #endif -#endif /* CONFIG_ISA_DMA_API */ - #ifdef CONFIG_PCI extern int isa_dma_bridge_buggy; #else #define isa_dma_bridge_buggy (0) #endif +#endif /* CONFIG_ISA_DMA_API */ + #endif /* __ASM_ARM_DMA_H */ diff --git a/trunk/arch/arm/include/asm/io.h b/trunk/arch/arm/include/asm/io.h index c980156f3263..d2a59cfc30ce 100644 --- a/trunk/arch/arm/include/asm/io.h +++ b/trunk/arch/arm/include/asm/io.h @@ -69,16 +69,9 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); /* * __arm_ioremap takes CPU physical address. * __arm_ioremap_pfn takes a Page Frame Number and an offset into that page - * The _caller variety takes a __builtin_return_address(0) value for - * /proc/vmalloc to use - and should only be used in non-inline functions. */ -extern void __iomem *__arm_ioremap_pfn_caller(unsigned long, unsigned long, - size_t, unsigned int, void *); -extern void __iomem *__arm_ioremap_caller(unsigned long, size_t, unsigned int, - void *); - -extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int); -extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int); +extern void __iomem * __arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int); +extern void __iomem * __arm_ioremap(unsigned long, size_t, unsigned int); extern void __iounmap(volatile void __iomem *addr); /* diff --git a/trunk/arch/arm/include/asm/mach/time.h b/trunk/arch/arm/include/asm/mach/time.h index 8bffc3ff3acf..b2cc1fcd0400 100644 --- a/trunk/arch/arm/include/asm/mach/time.h +++ b/trunk/arch/arm/include/asm/mach/time.h @@ -46,4 +46,12 @@ struct sys_timer { extern struct sys_timer *system_timer; extern void timer_tick(void); +/* + * Kernel time keeping support. + */ +struct timespec; +extern int (*set_rtc)(void); +extern void save_time_delta(struct timespec *delta, struct timespec *rtc); +extern void restore_time_delta(struct timespec *delta, struct timespec *rtc); + #endif diff --git a/trunk/arch/arm/include/asm/memory.h b/trunk/arch/arm/include/asm/memory.h index 4312ee5e3d0b..5421d82a2572 100644 --- a/trunk/arch/arm/include/asm/memory.h +++ b/trunk/arch/arm/include/asm/memory.h @@ -76,17 +76,6 @@ */ #define IOREMAP_MAX_ORDER 24 -/* - * Size of DMA-consistent memory region. Must be multiple of 2M, - * between 2MB and 14MB inclusive. - */ -#ifndef CONSISTENT_DMA_SIZE -#define CONSISTENT_DMA_SIZE SZ_2M -#endif - -#define CONSISTENT_END (0xffe00000UL) -#define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE) - #else /* CONFIG_MMU */ /* @@ -104,11 +93,11 @@ #endif #ifndef PHYS_OFFSET -#define PHYS_OFFSET UL(CONFIG_DRAM_BASE) +#define PHYS_OFFSET (CONFIG_DRAM_BASE) #endif #ifndef END_MEM -#define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE) +#define END_MEM (CONFIG_DRAM_BASE + CONFIG_DRAM_SIZE) #endif #ifndef PAGE_OFFSET @@ -123,6 +112,14 @@ #endif /* !CONFIG_MMU */ +/* + * Size of DMA-consistent memory region. Must be multiple of 2M, + * between 2MB and 14MB inclusive. + */ +#ifndef CONSISTENT_DMA_SIZE +#define CONSISTENT_DMA_SIZE SZ_2M +#endif + /* * Physical vs virtual RAM address space conversion. These are * private definitions which should NOT be used outside memory.h diff --git a/trunk/arch/arm/include/asm/mmu.h b/trunk/arch/arm/include/asm/mmu.h index 68870c776671..b561584d04a1 100644 --- a/trunk/arch/arm/include/asm/mmu.h +++ b/trunk/arch/arm/include/asm/mmu.h @@ -6,7 +6,6 @@ typedef struct { #ifdef CONFIG_CPU_HAS_ASID unsigned int id; - spinlock_t id_lock; #endif unsigned int kvm_seq; } mm_context_t; diff --git a/trunk/arch/arm/include/asm/mmu_context.h b/trunk/arch/arm/include/asm/mmu_context.h index a0b3cac0547c..de6cefb329dd 100644 --- a/trunk/arch/arm/include/asm/mmu_context.h +++ b/trunk/arch/arm/include/asm/mmu_context.h @@ -43,23 +43,12 @@ void __check_kvm_seq(struct mm_struct *mm); #define ASID_FIRST_VERSION (1 << ASID_BITS) extern unsigned int cpu_last_asid; -#ifdef CONFIG_SMP -DECLARE_PER_CPU(struct mm_struct *, current_mm); -#endif void __init_new_context(struct task_struct *tsk, struct mm_struct *mm); void __new_context(struct mm_struct *mm); static inline void check_context(struct mm_struct *mm) { - /* - * This code is executed with interrupts enabled. Therefore, - * mm->context.id cannot be updated to the latest ASID version - * on a different CPU (and condition below not triggered) - * without first getting an IPI to reset the context. The - * alternative is to take a read_lock on mm->context.id_lock - * (after changing its type to rwlock_t). - */ if (unlikely((mm->context.id ^ cpu_last_asid) >> ASID_BITS)) __new_context(mm); @@ -119,10 +108,6 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, __flush_icache_all(); #endif if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) { -#ifdef CONFIG_SMP - struct mm_struct **crt_mm = &per_cpu(current_mm, cpu); - *crt_mm = next; -#endif check_context(next); cpu_switch_mm(next->pgd, next); if (cache_is_vivt()) diff --git a/trunk/arch/arm/include/asm/page.h b/trunk/arch/arm/include/asm/page.h index a485ac3c8696..3a32af4cce30 100644 --- a/trunk/arch/arm/include/asm/page.h +++ b/trunk/arch/arm/include/asm/page.h @@ -117,12 +117,11 @@ #endif struct page; -struct vm_area_struct; struct cpu_user_fns { void (*cpu_clear_user_highpage)(struct page *page, unsigned long vaddr); void (*cpu_copy_user_highpage)(struct page *to, struct page *from, - unsigned long vaddr, struct vm_area_struct *vma); + unsigned long vaddr); }; #ifdef MULTI_USER @@ -138,7 +137,7 @@ extern struct cpu_user_fns cpu_user; extern void __cpu_clear_user_highpage(struct page *page, unsigned long vaddr); extern void __cpu_copy_user_highpage(struct page *to, struct page *from, - unsigned long vaddr, struct vm_area_struct *vma); + unsigned long vaddr); #endif #define clear_user_highpage(page,vaddr) \ @@ -146,7 +145,7 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from, #define __HAVE_ARCH_COPY_USER_HIGHPAGE #define copy_user_highpage(to,from,vaddr,vma) \ - __cpu_copy_user_highpage(to, from, vaddr, vma) + __cpu_copy_user_highpage(to, from, vaddr) #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) extern void copy_page(void *to, const void *from); diff --git a/trunk/arch/arm/include/asm/perf_event.h b/trunk/arch/arm/include/asm/perf_event.h deleted file mode 100644 index 49e3049aba32..000000000000 --- a/trunk/arch/arm/include/asm/perf_event.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * linux/arch/arm/include/asm/perf_event.h - * - * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __ARM_PERF_EVENT_H__ -#define __ARM_PERF_EVENT_H__ - -/* - * NOP: on *most* (read: all supported) ARM platforms, the performance - * counter interrupts are regular interrupts and not an NMI. This - * means that when we receive the interrupt we can call - * perf_event_do_pending() that handles all of the work with - * interrupts enabled. - */ -static inline void -set_perf_event_pending(void) -{ -} - -/* ARM performance counters start from 1 (in the cp15 accesses) so use the - * same indexes here for consistency. */ -#define PERF_EVENT_INDEX_OFFSET 1 - -#endif /* __ARM_PERF_EVENT_H__ */ diff --git a/trunk/arch/arm/include/asm/pgtable-nommu.h b/trunk/arch/arm/include/asm/pgtable-nommu.h index 013cfcdc4839..b011f2e939aa 100644 --- a/trunk/arch/arm/include/asm/pgtable-nommu.h +++ b/trunk/arch/arm/include/asm/pgtable-nommu.h @@ -86,8 +86,8 @@ extern unsigned int kobjsize(const void *objp); * All 32bit addresses are effectively valid for vmalloc... * Sort of meaningless for non-VM targets. */ -#define VMALLOC_START 0UL -#define VMALLOC_END 0xffffffffUL +#define VMALLOC_START 0 +#define VMALLOC_END 0xffffffff #define FIRST_USER_ADDRESS (0) diff --git a/trunk/arch/arm/include/asm/pmu.h b/trunk/arch/arm/include/asm/pmu.h deleted file mode 100644 index 2829b9f981a1..000000000000 --- a/trunk/arch/arm/include/asm/pmu.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * linux/arch/arm/include/asm/pmu.h - * - * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __ARM_PMU_H__ -#define __ARM_PMU_H__ - -#ifdef CONFIG_CPU_HAS_PMU - -struct pmu_irqs { - const int *irqs; - int num_irqs; -}; - -/** - * reserve_pmu() - reserve the hardware performance counters - * - * Reserve the hardware performance counters in the system for exclusive use. - * The 'struct pmu_irqs' for the system is returned on success, ERR_PTR() - * encoded error on failure. - */ -extern const struct pmu_irqs * -reserve_pmu(void); - -/** - * release_pmu() - Relinquish control of the performance counters - * - * Release the performance counters and allow someone else to use them. - * Callers must have disabled the counters and released IRQs before calling - * this. The 'struct pmu_irqs' returned from reserve_pmu() must be passed as - * a cookie. - */ -extern int -release_pmu(const struct pmu_irqs *irqs); - -/** - * init_pmu() - Initialise the PMU. - * - * Initialise the system ready for PMU enabling. This should typically set the - * IRQ affinity and nothing else. The users (oprofile/perf events etc) will do - * the actual hardware initialisation. - */ -extern int -init_pmu(void); - -#else /* CONFIG_CPU_HAS_PMU */ - -static inline const struct pmu_irqs * -reserve_pmu(void) -{ - return ERR_PTR(-ENODEV); -} - -static inline int -release_pmu(const struct pmu_irqs *irqs) -{ - return -ENODEV; -} - -static inline int -init_pmu(void) -{ - return -ENODEV; -} - -#endif /* CONFIG_CPU_HAS_PMU */ - -#endif /* __ARM_PMU_H__ */ diff --git a/trunk/arch/arm/include/asm/proc-fns.h b/trunk/arch/arm/include/asm/proc-fns.h index 8fdae9bc9abb..3976412685f8 100644 --- a/trunk/arch/arm/include/asm/proc-fns.h +++ b/trunk/arch/arm/include/asm/proc-fns.h @@ -24,228 +24,206 @@ * CPU_NAME - the prefix for CPU related functions */ -#ifdef CONFIG_CPU_ARM610 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm6 +#ifdef CONFIG_CPU_32 +# ifdef CONFIG_CPU_ARM610 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm6 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM7TDMI -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm7tdmi +# ifdef CONFIG_CPU_ARM7TDMI +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm7tdmi +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM710 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm7 +# ifdef CONFIG_CPU_ARM710 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm7 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM720T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm720 +# ifdef CONFIG_CPU_ARM720T +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm720 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM740T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm740 +# ifdef CONFIG_CPU_ARM740T +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm740 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM9TDMI -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm9tdmi +# ifdef CONFIG_CPU_ARM9TDMI +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm9tdmi +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM920T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm920 +# ifdef CONFIG_CPU_ARM920T +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm920 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM922T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm922 +# ifdef CONFIG_CPU_ARM922T +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm922 +# endif # endif -#endif - -#ifdef CONFIG_CPU_FA526 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_fa526 +# ifdef CONFIG_CPU_FA526 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_fa526 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM925T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm925 +# ifdef CONFIG_CPU_ARM925T +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm925 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM926T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm926 +# ifdef CONFIG_CPU_ARM926T +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm926 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM940T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm940 +# ifdef CONFIG_CPU_ARM940T +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm940 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM946E -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm946 +# ifdef CONFIG_CPU_ARM946E +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm946 +# endif # endif -#endif - -#ifdef CONFIG_CPU_SA110 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_sa110 +# ifdef CONFIG_CPU_SA110 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_sa110 +# endif # endif -#endif - -#ifdef CONFIG_CPU_SA1100 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_sa1100 +# ifdef CONFIG_CPU_SA1100 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_sa1100 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM1020 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm1020 +# ifdef CONFIG_CPU_ARM1020 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm1020 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM1020E -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm1020e +# ifdef CONFIG_CPU_ARM1020E +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm1020e +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM1022 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm1022 +# ifdef CONFIG_CPU_ARM1022 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm1022 +# endif # endif -#endif - -#ifdef CONFIG_CPU_ARM1026 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm1026 +# ifdef CONFIG_CPU_ARM1026 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm1026 +# endif # endif -#endif - -#ifdef CONFIG_CPU_XSCALE -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_xscale +# ifdef CONFIG_CPU_XSCALE +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_xscale +# endif # endif -#endif - -#ifdef CONFIG_CPU_XSC3 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_xsc3 +# ifdef CONFIG_CPU_XSC3 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_xsc3 +# endif # endif -#endif - -#ifdef CONFIG_CPU_MOHAWK -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_mohawk +# ifdef CONFIG_CPU_MOHAWK +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_mohawk +# endif # endif -#endif - -#ifdef CONFIG_CPU_FEROCEON -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_feroceon +# ifdef CONFIG_CPU_FEROCEON +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_feroceon +# endif # endif -#endif - -#ifdef CONFIG_CPU_V6 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_v6 +# ifdef CONFIG_CPU_V6 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_v6 +# endif # endif -#endif - -#ifdef CONFIG_CPU_V7 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_v7 +# ifdef CONFIG_CPU_V7 +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_v7 +# endif # endif #endif diff --git a/trunk/arch/arm/include/asm/ptrace.h b/trunk/arch/arm/include/asm/ptrace.h index eec6e897ceb2..bbecccda76d0 100644 --- a/trunk/arch/arm/include/asm/ptrace.h +++ b/trunk/arch/arm/include/asm/ptrace.h @@ -97,15 +97,9 @@ * stack during a system call. Note that sizeof(struct pt_regs) * has to be a multiple of 8. */ -#ifndef __KERNEL__ struct pt_regs { long uregs[18]; }; -#else /* __KERNEL__ */ -struct pt_regs { - unsigned long uregs[18]; -}; -#endif /* __KERNEL__ */ #define ARM_cpsr uregs[16] #define ARM_pc uregs[15] diff --git a/trunk/arch/arm/include/asm/setup.h b/trunk/arch/arm/include/asm/setup.h index f392fb4437af..5ccce0a9b03c 100644 --- a/trunk/arch/arm/include/asm/setup.h +++ b/trunk/arch/arm/include/asm/setup.h @@ -223,6 +223,18 @@ extern struct meminfo meminfo; #define bank_phys_end(bank) ((bank)->start + (bank)->size) #define bank_phys_size(bank) (bank)->size +/* + * Early command line parameters. + */ +struct early_params { + const char *arg; + void (*fn)(char **p); +}; + +#define __early_param(name,fn) \ +static struct early_params __early_##fn __used \ +__attribute__((__section__(".early_param.init"))) = { name, fn } + #endif /* __KERNEL__ */ #endif diff --git a/trunk/arch/arm/include/asm/smp_plat.h b/trunk/arch/arm/include/asm/smp_plat.h index e6215305544a..59303e200845 100644 --- a/trunk/arch/arm/include/asm/smp_plat.h +++ b/trunk/arch/arm/include/asm/smp_plat.h @@ -13,9 +13,4 @@ static inline int tlb_ops_need_broadcast(void) return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; } -static inline int cache_ops_need_broadcast(void) -{ - return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; -} - #endif diff --git a/trunk/arch/arm/include/asm/spinlock.h b/trunk/arch/arm/include/asm/spinlock.h index 17eb355707dd..c91c64cab922 100644 --- a/trunk/arch/arm/include/asm/spinlock.h +++ b/trunk/arch/arm/include/asm/spinlock.h @@ -5,22 +5,6 @@ #error SMP not supported on pre-ARMv6 CPUs #endif -static inline void dsb_sev(void) -{ -#if __LINUX_ARM_ARCH__ >= 7 - __asm__ __volatile__ ( - "dsb\n" - "sev" - ); -#elif defined(CONFIG_CPU_32v6K) - __asm__ __volatile__ ( - "mcr p15, 0, %0, c7, c10, 4\n" - "sev" - : : "r" (0) - ); -#endif -} - /* * ARMv6 Spin-locking. * @@ -85,11 +69,13 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) __asm__ __volatile__( " str %1, [%0]\n" +#ifdef CONFIG_CPU_32v6K +" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */ +" sev" +#endif : : "r" (&lock->lock), "r" (0) : "cc"); - - dsb_sev(); } /* @@ -146,11 +132,13 @@ static inline void arch_write_unlock(arch_rwlock_t *rw) __asm__ __volatile__( "str %1, [%0]\n" +#ifdef CONFIG_CPU_32v6K +" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */ +" sev\n" +#endif : : "r" (&rw->lock), "r" (0) : "cc"); - - dsb_sev(); } /* write_can_lock - would write_trylock() succeed? */ @@ -200,12 +188,14 @@ static inline void arch_read_unlock(arch_rwlock_t *rw) " strex %1, %0, [%2]\n" " teq %1, #0\n" " bne 1b" +#ifdef CONFIG_CPU_32v6K +"\n cmp %0, #0\n" +" mcreq p15, 0, %0, c7, c10, 4\n" +" seveq" +#endif : "=&r" (tmp), "=&r" (tmp2) : "r" (&rw->lock) : "cc"); - - if (tmp == 0) - dsb_sev(); } static inline int arch_read_trylock(arch_rwlock_t *rw) diff --git a/trunk/arch/arm/include/asm/system.h b/trunk/arch/arm/include/asm/system.h index ca88e6a84707..058e7e90881d 100644 --- a/trunk/arch/arm/include/asm/system.h +++ b/trunk/arch/arm/include/asm/system.h @@ -73,7 +73,8 @@ extern unsigned int mem_fclk_21285; struct pt_regs; -void die(const char *msg, struct pt_regs *regs, int err); +void die(const char *msg, struct pt_regs *regs, int err) + __attribute__((noreturn)); struct siginfo; void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info, diff --git a/trunk/arch/arm/include/asm/thread_info.h b/trunk/arch/arm/include/asm/thread_info.h index b74970ec02c4..2dfb7d7a66e9 100644 --- a/trunk/arch/arm/include/asm/thread_info.h +++ b/trunk/arch/arm/include/asm/thread_info.h @@ -115,8 +115,7 @@ extern void iwmmxt_task_restore(struct thread_info *, void *); extern void iwmmxt_task_release(struct thread_info *); extern void iwmmxt_task_switch(struct thread_info *); -extern void vfp_sync_hwstate(struct thread_info *); -extern void vfp_flush_hwstate(struct thread_info *); +extern void vfp_sync_state(struct thread_info *thread); #endif diff --git a/trunk/arch/arm/include/asm/thread_notify.h b/trunk/arch/arm/include/asm/thread_notify.h index c4391ba20350..f27379d7f72a 100644 --- a/trunk/arch/arm/include/asm/thread_notify.h +++ b/trunk/arch/arm/include/asm/thread_notify.h @@ -41,7 +41,7 @@ static inline void thread_notify(unsigned long rc, struct thread_info *thread) * These are the reason codes for the thread notifier. */ #define THREAD_NOTIFY_FLUSH 0 -#define THREAD_NOTIFY_EXIT 1 +#define THREAD_NOTIFY_RELEASE 1 #define THREAD_NOTIFY_SWITCH 2 #endif diff --git a/trunk/arch/arm/include/asm/tlbflush.h b/trunk/arch/arm/include/asm/tlbflush.h index e085e2c545eb..c2f1605de359 100644 --- a/trunk/arch/arm/include/asm/tlbflush.h +++ b/trunk/arch/arm/include/asm/tlbflush.h @@ -529,8 +529,7 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); * cache entries for the kernels virtual memory range are written * back to the page. */ -extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, - pte_t *ptep); +extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte); #endif diff --git a/trunk/arch/arm/include/asm/unistd.h b/trunk/arch/arm/include/asm/unistd.h index cf9cdaa2d4d4..4e506d09e5f9 100644 --- a/trunk/arch/arm/include/asm/unistd.h +++ b/trunk/arch/arm/include/asm/unistd.h @@ -391,7 +391,6 @@ #define __NR_pwritev (__NR_SYSCALL_BASE+362) #define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363) #define __NR_perf_event_open (__NR_SYSCALL_BASE+364) -#define __NR_recvmmsg (__NR_SYSCALL_BASE+365) /* * The following SWIs are ARM private. diff --git a/trunk/arch/arm/kernel/Makefile b/trunk/arch/arm/kernel/Makefile index 26d302c28e13..dd00f747e2ad 100644 --- a/trunk/arch/arm/kernel/Makefile +++ b/trunk/arch/arm/kernel/Makefile @@ -17,7 +17,6 @@ obj-y := compat.o elf.o entry-armv.o entry-common.o irq.o \ process.o ptrace.o return_address.o setup.o signal.o \ sys_arm.o stacktrace.o time.o traps.o -obj-$(CONFIG_LEDS) += leds.o obj-$(CONFIG_OC_ETM) += etm.o obj-$(CONFIG_ISA_DMA_API) += dma.o @@ -47,8 +46,6 @@ obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o obj-$(CONFIG_IWMMXT) += iwmmxt.o -obj-$(CONFIG_CPU_HAS_PMU) += pmu.o -obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt ifneq ($(CONFIG_ARCH_EBSA110),y) diff --git a/trunk/arch/arm/kernel/asm-offsets.c b/trunk/arch/arm/kernel/asm-offsets.c index 883511522fca..4a881258bb17 100644 --- a/trunk/arch/arm/kernel/asm-offsets.c +++ b/trunk/arch/arm/kernel/asm-offsets.c @@ -12,7 +12,6 @@ */ #include #include -#include #include #include #include @@ -113,9 +112,5 @@ int main(void) #ifdef MULTI_PABORT DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort)); #endif - BLANK(); - DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); - DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); - DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE); return 0; } diff --git a/trunk/arch/arm/kernel/bios32.c b/trunk/arch/arm/kernel/bios32.c index bd397e0b663e..809681900ec8 100644 --- a/trunk/arch/arm/kernel/bios32.c +++ b/trunk/arch/arm/kernel/bios32.c @@ -616,17 +616,15 @@ char * __init pcibios_setup(char *str) * but we want to try to avoid allocating at 0x2900-0x2bff * which might be mirrored at 0x0100-0x03ff.. */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) +void pcibios_align_resource(void *data, struct resource *res, + resource_size_t size, resource_size_t align) { resource_size_t start = res->start; if (res->flags & IORESOURCE_IO && start & 0x300) start = (start + 0x3ff) & ~0x3ff; - start = (start + align - 1) & ~(align - 1); - - return start; + res->start = (start + align - 1) & ~(align - 1); } /** diff --git a/trunk/arch/arm/kernel/crunch.c b/trunk/arch/arm/kernel/crunch.c index 25ef223ba7f3..769abe15cf91 100644 --- a/trunk/arch/arm/kernel/crunch.c +++ b/trunk/arch/arm/kernel/crunch.c @@ -51,7 +51,7 @@ static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t) * initialised state information on the first fault. */ - case THREAD_NOTIFY_EXIT: + case THREAD_NOTIFY_RELEASE: crunch_task_release(thread); break; diff --git a/trunk/arch/arm/kernel/debug.S b/trunk/arch/arm/kernel/debug.S index a38b4879441d..b121b6053cce 100644 --- a/trunk/arch/arm/kernel/debug.S +++ b/trunk/arch/arm/kernel/debug.S @@ -24,7 +24,7 @@ #if defined(CONFIG_CPU_V6) - .macro addruart, rx, tmp + .macro addruart, rx .endm .macro senduart, rd, rx @@ -49,29 +49,9 @@ 1002: .endm -#elif defined(CONFIG_CPU_V7) - - .macro addruart, rx, tmp - .endm - - .macro senduart, rd, rx - mcr p14, 0, \rd, c0, c5, 0 - .endm - - .macro busyuart, rd, rx -busy: mrc p14, 0, pc, c0, c1, 0 - bcs busy - .endm - - .macro waituart, rd, rx -wait: mrc p14, 0, pc, c0, c1, 0 - bcs wait - - .endm - #elif defined(CONFIG_CPU_XSCALE) - .macro addruart, rx, tmp + .macro addruart, rx .endm .macro senduart, rd, rx @@ -98,7 +78,7 @@ wait: mrc p14, 0, pc, c0, c1, 0 #else - .macro addruart, rx, tmp + .macro addruart, rx .endm .macro senduart, rd, rx @@ -164,7 +144,7 @@ ENDPROC(printhex2) .ltorg ENTRY(printascii) - addruart r3, r1 + addruart r3 b 2f 1: waituart r2, r3 senduart r1, r3 @@ -180,7 +160,7 @@ ENTRY(printascii) ENDPROC(printascii) ENTRY(printch) - addruart r3, r1 + addruart r3 mov r1, r0 mov r0, #0 b 1b diff --git a/trunk/arch/arm/kernel/dma-isa.c b/trunk/arch/arm/kernel/dma-isa.c index 360bb6d701f5..0e88e46fc732 100644 --- a/trunk/arch/arm/kernel/dma-isa.c +++ b/trunk/arch/arm/kernel/dma-isa.c @@ -207,6 +207,8 @@ void __init isa_init_dma(void) outb(0x32, 0x4d6); outb(0x33, 0x4d6); + request_dma(DMA_ISA_CASCADE, "cascade"); + for (i = 0; i < ARRAY_SIZE(dma_resources); i++) request_resource(&ioport_resource, dma_resources + i); @@ -216,7 +218,5 @@ void __init isa_init_dma(void) printk(KERN_ERR "ISADMA%u: unable to register: %d\n", chan, ret); } - - request_dma(DMA_ISA_CASCADE, "cascade"); } } diff --git a/trunk/arch/arm/kernel/elf.c b/trunk/arch/arm/kernel/elf.c index d4a0da1e48f4..950391f194c4 100644 --- a/trunk/arch/arm/kernel/elf.c +++ b/trunk/arch/arm/kernel/elf.c @@ -78,6 +78,15 @@ int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack) return 1; if (cpu_architecture() < CPU_ARCH_ARMv6) return 1; +#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT) + /* + * If we have support for OABI programs, we can never allow NX + * support - our signal syscall restart mechanism relies upon + * being able to execute code placed on the user stack. + */ + return 1; +#else return 0; +#endif } EXPORT_SYMBOL(arm_elf_read_implies_exec); diff --git a/trunk/arch/arm/kernel/entry-armv.S b/trunk/arch/arm/kernel/entry-armv.S index 6c5cf369183b..d2903e3bc861 100644 --- a/trunk/arch/arm/kernel/entry-armv.S +++ b/trunk/arch/arm/kernel/entry-armv.S @@ -957,7 +957,9 @@ kuser_cmpxchg_fixup: #else - smp_dmb +#ifdef CONFIG_SMP + mcr p15, 0, r0, c7, c10, 5 @ dmb +#endif 1: ldrex r3, [r2] subs r3, r3, r0 strexeq r3, r1, [r2] diff --git a/trunk/arch/arm/kernel/leds.c b/trunk/arch/arm/kernel/leds.c deleted file mode 100644 index 31a316c1777b..000000000000 --- a/trunk/arch/arm/kernel/leds.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * LED support code, ripped out of arch/arm/kernel/time.c - * - * Copyright (C) 1994-2001 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include - -#include - -static void dummy_leds_event(led_event_t evt) -{ -} - -void (*leds_event)(led_event_t) = dummy_leds_event; - -struct leds_evt_name { - const char name[8]; - int on; - int off; -}; - -static const struct leds_evt_name evt_names[] = { - { "amber", led_amber_on, led_amber_off }, - { "blue", led_blue_on, led_blue_off }, - { "green", led_green_on, led_green_off }, - { "red", led_red_on, led_red_off }, -}; - -static ssize_t leds_store(struct sys_device *dev, - struct sysdev_attribute *attr, - const char *buf, size_t size) -{ - int ret = -EINVAL, len = strcspn(buf, " "); - - if (len > 0 && buf[len] == '\0') - len--; - - if (strncmp(buf, "claim", len) == 0) { - leds_event(led_claim); - ret = size; - } else if (strncmp(buf, "release", len) == 0) { - leds_event(led_release); - ret = size; - } else { - int i; - - for (i = 0; i < ARRAY_SIZE(evt_names); i++) { - if (strlen(evt_names[i].name) != len || - strncmp(buf, evt_names[i].name, len) != 0) - continue; - if (strncmp(buf+len, " on", 3) == 0) { - leds_event(evt_names[i].on); - ret = size; - } else if (strncmp(buf+len, " off", 4) == 0) { - leds_event(evt_names[i].off); - ret = size; - } - break; - } - } - return ret; -} - -static SYSDEV_ATTR(event, 0200, NULL, leds_store); - -static int leds_suspend(struct sys_device *dev, pm_message_t state) -{ - leds_event(led_stop); - return 0; -} - -static int leds_resume(struct sys_device *dev) -{ - leds_event(led_start); - return 0; -} - -static int leds_shutdown(struct sys_device *dev) -{ - leds_event(led_halted); - return 0; -} - -static struct sysdev_class leds_sysclass = { - .name = "leds", - .shutdown = leds_shutdown, - .suspend = leds_suspend, - .resume = leds_resume, -}; - -static struct sys_device leds_device = { - .id = 0, - .cls = &leds_sysclass, -}; - -static int __init leds_init(void) -{ - int ret; - ret = sysdev_class_register(&leds_sysclass); - if (ret == 0) - ret = sysdev_register(&leds_device); - if (ret == 0) - ret = sysdev_create_file(&leds_device, &attr_event); - return ret; -} - -device_initcall(leds_init); - -EXPORT_SYMBOL(leds_event); diff --git a/trunk/arch/arm/kernel/perf_event.c b/trunk/arch/arm/kernel/perf_event.c deleted file mode 100644 index c54ceb3d1f97..000000000000 --- a/trunk/arch/arm/kernel/perf_event.c +++ /dev/null @@ -1,2276 +0,0 @@ -#undef DEBUG - -/* - * ARM performance counter support. - * - * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles - * - * ARMv7 support: Jean Pihet - * 2010 (c) MontaVista Software, LLC. - * - * This code is based on the sparc64 perf event code, which is in turn based - * on the x86 code. Callchain code is based on the ARM OProfile backtrace - * code. - */ -#define pr_fmt(fmt) "hw perfevents: " fmt - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -static const struct pmu_irqs *pmu_irqs; - -/* - * Hardware lock to serialize accesses to PMU registers. Needed for the - * read/modify/write sequences. - */ -DEFINE_SPINLOCK(pmu_lock); - -/* - * ARMv6 supports a maximum of 3 events, starting from index 1. If we add - * another platform that supports more, we need to increase this to be the - * largest of all platforms. - * - * ARMv7 supports up to 32 events: - * cycle counter CCNT + 31 events counters CNT0..30. - * Cortex-A8 has 1+4 counters, Cortex-A9 has 1+6 counters. - */ -#define ARMPMU_MAX_HWEVENTS 33 - -/* The events for a given CPU. */ -struct cpu_hw_events { - /* - * The events that are active on the CPU for the given index. Index 0 - * is reserved. - */ - struct perf_event *events[ARMPMU_MAX_HWEVENTS]; - - /* - * A 1 bit for an index indicates that the counter is being used for - * an event. A 0 means that the counter can be used. - */ - unsigned long used_mask[BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)]; - - /* - * A 1 bit for an index indicates that the counter is actively being - * used. - */ - unsigned long active_mask[BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)]; -}; -DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events); - -struct arm_pmu { - char *name; - irqreturn_t (*handle_irq)(int irq_num, void *dev); - void (*enable)(struct hw_perf_event *evt, int idx); - void (*disable)(struct hw_perf_event *evt, int idx); - int (*event_map)(int evt); - u64 (*raw_event)(u64); - int (*get_event_idx)(struct cpu_hw_events *cpuc, - struct hw_perf_event *hwc); - u32 (*read_counter)(int idx); - void (*write_counter)(int idx, u32 val); - void (*start)(void); - void (*stop)(void); - int num_events; - u64 max_period; -}; - -/* Set at runtime when we know what CPU type we are. */ -static const struct arm_pmu *armpmu; - -#define HW_OP_UNSUPPORTED 0xFFFF - -#define C(_x) \ - PERF_COUNT_HW_CACHE_##_x - -#define CACHE_OP_UNSUPPORTED 0xFFFF - -static unsigned armpmu_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] - [PERF_COUNT_HW_CACHE_OP_MAX] - [PERF_COUNT_HW_CACHE_RESULT_MAX]; - -static int -armpmu_map_cache_event(u64 config) -{ - unsigned int cache_type, cache_op, cache_result, ret; - - cache_type = (config >> 0) & 0xff; - if (cache_type >= PERF_COUNT_HW_CACHE_MAX) - return -EINVAL; - - cache_op = (config >> 8) & 0xff; - if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) - return -EINVAL; - - cache_result = (config >> 16) & 0xff; - if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX) - return -EINVAL; - - ret = (int)armpmu_perf_cache_map[cache_type][cache_op][cache_result]; - - if (ret == CACHE_OP_UNSUPPORTED) - return -ENOENT; - - return ret; -} - -static int -armpmu_event_set_period(struct perf_event *event, - struct hw_perf_event *hwc, - int idx) -{ - s64 left = atomic64_read(&hwc->period_left); - s64 period = hwc->sample_period; - int ret = 0; - - if (unlikely(left <= -period)) { - left = period; - atomic64_set(&hwc->period_left, left); - hwc->last_period = period; - ret = 1; - } - - if (unlikely(left <= 0)) { - left += period; - atomic64_set(&hwc->period_left, left); - hwc->last_period = period; - ret = 1; - } - - if (left > (s64)armpmu->max_period) - left = armpmu->max_period; - - atomic64_set(&hwc->prev_count, (u64)-left); - - armpmu->write_counter(idx, (u64)(-left) & 0xffffffff); - - perf_event_update_userpage(event); - - return ret; -} - -static u64 -armpmu_event_update(struct perf_event *event, - struct hw_perf_event *hwc, - int idx) -{ - int shift = 64 - 32; - s64 prev_raw_count, new_raw_count; - s64 delta; - -again: - prev_raw_count = atomic64_read(&hwc->prev_count); - new_raw_count = armpmu->read_counter(idx); - - if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count, - new_raw_count) != prev_raw_count) - goto again; - - delta = (new_raw_count << shift) - (prev_raw_count << shift); - delta >>= shift; - - atomic64_add(delta, &event->count); - atomic64_sub(delta, &hwc->period_left); - - return new_raw_count; -} - -static void -armpmu_disable(struct perf_event *event) -{ - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - struct hw_perf_event *hwc = &event->hw; - int idx = hwc->idx; - - WARN_ON(idx < 0); - - clear_bit(idx, cpuc->active_mask); - armpmu->disable(hwc, idx); - - barrier(); - - armpmu_event_update(event, hwc, idx); - cpuc->events[idx] = NULL; - clear_bit(idx, cpuc->used_mask); - - perf_event_update_userpage(event); -} - -static void -armpmu_read(struct perf_event *event) -{ - struct hw_perf_event *hwc = &event->hw; - - /* Don't read disabled counters! */ - if (hwc->idx < 0) - return; - - armpmu_event_update(event, hwc, hwc->idx); -} - -static void -armpmu_unthrottle(struct perf_event *event) -{ - struct hw_perf_event *hwc = &event->hw; - - /* - * Set the period again. Some counters can't be stopped, so when we - * were throttled we simply disabled the IRQ source and the counter - * may have been left counting. If we don't do this step then we may - * get an interrupt too soon or *way* too late if the overflow has - * happened since disabling. - */ - armpmu_event_set_period(event, hwc, hwc->idx); - armpmu->enable(hwc, hwc->idx); -} - -static int -armpmu_enable(struct perf_event *event) -{ - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - struct hw_perf_event *hwc = &event->hw; - int idx; - int err = 0; - - /* If we don't have a space for the counter then finish early. */ - idx = armpmu->get_event_idx(cpuc, hwc); - if (idx < 0) { - err = idx; - goto out; - } - - /* - * If there is an event in the counter we are going to use then make - * sure it is disabled. - */ - event->hw.idx = idx; - armpmu->disable(hwc, idx); - cpuc->events[idx] = event; - set_bit(idx, cpuc->active_mask); - - /* Set the period for the event. */ - armpmu_event_set_period(event, hwc, idx); - - /* Enable the event. */ - armpmu->enable(hwc, idx); - - /* Propagate our changes to the userspace mapping. */ - perf_event_update_userpage(event); - -out: - return err; -} - -static struct pmu pmu = { - .enable = armpmu_enable, - .disable = armpmu_disable, - .unthrottle = armpmu_unthrottle, - .read = armpmu_read, -}; - -static int -validate_event(struct cpu_hw_events *cpuc, - struct perf_event *event) -{ - struct hw_perf_event fake_event = event->hw; - - if (event->pmu && event->pmu != &pmu) - return 0; - - return armpmu->get_event_idx(cpuc, &fake_event) >= 0; -} - -static int -validate_group(struct perf_event *event) -{ - struct perf_event *sibling, *leader = event->group_leader; - struct cpu_hw_events fake_pmu; - - memset(&fake_pmu, 0, sizeof(fake_pmu)); - - if (!validate_event(&fake_pmu, leader)) - return -ENOSPC; - - list_for_each_entry(sibling, &leader->sibling_list, group_entry) { - if (!validate_event(&fake_pmu, sibling)) - return -ENOSPC; - } - - if (!validate_event(&fake_pmu, event)) - return -ENOSPC; - - return 0; -} - -static int -armpmu_reserve_hardware(void) -{ - int i; - int err; - - pmu_irqs = reserve_pmu(); - if (IS_ERR(pmu_irqs)) { - pr_warning("unable to reserve pmu\n"); - return PTR_ERR(pmu_irqs); - } - - init_pmu(); - - if (pmu_irqs->num_irqs < 1) { - pr_err("no irqs for PMUs defined\n"); - return -ENODEV; - } - - for (i = 0; i < pmu_irqs->num_irqs; ++i) { - err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq, - IRQF_DISABLED, "armpmu", NULL); - if (err) { - pr_warning("unable to request IRQ%d for ARM " - "perf counters\n", pmu_irqs->irqs[i]); - break; - } - } - - if (err) { - for (i = i - 1; i >= 0; --i) - free_irq(pmu_irqs->irqs[i], NULL); - release_pmu(pmu_irqs); - pmu_irqs = NULL; - } - - return err; -} - -static void -armpmu_release_hardware(void) -{ - int i; - - for (i = pmu_irqs->num_irqs - 1; i >= 0; --i) - free_irq(pmu_irqs->irqs[i], NULL); - armpmu->stop(); - - release_pmu(pmu_irqs); - pmu_irqs = NULL; -} - -static atomic_t active_events = ATOMIC_INIT(0); -static DEFINE_MUTEX(pmu_reserve_mutex); - -static void -hw_perf_event_destroy(struct perf_event *event) -{ - if (atomic_dec_and_mutex_lock(&active_events, &pmu_reserve_mutex)) { - armpmu_release_hardware(); - mutex_unlock(&pmu_reserve_mutex); - } -} - -static int -__hw_perf_event_init(struct perf_event *event) -{ - struct hw_perf_event *hwc = &event->hw; - int mapping, err; - - /* Decode the generic type into an ARM event identifier. */ - if (PERF_TYPE_HARDWARE == event->attr.type) { - mapping = armpmu->event_map(event->attr.config); - } else if (PERF_TYPE_HW_CACHE == event->attr.type) { - mapping = armpmu_map_cache_event(event->attr.config); - } else if (PERF_TYPE_RAW == event->attr.type) { - mapping = armpmu->raw_event(event->attr.config); - } else { - pr_debug("event type %x not supported\n", event->attr.type); - return -EOPNOTSUPP; - } - - if (mapping < 0) { - pr_debug("event %x:%llx not supported\n", event->attr.type, - event->attr.config); - return mapping; - } - - /* - * Check whether we need to exclude the counter from certain modes. - * The ARM performance counters are on all of the time so if someone - * has asked us for some excludes then we have to fail. - */ - if (event->attr.exclude_kernel || event->attr.exclude_user || - event->attr.exclude_hv || event->attr.exclude_idle) { - pr_debug("ARM performance counters do not support " - "mode exclusion\n"); - return -EPERM; - } - - /* - * We don't assign an index until we actually place the event onto - * hardware. Use -1 to signify that we haven't decided where to put it - * yet. For SMP systems, each core has it's own PMU so we can't do any - * clever allocation or constraints checking at this point. - */ - hwc->idx = -1; - - /* - * Store the event encoding into the config_base field. config and - * event_base are unused as the only 2 things we need to know are - * the event mapping and the counter to use. The counter to use is - * also the indx and the config_base is the event type. - */ - hwc->config_base = (unsigned long)mapping; - hwc->config = 0; - hwc->event_base = 0; - - if (!hwc->sample_period) { - hwc->sample_period = armpmu->max_period; - hwc->last_period = hwc->sample_period; - atomic64_set(&hwc->period_left, hwc->sample_period); - } - - err = 0; - if (event->group_leader != event) { - err = validate_group(event); - if (err) - return -EINVAL; - } - - return err; -} - -const struct pmu * -hw_perf_event_init(struct perf_event *event) -{ - int err = 0; - - if (!armpmu) - return ERR_PTR(-ENODEV); - - event->destroy = hw_perf_event_destroy; - - if (!atomic_inc_not_zero(&active_events)) { - if (atomic_read(&active_events) > perf_max_events) { - atomic_dec(&active_events); - return ERR_PTR(-ENOSPC); - } - - mutex_lock(&pmu_reserve_mutex); - if (atomic_read(&active_events) == 0) { - err = armpmu_reserve_hardware(); - } - - if (!err) - atomic_inc(&active_events); - mutex_unlock(&pmu_reserve_mutex); - } - - if (err) - return ERR_PTR(err); - - err = __hw_perf_event_init(event); - if (err) - hw_perf_event_destroy(event); - - return err ? ERR_PTR(err) : &pmu; -} - -void -hw_perf_enable(void) -{ - /* Enable all of the perf events on hardware. */ - int idx; - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - - if (!armpmu) - return; - - for (idx = 0; idx <= armpmu->num_events; ++idx) { - struct perf_event *event = cpuc->events[idx]; - - if (!event) - continue; - - armpmu->enable(&event->hw, idx); - } - - armpmu->start(); -} - -void -hw_perf_disable(void) -{ - if (armpmu) - armpmu->stop(); -} - -/* - * ARMv6 Performance counter handling code. - * - * ARMv6 has 2 configurable performance counters and a single cycle counter. - * They all share a single reset bit but can be written to zero so we can use - * that for a reset. - * - * The counters can't be individually enabled or disabled so when we remove - * one event and replace it with another we could get spurious counts from the - * wrong event. However, we can take advantage of the fact that the - * performance counters can export events to the event bus, and the event bus - * itself can be monitored. This requires that we *don't* export the events to - * the event bus. The procedure for disabling a configurable counter is: - * - change the counter to count the ETMEXTOUT[0] signal (0x20). This - * effectively stops the counter from counting. - * - disable the counter's interrupt generation (each counter has it's - * own interrupt enable bit). - * Once stopped, the counter value can be written as 0 to reset. - * - * To enable a counter: - * - enable the counter's interrupt generation. - * - set the new event type. - * - * Note: the dedicated cycle counter only counts cycles and can't be - * enabled/disabled independently of the others. When we want to disable the - * cycle counter, we have to just disable the interrupt reporting and start - * ignoring that counter. When re-enabling, we have to reset the value and - * enable the interrupt. - */ - -enum armv6_perf_types { - ARMV6_PERFCTR_ICACHE_MISS = 0x0, - ARMV6_PERFCTR_IBUF_STALL = 0x1, - ARMV6_PERFCTR_DDEP_STALL = 0x2, - ARMV6_PERFCTR_ITLB_MISS = 0x3, - ARMV6_PERFCTR_DTLB_MISS = 0x4, - ARMV6_PERFCTR_BR_EXEC = 0x5, - ARMV6_PERFCTR_BR_MISPREDICT = 0x6, - ARMV6_PERFCTR_INSTR_EXEC = 0x7, - ARMV6_PERFCTR_DCACHE_HIT = 0x9, - ARMV6_PERFCTR_DCACHE_ACCESS = 0xA, - ARMV6_PERFCTR_DCACHE_MISS = 0xB, - ARMV6_PERFCTR_DCACHE_WBACK = 0xC, - ARMV6_PERFCTR_SW_PC_CHANGE = 0xD, - ARMV6_PERFCTR_MAIN_TLB_MISS = 0xF, - ARMV6_PERFCTR_EXPL_D_ACCESS = 0x10, - ARMV6_PERFCTR_LSU_FULL_STALL = 0x11, - ARMV6_PERFCTR_WBUF_DRAINED = 0x12, - ARMV6_PERFCTR_CPU_CYCLES = 0xFF, - ARMV6_PERFCTR_NOP = 0x20, -}; - -enum armv6_counters { - ARMV6_CYCLE_COUNTER = 1, - ARMV6_COUNTER0, - ARMV6_COUNTER1, -}; - -/* - * The hardware events that we support. We do support cache operations but - * we have harvard caches and no way to combine instruction and data - * accesses/misses in hardware. - */ -static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC, - [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT, - [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, -}; - -static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] - [PERF_COUNT_HW_CACHE_OP_MAX] - [PERF_COUNT_HW_CACHE_RESULT_MAX] = { - [C(L1D)] = { - /* - * The performance counters don't differentiate between read - * and write accesses/misses so this isn't strictly correct, - * but it's the best we can do. Writes and reads get - * combined. - */ - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV6_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV6_PERFCTR_DCACHE_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV6_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV6_PERFCTR_DCACHE_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(L1I)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(LL)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(DTLB)] = { - /* - * The ARM performance counters can count micro DTLB misses, - * micro ITLB misses and main TLB misses. There isn't an event - * for TLB misses, so use the micro misses here and if users - * want the main TLB misses they can use a raw counter. - */ - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6_PERFCTR_DTLB_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6_PERFCTR_DTLB_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(ITLB)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6_PERFCTR_ITLB_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6_PERFCTR_ITLB_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(BPU)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, -}; - -enum armv6mpcore_perf_types { - ARMV6MPCORE_PERFCTR_ICACHE_MISS = 0x0, - ARMV6MPCORE_PERFCTR_IBUF_STALL = 0x1, - ARMV6MPCORE_PERFCTR_DDEP_STALL = 0x2, - ARMV6MPCORE_PERFCTR_ITLB_MISS = 0x3, - ARMV6MPCORE_PERFCTR_DTLB_MISS = 0x4, - ARMV6MPCORE_PERFCTR_BR_EXEC = 0x5, - ARMV6MPCORE_PERFCTR_BR_NOTPREDICT = 0x6, - ARMV6MPCORE_PERFCTR_BR_MISPREDICT = 0x7, - ARMV6MPCORE_PERFCTR_INSTR_EXEC = 0x8, - ARMV6MPCORE_PERFCTR_DCACHE_RDACCESS = 0xA, - ARMV6MPCORE_PERFCTR_DCACHE_RDMISS = 0xB, - ARMV6MPCORE_PERFCTR_DCACHE_WRACCESS = 0xC, - ARMV6MPCORE_PERFCTR_DCACHE_WRMISS = 0xD, - ARMV6MPCORE_PERFCTR_DCACHE_EVICTION = 0xE, - ARMV6MPCORE_PERFCTR_SW_PC_CHANGE = 0xF, - ARMV6MPCORE_PERFCTR_MAIN_TLB_MISS = 0x10, - ARMV6MPCORE_PERFCTR_EXPL_MEM_ACCESS = 0x11, - ARMV6MPCORE_PERFCTR_LSU_FULL_STALL = 0x12, - ARMV6MPCORE_PERFCTR_WBUF_DRAINED = 0x13, - ARMV6MPCORE_PERFCTR_CPU_CYCLES = 0xFF, -}; - -/* - * The hardware events that we support. We do support cache operations but - * we have harvard caches and no way to combine instruction and data - * accesses/misses in hardware. - */ -static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC, - [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT, - [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, -}; - -static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] - [PERF_COUNT_HW_CACHE_OP_MAX] - [PERF_COUNT_HW_CACHE_RESULT_MAX] = { - [C(L1D)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = - ARMV6MPCORE_PERFCTR_DCACHE_RDACCESS, - [C(RESULT_MISS)] = - ARMV6MPCORE_PERFCTR_DCACHE_RDMISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = - ARMV6MPCORE_PERFCTR_DCACHE_WRACCESS, - [C(RESULT_MISS)] = - ARMV6MPCORE_PERFCTR_DCACHE_WRMISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(L1I)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ICACHE_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ICACHE_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(LL)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(DTLB)] = { - /* - * The ARM performance counters can count micro DTLB misses, - * micro ITLB misses and main TLB misses. There isn't an event - * for TLB misses, so use the micro misses here and if users - * want the main TLB misses they can use a raw counter. - */ - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_DTLB_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_DTLB_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(ITLB)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ITLB_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ITLB_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(BPU)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, -}; - -static inline unsigned long -armv6_pmcr_read(void) -{ - u32 val; - asm volatile("mrc p15, 0, %0, c15, c12, 0" : "=r"(val)); - return val; -} - -static inline void -armv6_pmcr_write(unsigned long val) -{ - asm volatile("mcr p15, 0, %0, c15, c12, 0" : : "r"(val)); -} - -#define ARMV6_PMCR_ENABLE (1 << 0) -#define ARMV6_PMCR_CTR01_RESET (1 << 1) -#define ARMV6_PMCR_CCOUNT_RESET (1 << 2) -#define ARMV6_PMCR_CCOUNT_DIV (1 << 3) -#define ARMV6_PMCR_COUNT0_IEN (1 << 4) -#define ARMV6_PMCR_COUNT1_IEN (1 << 5) -#define ARMV6_PMCR_CCOUNT_IEN (1 << 6) -#define ARMV6_PMCR_COUNT0_OVERFLOW (1 << 8) -#define ARMV6_PMCR_COUNT1_OVERFLOW (1 << 9) -#define ARMV6_PMCR_CCOUNT_OVERFLOW (1 << 10) -#define ARMV6_PMCR_EVT_COUNT0_SHIFT 20 -#define ARMV6_PMCR_EVT_COUNT0_MASK (0xFF << ARMV6_PMCR_EVT_COUNT0_SHIFT) -#define ARMV6_PMCR_EVT_COUNT1_SHIFT 12 -#define ARMV6_PMCR_EVT_COUNT1_MASK (0xFF << ARMV6_PMCR_EVT_COUNT1_SHIFT) - -#define ARMV6_PMCR_OVERFLOWED_MASK \ - (ARMV6_PMCR_COUNT0_OVERFLOW | ARMV6_PMCR_COUNT1_OVERFLOW | \ - ARMV6_PMCR_CCOUNT_OVERFLOW) - -static inline int -armv6_pmcr_has_overflowed(unsigned long pmcr) -{ - return (pmcr & ARMV6_PMCR_OVERFLOWED_MASK); -} - -static inline int -armv6_pmcr_counter_has_overflowed(unsigned long pmcr, - enum armv6_counters counter) -{ - int ret = 0; - - if (ARMV6_CYCLE_COUNTER == counter) - ret = pmcr & ARMV6_PMCR_CCOUNT_OVERFLOW; - else if (ARMV6_COUNTER0 == counter) - ret = pmcr & ARMV6_PMCR_COUNT0_OVERFLOW; - else if (ARMV6_COUNTER1 == counter) - ret = pmcr & ARMV6_PMCR_COUNT1_OVERFLOW; - else - WARN_ONCE(1, "invalid counter number (%d)\n", counter); - - return ret; -} - -static inline u32 -armv6pmu_read_counter(int counter) -{ - unsigned long value = 0; - - if (ARMV6_CYCLE_COUNTER == counter) - asm volatile("mrc p15, 0, %0, c15, c12, 1" : "=r"(value)); - else if (ARMV6_COUNTER0 == counter) - asm volatile("mrc p15, 0, %0, c15, c12, 2" : "=r"(value)); - else if (ARMV6_COUNTER1 == counter) - asm volatile("mrc p15, 0, %0, c15, c12, 3" : "=r"(value)); - else - WARN_ONCE(1, "invalid counter number (%d)\n", counter); - - return value; -} - -static inline void -armv6pmu_write_counter(int counter, - u32 value) -{ - if (ARMV6_CYCLE_COUNTER == counter) - asm volatile("mcr p15, 0, %0, c15, c12, 1" : : "r"(value)); - else if (ARMV6_COUNTER0 == counter) - asm volatile("mcr p15, 0, %0, c15, c12, 2" : : "r"(value)); - else if (ARMV6_COUNTER1 == counter) - asm volatile("mcr p15, 0, %0, c15, c12, 3" : : "r"(value)); - else - WARN_ONCE(1, "invalid counter number (%d)\n", counter); -} - -void -armv6pmu_enable_event(struct hw_perf_event *hwc, - int idx) -{ - unsigned long val, mask, evt, flags; - - if (ARMV6_CYCLE_COUNTER == idx) { - mask = 0; - evt = ARMV6_PMCR_CCOUNT_IEN; - } else if (ARMV6_COUNTER0 == idx) { - mask = ARMV6_PMCR_EVT_COUNT0_MASK; - evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT0_SHIFT) | - ARMV6_PMCR_COUNT0_IEN; - } else if (ARMV6_COUNTER1 == idx) { - mask = ARMV6_PMCR_EVT_COUNT1_MASK; - evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT1_SHIFT) | - ARMV6_PMCR_COUNT1_IEN; - } else { - WARN_ONCE(1, "invalid counter number (%d)\n", idx); - return; - } - - /* - * Mask out the current event and set the counter to count the event - * that we're interested in. - */ - spin_lock_irqsave(&pmu_lock, flags); - val = armv6_pmcr_read(); - val &= ~mask; - val |= evt; - armv6_pmcr_write(val); - spin_unlock_irqrestore(&pmu_lock, flags); -} - -static irqreturn_t -armv6pmu_handle_irq(int irq_num, - void *dev) -{ - unsigned long pmcr = armv6_pmcr_read(); - struct perf_sample_data data; - struct cpu_hw_events *cpuc; - struct pt_regs *regs; - int idx; - - if (!armv6_pmcr_has_overflowed(pmcr)) - return IRQ_NONE; - - regs = get_irq_regs(); - - /* - * The interrupts are cleared by writing the overflow flags back to - * the control register. All of the other bits don't have any effect - * if they are rewritten, so write the whole value back. - */ - armv6_pmcr_write(pmcr); - - data.addr = 0; - - cpuc = &__get_cpu_var(cpu_hw_events); - for (idx = 0; idx <= armpmu->num_events; ++idx) { - struct perf_event *event = cpuc->events[idx]; - struct hw_perf_event *hwc; - - if (!test_bit(idx, cpuc->active_mask)) - continue; - - /* - * We have a single interrupt for all counters. Check that - * each counter has overflowed before we process it. - */ - if (!armv6_pmcr_counter_has_overflowed(pmcr, idx)) - continue; - - hwc = &event->hw; - armpmu_event_update(event, hwc, idx); - data.period = event->hw.last_period; - if (!armpmu_event_set_period(event, hwc, idx)) - continue; - - if (perf_event_overflow(event, 0, &data, regs)) - armpmu->disable(hwc, idx); - } - - /* - * Handle the pending perf events. - * - * Note: this call *must* be run with interrupts enabled. For - * platforms that can have the PMU interrupts raised as a PMI, this - * will not work. - */ - perf_event_do_pending(); - - return IRQ_HANDLED; -} - -static void -armv6pmu_start(void) -{ - unsigned long flags, val; - - spin_lock_irqsave(&pmu_lock, flags); - val = armv6_pmcr_read(); - val |= ARMV6_PMCR_ENABLE; - armv6_pmcr_write(val); - spin_unlock_irqrestore(&pmu_lock, flags); -} - -void -armv6pmu_stop(void) -{ - unsigned long flags, val; - - spin_lock_irqsave(&pmu_lock, flags); - val = armv6_pmcr_read(); - val &= ~ARMV6_PMCR_ENABLE; - armv6_pmcr_write(val); - spin_unlock_irqrestore(&pmu_lock, flags); -} - -static inline int -armv6pmu_event_map(int config) -{ - int mapping = armv6_perf_map[config]; - if (HW_OP_UNSUPPORTED == mapping) - mapping = -EOPNOTSUPP; - return mapping; -} - -static inline int -armv6mpcore_pmu_event_map(int config) -{ - int mapping = armv6mpcore_perf_map[config]; - if (HW_OP_UNSUPPORTED == mapping) - mapping = -EOPNOTSUPP; - return mapping; -} - -static u64 -armv6pmu_raw_event(u64 config) -{ - return config & 0xff; -} - -static int -armv6pmu_get_event_idx(struct cpu_hw_events *cpuc, - struct hw_perf_event *event) -{ - /* Always place a cycle counter into the cycle counter. */ - if (ARMV6_PERFCTR_CPU_CYCLES == event->config_base) { - if (test_and_set_bit(ARMV6_CYCLE_COUNTER, cpuc->used_mask)) - return -EAGAIN; - - return ARMV6_CYCLE_COUNTER; - } else { - /* - * For anything other than a cycle counter, try and use - * counter0 and counter1. - */ - if (!test_and_set_bit(ARMV6_COUNTER1, cpuc->used_mask)) { - return ARMV6_COUNTER1; - } - - if (!test_and_set_bit(ARMV6_COUNTER0, cpuc->used_mask)) { - return ARMV6_COUNTER0; - } - - /* The counters are all in use. */ - return -EAGAIN; - } -} - -static void -armv6pmu_disable_event(struct hw_perf_event *hwc, - int idx) -{ - unsigned long val, mask, evt, flags; - - if (ARMV6_CYCLE_COUNTER == idx) { - mask = ARMV6_PMCR_CCOUNT_IEN; - evt = 0; - } else if (ARMV6_COUNTER0 == idx) { - mask = ARMV6_PMCR_COUNT0_IEN | ARMV6_PMCR_EVT_COUNT0_MASK; - evt = ARMV6_PERFCTR_NOP << ARMV6_PMCR_EVT_COUNT0_SHIFT; - } else if (ARMV6_COUNTER1 == idx) { - mask = ARMV6_PMCR_COUNT1_IEN | ARMV6_PMCR_EVT_COUNT1_MASK; - evt = ARMV6_PERFCTR_NOP << ARMV6_PMCR_EVT_COUNT1_SHIFT; - } else { - WARN_ONCE(1, "invalid counter number (%d)\n", idx); - return; - } - - /* - * Mask out the current event and set the counter to count the number - * of ETM bus signal assertion cycles. The external reporting should - * be disabled and so this should never increment. - */ - spin_lock_irqsave(&pmu_lock, flags); - val = armv6_pmcr_read(); - val &= ~mask; - val |= evt; - armv6_pmcr_write(val); - spin_unlock_irqrestore(&pmu_lock, flags); -} - -static void -armv6mpcore_pmu_disable_event(struct hw_perf_event *hwc, - int idx) -{ - unsigned long val, mask, flags, evt = 0; - - if (ARMV6_CYCLE_COUNTER == idx) { - mask = ARMV6_PMCR_CCOUNT_IEN; - } else if (ARMV6_COUNTER0 == idx) { - mask = ARMV6_PMCR_COUNT0_IEN; - } else if (ARMV6_COUNTER1 == idx) { - mask = ARMV6_PMCR_COUNT1_IEN; - } else { - WARN_ONCE(1, "invalid counter number (%d)\n", idx); - return; - } - - /* - * Unlike UP ARMv6, we don't have a way of stopping the counters. We - * simply disable the interrupt reporting. - */ - spin_lock_irqsave(&pmu_lock, flags); - val = armv6_pmcr_read(); - val &= ~mask; - val |= evt; - armv6_pmcr_write(val); - spin_unlock_irqrestore(&pmu_lock, flags); -} - -static const struct arm_pmu armv6pmu = { - .name = "v6", - .handle_irq = armv6pmu_handle_irq, - .enable = armv6pmu_enable_event, - .disable = armv6pmu_disable_event, - .event_map = armv6pmu_event_map, - .raw_event = armv6pmu_raw_event, - .read_counter = armv6pmu_read_counter, - .write_counter = armv6pmu_write_counter, - .get_event_idx = armv6pmu_get_event_idx, - .start = armv6pmu_start, - .stop = armv6pmu_stop, - .num_events = 3, - .max_period = (1LLU << 32) - 1, -}; - -/* - * ARMv6mpcore is almost identical to single core ARMv6 with the exception - * that some of the events have different enumerations and that there is no - * *hack* to stop the programmable counters. To stop the counters we simply - * disable the interrupt reporting and update the event. When unthrottling we - * reset the period and enable the interrupt reporting. - */ -static const struct arm_pmu armv6mpcore_pmu = { - .name = "v6mpcore", - .handle_irq = armv6pmu_handle_irq, - .enable = armv6pmu_enable_event, - .disable = armv6mpcore_pmu_disable_event, - .event_map = armv6mpcore_pmu_event_map, - .raw_event = armv6pmu_raw_event, - .read_counter = armv6pmu_read_counter, - .write_counter = armv6pmu_write_counter, - .get_event_idx = armv6pmu_get_event_idx, - .start = armv6pmu_start, - .stop = armv6pmu_stop, - .num_events = 3, - .max_period = (1LLU << 32) - 1, -}; - -/* - * ARMv7 Cortex-A8 and Cortex-A9 Performance Events handling code. - * - * Copied from ARMv6 code, with the low level code inspired - * by the ARMv7 Oprofile code. - * - * Cortex-A8 has up to 4 configurable performance counters and - * a single cycle counter. - * Cortex-A9 has up to 31 configurable performance counters and - * a single cycle counter. - * - * All counters can be enabled/disabled and IRQ masked separately. The cycle - * counter and all 4 performance counters together can be reset separately. - */ - -#define ARMV7_PMU_CORTEX_A8_NAME "ARMv7 Cortex-A8" - -#define ARMV7_PMU_CORTEX_A9_NAME "ARMv7 Cortex-A9" - -/* Common ARMv7 event types */ -enum armv7_perf_types { - ARMV7_PERFCTR_PMNC_SW_INCR = 0x00, - ARMV7_PERFCTR_IFETCH_MISS = 0x01, - ARMV7_PERFCTR_ITLB_MISS = 0x02, - ARMV7_PERFCTR_DCACHE_REFILL = 0x03, - ARMV7_PERFCTR_DCACHE_ACCESS = 0x04, - ARMV7_PERFCTR_DTLB_REFILL = 0x05, - ARMV7_PERFCTR_DREAD = 0x06, - ARMV7_PERFCTR_DWRITE = 0x07, - - ARMV7_PERFCTR_EXC_TAKEN = 0x09, - ARMV7_PERFCTR_EXC_EXECUTED = 0x0A, - ARMV7_PERFCTR_CID_WRITE = 0x0B, - /* ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS. - * It counts: - * - all branch instructions, - * - instructions that explicitly write the PC, - * - exception generating instructions. - */ - ARMV7_PERFCTR_PC_WRITE = 0x0C, - ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D, - ARMV7_PERFCTR_UNALIGNED_ACCESS = 0x0F, - ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10, - ARMV7_PERFCTR_CLOCK_CYCLES = 0x11, - - ARMV7_PERFCTR_PC_BRANCH_MIS_USED = 0x12, - - ARMV7_PERFCTR_CPU_CYCLES = 0xFF -}; - -/* ARMv7 Cortex-A8 specific event types */ -enum armv7_a8_perf_types { - ARMV7_PERFCTR_INSTR_EXECUTED = 0x08, - - ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E, - - ARMV7_PERFCTR_WRITE_BUFFER_FULL = 0x40, - ARMV7_PERFCTR_L2_STORE_MERGED = 0x41, - ARMV7_PERFCTR_L2_STORE_BUFF = 0x42, - ARMV7_PERFCTR_L2_ACCESS = 0x43, - ARMV7_PERFCTR_L2_CACH_MISS = 0x44, - ARMV7_PERFCTR_AXI_READ_CYCLES = 0x45, - ARMV7_PERFCTR_AXI_WRITE_CYCLES = 0x46, - ARMV7_PERFCTR_MEMORY_REPLAY = 0x47, - ARMV7_PERFCTR_UNALIGNED_ACCESS_REPLAY = 0x48, - ARMV7_PERFCTR_L1_DATA_MISS = 0x49, - ARMV7_PERFCTR_L1_INST_MISS = 0x4A, - ARMV7_PERFCTR_L1_DATA_COLORING = 0x4B, - ARMV7_PERFCTR_L1_NEON_DATA = 0x4C, - ARMV7_PERFCTR_L1_NEON_CACH_DATA = 0x4D, - ARMV7_PERFCTR_L2_NEON = 0x4E, - ARMV7_PERFCTR_L2_NEON_HIT = 0x4F, - ARMV7_PERFCTR_L1_INST = 0x50, - ARMV7_PERFCTR_PC_RETURN_MIS_PRED = 0x51, - ARMV7_PERFCTR_PC_BRANCH_FAILED = 0x52, - ARMV7_PERFCTR_PC_BRANCH_TAKEN = 0x53, - ARMV7_PERFCTR_PC_BRANCH_EXECUTED = 0x54, - ARMV7_PERFCTR_OP_EXECUTED = 0x55, - ARMV7_PERFCTR_CYCLES_INST_STALL = 0x56, - ARMV7_PERFCTR_CYCLES_INST = 0x57, - ARMV7_PERFCTR_CYCLES_NEON_DATA_STALL = 0x58, - ARMV7_PERFCTR_CYCLES_NEON_INST_STALL = 0x59, - ARMV7_PERFCTR_NEON_CYCLES = 0x5A, - - ARMV7_PERFCTR_PMU0_EVENTS = 0x70, - ARMV7_PERFCTR_PMU1_EVENTS = 0x71, - ARMV7_PERFCTR_PMU_EVENTS = 0x72, -}; - -/* ARMv7 Cortex-A9 specific event types */ -enum armv7_a9_perf_types { - ARMV7_PERFCTR_JAVA_HW_BYTECODE_EXEC = 0x40, - ARMV7_PERFCTR_JAVA_SW_BYTECODE_EXEC = 0x41, - ARMV7_PERFCTR_JAZELLE_BRANCH_EXEC = 0x42, - - ARMV7_PERFCTR_COHERENT_LINE_MISS = 0x50, - ARMV7_PERFCTR_COHERENT_LINE_HIT = 0x51, - - ARMV7_PERFCTR_ICACHE_DEP_STALL_CYCLES = 0x60, - ARMV7_PERFCTR_DCACHE_DEP_STALL_CYCLES = 0x61, - ARMV7_PERFCTR_TLB_MISS_DEP_STALL_CYCLES = 0x62, - ARMV7_PERFCTR_STREX_EXECUTED_PASSED = 0x63, - ARMV7_PERFCTR_STREX_EXECUTED_FAILED = 0x64, - ARMV7_PERFCTR_DATA_EVICTION = 0x65, - ARMV7_PERFCTR_ISSUE_STAGE_NO_INST = 0x66, - ARMV7_PERFCTR_ISSUE_STAGE_EMPTY = 0x67, - ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE = 0x68, - - ARMV7_PERFCTR_PREDICTABLE_FUNCT_RETURNS = 0x6E, - - ARMV7_PERFCTR_MAIN_UNIT_EXECUTED_INST = 0x70, - ARMV7_PERFCTR_SECOND_UNIT_EXECUTED_INST = 0x71, - ARMV7_PERFCTR_LD_ST_UNIT_EXECUTED_INST = 0x72, - ARMV7_PERFCTR_FP_EXECUTED_INST = 0x73, - ARMV7_PERFCTR_NEON_EXECUTED_INST = 0x74, - - ARMV7_PERFCTR_PLD_FULL_DEP_STALL_CYCLES = 0x80, - ARMV7_PERFCTR_DATA_WR_DEP_STALL_CYCLES = 0x81, - ARMV7_PERFCTR_ITLB_MISS_DEP_STALL_CYCLES = 0x82, - ARMV7_PERFCTR_DTLB_MISS_DEP_STALL_CYCLES = 0x83, - ARMV7_PERFCTR_MICRO_ITLB_MISS_DEP_STALL_CYCLES = 0x84, - ARMV7_PERFCTR_MICRO_DTLB_MISS_DEP_STALL_CYCLES = 0x85, - ARMV7_PERFCTR_DMB_DEP_STALL_CYCLES = 0x86, - - ARMV7_PERFCTR_INTGR_CLK_ENABLED_CYCLES = 0x8A, - ARMV7_PERFCTR_DATA_ENGINE_CLK_EN_CYCLES = 0x8B, - - ARMV7_PERFCTR_ISB_INST = 0x90, - ARMV7_PERFCTR_DSB_INST = 0x91, - ARMV7_PERFCTR_DMB_INST = 0x92, - ARMV7_PERFCTR_EXT_INTERRUPTS = 0x93, - - ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_COMPLETED = 0xA0, - ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_SKIPPED = 0xA1, - ARMV7_PERFCTR_PLE_FIFO_FLUSH = 0xA2, - ARMV7_PERFCTR_PLE_RQST_COMPLETED = 0xA3, - ARMV7_PERFCTR_PLE_FIFO_OVERFLOW = 0xA4, - ARMV7_PERFCTR_PLE_RQST_PROG = 0xA5 -}; - -/* - * Cortex-A8 HW events mapping - * - * The hardware events that we support. We do support cache operations but - * we have harvard caches and no way to combine instruction and data - * accesses/misses in hardware. - */ -static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, - [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, -}; - -static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] - [PERF_COUNT_HW_CACHE_OP_MAX] - [PERF_COUNT_HW_CACHE_RESULT_MAX] = { - [C(L1D)] = { - /* - * The performance counters don't differentiate between read - * and write accesses/misses so this isn't strictly correct, - * but it's the best we can do. Writes and reads get - * combined. - */ - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(L1I)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, - [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, - [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(LL)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(DTLB)] = { - /* - * Only ITLB misses and DTLB refills are supported. - * If users want the DTLB refills misses a raw counter - * must be used. - */ - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(ITLB)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(BPU)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, -}; - -/* - * Cortex-A9 HW events mapping - */ -static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = - ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE, - [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_COHERENT_LINE_HIT, - [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_COHERENT_LINE_MISS, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, -}; - -static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] - [PERF_COUNT_HW_CACHE_OP_MAX] - [PERF_COUNT_HW_CACHE_RESULT_MAX] = { - [C(L1D)] = { - /* - * The performance counters don't differentiate between read - * and write accesses/misses so this isn't strictly correct, - * but it's the best we can do. Writes and reads get - * combined. - */ - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(L1I)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(LL)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(DTLB)] = { - /* - * Only ITLB misses and DTLB refills are supported. - * If users want the DTLB refills misses a raw counter - * must be used. - */ - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(ITLB)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, - [C(BPU)] = { - [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - }, - [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - }, - [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, - }, - }, -}; - -/* - * Perf Events counters - */ -enum armv7_counters { - ARMV7_CYCLE_COUNTER = 1, /* Cycle counter */ - ARMV7_COUNTER0 = 2, /* First event counter */ -}; - -/* - * The cycle counter is ARMV7_CYCLE_COUNTER. - * The first event counter is ARMV7_COUNTER0. - * The last event counter is (ARMV7_COUNTER0 + armpmu->num_events - 1). - */ -#define ARMV7_COUNTER_LAST (ARMV7_COUNTER0 + armpmu->num_events - 1) - -/* - * ARMv7 low level PMNC access - */ - -/* - * Per-CPU PMNC: config reg - */ -#define ARMV7_PMNC_E (1 << 0) /* Enable all counters */ -#define ARMV7_PMNC_P (1 << 1) /* Reset all counters */ -#define ARMV7_PMNC_C (1 << 2) /* Cycle counter reset */ -#define ARMV7_PMNC_D (1 << 3) /* CCNT counts every 64th cpu cycle */ -#define ARMV7_PMNC_X (1 << 4) /* Export to ETM */ -#define ARMV7_PMNC_DP (1 << 5) /* Disable CCNT if non-invasive debug*/ -#define ARMV7_PMNC_N_SHIFT 11 /* Number of counters supported */ -#define ARMV7_PMNC_N_MASK 0x1f -#define ARMV7_PMNC_MASK 0x3f /* Mask for writable bits */ - -/* - * Available counters - */ -#define ARMV7_CNT0 0 /* First event counter */ -#define ARMV7_CCNT 31 /* Cycle counter */ - -/* Perf Event to low level counters mapping */ -#define ARMV7_EVENT_CNT_TO_CNTx (ARMV7_COUNTER0 - ARMV7_CNT0) - -/* - * CNTENS: counters enable reg - */ -#define ARMV7_CNTENS_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) -#define ARMV7_CNTENS_C (1 << ARMV7_CCNT) - -/* - * CNTENC: counters disable reg - */ -#define ARMV7_CNTENC_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) -#define ARMV7_CNTENC_C (1 << ARMV7_CCNT) - -/* - * INTENS: counters overflow interrupt enable reg - */ -#define ARMV7_INTENS_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) -#define ARMV7_INTENS_C (1 << ARMV7_CCNT) - -/* - * INTENC: counters overflow interrupt disable reg - */ -#define ARMV7_INTENC_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) -#define ARMV7_INTENC_C (1 << ARMV7_CCNT) - -/* - * EVTSEL: Event selection reg - */ -#define ARMV7_EVTSEL_MASK 0x7f /* Mask for writable bits */ - -/* - * SELECT: Counter selection reg - */ -#define ARMV7_SELECT_MASK 0x1f /* Mask for writable bits */ - -/* - * FLAG: counters overflow flag status reg - */ -#define ARMV7_FLAG_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) -#define ARMV7_FLAG_C (1 << ARMV7_CCNT) -#define ARMV7_FLAG_MASK 0xffffffff /* Mask for writable bits */ -#define ARMV7_OVERFLOWED_MASK ARMV7_FLAG_MASK - -static inline unsigned long armv7_pmnc_read(void) -{ - u32 val; - asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(val)); - return val; -} - -static inline void armv7_pmnc_write(unsigned long val) -{ - val &= ARMV7_PMNC_MASK; - asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(val)); -} - -static inline int armv7_pmnc_has_overflowed(unsigned long pmnc) -{ - return pmnc & ARMV7_OVERFLOWED_MASK; -} - -static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc, - enum armv7_counters counter) -{ - int ret; - - if (counter == ARMV7_CYCLE_COUNTER) - ret = pmnc & ARMV7_FLAG_C; - else if ((counter >= ARMV7_COUNTER0) && (counter <= ARMV7_COUNTER_LAST)) - ret = pmnc & ARMV7_FLAG_P(counter); - else - pr_err("CPU%u checking wrong counter %d overflow status\n", - smp_processor_id(), counter); - - return ret; -} - -static inline int armv7_pmnc_select_counter(unsigned int idx) -{ - u32 val; - - if ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST)) { - pr_err("CPU%u selecting wrong PMNC counter" - " %d\n", smp_processor_id(), idx); - return -1; - } - - val = (idx - ARMV7_EVENT_CNT_TO_CNTx) & ARMV7_SELECT_MASK; - asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val)); - - return idx; -} - -static inline u32 armv7pmu_read_counter(int idx) -{ - unsigned long value = 0; - - if (idx == ARMV7_CYCLE_COUNTER) - asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (value)); - else if ((idx >= ARMV7_COUNTER0) && (idx <= ARMV7_COUNTER_LAST)) { - if (armv7_pmnc_select_counter(idx) == idx) - asm volatile("mrc p15, 0, %0, c9, c13, 2" - : "=r" (value)); - } else - pr_err("CPU%u reading wrong counter %d\n", - smp_processor_id(), idx); - - return value; -} - -static inline void armv7pmu_write_counter(int idx, u32 value) -{ - if (idx == ARMV7_CYCLE_COUNTER) - asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (value)); - else if ((idx >= ARMV7_COUNTER0) && (idx <= ARMV7_COUNTER_LAST)) { - if (armv7_pmnc_select_counter(idx) == idx) - asm volatile("mcr p15, 0, %0, c9, c13, 2" - : : "r" (value)); - } else - pr_err("CPU%u writing wrong counter %d\n", - smp_processor_id(), idx); -} - -static inline void armv7_pmnc_write_evtsel(unsigned int idx, u32 val) -{ - if (armv7_pmnc_select_counter(idx) == idx) { - val &= ARMV7_EVTSEL_MASK; - asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val)); - } -} - -static inline u32 armv7_pmnc_enable_counter(unsigned int idx) -{ - u32 val; - - if ((idx != ARMV7_CYCLE_COUNTER) && - ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST))) { - pr_err("CPU%u enabling wrong PMNC counter" - " %d\n", smp_processor_id(), idx); - return -1; - } - - if (idx == ARMV7_CYCLE_COUNTER) - val = ARMV7_CNTENS_C; - else - val = ARMV7_CNTENS_P(idx); - - asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (val)); - - return idx; -} - -static inline u32 armv7_pmnc_disable_counter(unsigned int idx) -{ - u32 val; - - - if ((idx != ARMV7_CYCLE_COUNTER) && - ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST))) { - pr_err("CPU%u disabling wrong PMNC counter" - " %d\n", smp_processor_id(), idx); - return -1; - } - - if (idx == ARMV7_CYCLE_COUNTER) - val = ARMV7_CNTENC_C; - else - val = ARMV7_CNTENC_P(idx); - - asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (val)); - - return idx; -} - -static inline u32 armv7_pmnc_enable_intens(unsigned int idx) -{ - u32 val; - - if ((idx != ARMV7_CYCLE_COUNTER) && - ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST))) { - pr_err("CPU%u enabling wrong PMNC counter" - " interrupt enable %d\n", smp_processor_id(), idx); - return -1; - } - - if (idx == ARMV7_CYCLE_COUNTER) - val = ARMV7_INTENS_C; - else - val = ARMV7_INTENS_P(idx); - - asm volatile("mcr p15, 0, %0, c9, c14, 1" : : "r" (val)); - - return idx; -} - -static inline u32 armv7_pmnc_disable_intens(unsigned int idx) -{ - u32 val; - - if ((idx != ARMV7_CYCLE_COUNTER) && - ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST))) { - pr_err("CPU%u disabling wrong PMNC counter" - " interrupt enable %d\n", smp_processor_id(), idx); - return -1; - } - - if (idx == ARMV7_CYCLE_COUNTER) - val = ARMV7_INTENC_C; - else - val = ARMV7_INTENC_P(idx); - - asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (val)); - - return idx; -} - -static inline u32 armv7_pmnc_getreset_flags(void) -{ - u32 val; - - /* Read */ - asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val)); - - /* Write to clear flags */ - val &= ARMV7_FLAG_MASK; - asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (val)); - - return val; -} - -#ifdef DEBUG -static void armv7_pmnc_dump_regs(void) -{ - u32 val; - unsigned int cnt; - - printk(KERN_INFO "PMNC registers dump:\n"); - - asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val)); - printk(KERN_INFO "PMNC =0x%08x\n", val); - - asm volatile("mrc p15, 0, %0, c9, c12, 1" : "=r" (val)); - printk(KERN_INFO "CNTENS=0x%08x\n", val); - - asm volatile("mrc p15, 0, %0, c9, c14, 1" : "=r" (val)); - printk(KERN_INFO "INTENS=0x%08x\n", val); - - asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val)); - printk(KERN_INFO "FLAGS =0x%08x\n", val); - - asm volatile("mrc p15, 0, %0, c9, c12, 5" : "=r" (val)); - printk(KERN_INFO "SELECT=0x%08x\n", val); - - asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val)); - printk(KERN_INFO "CCNT =0x%08x\n", val); - - for (cnt = ARMV7_COUNTER0; cnt < ARMV7_COUNTER_LAST; cnt++) { - armv7_pmnc_select_counter(cnt); - asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val)); - printk(KERN_INFO "CNT[%d] count =0x%08x\n", - cnt-ARMV7_EVENT_CNT_TO_CNTx, val); - asm volatile("mrc p15, 0, %0, c9, c13, 1" : "=r" (val)); - printk(KERN_INFO "CNT[%d] evtsel=0x%08x\n", - cnt-ARMV7_EVENT_CNT_TO_CNTx, val); - } -} -#endif - -void armv7pmu_enable_event(struct hw_perf_event *hwc, int idx) -{ - unsigned long flags; - - /* - * Enable counter and interrupt, and set the counter to count - * the event that we're interested in. - */ - spin_lock_irqsave(&pmu_lock, flags); - - /* - * Disable counter - */ - armv7_pmnc_disable_counter(idx); - - /* - * Set event (if destined for PMNx counters) - * We don't need to set the event if it's a cycle count - */ - if (idx != ARMV7_CYCLE_COUNTER) - armv7_pmnc_write_evtsel(idx, hwc->config_base); - - /* - * Enable interrupt for this counter - */ - armv7_pmnc_enable_intens(idx); - - /* - * Enable counter - */ - armv7_pmnc_enable_counter(idx); - - spin_unlock_irqrestore(&pmu_lock, flags); -} - -static void armv7pmu_disable_event(struct hw_perf_event *hwc, int idx) -{ - unsigned long flags; - - /* - * Disable counter and interrupt - */ - spin_lock_irqsave(&pmu_lock, flags); - - /* - * Disable counter - */ - armv7_pmnc_disable_counter(idx); - - /* - * Disable interrupt for this counter - */ - armv7_pmnc_disable_intens(idx); - - spin_unlock_irqrestore(&pmu_lock, flags); -} - -static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) -{ - unsigned long pmnc; - struct perf_sample_data data; - struct cpu_hw_events *cpuc; - struct pt_regs *regs; - int idx; - - /* - * Get and reset the IRQ flags - */ - pmnc = armv7_pmnc_getreset_flags(); - - /* - * Did an overflow occur? - */ - if (!armv7_pmnc_has_overflowed(pmnc)) - return IRQ_NONE; - - /* - * Handle the counter(s) overflow(s) - */ - regs = get_irq_regs(); - - data.addr = 0; - - cpuc = &__get_cpu_var(cpu_hw_events); - for (idx = 0; idx <= armpmu->num_events; ++idx) { - struct perf_event *event = cpuc->events[idx]; - struct hw_perf_event *hwc; - - if (!test_bit(idx, cpuc->active_mask)) - continue; - - /* - * We have a single interrupt for all counters. Check that - * each counter has overflowed before we process it. - */ - if (!armv7_pmnc_counter_has_overflowed(pmnc, idx)) - continue; - - hwc = &event->hw; - armpmu_event_update(event, hwc, idx); - data.period = event->hw.last_period; - if (!armpmu_event_set_period(event, hwc, idx)) - continue; - - if (perf_event_overflow(event, 0, &data, regs)) - armpmu->disable(hwc, idx); - } - - /* - * Handle the pending perf events. - * - * Note: this call *must* be run with interrupts enabled. For - * platforms that can have the PMU interrupts raised as a PMI, this - * will not work. - */ - perf_event_do_pending(); - - return IRQ_HANDLED; -} - -static void armv7pmu_start(void) -{ - unsigned long flags; - - spin_lock_irqsave(&pmu_lock, flags); - /* Enable all counters */ - armv7_pmnc_write(armv7_pmnc_read() | ARMV7_PMNC_E); - spin_unlock_irqrestore(&pmu_lock, flags); -} - -static void armv7pmu_stop(void) -{ - unsigned long flags; - - spin_lock_irqsave(&pmu_lock, flags); - /* Disable all counters */ - armv7_pmnc_write(armv7_pmnc_read() & ~ARMV7_PMNC_E); - spin_unlock_irqrestore(&pmu_lock, flags); -} - -static inline int armv7_a8_pmu_event_map(int config) -{ - int mapping = armv7_a8_perf_map[config]; - if (HW_OP_UNSUPPORTED == mapping) - mapping = -EOPNOTSUPP; - return mapping; -} - -static inline int armv7_a9_pmu_event_map(int config) -{ - int mapping = armv7_a9_perf_map[config]; - if (HW_OP_UNSUPPORTED == mapping) - mapping = -EOPNOTSUPP; - return mapping; -} - -static u64 armv7pmu_raw_event(u64 config) -{ - return config & 0xff; -} - -static int armv7pmu_get_event_idx(struct cpu_hw_events *cpuc, - struct hw_perf_event *event) -{ - int idx; - - /* Always place a cycle counter into the cycle counter. */ - if (event->config_base == ARMV7_PERFCTR_CPU_CYCLES) { - if (test_and_set_bit(ARMV7_CYCLE_COUNTER, cpuc->used_mask)) - return -EAGAIN; - - return ARMV7_CYCLE_COUNTER; - } else { - /* - * For anything other than a cycle counter, try and use - * the events counters - */ - for (idx = ARMV7_COUNTER0; idx <= armpmu->num_events; ++idx) { - if (!test_and_set_bit(idx, cpuc->used_mask)) - return idx; - } - - /* The counters are all in use. */ - return -EAGAIN; - } -} - -static struct arm_pmu armv7pmu = { - .handle_irq = armv7pmu_handle_irq, - .enable = armv7pmu_enable_event, - .disable = armv7pmu_disable_event, - .raw_event = armv7pmu_raw_event, - .read_counter = armv7pmu_read_counter, - .write_counter = armv7pmu_write_counter, - .get_event_idx = armv7pmu_get_event_idx, - .start = armv7pmu_start, - .stop = armv7pmu_stop, - .max_period = (1LLU << 32) - 1, -}; - -static u32 __init armv7_reset_read_pmnc(void) -{ - u32 nb_cnt; - - /* Initialize & Reset PMNC: C and P bits */ - armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C); - - /* Read the nb of CNTx counters supported from PMNC */ - nb_cnt = (armv7_pmnc_read() >> ARMV7_PMNC_N_SHIFT) & ARMV7_PMNC_N_MASK; - - /* Add the CPU cycles counter and return */ - return nb_cnt + 1; -} - -static int __init -init_hw_perf_events(void) -{ - unsigned long cpuid = read_cpuid_id(); - unsigned long implementor = (cpuid & 0xFF000000) >> 24; - unsigned long part_number = (cpuid & 0xFFF0); - - /* We only support ARM CPUs implemented by ARM at the moment. */ - if (0x41 == implementor) { - switch (part_number) { - case 0xB360: /* ARM1136 */ - case 0xB560: /* ARM1156 */ - case 0xB760: /* ARM1176 */ - armpmu = &armv6pmu; - memcpy(armpmu_perf_cache_map, armv6_perf_cache_map, - sizeof(armv6_perf_cache_map)); - perf_max_events = armv6pmu.num_events; - break; - case 0xB020: /* ARM11mpcore */ - armpmu = &armv6mpcore_pmu; - memcpy(armpmu_perf_cache_map, - armv6mpcore_perf_cache_map, - sizeof(armv6mpcore_perf_cache_map)); - perf_max_events = armv6mpcore_pmu.num_events; - break; - case 0xC080: /* Cortex-A8 */ - armv7pmu.name = ARMV7_PMU_CORTEX_A8_NAME; - memcpy(armpmu_perf_cache_map, armv7_a8_perf_cache_map, - sizeof(armv7_a8_perf_cache_map)); - armv7pmu.event_map = armv7_a8_pmu_event_map; - armpmu = &armv7pmu; - - /* Reset PMNC and read the nb of CNTx counters - supported */ - armv7pmu.num_events = armv7_reset_read_pmnc(); - perf_max_events = armv7pmu.num_events; - break; - case 0xC090: /* Cortex-A9 */ - armv7pmu.name = ARMV7_PMU_CORTEX_A9_NAME; - memcpy(armpmu_perf_cache_map, armv7_a9_perf_cache_map, - sizeof(armv7_a9_perf_cache_map)); - armv7pmu.event_map = armv7_a9_pmu_event_map; - armpmu = &armv7pmu; - - /* Reset PMNC and read the nb of CNTx counters - supported */ - armv7pmu.num_events = armv7_reset_read_pmnc(); - perf_max_events = armv7pmu.num_events; - break; - default: - pr_info("no hardware support available\n"); - perf_max_events = -1; - } - } - - if (armpmu) - pr_info("enabled with %s PMU driver, %d counters available\n", - armpmu->name, armpmu->num_events); - - return 0; -} -arch_initcall(init_hw_perf_events); - -/* - * Callchain handling code. - */ -static inline void -callchain_store(struct perf_callchain_entry *entry, - u64 ip) -{ - if (entry->nr < PERF_MAX_STACK_DEPTH) - entry->ip[entry->nr++] = ip; -} - -/* - * The registers we're interested in are at the end of the variable - * length saved register structure. The fp points at the end of this - * structure so the address of this struct is: - * (struct frame_tail *)(xxx->fp)-1 - * - * This code has been adapted from the ARM OProfile support. - */ -struct frame_tail { - struct frame_tail *fp; - unsigned long sp; - unsigned long lr; -} __attribute__((packed)); - -/* - * Get the return address for a single stackframe and return a pointer to the - * next frame tail. - */ -static struct frame_tail * -user_backtrace(struct frame_tail *tail, - struct perf_callchain_entry *entry) -{ - struct frame_tail buftail; - - /* Also check accessibility of one struct frame_tail beyond */ - if (!access_ok(VERIFY_READ, tail, sizeof(buftail))) - return NULL; - if (__copy_from_user_inatomic(&buftail, tail, sizeof(buftail))) - return NULL; - - callchain_store(entry, buftail.lr); - - /* - * Frame pointers should strictly progress back up the stack - * (towards higher addresses). - */ - if (tail >= buftail.fp) - return NULL; - - return buftail.fp - 1; -} - -static void -perf_callchain_user(struct pt_regs *regs, - struct perf_callchain_entry *entry) -{ - struct frame_tail *tail; - - callchain_store(entry, PERF_CONTEXT_USER); - - if (!user_mode(regs)) - regs = task_pt_regs(current); - - tail = (struct frame_tail *)regs->ARM_fp - 1; - - while (tail && !((unsigned long)tail & 0x3)) - tail = user_backtrace(tail, entry); -} - -/* - * Gets called by walk_stackframe() for every stackframe. This will be called - * whist unwinding the stackframe and is like a subroutine return so we use - * the PC. - */ -static int -callchain_trace(struct stackframe *fr, - void *data) -{ - struct perf_callchain_entry *entry = data; - callchain_store(entry, fr->pc); - return 0; -} - -static void -perf_callchain_kernel(struct pt_regs *regs, - struct perf_callchain_entry *entry) -{ - struct stackframe fr; - - callchain_store(entry, PERF_CONTEXT_KERNEL); - fr.fp = regs->ARM_fp; - fr.sp = regs->ARM_sp; - fr.lr = regs->ARM_lr; - fr.pc = regs->ARM_pc; - walk_stackframe(&fr, callchain_trace, entry); -} - -static void -perf_do_callchain(struct pt_regs *regs, - struct perf_callchain_entry *entry) -{ - int is_user; - - if (!regs) - return; - - is_user = user_mode(regs); - - if (!current || !current->pid) - return; - - if (is_user && current->state != TASK_RUNNING) - return; - - if (!is_user) - perf_callchain_kernel(regs, entry); - - if (current->mm) - perf_callchain_user(regs, entry); -} - -static DEFINE_PER_CPU(struct perf_callchain_entry, pmc_irq_entry); - -struct perf_callchain_entry * -perf_callchain(struct pt_regs *regs) -{ - struct perf_callchain_entry *entry = &__get_cpu_var(pmc_irq_entry); - - entry->nr = 0; - perf_do_callchain(regs, entry); - return entry; -} diff --git a/trunk/arch/arm/kernel/pmu.c b/trunk/arch/arm/kernel/pmu.c deleted file mode 100644 index a124312e343f..000000000000 --- a/trunk/arch/arm/kernel/pmu.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * linux/arch/arm/kernel/pmu.c - * - * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include - -#include - -/* - * Define the IRQs for the system. We could use something like a platform - * device but that seems fairly heavyweight for this. Also, the performance - * counters can't be removed or hotplugged. - * - * Ordering is important: init_pmu() will use the ordering to set the affinity - * to the corresponding core. e.g. the first interrupt will go to cpu 0, the - * second goes to cpu 1 etc. - */ -static const int irqs[] = { -#if defined(CONFIG_ARCH_OMAP2) - 3, -#elif defined(CONFIG_ARCH_BCMRING) - IRQ_PMUIRQ, -#elif defined(CONFIG_MACH_REALVIEW_EB) - IRQ_EB11MP_PMU_CPU0, - IRQ_EB11MP_PMU_CPU1, - IRQ_EB11MP_PMU_CPU2, - IRQ_EB11MP_PMU_CPU3, -#elif defined(CONFIG_ARCH_OMAP3) - INT_34XX_BENCH_MPU_EMUL, -#elif defined(CONFIG_ARCH_IOP32X) - IRQ_IOP32X_CORE_PMU, -#elif defined(CONFIG_ARCH_IOP33X) - IRQ_IOP33X_CORE_PMU, -#elif defined(CONFIG_ARCH_PXA) - IRQ_PMU, -#endif -}; - -static const struct pmu_irqs pmu_irqs = { - .irqs = irqs, - .num_irqs = ARRAY_SIZE(irqs), -}; - -static volatile long pmu_lock; - -const struct pmu_irqs * -reserve_pmu(void) -{ - return test_and_set_bit_lock(0, &pmu_lock) ? ERR_PTR(-EBUSY) : - &pmu_irqs; -} -EXPORT_SYMBOL_GPL(reserve_pmu); - -int -release_pmu(const struct pmu_irqs *irqs) -{ - if (WARN_ON(irqs != &pmu_irqs)) - return -EINVAL; - clear_bit_unlock(0, &pmu_lock); - return 0; -} -EXPORT_SYMBOL_GPL(release_pmu); - -static int -set_irq_affinity(int irq, - unsigned int cpu) -{ -#ifdef CONFIG_SMP - int err = irq_set_affinity(irq, cpumask_of(cpu)); - if (err) - pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n", - irq, cpu); - return err; -#else - return 0; -#endif -} - -int -init_pmu(void) -{ - int i, err = 0; - - for (i = 0; i < pmu_irqs.num_irqs; ++i) { - err = set_irq_affinity(pmu_irqs.irqs[i], i); - if (err) - break; - } - - return err; -} -EXPORT_SYMBOL_GPL(init_pmu); diff --git a/trunk/arch/arm/kernel/process.c b/trunk/arch/arm/kernel/process.c index ba2adefa53f7..0d96d0171c05 100644 --- a/trunk/arch/arm/kernel/process.c +++ b/trunk/arch/arm/kernel/process.c @@ -212,8 +212,7 @@ void __show_regs(struct pt_regs *regs) char buf[64]; printk("CPU: %d %s (%s %.*s)\n", - raw_smp_processor_id(), print_tainted(), - init_utsname()->release, + smp_processor_id(), print_tainted(), init_utsname()->release, (int)strcspn(init_utsname()->version, " "), init_utsname()->version); print_symbol("PC is at %s\n", instruction_pointer(regs)); @@ -275,18 +274,17 @@ void show_regs(struct pt_regs * regs) __backtrace(); } -ATOMIC_NOTIFIER_HEAD(thread_notify_head); - -EXPORT_SYMBOL_GPL(thread_notify_head); - /* * Free current thread data structures etc.. */ void exit_thread(void) { - thread_notify(THREAD_NOTIFY_EXIT, current_thread_info()); } +ATOMIC_NOTIFIER_HEAD(thread_notify_head); + +EXPORT_SYMBOL_GPL(thread_notify_head); + void flush_thread(void) { struct thread_info *thread = current_thread_info(); @@ -301,6 +299,9 @@ void flush_thread(void) void release_thread(struct task_struct *dead_task) { + struct thread_info *thread = task_thread_info(dead_task); + + thread_notify(THREAD_NOTIFY_RELEASE, thread); } asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); diff --git a/trunk/arch/arm/kernel/ptrace.c b/trunk/arch/arm/kernel/ptrace.c index 08f899fb76a6..a2ea3854cb3c 100644 --- a/trunk/arch/arm/kernel/ptrace.c +++ b/trunk/arch/arm/kernel/ptrace.c @@ -499,41 +499,10 @@ static struct undef_hook thumb_break_hook = { .fn = break_trap, }; -static int thumb2_break_trap(struct pt_regs *regs, unsigned int instr) -{ - unsigned int instr2; - void __user *pc; - - /* Check the second half of the instruction. */ - pc = (void __user *)(instruction_pointer(regs) + 2); - - if (processor_mode(regs) == SVC_MODE) { - instr2 = *(u16 *) pc; - } else { - get_user(instr2, (u16 __user *)pc); - } - - if (instr2 == 0xa000) { - ptrace_break(current, regs); - return 0; - } else { - return 1; - } -} - -static struct undef_hook thumb2_break_hook = { - .instr_mask = 0xffff, - .instr_val = 0xf7f0, - .cpsr_mask = PSR_T_BIT, - .cpsr_val = PSR_T_BIT, - .fn = thumb2_break_trap, -}; - static int __init ptrace_break_init(void) { register_undef_hook(&arm_break_hook); register_undef_hook(&thumb_break_hook); - register_undef_hook(&thumb2_break_hook); return 0; } @@ -700,7 +669,7 @@ static int ptrace_getvfpregs(struct task_struct *tsk, void __user *data) union vfp_state *vfp = &thread->vfpstate; struct user_vfp __user *ufp = data; - vfp_sync_hwstate(thread); + vfp_sync_state(thread); /* copy the floating point registers */ if (copy_to_user(&ufp->fpregs, &vfp->hard.fpregs, @@ -723,7 +692,7 @@ static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data) union vfp_state *vfp = &thread->vfpstate; struct user_vfp __user *ufp = data; - vfp_sync_hwstate(thread); + vfp_sync_state(thread); /* copy the floating point registers */ if (copy_from_user(&vfp->hard.fpregs, &ufp->fpregs, @@ -734,8 +703,6 @@ static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data) if (get_user(vfp->hard.fpscr, &ufp->fpscr)) return -EFAULT; - vfp_flush_hwstate(thread); - return 0; } #endif @@ -745,10 +712,26 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) int ret; switch (request) { + /* + * read word at location "addr" in the child process. + */ + case PTRACE_PEEKTEXT: + case PTRACE_PEEKDATA: + ret = generic_ptrace_peekdata(child, addr, data); + break; + case PTRACE_PEEKUSR: ret = ptrace_read_user(child, addr, (unsigned long __user *)data); break; + /* + * write the word at location addr. + */ + case PTRACE_POKETEXT: + case PTRACE_POKEDATA: + ret = generic_ptrace_pokedata(child, addr, data); + break; + case PTRACE_POKEUSR: ret = ptrace_write_user(child, addr, data); break; diff --git a/trunk/arch/arm/kernel/setup.c b/trunk/arch/arm/kernel/setup.c index c91c77b54dea..c6c57b640b6b 100644 --- a/trunk/arch/arm/kernel/setup.c +++ b/trunk/arch/arm/kernel/setup.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include @@ -103,7 +102,6 @@ struct cpu_cache_fns cpu_cache; #endif #ifdef CONFIG_OUTER_CACHE struct outer_cache_fns outer_cache; -EXPORT_SYMBOL(outer_cache); #endif struct stack { @@ -119,7 +117,7 @@ EXPORT_SYMBOL(elf_platform); static const char *cpu_name; static const char *machine_name; -static char __initdata cmd_line[COMMAND_LINE_SIZE]; +static char __initdata command_line[COMMAND_LINE_SIZE]; static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE; static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } }; @@ -419,11 +417,10 @@ static int __init arm_add_memory(unsigned long start, unsigned long size) * Pick out the memory size. We look for mem=size@start, * where start and size are "size[KkMm]" */ -static int __init early_mem(char *p) +static void __init early_mem(char **p) { static int usermem __initdata = 0; unsigned long size, start; - char *endp; /* * If the user specifies memory size, we @@ -436,15 +433,52 @@ static int __init early_mem(char *p) } start = PHYS_OFFSET; - size = memparse(p, &endp); - if (*endp == '@') - start = memparse(endp + 1, NULL); + size = memparse(*p, p); + if (**p == '@') + start = memparse(*p + 1, p); arm_add_memory(start, size); +} +__early_param("mem=", early_mem); - return 0; +/* + * Initial parsing of the command line. + */ +static void __init parse_cmdline(char **cmdline_p, char *from) +{ + char c = ' ', *to = command_line; + int len = 0; + + for (;;) { + if (c == ' ') { + extern struct early_params __early_begin, __early_end; + struct early_params *p; + + for (p = &__early_begin; p < &__early_end; p++) { + int arglen = strlen(p->arg); + + if (memcmp(from, p->arg, arglen) == 0) { + if (to != command_line) + to -= 1; + from += arglen; + p->fn(&from); + + while (*from != ' ' && *from != '\0') + from++; + break; + } + } + } + c = *from++; + if (!c) + break; + if (COMMAND_LINE_SIZE <= ++len) + break; + *to++ = c; + } + *to = '\0'; + *cmdline_p = command_line; } -early_param("mem", early_mem); static void __init setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz) @@ -705,15 +739,9 @@ void __init setup_arch(char **cmdline_p) init_mm.end_data = (unsigned long) _edata; init_mm.brk = (unsigned long) _end; - /* parse_early_param needs a boot_command_line */ - strlcpy(boot_command_line, from, COMMAND_LINE_SIZE); - - /* populate cmd_line too for later use, preserving boot_command_line */ - strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE); - *cmdline_p = cmd_line; - - parse_early_param(); - + memcpy(boot_command_line, from, COMMAND_LINE_SIZE); + boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; + parse_cmdline(cmdline_p, from); paging_init(mdesc); request_standard_resources(&meminfo, mdesc); @@ -754,20 +782,8 @@ static int __init topology_init(void) return 0; } -subsys_initcall(topology_init); - -#ifdef CONFIG_HAVE_PROC_CPU -static int __init proc_cpu_init(void) -{ - struct proc_dir_entry *res; - res = proc_mkdir("cpu", NULL); - if (!res) - return -ENOMEM; - return 0; -} -fs_initcall(proc_cpu_init); -#endif +subsys_initcall(topology_init); static const char *hwcap_str[] = { "swp", diff --git a/trunk/arch/arm/kernel/time.c b/trunk/arch/arm/kernel/time.c index 28753805d2d1..d38cdf2c8276 100644 --- a/trunk/arch/arm/kernel/time.c +++ b/trunk/arch/arm/kernel/time.c @@ -10,6 +10,11 @@ * * This file contains the ARM-specific time handling details: * reading the RTC at bootup, etc... + * + * 1994-07-02 Alan Modra + * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime + * 1998-12-20 Updated NTP code according to technical memorandum Jan '96 + * "A Kernel Model for Precision Timekeeping" by Dave Mills */ #include #include @@ -72,6 +77,11 @@ unsigned long profile_pc(struct pt_regs *regs) EXPORT_SYMBOL(profile_pc); #endif +/* + * hook for setting the RTC's idea of the current time. + */ +int (*set_rtc)(void); + #ifndef CONFIG_GENERIC_TIME static unsigned long dummy_gettimeoffset(void) { @@ -79,6 +89,140 @@ static unsigned long dummy_gettimeoffset(void) } #endif +static unsigned long next_rtc_update; + +/* + * If we have an externally synchronized linux clock, then update + * CMOS clock accordingly every ~11 minutes. set_rtc() has to be + * called as close as possible to 500 ms before the new second + * starts. + */ +static inline void do_set_rtc(void) +{ + if (!ntp_synced() || set_rtc == NULL) + return; + + if (next_rtc_update && + time_before((unsigned long)xtime.tv_sec, next_rtc_update)) + return; + + if (xtime.tv_nsec < 500000000 - ((unsigned) tick_nsec >> 1) && + xtime.tv_nsec >= 500000000 + ((unsigned) tick_nsec >> 1)) + return; + + if (set_rtc()) + /* + * rtc update failed. Try again in 60s + */ + next_rtc_update = xtime.tv_sec + 60; + else + next_rtc_update = xtime.tv_sec + 660; +} + +#ifdef CONFIG_LEDS + +static void dummy_leds_event(led_event_t evt) +{ +} + +void (*leds_event)(led_event_t) = dummy_leds_event; + +struct leds_evt_name { + const char name[8]; + int on; + int off; +}; + +static const struct leds_evt_name evt_names[] = { + { "amber", led_amber_on, led_amber_off }, + { "blue", led_blue_on, led_blue_off }, + { "green", led_green_on, led_green_off }, + { "red", led_red_on, led_red_off }, +}; + +static ssize_t leds_store(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t size) +{ + int ret = -EINVAL, len = strcspn(buf, " "); + + if (len > 0 && buf[len] == '\0') + len--; + + if (strncmp(buf, "claim", len) == 0) { + leds_event(led_claim); + ret = size; + } else if (strncmp(buf, "release", len) == 0) { + leds_event(led_release); + ret = size; + } else { + int i; + + for (i = 0; i < ARRAY_SIZE(evt_names); i++) { + if (strlen(evt_names[i].name) != len || + strncmp(buf, evt_names[i].name, len) != 0) + continue; + if (strncmp(buf+len, " on", 3) == 0) { + leds_event(evt_names[i].on); + ret = size; + } else if (strncmp(buf+len, " off", 4) == 0) { + leds_event(evt_names[i].off); + ret = size; + } + break; + } + } + return ret; +} + +static SYSDEV_ATTR(event, 0200, NULL, leds_store); + +static int leds_suspend(struct sys_device *dev, pm_message_t state) +{ + leds_event(led_stop); + return 0; +} + +static int leds_resume(struct sys_device *dev) +{ + leds_event(led_start); + return 0; +} + +static int leds_shutdown(struct sys_device *dev) +{ + leds_event(led_halted); + return 0; +} + +static struct sysdev_class leds_sysclass = { + .name = "leds", + .shutdown = leds_shutdown, + .suspend = leds_suspend, + .resume = leds_resume, +}; + +static struct sys_device leds_device = { + .id = 0, + .cls = &leds_sysclass, +}; + +static int __init leds_init(void) +{ + int ret; + ret = sysdev_class_register(&leds_sysclass); + if (ret == 0) + ret = sysdev_register(&leds_device); + if (ret == 0) + ret = sysdev_create_file(&leds_device, &attr_event); + return ret; +} + +device_initcall(leds_init); + +EXPORT_SYMBOL(leds_event); +#endif + #ifdef CONFIG_LEDS_TIMER static inline void do_leds(void) { @@ -151,6 +295,39 @@ int do_settimeofday(struct timespec *tv) EXPORT_SYMBOL(do_settimeofday); #endif /* !CONFIG_GENERIC_TIME */ +/** + * save_time_delta - Save the offset between system time and RTC time + * @delta: pointer to timespec to store delta + * @rtc: pointer to timespec for current RTC time + * + * Return a delta between the system time and the RTC time, such + * that system time can be restored later with restore_time_delta() + */ +void save_time_delta(struct timespec *delta, struct timespec *rtc) +{ + set_normalized_timespec(delta, + xtime.tv_sec - rtc->tv_sec, + xtime.tv_nsec - rtc->tv_nsec); +} +EXPORT_SYMBOL(save_time_delta); + +/** + * restore_time_delta - Restore the current system time + * @delta: delta returned by save_time_delta() + * @rtc: pointer to timespec for current RTC time + */ +void restore_time_delta(struct timespec *delta, struct timespec *rtc) +{ + struct timespec ts; + + set_normalized_timespec(&ts, + delta->tv_sec + rtc->tv_sec, + delta->tv_nsec + rtc->tv_nsec); + + do_settimeofday(&ts); +} +EXPORT_SYMBOL(restore_time_delta); + #ifndef CONFIG_GENERIC_CLOCKEVENTS /* * Kernel system timer support. @@ -159,6 +336,7 @@ void timer_tick(void) { profile_tick(CPU_PROFILING); do_leds(); + do_set_rtc(); write_seqlock(&xtime_lock); do_timer(1); write_sequnlock(&xtime_lock); diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index 1621e5327b2a..3f361a783f43 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -12,17 +12,15 @@ * 'linux/arch/arm/lib/traps.S'. Mostly a debugging aid, but will probably * kill the offending process. */ +#include #include +#include #include #include -#include -#include -#include -#include -#include -#include #include +#include #include +#include #include #include @@ -226,21 +224,14 @@ void show_stack(struct task_struct *tsk, unsigned long *sp) #define S_SMP "" #endif -static int __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs) +static void __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs) { struct task_struct *tsk = thread->task; static int die_counter; - int ret; printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", str, err, ++die_counter); sysfs_printk_last_file(); - - /* trap and error numbers are mostly meaningless on ARM */ - ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV); - if (ret == NOTIFY_STOP) - return ret; - print_modules(); __show_regs(regs); printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n", @@ -252,8 +243,6 @@ static int __die(const char *str, int err, struct thread_info *thread, struct pt dump_backtrace(regs, tsk); dump_instr(KERN_EMERG, regs); } - - return ret; } DEFINE_SPINLOCK(die_lock); @@ -261,21 +250,16 @@ DEFINE_SPINLOCK(die_lock); /* * This function is protected against re-entrancy. */ -void die(const char *str, struct pt_regs *regs, int err) +NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) { struct thread_info *thread = current_thread_info(); - int ret; oops_enter(); spin_lock_irq(&die_lock); console_verbose(); bust_spinlocks(1); - ret = __die(str, err, thread, regs); - - if (regs && kexec_should_crash(thread->task)) - crash_kexec(regs); - + __die(str, err, thread, regs); bust_spinlocks(0); add_taint(TAINT_DIE); spin_unlock_irq(&die_lock); @@ -283,10 +267,11 @@ void die(const char *str, struct pt_regs *regs, int err) if (in_interrupt()) panic("Fatal exception in interrupt"); + if (panic_on_oops) panic("Fatal exception"); - if (ret != NOTIFY_STOP) - do_exit(SIGSEGV); + + do_exit(SIGSEGV); } void arm_notify_die(const char *str, struct pt_regs *regs, diff --git a/trunk/arch/arm/kernel/vmlinux.lds.S b/trunk/arch/arm/kernel/vmlinux.lds.S index b16c07914b55..4957e13ef55b 100644 --- a/trunk/arch/arm/kernel/vmlinux.lds.S +++ b/trunk/arch/arm/kernel/vmlinux.lds.S @@ -43,6 +43,10 @@ SECTIONS INIT_SETUP(16) + __early_begin = .; + *(.early_param.init) + __early_end = .; + INIT_CALLS CON_INITCALL SECURITY_INITCALL diff --git a/trunk/arch/arm/kernel/xscale-cp0.c b/trunk/arch/arm/kernel/xscale-cp0.c index 1796157e3dd5..17127db906fa 100644 --- a/trunk/arch/arm/kernel/xscale-cp0.c +++ b/trunk/arch/arm/kernel/xscale-cp0.c @@ -70,7 +70,7 @@ static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t) * initialised state information on the first fault. */ - case THREAD_NOTIFY_EXIT: + case THREAD_NOTIFY_RELEASE: iwmmxt_task_release(thread); break; diff --git a/trunk/arch/arm/mach-aaec2000/include/mach/debug-macro.S b/trunk/arch/arm/mach-aaec2000/include/mach/debug-macro.S index a9cac368bfe6..0b6351d7c389 100644 --- a/trunk/arch/arm/mach-aaec2000/include/mach/debug-macro.S +++ b/trunk/arch/arm/mach-aaec2000/include/mach/debug-macro.S @@ -10,7 +10,7 @@ */ #include "hardware.h" - .macro addruart, rx, tmp + .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? moveq \rx, #0x80000000 @ physical diff --git a/trunk/arch/arm/mach-at91/Kconfig b/trunk/arch/arm/mach-at91/Kconfig index 2db43a5ddd9b..0b2ee953f164 100644 --- a/trunk/arch/arm/mach-at91/Kconfig +++ b/trunk/arch/arm/mach-at91/Kconfig @@ -89,12 +89,6 @@ config ARCH_AT91CAP9 select GENERIC_CLOCKEVENTS select HAVE_FB_ATMEL -config ARCH_AT572D940HF - bool "AT572D940HF" - select CPU_ARM926T - select GENERIC_TIME - select GENERIC_CLOCKEVENTS - config ARCH_AT91X40 bool "AT91x40" @@ -396,23 +390,6 @@ endif # ---------------------------------------------------------- -if ARCH_AT572D940HF - -comment "AT572D940HF Board Type" - -config MACH_AT572D940HFEB - bool "AT572D940HF-EK" - depends on ARCH_AT572D940HF - select HAVE_AT91_DATAFLASH_CARD - select HAVE_NAND_ATMEL_BUSWIDTH_16 - help - Select this if you are using Atmel's AT572D940HF-EK evaluation kit. - - -endif - -# ---------------------------------------------------------- - if ARCH_AT91X40 comment "AT91X40 Board Type" diff --git a/trunk/arch/arm/mach-at91/Makefile b/trunk/arch/arm/mach-at91/Makefile index 027dd570dcc3..709fbad4a3ee 100644 --- a/trunk/arch/arm/mach-at91/Makefile +++ b/trunk/arch/arm/mach-at91/Makefile @@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devi obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o -obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o # AT91RM9200 board-specific support @@ -70,9 +69,6 @@ obj-$(CONFIG_MACH_AT91SAM9G45EKES) += board-sam9m10g45ek.o # AT91CAP9 board-specific support obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o -# AT572D940HF board-specific support -obj-$(CONFIG_MACH_AT572D940HFEB) += board-at572d940hf_ek.o - # AT91X40 board-specific support obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o diff --git a/trunk/arch/arm/mach-at91/at572d940hf.c b/trunk/arch/arm/mach-at91/at572d940hf.c deleted file mode 100644 index a6b9c68c003a..000000000000 --- a/trunk/arch/arm/mach-at91/at572d940hf.c +++ /dev/null @@ -1,377 +0,0 @@ -/* - * arch/arm/mach-at91/at572d940hf.c - * - * Antonio R. Costa - * Copyright (C) 2008 Atmel - * - * Copyright (C) 2005 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#include - -#include -#include -#include -#include -#include -#include - -#include "generic.h" -#include "clock.h" - -static struct map_desc at572d940hf_io_desc[] __initdata = { - { - .virtual = AT91_VA_BASE_SYS, - .pfn = __phys_to_pfn(AT91_BASE_SYS), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = AT91_IO_VIRT_BASE - AT572D940HF_SRAM_SIZE, - .pfn = __phys_to_pfn(AT572D940HF_SRAM_BASE), - .length = AT572D940HF_SRAM_SIZE, - .type = MT_DEVICE, - }, -}; - -/* -------------------------------------------------------------------- - * Clocks - * -------------------------------------------------------------------- */ - -/* - * The peripheral clocks. - */ -static struct clk pioA_clk = { - .name = "pioA_clk", - .pmc_mask = 1 << AT572D940HF_ID_PIOA, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk pioB_clk = { - .name = "pioB_clk", - .pmc_mask = 1 << AT572D940HF_ID_PIOB, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk pioC_clk = { - .name = "pioC_clk", - .pmc_mask = 1 << AT572D940HF_ID_PIOC, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk macb_clk = { - .name = "macb_clk", - .pmc_mask = 1 << AT572D940HF_ID_EMAC, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk usart0_clk = { - .name = "usart0_clk", - .pmc_mask = 1 << AT572D940HF_ID_US0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk usart1_clk = { - .name = "usart1_clk", - .pmc_mask = 1 << AT572D940HF_ID_US1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk usart2_clk = { - .name = "usart2_clk", - .pmc_mask = 1 << AT572D940HF_ID_US2, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mmc_clk = { - .name = "mci_clk", - .pmc_mask = 1 << AT572D940HF_ID_MCI, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk udc_clk = { - .name = "udc_clk", - .pmc_mask = 1 << AT572D940HF_ID_UDP, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk twi0_clk = { - .name = "twi0_clk", - .pmc_mask = 1 << AT572D940HF_ID_TWI0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk spi0_clk = { - .name = "spi0_clk", - .pmc_mask = 1 << AT572D940HF_ID_SPI0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk spi1_clk = { - .name = "spi1_clk", - .pmc_mask = 1 << AT572D940HF_ID_SPI1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk ssc0_clk = { - .name = "ssc0_clk", - .pmc_mask = 1 << AT572D940HF_ID_SSC0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk ssc1_clk = { - .name = "ssc1_clk", - .pmc_mask = 1 << AT572D940HF_ID_SSC1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk ssc2_clk = { - .name = "ssc2_clk", - .pmc_mask = 1 << AT572D940HF_ID_SSC2, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk tc0_clk = { - .name = "tc0_clk", - .pmc_mask = 1 << AT572D940HF_ID_TC0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk tc1_clk = { - .name = "tc1_clk", - .pmc_mask = 1 << AT572D940HF_ID_TC1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk tc2_clk = { - .name = "tc2_clk", - .pmc_mask = 1 << AT572D940HF_ID_TC2, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk ohci_clk = { - .name = "ohci_clk", - .pmc_mask = 1 << AT572D940HF_ID_UHP, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk ssc3_clk = { - .name = "ssc3_clk", - .pmc_mask = 1 << AT572D940HF_ID_SSC3, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk twi1_clk = { - .name = "twi1_clk", - .pmc_mask = 1 << AT572D940HF_ID_TWI1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk can0_clk = { - .name = "can0_clk", - .pmc_mask = 1 << AT572D940HF_ID_CAN0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk can1_clk = { - .name = "can1_clk", - .pmc_mask = 1 << AT572D940HF_ID_CAN1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mAgicV_clk = { - .name = "mAgicV_clk", - .pmc_mask = 1 << AT572D940HF_ID_MSIRQ0, - .type = CLK_TYPE_PERIPHERAL, -}; - - -static struct clk *periph_clocks[] __initdata = { - &pioA_clk, - &pioB_clk, - &pioC_clk, - &macb_clk, - &usart0_clk, - &usart1_clk, - &usart2_clk, - &mmc_clk, - &udc_clk, - &twi0_clk, - &spi0_clk, - &spi1_clk, - &ssc0_clk, - &ssc1_clk, - &ssc2_clk, - &tc0_clk, - &tc1_clk, - &tc2_clk, - &ohci_clk, - &ssc3_clk, - &twi1_clk, - &can0_clk, - &can1_clk, - &mAgicV_clk, - /* irq0 .. irq2 */ -}; - -/* - * The five programmable clocks. - * You must configure pin multiplexing to bring these signals out. - */ -static struct clk pck0 = { - .name = "pck0", - .pmc_mask = AT91_PMC_PCK0, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 0, -}; -static struct clk pck1 = { - .name = "pck1", - .pmc_mask = AT91_PMC_PCK1, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 1, -}; -static struct clk pck2 = { - .name = "pck2", - .pmc_mask = AT91_PMC_PCK2, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 2, -}; -static struct clk pck3 = { - .name = "pck3", - .pmc_mask = AT91_PMC_PCK3, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 3, -}; - -static struct clk mAgicV_mem_clk = { - .name = "mAgicV_mem_clk", - .pmc_mask = AT91_PMC_PCK4, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 4, -}; - -/* HClocks */ -static struct clk hck0 = { - .name = "hck0", - .pmc_mask = AT91_PMC_HCK0, - .type = CLK_TYPE_SYSTEM, - .id = 0, -}; -static struct clk hck1 = { - .name = "hck1", - .pmc_mask = AT91_PMC_HCK1, - .type = CLK_TYPE_SYSTEM, - .id = 1, -}; - -static void __init at572d940hf_register_clocks(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) - clk_register(periph_clocks[i]); - - clk_register(&pck0); - clk_register(&pck1); - clk_register(&pck2); - clk_register(&pck3); - clk_register(&mAgicV_mem_clk); - - clk_register(&hck0); - clk_register(&hck1); -} - -/* -------------------------------------------------------------------- - * GPIO - * -------------------------------------------------------------------- */ - -static struct at91_gpio_bank at572d940hf_gpio[] = { - { - .id = AT572D940HF_ID_PIOA, - .offset = AT91_PIOA, - .clock = &pioA_clk, - }, { - .id = AT572D940HF_ID_PIOB, - .offset = AT91_PIOB, - .clock = &pioB_clk, - }, { - .id = AT572D940HF_ID_PIOC, - .offset = AT91_PIOC, - .clock = &pioC_clk, - } -}; - -static void at572d940hf_reset(void) -{ - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); -} - - -/* -------------------------------------------------------------------- - * AT572D940HF processor initialization - * -------------------------------------------------------------------- */ - -void __init at572d940hf_initialize(unsigned long main_clock) -{ - /* Map peripherals */ - iotable_init(at572d940hf_io_desc, ARRAY_SIZE(at572d940hf_io_desc)); - - at91_arch_reset = at572d940hf_reset; - at91_extern_irq = (1 << AT572D940HF_ID_IRQ0) | (1 << AT572D940HF_ID_IRQ1) - | (1 << AT572D940HF_ID_IRQ2); - - /* Init clock subsystem */ - at91_clock_init(main_clock); - - /* Register the processor-specific clocks */ - at572d940hf_register_clocks(); - - /* Register GPIO subsystem */ - at91_gpio_init(at572d940hf_gpio, 3); -} - -/* -------------------------------------------------------------------- - * Interrupt initialization - * -------------------------------------------------------------------- */ - -/* - * The default interrupt priority levels (0 = lowest, 7 = highest). - */ -static unsigned int at572d940hf_default_irq_priority[NR_AIC_IRQS] __initdata = { - 7, /* Advanced Interrupt Controller */ - 7, /* System Peripherals */ - 0, /* Parallel IO Controller A */ - 0, /* Parallel IO Controller B */ - 0, /* Parallel IO Controller C */ - 3, /* Ethernet */ - 6, /* USART 0 */ - 6, /* USART 1 */ - 6, /* USART 2 */ - 0, /* Multimedia Card Interface */ - 4, /* USB Device Port */ - 0, /* Two-Wire Interface 0 */ - 6, /* Serial Peripheral Interface 0 */ - 6, /* Serial Peripheral Interface 1 */ - 5, /* Serial Synchronous Controller 0 */ - 5, /* Serial Synchronous Controller 1 */ - 5, /* Serial Synchronous Controller 2 */ - 0, /* Timer Counter 0 */ - 0, /* Timer Counter 1 */ - 0, /* Timer Counter 2 */ - 3, /* USB Host port */ - 3, /* Serial Synchronous Controller 3 */ - 0, /* Two-Wire Interface 1 */ - 0, /* CAN Controller 0 */ - 0, /* CAN Controller 1 */ - 0, /* mAgicV HALT line */ - 0, /* mAgicV SIRQ0 line */ - 0, /* mAgicV exception line */ - 0, /* mAgicV end of DMA line */ - 0, /* Advanced Interrupt Controller */ - 0, /* Advanced Interrupt Controller */ - 0, /* Advanced Interrupt Controller */ -}; - -void __init at572d940hf_init_interrupts(unsigned int priority[NR_AIC_IRQS]) -{ - if (!priority) - priority = at572d940hf_default_irq_priority; - - /* Initialize the AIC interrupt controller */ - at91_aic_init(priority); - - /* Enable GPIO interrupts */ - at91_gpio_irq_setup(); -} - diff --git a/trunk/arch/arm/mach-at91/at572d940hf_devices.c b/trunk/arch/arm/mach-at91/at572d940hf_devices.c deleted file mode 100644 index 0fc20a240782..000000000000 --- a/trunk/arch/arm/mach-at91/at572d940hf_devices.c +++ /dev/null @@ -1,970 +0,0 @@ -/* - * arch/arm/mach-at91/at572d940hf_devices.c - * - * Copyright (C) 2008 Atmel Antonio R. Costa - * Copyright (C) 2005 Thibaut VARENE - * Copyright (C) 2005 David Brownell - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include "generic.h" -#include "sam9_smc.h" - - -/* -------------------------------------------------------------------- - * USB Host - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static u64 ohci_dmamask = DMA_BIT_MASK(32); -static struct at91_usbh_data usbh_data; - -static struct resource usbh_resources[] = { - [0] = { - .start = AT572D940HF_UHP_BASE, - .end = AT572D940HF_UHP_BASE + SZ_1M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_UHP, - .end = AT572D940HF_ID_UHP, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at572d940hf_usbh_device = { - .name = "at91_ohci", - .id = -1, - .dev = { - .dma_mask = &ohci_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &usbh_data, - }, - .resource = usbh_resources, - .num_resources = ARRAY_SIZE(usbh_resources), -}; - -void __init at91_add_device_usbh(struct at91_usbh_data *data) -{ - if (!data) - return; - - usbh_data = *data; - platform_device_register(&at572d940hf_usbh_device); - -} -#else -void __init at91_add_device_usbh(struct at91_usbh_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * USB Device (Gadget) - * -------------------------------------------------------------------- */ - -#ifdef CONFIG_USB_GADGET_AT91 -static struct at91_udc_data udc_data; - -static struct resource udc_resources[] = { - [0] = { - .start = AT572D940HF_BASE_UDP, - .end = AT572D940HF_BASE_UDP + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_UDP, - .end = AT572D940HF_ID_UDP, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at572d940hf_udc_device = { - .name = "at91_udc", - .id = -1, - .dev = { - .platform_data = &udc_data, - }, - .resource = udc_resources, - .num_resources = ARRAY_SIZE(udc_resources), -}; - -void __init at91_add_device_udc(struct at91_udc_data *data) -{ - if (!data) - return; - - if (data->vbus_pin) { - at91_set_gpio_input(data->vbus_pin, 0); - at91_set_deglitch(data->vbus_pin, 1); - } - - /* Pullup pin is handled internally */ - - udc_data = *data; - platform_device_register(&at572d940hf_udc_device); -} -#else -void __init at91_add_device_udc(struct at91_udc_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * Ethernet - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) -static u64 eth_dmamask = DMA_BIT_MASK(32); -static struct at91_eth_data eth_data; - -static struct resource eth_resources[] = { - [0] = { - .start = AT572D940HF_BASE_EMAC, - .end = AT572D940HF_BASE_EMAC + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_EMAC, - .end = AT572D940HF_ID_EMAC, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at572d940hf_eth_device = { - .name = "macb", - .id = -1, - .dev = { - .dma_mask = ð_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = ð_data, - }, - .resource = eth_resources, - .num_resources = ARRAY_SIZE(eth_resources), -}; - -void __init at91_add_device_eth(struct at91_eth_data *data) -{ - if (!data) - return; - - if (data->phy_irq_pin) { - at91_set_gpio_input(data->phy_irq_pin, 0); - at91_set_deglitch(data->phy_irq_pin, 1); - } - - /* Only RMII is supported */ - data->is_rmii = 1; - - /* Pins used for RMII */ - at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXCK_EREFCK */ - at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ - at91_set_A_periph(AT91_PIN_PA18, 0); /* ERX0 */ - at91_set_A_periph(AT91_PIN_PA19, 0); /* ERX1 */ - at91_set_A_periph(AT91_PIN_PA20, 0); /* ERXER */ - at91_set_A_periph(AT91_PIN_PA23, 0); /* ETXEN */ - at91_set_A_periph(AT91_PIN_PA21, 0); /* ETX0 */ - at91_set_A_periph(AT91_PIN_PA22, 0); /* ETX1 */ - at91_set_A_periph(AT91_PIN_PA13, 0); /* EMDIO */ - at91_set_A_periph(AT91_PIN_PA14, 0); /* EMDC */ - - eth_data = *data; - platform_device_register(&at572d940hf_eth_device); -} -#else -void __init at91_add_device_eth(struct at91_eth_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * MMC / SD - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -static u64 mmc_dmamask = DMA_BIT_MASK(32); -static struct at91_mmc_data mmc_data; - -static struct resource mmc_resources[] = { - [0] = { - .start = AT572D940HF_BASE_MCI, - .end = AT572D940HF_BASE_MCI + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_MCI, - .end = AT572D940HF_ID_MCI, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at572d940hf_mmc_device = { - .name = "at91_mci", - .id = -1, - .dev = { - .dma_mask = &mmc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &mmc_data, - }, - .resource = mmc_resources, - .num_resources = ARRAY_SIZE(mmc_resources), -}; - -void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) -{ - if (!data) - return; - - /* input/irq */ - if (data->det_pin) { - at91_set_gpio_input(data->det_pin, 1); - at91_set_deglitch(data->det_pin, 1); - } - if (data->wp_pin) - at91_set_gpio_input(data->wp_pin, 1); - if (data->vcc_pin) - at91_set_gpio_output(data->vcc_pin, 0); - - /* CLK */ - at91_set_A_periph(AT91_PIN_PC22, 0); - - /* CMD */ - at91_set_A_periph(AT91_PIN_PC23, 1); - - /* DAT0, maybe DAT1..DAT3 */ - at91_set_A_periph(AT91_PIN_PC24, 1); - if (data->wire4) { - at91_set_A_periph(AT91_PIN_PC25, 1); - at91_set_A_periph(AT91_PIN_PC26, 1); - at91_set_A_periph(AT91_PIN_PC27, 1); - } - - mmc_data = *data; - platform_device_register(&at572d940hf_mmc_device); -} -#else -void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * NAND / SmartMedia - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE) -static struct atmel_nand_data nand_data; - -#define NAND_BASE AT91_CHIPSELECT_3 - -static struct resource nand_resources[] = { - { - .start = NAND_BASE, - .end = NAND_BASE + SZ_256M - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device at572d940hf_nand_device = { - .name = "atmel_nand", - .id = -1, - .dev = { - .platform_data = &nand_data, - }, - .resource = nand_resources, - .num_resources = ARRAY_SIZE(nand_resources), -}; - -void __init at91_add_device_nand(struct atmel_nand_data *data) -{ - unsigned long csa; - - if (!data) - return; - - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); - - /* enable pin */ - if (data->enable_pin) - at91_set_gpio_output(data->enable_pin, 1); - - /* ready/busy pin */ - if (data->rdy_pin) - at91_set_gpio_input(data->rdy_pin, 1); - - /* card detect pin */ - if (data->det_pin) - at91_set_gpio_input(data->det_pin, 1); - - at91_set_A_periph(AT91_PIN_PB28, 0); /* A[22] */ - at91_set_B_periph(AT91_PIN_PA28, 0); /* NANDOE */ - at91_set_B_periph(AT91_PIN_PA29, 0); /* NANDWE */ - - nand_data = *data; - platform_device_register(&at572d940hf_nand_device); -} - -#else -void __init at91_add_device_nand(struct atmel_nand_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * TWI (i2c) - * -------------------------------------------------------------------- */ - -/* - * Prefer the GPIO code since the TWI controller isn't robust - * (gets overruns and underruns under load) and can only issue - * repeated STARTs in one scenario (the driver doesn't yet handle them). - */ - -#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) - -static struct i2c_gpio_platform_data pdata = { - .sda_pin = AT91_PIN_PC7, - .sda_is_open_drain = 1, - .scl_pin = AT91_PIN_PC8, - .scl_is_open_drain = 1, - .udelay = 2, /* ~100 kHz */ -}; - -static struct platform_device at572d940hf_twi_device { - .name = "i2c-gpio", - .id = -1, - .dev.platform_data = &pdata, -}; - -void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) -{ - at91_set_GPIO_periph(AT91_PIN_PC7, 1); /* TWD (SDA) */ - at91_set_multi_drive(AT91_PIN_PC7, 1); - - at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */ - at91_set_multi_drive(AT91_PIN_PC8, 1); - - i2c_register_board_info(0, devices, nr_devices); - platform_device_register(&at572d940hf_twi_device); -} - -#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) - -static struct resource twi0_resources[] = { - [0] = { - .start = AT572D940HF_BASE_TWI0, - .end = AT572D940HF_BASE_TWI0 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_TWI0, - .end = AT572D940HF_ID_TWI0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at572d940hf_twi0_device = { - .name = "at91_i2c", - .id = 0, - .resource = twi0_resources, - .num_resources = ARRAY_SIZE(twi0_resources), -}; - -static struct resource twi1_resources[] = { - [0] = { - .start = AT572D940HF_BASE_TWI1, - .end = AT572D940HF_BASE_TWI1 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_TWI1, - .end = AT572D940HF_ID_TWI1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at572d940hf_twi1_device = { - .name = "at91_i2c", - .id = 1, - .resource = twi1_resources, - .num_resources = ARRAY_SIZE(twi1_resources), -}; - -void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) -{ - /* pins used for TWI0 interface */ - at91_set_A_periph(AT91_PIN_PC7, 0); /* TWD */ - at91_set_multi_drive(AT91_PIN_PC7, 1); - - at91_set_A_periph(AT91_PIN_PC8, 0); /* TWCK */ - at91_set_multi_drive(AT91_PIN_PC8, 1); - - /* pins used for TWI1 interface */ - at91_set_A_periph(AT91_PIN_PC20, 0); /* TWD */ - at91_set_multi_drive(AT91_PIN_PC20, 1); - - at91_set_A_periph(AT91_PIN_PC21, 0); /* TWCK */ - at91_set_multi_drive(AT91_PIN_PC21, 1); - - i2c_register_board_info(0, devices, nr_devices); - platform_device_register(&at572d940hf_twi0_device); - platform_device_register(&at572d940hf_twi1_device); -} -#else -void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {} -#endif - - -/* -------------------------------------------------------------------- - * SPI - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -static u64 spi_dmamask = DMA_BIT_MASK(32); - -static struct resource spi0_resources[] = { - [0] = { - .start = AT572D940HF_BASE_SPI0, - .end = AT572D940HF_BASE_SPI0 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_SPI0, - .end = AT572D940HF_ID_SPI0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at572d940hf_spi0_device = { - .name = "atmel_spi", - .id = 0, - .dev = { - .dma_mask = &spi_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = spi0_resources, - .num_resources = ARRAY_SIZE(spi0_resources), -}; - -static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; - -static struct resource spi1_resources[] = { - [0] = { - .start = AT572D940HF_BASE_SPI1, - .end = AT572D940HF_BASE_SPI1 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_SPI1, - .end = AT572D940HF_ID_SPI1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at572d940hf_spi1_device = { - .name = "atmel_spi", - .id = 1, - .dev = { - .dma_mask = &spi_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = spi1_resources, - .num_resources = ARRAY_SIZE(spi1_resources), -}; - -static const unsigned spi1_standard_cs[4] = { AT91_PIN_PC3, AT91_PIN_PC4, AT91_PIN_PC5, AT91_PIN_PC6 }; - -void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) -{ - int i; - unsigned long cs_pin; - short enable_spi0 = 0; - short enable_spi1 = 0; - - /* Choose SPI chip-selects */ - for (i = 0; i < nr_devices; i++) { - if (devices[i].controller_data) - cs_pin = (unsigned long) devices[i].controller_data; - else if (devices[i].bus_num == 0) - cs_pin = spi0_standard_cs[devices[i].chip_select]; - else - cs_pin = spi1_standard_cs[devices[i].chip_select]; - - if (devices[i].bus_num == 0) - enable_spi0 = 1; - else - enable_spi1 = 1; - - /* enable chip-select pin */ - at91_set_gpio_output(cs_pin, 1); - - /* pass chip-select pin to driver */ - devices[i].controller_data = (void *) cs_pin; - } - - spi_register_board_info(devices, nr_devices); - - /* Configure SPI bus(es) */ - if (enable_spi0) { - at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - at91_clock_associate("spi0_clk", &at572d940hf_spi0_device.dev, "spi_clk"); - platform_device_register(&at572d940hf_spi0_device); - } - if (enable_spi1) { - at91_set_A_periph(AT91_PIN_PC0, 0); /* SPI1_MISO */ - at91_set_A_periph(AT91_PIN_PC1, 0); /* SPI1_MOSI */ - at91_set_A_periph(AT91_PIN_PC2, 0); /* SPI1_SPCK */ - - at91_clock_associate("spi1_clk", &at572d940hf_spi1_device.dev, "spi_clk"); - platform_device_register(&at572d940hf_spi1_device); - } -} -#else -void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} -#endif - - -/* -------------------------------------------------------------------- - * Timer/Counter blocks - * -------------------------------------------------------------------- */ - -#ifdef CONFIG_ATMEL_TCLIB - -static struct resource tcb_resources[] = { - [0] = { - .start = AT572D940HF_BASE_TCB, - .end = AT572D940HF_BASE_TCB + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_TC0, - .end = AT572D940HF_ID_TC0, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = AT572D940HF_ID_TC1, - .end = AT572D940HF_ID_TC1, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = AT572D940HF_ID_TC2, - .end = AT572D940HF_ID_TC2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at572d940hf_tcb_device = { - .name = "atmel_tcb", - .id = 0, - .resource = tcb_resources, - .num_resources = ARRAY_SIZE(tcb_resources), -}; - -static void __init at91_add_device_tc(void) -{ - /* this chip has a separate clock and irq for each TC channel */ - at91_clock_associate("tc0_clk", &at572d940hf_tcb_device.dev, "t0_clk"); - at91_clock_associate("tc1_clk", &at572d940hf_tcb_device.dev, "t1_clk"); - at91_clock_associate("tc2_clk", &at572d940hf_tcb_device.dev, "t2_clk"); - platform_device_register(&at572d940hf_tcb_device); -} -#else -static void __init at91_add_device_tc(void) { } -#endif - - -/* -------------------------------------------------------------------- - * RTT - * -------------------------------------------------------------------- */ - -static struct resource rtt_resources[] = { - { - .start = AT91_BASE_SYS + AT91_RTT, - .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device at572d940hf_rtt_device = { - .name = "at91_rtt", - .id = 0, - .resource = rtt_resources, - .num_resources = ARRAY_SIZE(rtt_resources), -}; - -static void __init at91_add_device_rtt(void) -{ - platform_device_register(&at572d940hf_rtt_device); -} - - -/* -------------------------------------------------------------------- - * Watchdog - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) -static struct platform_device at572d940hf_wdt_device = { - .name = "at91_wdt", - .id = -1, - .num_resources = 0, -}; - -static void __init at91_add_device_watchdog(void) -{ - platform_device_register(&at572d940hf_wdt_device); -} -#else -static void __init at91_add_device_watchdog(void) {} -#endif - - -/* -------------------------------------------------------------------- - * UART - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_SERIAL_ATMEL) -static struct resource dbgu_resources[] = { - [0] = { - .start = AT91_VA_BASE_SYS + AT91_DBGU, - .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct atmel_uart_data dbgu_data = { - .use_dma_tx = 0, - .use_dma_rx = 0, /* DBGU not capable of receive DMA */ - .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), -}; - -static u64 dbgu_dmamask = DMA_BIT_MASK(32); - -static struct platform_device at572d940hf_dbgu_device = { - .name = "atmel_usart", - .id = 0, - .dev = { - .dma_mask = &dbgu_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &dbgu_data, - }, - .resource = dbgu_resources, - .num_resources = ARRAY_SIZE(dbgu_resources), -}; - -static inline void configure_dbgu_pins(void) -{ - at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ - at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ -} - -static struct resource uart0_resources[] = { - [0] = { - .start = AT572D940HF_BASE_US0, - .end = AT572D940HF_BASE_US0 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_US0, - .end = AT572D940HF_ID_US0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct atmel_uart_data uart0_data = { - .use_dma_tx = 1, - .use_dma_rx = 1, -}; - -static u64 uart0_dmamask = DMA_BIT_MASK(32); - -static struct platform_device at572d940hf_uart0_device = { - .name = "atmel_usart", - .id = 1, - .dev = { - .dma_mask = &uart0_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &uart0_data, - }, - .resource = uart0_resources, - .num_resources = ARRAY_SIZE(uart0_resources), -}; - -static inline void configure_usart0_pins(unsigned pins) -{ - at91_set_A_periph(AT91_PIN_PA8, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ - - if (pins & ATMEL_UART_RTS) - at91_set_A_periph(AT91_PIN_PA10, 0); /* RTS0 */ - if (pins & ATMEL_UART_CTS) - at91_set_A_periph(AT91_PIN_PA9, 0); /* CTS0 */ -} - -static struct resource uart1_resources[] = { - [0] = { - .start = AT572D940HF_BASE_US1, - .end = AT572D940HF_BASE_US1 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_US1, - .end = AT572D940HF_ID_US1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct atmel_uart_data uart1_data = { - .use_dma_tx = 1, - .use_dma_rx = 1, -}; - -static u64 uart1_dmamask = DMA_BIT_MASK(32); - -static struct platform_device at572d940hf_uart1_device = { - .name = "atmel_usart", - .id = 2, - .dev = { - .dma_mask = &uart1_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &uart1_data, - }, - .resource = uart1_resources, - .num_resources = ARRAY_SIZE(uart1_resources), -}; - -static inline void configure_usart1_pins(unsigned pins) -{ - at91_set_A_periph(AT91_PIN_PC10, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PC9 , 0); /* RXD1 */ - - if (pins & ATMEL_UART_RTS) - at91_set_A_periph(AT91_PIN_PC12, 0); /* RTS1 */ - if (pins & ATMEL_UART_CTS) - at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS1 */ -} - -static struct resource uart2_resources[] = { - [0] = { - .start = AT572D940HF_BASE_US2, - .end = AT572D940HF_BASE_US2 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT572D940HF_ID_US2, - .end = AT572D940HF_ID_US2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct atmel_uart_data uart2_data = { - .use_dma_tx = 1, - .use_dma_rx = 1, -}; - -static u64 uart2_dmamask = DMA_BIT_MASK(32); - -static struct platform_device at572d940hf_uart2_device = { - .name = "atmel_usart", - .id = 3, - .dev = { - .dma_mask = &uart2_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &uart2_data, - }, - .resource = uart2_resources, - .num_resources = ARRAY_SIZE(uart2_resources), -}; - -static inline void configure_usart2_pins(unsigned pins) -{ - at91_set_A_periph(AT91_PIN_PC15, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PC14, 0); /* RXD2 */ - - if (pins & ATMEL_UART_RTS) - at91_set_A_periph(AT91_PIN_PC17, 0); /* RTS2 */ - if (pins & ATMEL_UART_CTS) - at91_set_A_periph(AT91_PIN_PC16, 0); /* CTS2 */ -} - -static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -struct platform_device *atmel_default_console_device; /* the serial console device */ - -void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) -{ - struct platform_device *pdev; - - switch (id) { - case 0: /* DBGU */ - pdev = &at572d940hf_dbgu_device; - configure_dbgu_pins(); - at91_clock_associate("mck", &pdev->dev, "usart"); - break; - case AT572D940HF_ID_US0: - pdev = &at572d940hf_uart0_device; - configure_usart0_pins(pins); - at91_clock_associate("usart0_clk", &pdev->dev, "usart"); - break; - case AT572D940HF_ID_US1: - pdev = &at572d940hf_uart1_device; - configure_usart1_pins(pins); - at91_clock_associate("usart1_clk", &pdev->dev, "usart"); - break; - case AT572D940HF_ID_US2: - pdev = &at572d940hf_uart2_device; - configure_usart2_pins(pins); - at91_clock_associate("usart2_clk", &pdev->dev, "usart"); - break; - default: - return; - } - pdev->id = portnr; /* update to mapped ID */ - - if (portnr < ATMEL_MAX_UART) - at91_uarts[portnr] = pdev; -} - -void __init at91_set_serial_console(unsigned portnr) -{ - if (portnr < ATMEL_MAX_UART) - atmel_default_console_device = at91_uarts[portnr]; -} - -void __init at91_add_device_serial(void) -{ - int i; - - for (i = 0; i < ATMEL_MAX_UART; i++) { - if (at91_uarts[i]) - platform_device_register(at91_uarts[i]); - } - - if (!atmel_default_console_device) - printk(KERN_INFO "AT91: No default serial console defined.\n"); -} - -#else -void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} -void __init at91_set_serial_console(unsigned portnr) {} -void __init at91_add_device_serial(void) {} -#endif - - -/* -------------------------------------------------------------------- - * mAgic - * -------------------------------------------------------------------- */ - -#ifdef CONFIG_MAGICV -static struct resource mAgic_resources[] = { - { - .start = AT91_MAGIC_PM_BASE, - .end = AT91_MAGIC_PM_BASE + AT91_MAGIC_PM_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = AT91_MAGIC_DM_I_BASE, - .end = AT91_MAGIC_DM_I_BASE + AT91_MAGIC_DM_I_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = AT91_MAGIC_DM_F_BASE, - .end = AT91_MAGIC_DM_F_BASE + AT91_MAGIC_DM_F_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = AT91_MAGIC_DM_DB_BASE, - .end = AT91_MAGIC_DM_DB_BASE + AT91_MAGIC_DM_DB_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = AT91_MAGIC_REGS_BASE, - .end = AT91_MAGIC_REGS_BASE + AT91_MAGIC_REGS_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = AT91_MAGIC_EXTPAGE_BASE, - .end = AT91_MAGIC_EXTPAGE_BASE + AT91_MAGIC_EXTPAGE_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = AT572D940HF_ID_MSIRQ0, - .end = AT572D940HF_ID_MSIRQ0, - .flags = IORESOURCE_IRQ, - }, - { - .start = AT572D940HF_ID_MHALT, - .end = AT572D940HF_ID_MHALT, - .flags = IORESOURCE_IRQ, - }, - { - .start = AT572D940HF_ID_MEXC, - .end = AT572D940HF_ID_MEXC, - .flags = IORESOURCE_IRQ, - }, - { - .start = AT572D940HF_ID_MEDMA, - .end = AT572D940HF_ID_MEDMA, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mAgic_device = { - .name = "mAgic", - .id = -1, - .num_resources = ARRAY_SIZE(mAgic_resources), - .resource = mAgic_resources, -}; - -void __init at91_add_device_mAgic(void) -{ - platform_device_register(&mAgic_device); -} -#else -void __init at91_add_device_mAgic(void) {} -#endif - - -/* -------------------------------------------------------------------- */ - -/* - * These devices are always present and don't need any board-specific - * setup. - */ -static int __init at91_add_standard_devices(void) -{ - at91_add_device_rtt(); - at91_add_device_watchdog(); - at91_add_device_tc(); - return 0; -} - -arch_initcall(at91_add_standard_devices); diff --git a/trunk/arch/arm/mach-at91/board-at572d940hf_ek.c b/trunk/arch/arm/mach-at91/board-at572d940hf_ek.c deleted file mode 100644 index 5daff277f53e..000000000000 --- a/trunk/arch/arm/mach-at91/board-at572d940hf_ek.c +++ /dev/null @@ -1,328 +0,0 @@ -/* - * linux/arch/arm/mach-at91/board-at572d940hf_ek.c - * - * Copyright (C) 2008 Atmel Antonio R. Costa - * Copyright (C) 2005 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "sam9_smc.h" -#include "generic.h" - - -static void __init eb_map_io(void) -{ - /* Initialize processor: 12.500 MHz crystal */ - at572d940hf_initialize(12000000); - - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx & Tx only) */ - at91_register_uart(AT572D940HF_ID_US0, 1, 0); - - /* USART1 on ttyS2. (Rx & Tx only) */ - at91_register_uart(AT572D940HF_ID_US1, 2, 0); - - /* USART2 on ttyS3. (Tx & Rx only */ - at91_register_uart(AT572D940HF_ID_US2, 3, 0); - - /* set serial console to ttyS0 (ie, DBGU) */ - at91_set_serial_console(0); -} - -static void __init eb_init_irq(void) -{ - at572d940hf_init_interrupts(NULL); -} - - -/* - * USB Host Port - */ -static struct at91_usbh_data __initdata eb_usbh_data = { - .ports = 2, -}; - - -/* - * USB Device Port - */ -static struct at91_udc_data __initdata eb_udc_data = { - .vbus_pin = 0, /* no VBUS detection,UDC always on */ - .pullup_pin = 0, /* pull-up driven by UDC */ -}; - - -/* - * MCI (SD/MMC) - */ -static struct at91_mmc_data __initdata eb_mmc_data = { - .wire4 = 1, -/* .det_pin = ... not connected */ -/* .wp_pin = ... not connected */ -/* .vcc_pin = ... not connected */ -}; - - -/* - * MACB Ethernet device - */ -static struct at91_eth_data __initdata eb_eth_data = { - .phy_irq_pin = AT91_PIN_PB25, - .is_rmii = 1, -}; - -/* - * NOR flash - */ - -static struct mtd_partition eb_nor_partitions[] = { - { - .name = "Raw Environment", - .offset = 0, - .size = SZ_4M, - .mask_flags = 0, - }, - { - .name = "OS FS", - .offset = MTDPART_OFS_APPEND, - .size = 3 * SZ_1M, - .mask_flags = 0, - }, - { - .name = "APP FS", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - }, -}; - -static void nor_flash_set_vpp(struct map_info* mi, int i) { -}; - -static struct physmap_flash_data nor_flash_data = { - .width = 4, - .parts = eb_nor_partitions, - .nr_parts = ARRAY_SIZE(eb_nor_partitions), - .set_vpp = nor_flash_set_vpp, -}; - -static struct resource nor_flash_resources[] = { - { - .start = AT91_CHIPSELECT_0, - .end = AT91_CHIPSELECT_0 + SZ_16M - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device nor_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &nor_flash_data, - }, - .resource = nor_flash_resources, - .num_resources = ARRAY_SIZE(nor_flash_resources), -}; - -static struct sam9_smc_config __initdata eb_nor_smc_config = { - .ncs_read_setup = 1, - .nrd_setup = 1, - .ncs_write_setup = 1, - .nwe_setup = 1, - - .ncs_read_pulse = 7, - .nrd_pulse = 7, - .ncs_write_pulse = 7, - .nwe_pulse = 7, - - .read_cycle = 9, - .write_cycle = 9, - - .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_32, - .tdf_cycles = 1, -}; - -static void __init eb_add_device_nor(void) -{ - /* configure chip-select 0 (NOR) */ - sam9_smc_configure(0, &eb_nor_smc_config); - platform_device_register(&nor_flash); -} - -/* - * NAND flash - */ -static struct mtd_partition __initdata eb_nand_partition[] = { - { - .name = "Partition 1", - .offset = 0, - .size = SZ_16M, - }, - { - .name = "Partition 2", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) -{ - *num_partitions = ARRAY_SIZE(eb_nand_partition); - return eb_nand_partition; -} - -static struct atmel_nand_data __initdata eb_nand_data = { - .ale = 22, - .cle = 21, -/* .det_pin = ... not connected */ -/* .rdy_pin = AT91_PIN_PC16, */ - .enable_pin = AT91_PIN_PA15, - .partition_info = nand_partitions, -#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) - .bus_width_16 = 1, -#else - .bus_width_16 = 0, -#endif -}; - -static struct sam9_smc_config __initdata eb_nand_smc_config = { - .ncs_read_setup = 0, - .nrd_setup = 0, - .ncs_write_setup = 1, - .nwe_setup = 1, - - .ncs_read_pulse = 3, - .nrd_pulse = 3, - .ncs_write_pulse = 3, - .nwe_pulse = 3, - - .read_cycle = 5, - .write_cycle = 5, - - .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, - .tdf_cycles = 12, -}; - -static void __init eb_add_device_nand(void) -{ - /* setup bus-width (8 or 16) */ - if (eb_nand_data.bus_width_16) - eb_nand_smc_config.mode |= AT91_SMC_DBW_16; - else - eb_nand_smc_config.mode |= AT91_SMC_DBW_8; - - /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &eb_nand_smc_config); - - at91_add_device_nand(&eb_nand_data); -} - - -/* - * SPI devices - */ -static struct resource rtc_resources[] = { - [0] = { - .start = AT572D940HF_ID_IRQ1, - .end = AT572D940HF_ID_IRQ1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct ds1305_platform_data ds1306_data = { - .is_ds1306 = true, - .en_1hz = false, -}; - -static struct spi_board_info eb_spi_devices[] = { - { /* RTC Dallas DS1306 */ - .modalias = "rtc-ds1305", - .chip_select = 3, - .mode = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA, - .max_speed_hz = 500000, - .bus_num = 0, - .irq = AT572D940HF_ID_IRQ1, - .platform_data = (void *) &ds1306_data, - }, -#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) - { /* Dataflash card */ - .modalias = "mtd_dataflash", - .chip_select = 0, - .max_speed_hz = 15 * 1000 * 1000, - .bus_num = 0, - }, -#endif -}; - -static void __init eb_board_init(void) -{ - /* Serial */ - at91_add_device_serial(); - /* USB Host */ - at91_add_device_usbh(&eb_usbh_data); - /* USB Device */ - at91_add_device_udc(&eb_udc_data); - /* I2C */ - at91_add_device_i2c(NULL, 0); - /* NOR */ - eb_add_device_nor(); - /* NAND */ - eb_add_device_nand(); - /* SPI */ - at91_add_device_spi(eb_spi_devices, ARRAY_SIZE(eb_spi_devices)); - /* MMC */ - at91_add_device_mmc(0, &eb_mmc_data); - /* Ethernet */ - at91_add_device_eth(&eb_eth_data); - /* mAgic */ - at91_add_device_mAgic(); -} - -MACHINE_START(AT572D940HFEB, "Atmel AT91D940HF-EB") - /* Maintainer: Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, - .boot_params = AT91_SDRAM_BASE + 0x100, - .timer = &at91sam926x_timer, - .map_io = eb_map_io, - .init_irq = eb_init_irq, - .init_machine = eb_board_init, -MACHINE_END diff --git a/trunk/arch/arm/mach-at91/clock.c b/trunk/arch/arm/mach-at91/clock.c index 7f7da439341f..c042dcf4725f 100644 --- a/trunk/arch/arm/mach-at91/clock.c +++ b/trunk/arch/arm/mach-at91/clock.c @@ -29,7 +29,6 @@ #include #include "clock.h" -#include "generic.h" /* @@ -629,7 +628,7 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock) at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() || cpu_is_at91sam9g20() || - cpu_is_at91sam9g10() || cpu_is_at572d940hf()) { + cpu_is_at91sam9g10()) { uhpck.pmc_mask = AT91SAM926x_PMC_UHP; udpck.pmc_mask = AT91SAM926x_PMC_UDP; } else if (cpu_is_at91cap9()) { @@ -712,13 +711,12 @@ int __init at91_clock_init(unsigned long main_clock) /* * USB HS clock init */ - if (cpu_has_utmi()) { + if (cpu_has_utmi()) /* * multiplier is hard-wired to 40 * (obtain the USB High Speed 480 MHz when input is 12 MHz) */ utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz; - } /* * USB FS clock init @@ -748,7 +746,7 @@ int __init at91_clock_init(unsigned long main_clock) mck.rate_hz = (mckr & AT91_PMC_MDIV) == AT91SAM9_PMC_MDIV_3 ? freq / 3 : freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ } else { - mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ + mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ } /* Register the PMC's standard clocks */ diff --git a/trunk/arch/arm/mach-at91/clock.h b/trunk/arch/arm/mach-at91/clock.h index 6cf4b78e175d..1ba3b95ff359 100644 --- a/trunk/arch/arm/mach-at91/clock.h +++ b/trunk/arch/arm/mach-at91/clock.h @@ -22,7 +22,7 @@ struct clk { struct clk *parent; u32 pmc_mask; void (*mode)(struct clk *, int); - unsigned id:3; /* PCK0..4, or 32k/main/a/b */ + unsigned id:2; /* PCK0..3, or 32k/main/a/b */ unsigned type; /* clock type */ u16 users; }; diff --git a/trunk/arch/arm/mach-at91/generic.h b/trunk/arch/arm/mach-at91/generic.h index 65c3dc5ba0d0..88e413b38480 100644 --- a/trunk/arch/arm/mach-at91/generic.h +++ b/trunk/arch/arm/mach-at91/generic.h @@ -17,7 +17,6 @@ extern void __init at91sam9rl_initialize(unsigned long main_clock); extern void __init at91sam9g45_initialize(unsigned long main_clock); extern void __init at91x40_initialize(unsigned long main_clock); extern void __init at91cap9_initialize(unsigned long main_clock); -extern void __init at572d940hf_initialize(unsigned long main_clock); /* Interrupts */ extern void __init at91rm9200_init_interrupts(unsigned int priority[]); @@ -28,7 +27,6 @@ extern void __init at91sam9rl_init_interrupts(unsigned int priority[]); extern void __init at91sam9g45_init_interrupts(unsigned int priority[]); extern void __init at91x40_init_interrupts(unsigned int priority[]); extern void __init at91cap9_init_interrupts(unsigned int priority[]); -extern void __init at572d940hf_init_interrupts(unsigned int priority[]); extern void __init at91_aic_init(unsigned int priority[]); /* Timer */ diff --git a/trunk/arch/arm/mach-at91/include/mach/at572d940hf.h b/trunk/arch/arm/mach-at91/include/mach/at572d940hf.h deleted file mode 100644 index 2d9b0af9c4d5..000000000000 --- a/trunk/arch/arm/mach-at91/include/mach/at572d940hf.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * include/mach/at572d940hf.h - * - * Antonio R. Costa - * Copyright (C) 2008 Atmel - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef AT572D940HF_H -#define AT572D940HF_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT572D940HF_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT572D940HF_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT572D940HF_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT572D940HF_ID_EMAC 5 /* MACB ethernet controller */ -#define AT572D940HF_ID_US0 6 /* USART 0 */ -#define AT572D940HF_ID_US1 7 /* USART 1 */ -#define AT572D940HF_ID_US2 8 /* USART 2 */ -#define AT572D940HF_ID_MCI 9 /* Multimedia Card Interface */ -#define AT572D940HF_ID_UDP 10 /* USB Device Port */ -#define AT572D940HF_ID_TWI0 11 /* Two-Wire Interface 0 */ -#define AT572D940HF_ID_SPI0 12 /* Serial Peripheral Interface 0 */ -#define AT572D940HF_ID_SPI1 13 /* Serial Peripheral Interface 1 */ -#define AT572D940HF_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -#define AT572D940HF_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -#define AT572D940HF_ID_SSC2 16 /* Serial Synchronous Controller 2 */ -#define AT572D940HF_ID_TC0 17 /* Timer Counter 0 */ -#define AT572D940HF_ID_TC1 18 /* Timer Counter 1 */ -#define AT572D940HF_ID_TC2 19 /* Timer Counter 2 */ -#define AT572D940HF_ID_UHP 20 /* USB Host port */ -#define AT572D940HF_ID_SSC3 21 /* Serial Synchronous Controller 3 */ -#define AT572D940HF_ID_TWI1 22 /* Two-Wire Interface 1 */ -#define AT572D940HF_ID_CAN0 23 /* CAN Controller 0 */ -#define AT572D940HF_ID_CAN1 24 /* CAN Controller 1 */ -#define AT572D940HF_ID_MHALT 25 /* mAgicV HALT line */ -#define AT572D940HF_ID_MSIRQ0 26 /* mAgicV SIRQ0 line */ -#define AT572D940HF_ID_MEXC 27 /* mAgicV exception line */ -#define AT572D940HF_ID_MEDMA 28 /* mAgicV end of DMA line */ -#define AT572D940HF_ID_IRQ0 29 /* External Interrupt Source (IRQ0) */ -#define AT572D940HF_ID_IRQ1 30 /* External Interrupt Source (IRQ1) */ -#define AT572D940HF_ID_IRQ2 31 /* External Interrupt Source (IRQ2) */ - - -/* - * User Peripheral physical base addresses. - */ -#define AT572D940HF_BASE_TCB 0xfffa0000 -#define AT572D940HF_BASE_TC0 0xfffa0000 -#define AT572D940HF_BASE_TC1 0xfffa0040 -#define AT572D940HF_BASE_TC2 0xfffa0080 -#define AT572D940HF_BASE_UDP 0xfffa4000 -#define AT572D940HF_BASE_MCI 0xfffa8000 -#define AT572D940HF_BASE_TWI0 0xfffac000 -#define AT572D940HF_BASE_US0 0xfffb0000 -#define AT572D940HF_BASE_US1 0xfffb4000 -#define AT572D940HF_BASE_US2 0xfffb8000 -#define AT572D940HF_BASE_SSC0 0xfffbc000 -#define AT572D940HF_BASE_SSC1 0xfffc0000 -#define AT572D940HF_BASE_SSC2 0xfffc4000 -#define AT572D940HF_BASE_SPI0 0xfffc8000 -#define AT572D940HF_BASE_SPI1 0xfffcc000 -#define AT572D940HF_BASE_SSC3 0xfffd0000 -#define AT572D940HF_BASE_TWI1 0xfffd4000 -#define AT572D940HF_BASE_EMAC 0xfffd8000 -#define AT572D940HF_BASE_CAN0 0xfffdc000 -#define AT572D940HF_BASE_CAN1 0xfffe0000 -#define AT91_BASE_SYS 0xffffea00 - - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) - -#define AT91_USART0 AT572D940HF_ID_US0 -#define AT91_USART1 AT572D940HF_ID_US1 -#define AT91_USART2 AT572D940HF_ID_US2 - - -/* - * Internal Memory. - */ -#define AT572D940HF_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -#define AT572D940HF_SRAM_SIZE (48 * SZ_1K) /* Internal SRAM size (48Kb) */ - -#define AT572D940HF_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT572D940HF_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ - -#define AT572D940HF_UHP_BASE 0x00500000 /* USB Host controller */ - - -#endif diff --git a/trunk/arch/arm/mach-at91/include/mach/at572d940hf_matrix.h b/trunk/arch/arm/mach-at91/include/mach/at572d940hf_matrix.h deleted file mode 100644 index b6751df09488..000000000000 --- a/trunk/arch/arm/mach-at91/include/mach/at572d940hf_matrix.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * include/mach//at572d940hf_matrix.h - * - * Antonio R. Costa - * Copyright (C) 2008 Atmel - * - * Copyright (C) 2005 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef AT572D940HF_MATRIX_H -#define AT572D940HF_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ - -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0x7 << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ - -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_SFR0 (AT91_MATRIX + 0x110) /* Special Function Register 0 */ -#define AT91_MATRIX_SFR1 (AT91_MATRIX + 0x114) /* Special Function Register 1 */ -#define AT91_MATRIX_SFR2 (AT91_MATRIX + 0x118) /* Special Function Register 2 */ -#define AT91_MATRIX_SFR3 (AT91_MATRIX + 0x11C) /* Special Function Register 3 */ -#define AT91_MATRIX_SFR4 (AT91_MATRIX + 0x120) /* Special Function Register 4 */ -#define AT91_MATRIX_SFR5 (AT91_MATRIX + 0x124) /* Special Function Register 5 */ -#define AT91_MATRIX_SFR6 (AT91_MATRIX + 0x128) /* Special Function Register 6 */ -#define AT91_MATRIX_SFR7 (AT91_MATRIX + 0x12C) /* Special Function Register 7 */ -#define AT91_MATRIX_SFR8 (AT91_MATRIX + 0x130) /* Special Function Register 8 */ -#define AT91_MATRIX_SFR9 (AT91_MATRIX + 0x134) /* Special Function Register 9 */ -#define AT91_MATRIX_SFR10 (AT91_MATRIX + 0x138) /* Special Function Register 10 */ -#define AT91_MATRIX_SFR11 (AT91_MATRIX + 0x13C) /* Special Function Register 11 */ -#define AT91_MATRIX_SFR12 (AT91_MATRIX + 0x140) /* Special Function Register 12 */ -#define AT91_MATRIX_SFR13 (AT91_MATRIX + 0x144) /* Special Function Register 13 */ -#define AT91_MATRIX_SFR14 (AT91_MATRIX + 0x148) /* Special Function Register 14 */ -#define AT91_MATRIX_SFR15 (AT91_MATRIX + 0x14C) /* Special Function Register 15 */ - - -/* - * The following registers / bits are not defined in the Datasheet (Revision A) - */ - -#define AT91_MATRIX_TCR (AT91_MATRIX + 0x100) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_ITCM_64 (7 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_DTCM_64 (7 << 4) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ - -#endif diff --git a/trunk/arch/arm/mach-at91/include/mach/at91_pmc.h b/trunk/arch/arm/mach-at91/include/mach/at91_pmc.h index e46f93e34aab..64589eaaaee8 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91_pmc.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91_pmc.h @@ -32,7 +32,6 @@ #define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ #define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ #define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_PCK4 (1 << 12) /* Programmable Clock 4 [AT572D940HF only] */ #define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ #define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ diff --git a/trunk/arch/arm/mach-at91/include/mach/board.h b/trunk/arch/arm/mach-at91/include/mach/board.h index ceaec6c16eb2..bb6f6a7ba5e0 100644 --- a/trunk/arch/arm/mach-at91/include/mach/board.h +++ b/trunk/arch/arm/mach-at91/include/mach/board.h @@ -87,7 +87,7 @@ struct at91_eth_data { extern void __init at91_add_device_eth(struct at91_eth_data *data); #if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) \ - || defined(CONFIG_ARCH_AT91SAM9G45) || defined(CONFIG_ARCH_AT572D940HF) + || defined(CONFIG_ARCH_AT91SAM9G45) #define eth_platform_data at91_eth_data #endif @@ -205,9 +205,6 @@ extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); extern void __init at91_gpio_leds(struct gpio_led *leds, int nr); extern void __init at91_pwm_leds(struct gpio_led *leds, int nr); - /* AT572D940HF DSP */ -extern void __init at91_add_device_mAgic(void); - /* FIXME: this needs a better location, but gets stuff building again */ extern int at91_suspend_entering_slow_clock(void); diff --git a/trunk/arch/arm/mach-at91/include/mach/cpu.h b/trunk/arch/arm/mach-at91/include/mach/cpu.h index 5a0650101d45..c22df30ed5e5 100644 --- a/trunk/arch/arm/mach-at91/include/mach/cpu.h +++ b/trunk/arch/arm/mach-at91/include/mach/cpu.h @@ -33,8 +33,6 @@ #define ARCH_ID_AT91SAM9XE256 0x329a93a0 #define ARCH_ID_AT91SAM9XE512 0x329aa3a0 -#define ARCH_ID_AT572D940HF 0x0e0303e0 - #define ARCH_ID_AT91M40800 0x14080044 #define ARCH_ID_AT91R40807 0x44080746 #define ARCH_ID_AT91M40807 0x14080745 @@ -143,12 +141,6 @@ static inline unsigned long at91cap9_rev_identify(void) #define cpu_is_at91cap9_revC() (0) #endif -#ifdef CONFIG_ARCH_AT572D940HF -#define cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF) -#else -#define cpu_is_at572d940hf() (0) -#endif - /* * Since this is ARM, we will never run on any AVR32 CPU. But these * definitions may reduce clutter in common drivers. diff --git a/trunk/arch/arm/mach-at91/include/mach/debug-macro.S b/trunk/arch/arm/mach-at91/include/mach/debug-macro.S index 9e750a1c1b5a..29052ba66ada 100644 --- a/trunk/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/trunk/arch/arm/mach-at91/include/mach/debug-macro.S @@ -14,7 +14,7 @@ #include #include - .macro addruart, rx, tmp + .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) diff --git a/trunk/arch/arm/mach-at91/include/mach/hardware.h b/trunk/arch/arm/mach-at91/include/mach/hardware.h index 3d64a75e3ed5..a0df8b022df2 100644 --- a/trunk/arch/arm/mach-at91/include/mach/hardware.h +++ b/trunk/arch/arm/mach-at91/include/mach/hardware.h @@ -32,8 +32,6 @@ #include #elif defined(CONFIG_ARCH_AT91X40) #include -#elif defined(CONFIG_ARCH_AT572D940HF) -#include #else #error "Unsupported AT91 processor" #endif diff --git a/trunk/arch/arm/mach-at91/include/mach/timex.h b/trunk/arch/arm/mach-at91/include/mach/timex.h index 05a6e8af80c4..31ac2d97f14c 100644 --- a/trunk/arch/arm/mach-at91/include/mach/timex.h +++ b/trunk/arch/arm/mach-at91/include/mach/timex.h @@ -82,11 +82,6 @@ #define AT91X40_MASTER_CLOCK 40000000 #define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) -#elif defined(CONFIG_ARCH_AT572D940HF) - -#define AT572D940HF_MASTER_CLOCK 80000000 -#define CLOCK_TICK_RATE (AT572D940HF_MASTER_CLOCK/16) - #endif #endif diff --git a/trunk/arch/arm/mach-bcmring/core.c b/trunk/arch/arm/mach-bcmring/core.c index 72e405df0fb0..e590bbe0a7b4 100644 --- a/trunk/arch/arm/mach-bcmring/core.c +++ b/trunk/arch/arm/mach-bcmring/core.c @@ -142,7 +142,8 @@ void __init bcmring_amba_init(void) chipcHw_busInterfaceClockEnable(bus_clock); - clkdev_add_table(lookups, ARRAY_SIZE(lookups)); + for (i = 0; i < ARRAY_SIZE(lookups); i++) + clkdev_add(&lookups[i]); for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { struct amba_device *d = amba_devs[i]; diff --git a/trunk/arch/arm/mach-clps711x/include/mach/debug-macro.S b/trunk/arch/arm/mach-clps711x/include/mach/debug-macro.S index fedd8076a689..64baf9f87408 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/debug-macro.S +++ b/trunk/arch/arm/mach-clps711x/include/mach/debug-macro.S @@ -13,7 +13,7 @@ #include - .macro addruart, rx, tmp + .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? moveq \rx, #CLPS7111_PHYS_BASE diff --git a/trunk/arch/arm/mach-davinci/Kconfig b/trunk/arch/arm/mach-davinci/Kconfig index 0ebe185610bf..033bfede6b67 100644 --- a/trunk/arch/arm/mach-davinci/Kconfig +++ b/trunk/arch/arm/mach-davinci/Kconfig @@ -91,14 +91,10 @@ config MACH_DAVINCI_DM6467_EVM bool "TI DM6467 EVM" default ARCH_DAVINCI_DM646x depends on ARCH_DAVINCI_DM646x - select MACH_DAVINCI_DM6467TEVM help Configure this option to specify the whether the board used for development is a DM6467 EVM -config MACH_DAVINCI_DM6467TEVM - bool - config MACH_DAVINCI_DM365_EVM bool "TI DM365 EVM" default ARCH_DAVINCI_DM365 diff --git a/trunk/arch/arm/mach-davinci/Makefile b/trunk/arch/arm/mach-davinci/Makefile index 6aac880eb794..eeb9230d8844 100644 --- a/trunk/arch/arm/mach-davinci/Makefile +++ b/trunk/arch/arm/mach-davinci/Makefile @@ -26,7 +26,7 @@ obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o -obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o cdce949.o +obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o @@ -34,4 +34,3 @@ obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o # Power Management obj-$(CONFIG_CPU_FREQ) += cpufreq.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o -obj-$(CONFIG_SUSPEND) += pm.o sleep.o diff --git a/trunk/arch/arm/mach-davinci/board-da830-evm.c b/trunk/arch/arm/mach-davinci/board-da830-evm.c index dc19870b23cd..31dc9901e556 100644 --- a/trunk/arch/arm/mach-davinci/board-da830-evm.c +++ b/trunk/arch/arm/mach-davinci/board-da830-evm.c @@ -112,7 +112,7 @@ static __init void da830_evm_usb_init(void) * Set up USB clock/mode in the CFGCHIP2 register. * FYI: CFGCHIP2 is 0x0000ef00 initially. */ - cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + cfgchip2 = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG)); /* USB2.0 PHY reference clock is 24 MHz */ cfgchip2 &= ~CFGCHIP2_REFFREQ; @@ -139,7 +139,7 @@ static __init void da830_evm_usb_init(void) cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN; #endif - __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + __raw_writel(cfgchip2, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG)); /* USB_REFCLKIN is not used. */ ret = davinci_cfg_reg(DA830_USB0_DRVVBUS); diff --git a/trunk/arch/arm/mach-davinci/board-da850-evm.c b/trunk/arch/arm/mach-davinci/board-da850-evm.c index 411284d0b0fa..07de8db14581 100644 --- a/trunk/arch/arm/mach-davinci/board-da850-evm.c +++ b/trunk/arch/arm/mach-davinci/board-da850-evm.c @@ -46,20 +46,8 @@ static struct mtd_partition da850_evm_norflash_partition[] = { { - .name = "bootloaders + env", + .name = "NOR filesystem", .offset = 0, - .size = SZ_512K, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_2M, - .mask_flags = 0, - }, - { - .name = "filesystem", - .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL, .mask_flags = 0, }, @@ -89,18 +77,6 @@ static struct platform_device da850_evm_norflash_device = { .resource = da850_evm_norflash_resource, }; -static struct davinci_pm_config da850_pm_pdata = { - .sleepcount = 128, -}; - -static struct platform_device da850_pm_device = { - .name = "pm-davinci", - .dev = { - .platform_data = &da850_pm_pdata, - }, - .id = -1, -}; - /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash * (128K blocks). It may be used instead of the (default) SPI flash * to boot, using TI's tools to install the secondary boot loader @@ -143,7 +119,6 @@ static struct davinci_nand_pdata da850_evm_nandflash_data = { .parts = da850_evm_nandflash_partition, .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), .ecc_mode = NAND_ECC_HW, - .ecc_bits = 4, .options = NAND_USE_FLASH_BBT, }; @@ -562,7 +537,7 @@ static int __init da850_evm_config_emac(void) if (!machine_is_davinci_da850_evm()) return 0; - cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); + cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG); val = __raw_readl(cfg_chip3_base); @@ -721,11 +696,6 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da850_evm_init: cpuidle registration failed: %d\n", ret); - - ret = da850_register_pm(&da850_pm_device); - if (ret) - pr_warning("da850_evm_init: suspend registration failed: %d\n", - ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/trunk/arch/arm/mach-davinci/board-dm355-evm.c b/trunk/arch/arm/mach-davinci/board-dm355-evm.c index aa48e3f69715..a9b650dcc172 100644 --- a/trunk/arch/arm/mach-davinci/board-dm355-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm355-evm.c @@ -111,8 +111,6 @@ static struct platform_device davinci_nand_device = { static struct davinci_i2c_platform_data i2c_pdata = { .bus_freq = 400 /* kHz */, .bus_delay = 0 /* usec */, - .sda_pin = 15, - .scl_pin = 14, }; static struct snd_platform_data dm355_evm_snd_data; @@ -238,7 +236,6 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = { static struct vpfe_config vpfe_cfg = { .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), - .i2c_adapter_id = 1, .sub_devs = vpfe_sub_devs, .card_name = "DM355 EVM", .ccdc = "DM355 CCDC", diff --git a/trunk/arch/arm/mach-davinci/board-dm365-evm.c b/trunk/arch/arm/mach-davinci/board-dm365-evm.c index d15beceb632e..289fe1b7d25a 100644 --- a/trunk/arch/arm/mach-davinci/board-dm365-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm365-evm.c @@ -24,8 +24,6 @@ #include #include #include -#include -#include #include #include @@ -39,8 +37,6 @@ #include #include -#include - static inline int have_imager(void) { /* REVISIT when it's supported, trigger via Kconfig */ @@ -196,11 +192,7 @@ static struct davinci_i2c_platform_data i2c_pdata = { .bus_delay = 0 /* usec */, }; -static int dm365evm_keyscan_enable(struct device *dev) -{ - return davinci_cfg_reg(DM365_KEYSCAN); -} - +#ifdef CONFIG_KEYBOARD_DAVINCI static unsigned short dm365evm_keymap[] = { KEY_KP2, KEY_LEFT, @@ -222,7 +214,6 @@ static unsigned short dm365evm_keymap[] = { }; static struct davinci_ks_platform_data dm365evm_ks_data = { - .device_enable = dm365evm_keyscan_enable, .keymap = dm365evm_keymap, .keymapsize = ARRAY_SIZE(dm365evm_keymap), .rep = 1, @@ -231,6 +222,7 @@ static struct davinci_ks_platform_data dm365evm_ks_data = { .interval = 0x2, .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4, }; +#endif static int cpld_mmc_get_cd(int module) { @@ -310,73 +302,6 @@ static void dm365evm_mmc_configure(void) davinci_cfg_reg(DM365_SD1_DATA0); } -static struct tvp514x_platform_data tvp5146_pdata = { - .clk_polarity = 0, - .hs_polarity = 1, - .vs_polarity = 1 -}; - -#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) -/* Inputs available at the TVP5146 */ -static struct v4l2_input tvp5146_inputs[] = { - { - .index = 0, - .name = "Composite", - .type = V4L2_INPUT_TYPE_CAMERA, - .std = TVP514X_STD_ALL, - }, - { - .index = 1, - .name = "S-Video", - .type = V4L2_INPUT_TYPE_CAMERA, - .std = TVP514X_STD_ALL, - }, -}; - -/* - * this is the route info for connecting each input to decoder - * ouput that goes to vpfe. There is a one to one correspondence - * with tvp5146_inputs - */ -static struct vpfe_route tvp5146_routes[] = { - { - .input = INPUT_CVBS_VI2B, - .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, - }, -{ - .input = INPUT_SVIDEO_VI2C_VI1C, - .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, - }, -}; - -static struct vpfe_subdev_info vpfe_sub_devs[] = { - { - .name = "tvp5146", - .grp_id = 0, - .num_inputs = ARRAY_SIZE(tvp5146_inputs), - .inputs = tvp5146_inputs, - .routes = tvp5146_routes, - .can_route = 1, - .ccdc_if_params = { - .if_type = VPFE_BT656, - .hdpol = VPFE_PINPOL_POSITIVE, - .vdpol = VPFE_PINPOL_POSITIVE, - }, - .board_info = { - I2C_BOARD_INFO("tvp5146", 0x5d), - .platform_data = &tvp5146_pdata, - }, - }, -}; - -static struct vpfe_config vpfe_cfg = { - .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), - .sub_devs = vpfe_sub_devs, - .i2c_adapter_id = 1, - .card_name = "DM365 EVM", - .ccdc = "ISIF", -}; - static void __init evm_init_i2c(void) { davinci_init_i2c(&i2c_pdata); @@ -568,29 +493,9 @@ static struct davinci_uart_config uart_config __initdata = { static void __init dm365_evm_map_io(void) { - /* setup input configuration for VPFE input devices */ - dm365_set_vpfe_config(&vpfe_cfg); dm365_init(); } -static struct spi_eeprom at25640 = { - .byte_len = SZ_64K / 8, - .name = "at25640", - .page_size = 32, - .flags = EE_ADDR2, -}; - -static struct spi_board_info dm365_evm_spi_info[] __initconst = { - { - .modalias = "at25", - .platform_data = &at25640, - .max_speed_hz = 10 * 1000 * 1000, - .bus_num = 0, - .chip_select = 0, - .mode = SPI_MODE_0, - }, -}; - static __init void dm365_evm_init(void) { evm_init_i2c(); @@ -606,10 +511,10 @@ static __init void dm365_evm_init(void) dm365_init_asp(&dm365_evm_snd_data); dm365_init_rtc(); - dm365_init_ks(&dm365evm_ks_data); - dm365_init_spi0(BIT(0), dm365_evm_spi_info, - ARRAY_SIZE(dm365_evm_spi_info)); +#ifdef CONFIG_KEYBOARD_DAVINCI + dm365_init_ks(&dm365evm_ks_data); +#endif } static __init void dm365_evm_irq_init(void) diff --git a/trunk/arch/arm/mach-davinci/board-dm644x-evm.c b/trunk/arch/arm/mach-davinci/board-dm644x-evm.c index 976e11b7fa4a..fd0398bc6db3 100644 --- a/trunk/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm644x-evm.c @@ -247,7 +247,6 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = { static struct vpfe_config vpfe_cfg = { .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), - .i2c_adapter_id = 1, .sub_devs = vpfe_sub_devs, .card_name = "DM6446 EVM", .ccdc = "DM6446 CCDC", @@ -629,8 +628,6 @@ static struct i2c_board_info __initdata i2c_info[] = { static struct davinci_i2c_platform_data i2c_pdata = { .bus_freq = 20 /* kHz */, .bus_delay = 100 /* usec */, - .sda_pin = 44, - .scl_pin = 43, }; static void __init evm_init_i2c(void) diff --git a/trunk/arch/arm/mach-davinci/board-dm646x-evm.c b/trunk/arch/arm/mach-davinci/board-dm646x-evm.c index 5ba3cb2daaa0..8d0b0e01c59b 100644 --- a/trunk/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm646x-evm.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include @@ -40,13 +39,54 @@ #include #include #include -#include -#include -#include "clock.h" +#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ + defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) +#define HAS_ATA 1 +#else +#define HAS_ATA 0 +#endif + +#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000 +#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000 #define NAND_BLOCK_SIZE SZ_128K +/* CPLD Register 0 bits to control ATA */ +#define DM646X_EVM_ATA_RST BIT(0) +#define DM646X_EVM_ATA_PWD BIT(1) + +#define DM646X_EVM_PHY_MASK (0x2) +#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ + +#define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38) +#define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c) +#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) +#define VCH2CLK_SYSCLK8 (BIT(9)) +#define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) +#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12)) +#define VCH3CLK_SYSCLK8 (BIT(13)) +#define VCH3CLK_AUXCLK (BIT(14) | BIT(13)) + +#define VIDCH2CLK (BIT(10)) +#define VIDCH3CLK (BIT(11)) +#define VIDCH1CLK (BIT(4)) +#define TVP7002_INPUT (BIT(4)) +#define TVP5147_INPUT (~BIT(4)) +#define VPIF_INPUT_ONE_CHANNEL (BIT(5)) +#define VPIF_INPUT_TWO_CHANNEL (~BIT(5)) +#define TVP5147_CH0 "tvp514x-0" +#define TVP5147_CH1 "tvp514x-1" + +static void __iomem *vpif_vidclkctl_reg; +static void __iomem *vpif_vsclkdis_reg; +/* spin lock for updating above registers */ +static spinlock_t vpif_reg_lock; + +static struct davinci_uart_config uart_config __initdata = { + .enabled_uarts = (1 << 0), +}; + /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot * and U-Boot environment this avoids dependency on any particular combination * of UBL, U-Boot or flashing tools etc. @@ -80,9 +120,6 @@ static struct davinci_nand_pdata davinci_nand_data = { .options = 0, }; -#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000 -#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000 - static struct resource davinci_nand_resources[] = { { .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, @@ -107,17 +144,6 @@ static struct platform_device davinci_nand_device = { }, }; -#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ - defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) -#define HAS_ATA 1 -#else -#define HAS_ATA 0 -#endif - -/* CPLD Register 0 bits to control ATA */ -#define DM646X_EVM_ATA_RST BIT(0) -#define DM646X_EVM_ATA_PWD BIT(1) - /* CPLD Register 0 Client: used for I/O Control */ static int cpld_reg0_probe(struct i2c_client *client, const struct i2c_device_id *id) @@ -391,9 +417,6 @@ static struct i2c_board_info __initdata i2c_info[] = { { I2C_BOARD_INFO("cpld_video", 0x3b), }, - { - I2C_BOARD_INFO("cdce949", 0x6c), - }, }; static struct davinci_i2c_platform_data i2c_pdata = { @@ -401,30 +424,6 @@ static struct davinci_i2c_platform_data i2c_pdata = { .bus_delay = 0 /* usec */, }; -#define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38) -#define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c) -#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) -#define VCH2CLK_SYSCLK8 (BIT(9)) -#define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) -#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12)) -#define VCH3CLK_SYSCLK8 (BIT(13)) -#define VCH3CLK_AUXCLK (BIT(14) | BIT(13)) - -#define VIDCH2CLK (BIT(10)) -#define VIDCH3CLK (BIT(11)) -#define VIDCH1CLK (BIT(4)) -#define TVP7002_INPUT (BIT(4)) -#define TVP5147_INPUT (~BIT(4)) -#define VPIF_INPUT_ONE_CHANNEL (BIT(5)) -#define VPIF_INPUT_TWO_CHANNEL (~BIT(5)) -#define TVP5147_CH0 "tvp514x-0" -#define TVP5147_CH1 "tvp514x-1" - -static void __iomem *vpif_vidclkctl_reg; -static void __iomem *vpif_vsclkdis_reg; -/* spin lock for updating above registers */ -static spinlock_t vpif_reg_lock; - static int set_vpif_clock(int mux_mode, int hd) { unsigned long flags; @@ -686,44 +685,11 @@ static void __init evm_init_i2c(void) evm_init_video(); } -#define CDCE949_XIN_RATE 27000000 - -/* CDCE949 support - "lpsc" field is overridden to work as clock number */ -static struct clk cdce_clk_in = { - .name = "cdce_xin", - .rate = CDCE949_XIN_RATE, -}; - -static struct clk_lookup cdce_clks[] = { - CLK(NULL, "xin", &cdce_clk_in), - CLK(NULL, NULL, NULL), -}; - -static void __init cdce_clk_init(void) -{ - struct clk_lookup *c; - struct clk *clk; - - for (c = cdce_clks; c->clk; c++) { - clk = c->clk; - clkdev_add(c); - clk_register(clk); - } -} - static void __init davinci_map_io(void) { dm646x_init(); - cdce_clk_init(); } -static struct davinci_uart_config uart_config __initdata = { - .enabled_uarts = (1 << 0), -}; - -#define DM646X_EVM_PHY_MASK (0x2) -#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ - static __init void evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; @@ -747,17 +713,6 @@ static __init void davinci_dm646x_evm_irq_init(void) davinci_irq_init(); } -#define DM646X_EVM_REF_FREQ 27000000 -#define DM6467T_EVM_REF_FREQ 33000000 - -void __init dm646x_board_setup_refclk(struct clk *clk) -{ - if (machine_is_davinci_dm6467tevm()) - clk->rate = DM6467T_EVM_REF_FREQ; - else - clk->rate = DM646X_EVM_REF_FREQ; -} - MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") .phys_io = IO_PHYS, .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, @@ -768,13 +723,3 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") .init_machine = evm_init, MACHINE_END -MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, - .boot_params = (0x80000100), - .map_io = davinci_map_io, - .init_irq = davinci_dm646x_evm_irq_init, - .timer = &davinci_timer, - .init_machine = evm_init, -MACHINE_END - diff --git a/trunk/arch/arm/mach-davinci/cdce949.c b/trunk/arch/arm/mach-davinci/cdce949.c deleted file mode 100644 index aec375690543..000000000000 --- a/trunk/arch/arm/mach-davinci/cdce949.c +++ /dev/null @@ -1,293 +0,0 @@ -/* - * TI CDCE949 clock synthesizer driver - * - * Note: This implementation assumes an input of 27MHz to the CDCE. - * This is by no means constrained by CDCE hardware although the datasheet - * does use this as an example for all illustrations and more importantly: - * that is the crystal input on boards it is currently used on. - * - * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#include -#include -#include -#include - -#include - -#include "clock.h" - -static struct i2c_client *cdce_i2c_client; -static DEFINE_MUTEX(cdce_mutex); - -/* CDCE register descriptor */ -struct cdce_reg { - u8 addr; - u8 val; -}; - -/* Per-Output (Y1, Y2 etc.) frequency descriptor */ -struct cdce_freq { - /* Frequency in KHz */ - unsigned long frequency; - /* - * List of registers to program to obtain a particular frequency. - * 0x0 in register address and value is the end of list marker. - */ - struct cdce_reg *reglist; -}; - -#define CDCE_FREQ_TABLE_ENTRY(line, out) \ -{ \ - .reglist = cdce_y ##line## _ ##out, \ - .frequency = out, \ -} - -/* List of CDCE outputs */ -struct cdce_output { - /* List of frequencies on this output */ - struct cdce_freq *freq_table; - /* Number of possible frequencies */ - int size; -}; - -/* - * Finding out the values to program into CDCE949 registers for a particular - * frequency output is not a simple calculation. Have a look at the datasheet - * for the details. There is desktop software available to help users with - * the calculations. Here, we just depend on the output of that software - * (or hand calculations) instead trying to runtime calculate the register - * values and inflicting misery on ourselves. - */ -static struct cdce_reg cdce_y1_148500[] = { - { 0x13, 0x00 }, - /* program PLL1_0 multiplier */ - { 0x18, 0xaf }, - { 0x19, 0x50 }, - { 0x1a, 0x02 }, - { 0x1b, 0xc9 }, - /* program PLL1_11 multiplier */ - { 0x1c, 0x00 }, - { 0x1d, 0x40 }, - { 0x1e, 0x02 }, - { 0x1f, 0xc9 }, - /* output state selection */ - { 0x15, 0x00 }, - { 0x14, 0xef }, - /* switch MUX to PLL1 output */ - { 0x14, 0x6f }, - { 0x16, 0x06 }, - /* set P2DIV divider, P3DIV and input crystal */ - { 0x17, 0x06 }, - { 0x01, 0x00 }, - { 0x05, 0x48 }, - { 0x02, 0x80 }, - /* enable and disable PLL */ - { 0x02, 0xbc }, - { 0x03, 0x01 }, - { }, -}; - -static struct cdce_reg cdce_y1_74250[] = { - { 0x13, 0x00 }, - { 0x18, 0xaf }, - { 0x19, 0x50 }, - { 0x1a, 0x02 }, - { 0x1b, 0xc9 }, - { 0x1c, 0x00 }, - { 0x1d, 0x40 }, - { 0x1e, 0x02 }, - { 0x1f, 0xc9 }, - /* output state selection */ - { 0x15, 0x00 }, - { 0x14, 0xef }, - /* switch MUX to PLL1 output */ - { 0x14, 0x6f }, - { 0x16, 0x06 }, - /* set P2DIV divider, P3DIV and input crystal */ - { 0x17, 0x06 }, - { 0x01, 0x00 }, - { 0x05, 0x48 }, - { 0x02, 0x80 }, - /* enable and disable PLL */ - { 0x02, 0xbc }, - { 0x03, 0x02 }, - { }, -}; - -static struct cdce_reg cdce_y1_27000[] = { - { 0x13, 0x00 }, - { 0x18, 0x00 }, - { 0x19, 0x40 }, - { 0x1a, 0x02 }, - { 0x1b, 0x08 }, - { 0x1c, 0x00 }, - { 0x1d, 0x40 }, - { 0x1e, 0x02 }, - { 0x1f, 0x08 }, - { 0x15, 0x02 }, - { 0x14, 0xed }, - { 0x16, 0x01 }, - { 0x17, 0x01 }, - { 0x01, 0x00 }, - { 0x05, 0x50 }, - { 0x02, 0xb4 }, - { 0x03, 0x01 }, - { }, -}; - -static struct cdce_freq cdce_y1_freqs[] = { - CDCE_FREQ_TABLE_ENTRY(1, 148500), - CDCE_FREQ_TABLE_ENTRY(1, 74250), - CDCE_FREQ_TABLE_ENTRY(1, 27000), -}; - -static struct cdce_reg cdce_y5_13500[] = { - { 0x27, 0x08 }, - { 0x28, 0x00 }, - { 0x29, 0x40 }, - { 0x2a, 0x02 }, - { 0x2b, 0x08 }, - { 0x24, 0x6f }, - { }, -}; - -static struct cdce_reg cdce_y5_16875[] = { - { 0x27, 0x08 }, - { 0x28, 0x9f }, - { 0x29, 0xb0 }, - { 0x2a, 0x02 }, - { 0x2b, 0x89 }, - { 0x24, 0x6f }, - { }, -}; - -static struct cdce_reg cdce_y5_27000[] = { - { 0x27, 0x04 }, - { 0x28, 0x00 }, - { 0x29, 0x40 }, - { 0x2a, 0x02 }, - { 0x2b, 0x08 }, - { 0x24, 0x6f }, - { }, -}; -static struct cdce_reg cdce_y5_54000[] = { - { 0x27, 0x04 }, - { 0x28, 0xff }, - { 0x29, 0x80 }, - { 0x2a, 0x02 }, - { 0x2b, 0x07 }, - { 0x24, 0x6f }, - { }, -}; - -static struct cdce_reg cdce_y5_81000[] = { - { 0x27, 0x02 }, - { 0x28, 0xbf }, - { 0x29, 0xa0 }, - { 0x2a, 0x03 }, - { 0x2b, 0x0a }, - { 0x24, 0x6f }, - { }, -}; - -static struct cdce_freq cdce_y5_freqs[] = { - CDCE_FREQ_TABLE_ENTRY(5, 13500), - CDCE_FREQ_TABLE_ENTRY(5, 16875), - CDCE_FREQ_TABLE_ENTRY(5, 27000), - CDCE_FREQ_TABLE_ENTRY(5, 54000), - CDCE_FREQ_TABLE_ENTRY(5, 81000), -}; - - -static struct cdce_output output_list[] = { - [1] = { cdce_y1_freqs, ARRAY_SIZE(cdce_y1_freqs) }, - [5] = { cdce_y5_freqs, ARRAY_SIZE(cdce_y5_freqs) }, -}; - -int cdce_set_rate(struct clk *clk, unsigned long rate) -{ - int i, ret = 0; - struct cdce_freq *freq_table = output_list[clk->lpsc].freq_table; - struct cdce_reg *regs = NULL; - - if (!cdce_i2c_client) - return -ENODEV; - - if (!freq_table) - return -EINVAL; - - for (i = 0; i < output_list[clk->lpsc].size; i++) { - if (freq_table[i].frequency == rate / 1000) { - regs = freq_table[i].reglist; - break; - } - } - - if (!regs) - return -EINVAL; - - mutex_lock(&cdce_mutex); - for (i = 0; regs[i].addr; i++) { - ret = i2c_smbus_write_byte_data(cdce_i2c_client, - regs[i].addr | 0x80, regs[i].val); - if (ret) - break; - } - mutex_unlock(&cdce_mutex); - - if (!ret) - clk->rate = rate; - - return ret; -} - -static int cdce_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - cdce_i2c_client = client; - return 0; -} - -static int __devexit cdce_remove(struct i2c_client *client) -{ - cdce_i2c_client = NULL; - return 0; -} - -static const struct i2c_device_id cdce_id[] = { - {"cdce949", 0}, - {}, -}; -MODULE_DEVICE_TABLE(i2c, cdce_id); - -static struct i2c_driver cdce_driver = { - .driver = { - .owner = THIS_MODULE, - .name = "cdce949", - }, - .probe = cdce_probe, - .remove = __devexit_p(cdce_remove), - .id_table = cdce_id, -}; - -static int __init cdce_init(void) -{ - return i2c_add_driver(&cdce_driver); -} -subsys_initcall(cdce_init); - -static void __exit cdce_exit(void) -{ - i2c_del_driver(&cdce_driver); -} -module_exit(cdce_exit); - -MODULE_AUTHOR("Texas Instruments"); -MODULE_DESCRIPTION("CDCE949 clock synthesizer driver"); -MODULE_LICENSE("GPL v2"); diff --git a/trunk/arch/arm/mach-davinci/clock.c b/trunk/arch/arm/mach-davinci/clock.c index bf6218ee94e1..baece65cb9c0 100644 --- a/trunk/arch/arm/mach-davinci/clock.c +++ b/trunk/arch/arm/mach-davinci/clock.c @@ -49,8 +49,7 @@ static void __clk_disable(struct clk *clk) { if (WARN_ON(clk->usecount == 0)) return; - if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && - (clk->flags & CLK_PSC)) + if (--clk->usecount == 0 && !(clk->flags & CLK_PLL)) davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 0); if (clk->parent) __clk_disable(clk->parent); @@ -125,10 +124,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate) if (clk == NULL || IS_ERR(clk)) return ret; + spin_lock_irqsave(&clockfw_lock, flags); if (clk->set_rate) ret = clk->set_rate(clk, rate); - - spin_lock_irqsave(&clockfw_lock, flags); if (ret == 0) { if (clk->recalc) clk->rate = clk->recalc(clk); @@ -365,7 +363,6 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, { u32 ctrl; unsigned int locktime; - unsigned long flags; if (pll->base == NULL) return -EINVAL; @@ -379,23 +376,25 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, locktime = ((2000 * prediv) / 100); prediv = (prediv - 1) | PLLDIV_EN; } else { - locktime = PLL_LOCK_TIME; + locktime = 20; } if (postdiv) postdiv = (postdiv - 1) | PLLDIV_EN; if (mult) mult = mult - 1; - /* Protect against simultaneous calls to PLL setting seqeunce */ - spin_lock_irqsave(&clockfw_lock, flags); - ctrl = __raw_readl(pll->base + PLLCTL); /* Switch the PLL to bypass mode */ ctrl &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN); __raw_writel(ctrl, pll->base + PLLCTL); - udelay(PLL_BYPASS_TIME); + /* + * Wait for 4 OSCIN/CLKIN cycles to ensure that the PLLC has switched + * to bypass mode. Delay of 1us ensures we are good for all > 4MHz + * OSCIN/CLKIN inputs. Typically the input is ~25MHz. + */ + udelay(1); /* Reset and enable PLL */ ctrl &= ~(PLLCTL_PLLRST | PLLCTL_PLLDIS); @@ -409,7 +408,11 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, if (pll->flags & PLL_HAS_POSTDIV) __raw_writel(postdiv, pll->base + POSTDIV); - udelay(PLL_RESET_TIME); + /* + * Wait for PLL to reset properly, OMAP-L138 datasheet says + * 'min' time = 125ns + */ + udelay(1); /* Bring PLL out of reset */ ctrl |= PLLCTL_PLLRST; @@ -421,20 +424,17 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, ctrl |= PLLCTL_PLLEN; __raw_writel(ctrl, pll->base + PLLCTL); - spin_unlock_irqrestore(&clockfw_lock, flags); - return 0; } EXPORT_SYMBOL(davinci_set_pllrate); -int __init davinci_clk_init(struct clk_lookup *clocks) +int __init davinci_clk_init(struct davinci_clk *clocks) { - struct clk_lookup *c; + struct davinci_clk *c; struct clk *clk; - size_t num_clocks = 0; - for (c = clocks; c->clk; c++) { - clk = c->clk; + for (c = clocks; c->lk.clk; c++) { + clk = c->lk.clk; if (!clk->recalc) { @@ -457,24 +457,36 @@ int __init davinci_clk_init(struct clk_lookup *clocks) if (clk->lpsc) clk->flags |= CLK_PSC; + clkdev_add(&c->lk); clk_register(clk); - num_clocks++; /* Turn on clocks that Linux doesn't otherwise manage */ if (clk->flags & ALWAYS_ENABLED) clk_enable(clk); } - clkdev_add_table(clocks, num_clocks); - return 0; } -#ifdef CONFIG_DEBUG_FS - -#include +#ifdef CONFIG_PROC_FS +#include #include +static void *davinci_ck_start(struct seq_file *m, loff_t *pos) +{ + return *pos < 1 ? (void *)1 : NULL; +} + +static void *davinci_ck_next(struct seq_file *m, void *v, loff_t *pos) +{ + ++*pos; + return NULL; +} + +static void davinci_ck_stop(struct seq_file *m, void *v) +{ +} + #define CLKNAME_MAX 10 /* longest clock name */ #define NEST_DELTA 2 #define NEST_MAX 4 @@ -513,38 +525,41 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent) static int davinci_ck_show(struct seq_file *m, void *v) { - struct clk *clk; - - /* - * Show clock tree; We trust nonzero usecounts equate to PSC enables... + /* Show clock tree; we know the main oscillator is first. + * We trust nonzero usecounts equate to PSC enables... */ mutex_lock(&clocks_mutex); - list_for_each_entry(clk, &clocks, node) - if (!clk->parent) - dump_clock(m, 0, clk); + if (!list_empty(&clocks)) + dump_clock(m, 0, list_first_entry(&clocks, struct clk, node)); mutex_unlock(&clocks_mutex); return 0; } +static const struct seq_operations davinci_ck_op = { + .start = davinci_ck_start, + .next = davinci_ck_next, + .stop = davinci_ck_stop, + .show = davinci_ck_show +}; + static int davinci_ck_open(struct inode *inode, struct file *file) { - return single_open(file, davinci_ck_show, NULL); + return seq_open(file, &davinci_ck_op); } -static const struct file_operations davinci_ck_operations = { +static const struct file_operations proc_davinci_ck_operations = { .open = davinci_ck_open, .read = seq_read, .llseek = seq_lseek, - .release = single_release, + .release = seq_release, }; -static int __init davinci_clk_debugfs_init(void) +static int __init davinci_ck_proc_init(void) { - debugfs_create_file("davinci_clocks", S_IFREG | S_IRUGO, NULL, NULL, - &davinci_ck_operations); + proc_create("davinci_clocks", 0, NULL, &proc_davinci_ck_operations); return 0; } -device_initcall(davinci_clk_debugfs_init); -#endif /* CONFIG_DEBUG_FS */ +__initcall(davinci_ck_proc_init); +#endif /* CONFIG_DEBUG_PROC_FS */ diff --git a/trunk/arch/arm/mach-davinci/clock.h b/trunk/arch/arm/mach-davinci/clock.h index aa0a61150325..c92d77a3008d 100644 --- a/trunk/arch/arm/mach-davinci/clock.h +++ b/trunk/arch/arm/mach-davinci/clock.h @@ -12,6 +12,9 @@ #ifndef __ARCH_ARM_DAVINCI_CLOCK_H #define __ARCH_ARM_DAVINCI_CLOCK_H +#include +#include + #define DAVINCI_PLL1_BASE 0x01c40800 #define DAVINCI_PLL2_BASE 0x01c40c00 #define MAX_PLL 2 @@ -50,26 +53,6 @@ #define PLLDIV_EN BIT(15) #define PLLDIV_RATIO_MASK 0x1f -/* - * OMAP-L138 system reference guide recommends a wait for 4 OSCIN/CLKIN - * cycles to ensure that the PLLC has switched to bypass mode. Delay of 1us - * ensures we are good for all > 4MHz OSCIN/CLKIN inputs. Typically the input - * is ~25MHz. Units are micro seconds. - */ -#define PLL_BYPASS_TIME 1 -/* From OMAP-L138 datasheet table 6-4. Units are micro seconds */ -#define PLL_RESET_TIME 1 -/* - * From OMAP-L138 datasheet table 6-4; assuming prediv = 1, sqrt(pllm) = 4 - * Units are micro seconds. - */ -#define PLL_LOCK_TIME 20 - -#ifndef __ASSEMBLER__ - -#include -#include - struct pll_data { u32 phys_base; void __iomem *base; @@ -106,19 +89,23 @@ struct clk { #define CLK_PLL BIT(4) /* PLL-derived clock */ #define PRE_PLL BIT(5) /* source is before PLL mult/div */ -#define CLK(dev, con, ck) \ - { \ - .dev_id = dev, \ - .con_id = con, \ - .clk = ck, \ - } \ +struct davinci_clk { + struct clk_lookup lk; +}; + +#define CLK(dev, con, ck) \ + { \ + .lk = { \ + .dev_id = dev, \ + .con_id = con, \ + .clk = ck, \ + }, \ + } -int davinci_clk_init(struct clk_lookup *clocks); +int davinci_clk_init(struct davinci_clk *clocks); int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, unsigned int mult, unsigned int postdiv); extern struct platform_device davinci_wdt_device; #endif - -#endif diff --git a/trunk/arch/arm/mach-davinci/common.c b/trunk/arch/arm/mach-davinci/common.c index 94f27cbcd55a..c2de94cde56a 100644 --- a/trunk/arch/arm/mach-davinci/common.c +++ b/trunk/arch/arm/mach-davinci/common.c @@ -11,13 +11,13 @@ #include #include #include -#include #include #include #include #include +#include #include "clock.h" diff --git a/trunk/arch/arm/mach-davinci/cp_intc.c b/trunk/arch/arm/mach-davinci/cp_intc.c index 37311d1830eb..52b287cf3a42 100644 --- a/trunk/arch/arm/mach-davinci/cp_intc.c +++ b/trunk/arch/arm/mach-davinci/cp_intc.c @@ -81,23 +81,12 @@ static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type) return 0; } -/* - * Faking this allows us to to work with suspend functions of - * generic drivers which call {enable|disable}_irq_wake for - * wake up interrupt sources (eg RTC on DA850). - */ -static int cp_intc_set_wake(unsigned int irq, unsigned int on) -{ - return 0; -} - static struct irq_chip cp_intc_irq_chip = { .name = "cp_intc", .ack = cp_intc_ack_irq, .mask = cp_intc_mask_irq, .unmask = cp_intc_unmask_irq, .set_type = cp_intc_set_irq_type, - .set_wake = cp_intc_set_wake, }; void __init cp_intc_init(void __iomem *base, unsigned short num_irq, diff --git a/trunk/arch/arm/mach-davinci/cpuidle.c b/trunk/arch/arm/mach-davinci/cpuidle.c index bd59f31b8a95..97a90f36fc92 100644 --- a/trunk/arch/arm/mach-davinci/cpuidle.c +++ b/trunk/arch/arm/mach-davinci/cpuidle.c @@ -19,7 +19,6 @@ #include #include -#include #define DAVINCI_CPUIDLE_MAX_STATES 2 @@ -40,6 +39,10 @@ static struct cpuidle_driver davinci_idle_driver = { static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device); static void __iomem *ddr2_reg_base; +#define DDR2_SDRCR_OFFSET 0xc +#define DDR2_SRPD_BIT BIT(23) +#define DDR2_LPMODEN_BIT BIT(31) + static void davinci_save_ddr_power(int enter, bool pdown) { u32 val; @@ -106,6 +109,8 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev) int ret; struct cpuidle_device *device; struct davinci_cpuidle_config *pdata = pdev->dev.platform_data; + struct resource *ddr2_regs; + resource_size_t len; device = &per_cpu(davinci_cpuidle_device, smp_processor_id()); @@ -114,12 +119,28 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev) return -ENOENT; } - ddr2_reg_base = pdata->ddr2_ctlr_base; + ddr2_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!ddr2_regs) { + dev_err(&pdev->dev, "cannot get DDR2 controller register base"); + return -ENODEV; + } + + len = resource_size(ddr2_regs); + + ddr2_regs = request_mem_region(ddr2_regs->start, len, ddr2_regs->name); + if (!ddr2_regs) + return -EBUSY; + + ddr2_reg_base = ioremap(ddr2_regs->start, len); + if (!ddr2_reg_base) { + ret = -ENOMEM; + goto ioremap_fail; + } ret = cpuidle_register_driver(&davinci_idle_driver); if (ret) { dev_err(&pdev->dev, "failed to register driver\n"); - return ret; + goto driver_register_fail; } /* Wait for interrupt state */ @@ -146,11 +167,18 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev) ret = cpuidle_register_device(device); if (ret) { dev_err(&pdev->dev, "failed to register device\n"); - cpuidle_unregister_driver(&davinci_idle_driver); - return ret; + goto device_register_fail; } return 0; + +device_register_fail: + cpuidle_unregister_driver(&davinci_idle_driver); +driver_register_fail: + iounmap(ddr2_reg_base); +ioremap_fail: + release_mem_region(ddr2_regs->start, len); + return ret; } static struct platform_driver davinci_cpuidle_driver = { diff --git a/trunk/arch/arm/mach-davinci/da830.c b/trunk/arch/arm/mach-davinci/da830.c index 122e61a9f505..b22b5cf04250 100644 --- a/trunk/arch/arm/mach-davinci/da830.c +++ b/trunk/arch/arm/mach-davinci/da830.c @@ -371,7 +371,7 @@ static struct clk rmii_clk = { .parent = &pll0_sysclk7, }; -static struct clk_lookup da830_clks[] = { +static struct davinci_clk da830_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), CLK(NULL, "pll0_aux", &pll0_aux_clk), @@ -1208,13 +1208,13 @@ static struct davinci_soc_info davinci_soc_info_da830 = { void __init da830_init(void) { - da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); - if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module")) + da8xx_syscfg_base = ioremap(DA8XX_SYSCFG_BASE, SZ_4K); + if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module")) return; davinci_soc_info_da830.jtag_id_base = - DA8XX_SYSCFG0_VIRT(DA8XX_JTAG_ID_REG); - davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120); + DA8XX_SYSCFG_VIRT(DA8XX_JTAG_ID_REG); + davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG_VIRT(0x120); davinci_common_init(&davinci_soc_info_da830); } diff --git a/trunk/arch/arm/mach-davinci/da850.c b/trunk/arch/arm/mach-davinci/da850.c index d0fd7566712a..717806c6cef9 100644 --- a/trunk/arch/arm/mach-davinci/da850.c +++ b/trunk/arch/arm/mach-davinci/da850.c @@ -26,7 +26,6 @@ #include #include #include -#include #include "clock.h" #include "mux.h" @@ -41,7 +40,6 @@ #define DA850_REF_FREQ 24000000 #define CFGCHIP3_ASYNC3_CLKSRC BIT(4) -#define CFGCHIP3_PLL1_MASTER_LOCK BIT(5) #define CFGCHIP0_PLL_MASTER_LOCK BIT(4) static int da850_set_armrate(struct clk *clk, unsigned long rate); @@ -335,7 +333,7 @@ static struct clk aemif_clk = { .flags = ALWAYS_ENABLED, }; -static struct clk_lookup da850_clks[] = { +static struct davinci_clk da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), CLK(NULL, "pll0_aux", &pll0_aux_clk), @@ -537,7 +535,6 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false) MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false) - MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false) #endif }; @@ -773,12 +770,6 @@ static struct map_desc da850_io_desc[] = { .length = DA8XX_CP_INTC_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(DA8XX_ARM_RAM_BASE), - .length = SZ_8K, - .type = MT_DEVICE - }, }; static void __iomem *da850_psc_bases[] = { @@ -834,12 +825,12 @@ static struct davinci_timer_info da850_timer_info = { static void da850_set_async3_src(int pllnum) { struct clk *clk, *newparent = pllnum ? &pll1_sysclk2 : &pll0_sysclk2; - struct clk_lookup *c; + struct davinci_clk *c; unsigned int v; int ret; - for (c = da850_clks; c->clk; c++) { - clk = c->clk; + for (c = da850_clks; c->lk.clk; c++) { + clk = c->lk.clk; if (clk->flags & DA850_CLK_ASYNC3) { ret = clk_set_parent(clk, newparent); WARN(ret, "DA850: unable to re-parent clock %s", @@ -847,12 +838,12 @@ static void da850_set_async3_src(int pllnum) } } - v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); + v = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG)); if (pllnum) v |= CFGCHIP3_ASYNC3_CLKSRC; else v &= ~CFGCHIP3_ASYNC3_CLKSRC; - __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); + __raw_writel(v, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG)); } #ifdef CONFIG_CPU_FREQ @@ -996,6 +987,7 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index) unsigned int prediv, mult, postdiv; struct da850_opp *opp; struct pll_data *pll = clk->pll_data; + unsigned int v; int ret; opp = (struct da850_opp *) da850_freq_table[index].index; @@ -1003,6 +995,11 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index) mult = opp->mult; postdiv = opp->postdiv; + /* Unlock writing to PLL registers */ + v = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP0_REG)); + v &= ~CFGCHIP0_PLL_MASTER_LOCK; + __raw_writel(v, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP0_REG)); + ret = davinci_set_pllrate(pll, prediv, mult, postdiv); if (WARN_ON(ret)) return ret; @@ -1031,43 +1028,6 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate) } #endif -int da850_register_pm(struct platform_device *pdev) -{ - int ret; - struct davinci_pm_config *pdata = pdev->dev.platform_data; - - ret = davinci_cfg_reg(DA850_RTC_ALARM); - if (ret) - return ret; - - pdata->ddr2_ctlr_base = da8xx_get_mem_ctlr(); - pdata->deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG); - pdata->ddrpsc_num = DA8XX_LPSC1_EMIF3C; - - pdata->cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K); - if (!pdata->cpupll_reg_base) - return -ENOMEM; - - pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K); - if (!pdata->ddrpll_reg_base) { - ret = -ENOMEM; - goto no_ddrpll_mem; - } - - pdata->ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K); - if (!pdata->ddrpsc_reg_base) { - ret = -ENOMEM; - goto no_ddrpsc_mem; - } - - return platform_device_register(pdev); - -no_ddrpsc_mem: - iounmap(pdata->ddrpll_reg_base); -no_ddrpll_mem: - iounmap(pdata->cpupll_reg_base); - return ret; -} static struct davinci_soc_info davinci_soc_info_da850 = { .io_desc = da850_io_desc, @@ -1089,25 +1049,17 @@ static struct davinci_soc_info davinci_soc_info_da850 = { .gpio_irq = IRQ_DA8XX_GPIO0, .serial_dev = &da8xx_serial_device, .emac_pdata = &da8xx_emac_pdata, - .sram_dma = DA8XX_ARM_RAM_BASE, - .sram_len = SZ_8K, }; void __init da850_init(void) { - unsigned int v; - - da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); - if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module")) - return; - - da8xx_syscfg1_base = ioremap(DA8XX_SYSCFG1_BASE, SZ_4K); - if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module")) + da8xx_syscfg_base = ioremap(DA8XX_SYSCFG_BASE, SZ_4K); + if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module")) return; davinci_soc_info_da850.jtag_id_base = - DA8XX_SYSCFG0_VIRT(DA8XX_JTAG_ID_REG); - davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120); + DA8XX_SYSCFG_VIRT(DA8XX_JTAG_ID_REG); + davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG_VIRT(0x120); davinci_common_init(&davinci_soc_info_da850); @@ -1119,14 +1071,4 @@ void __init da850_init(void) * be any noticible change even in non-DVFS use cases. */ da850_set_async3_src(1); - - /* Unlock writing to PLL0 registers */ - v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG)); - v &= ~CFGCHIP0_PLL_MASTER_LOCK; - __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG)); - - /* Unlock writing to PLL1 registers */ - v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); - v &= ~CFGCHIP3_PLL1_MASTER_LOCK; - __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); } diff --git a/trunk/arch/arm/mach-davinci/devices-da8xx.c b/trunk/arch/arm/mach-davinci/devices-da8xx.c index 0a96791d3b0f..dd2d32c4ce86 100644 --- a/trunk/arch/arm/mach-davinci/devices-da8xx.c +++ b/trunk/arch/arm/mach-davinci/devices-da8xx.c @@ -24,10 +24,8 @@ #include "clock.h" #define DA8XX_TPCC_BASE 0x01c00000 -#define DA850_TPCC1_BASE 0x01e30000 #define DA8XX_TPTC0_BASE 0x01c08000 #define DA8XX_TPTC1_BASE 0x01c08400 -#define DA850_TPTC2_BASE 0x01e38000 #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ #define DA8XX_I2C0_BASE 0x01c22000 #define DA8XX_RTC_BASE 0x01C23000 @@ -44,8 +42,7 @@ #define DA8XX_MDIO_REG_OFFSET 0x4000 #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K -void __iomem *da8xx_syscfg0_base; -void __iomem *da8xx_syscfg1_base; +void __iomem *da8xx_syscfg_base; static struct plat_serial8250_port da8xx_serial_pdata[] = { { @@ -85,6 +82,11 @@ struct platform_device da8xx_serial_device = { }, }; +static const s8 da8xx_dma_chan_no_event[] = { + 20, 21, + -1 +}; + static const s8 da8xx_queue_tc_mapping[][2] = { /* {event queue no, TC no} */ {0, 0}, @@ -99,52 +101,20 @@ static const s8 da8xx_queue_priority_mapping[][2] = { {-1, -1} }; -static const s8 da850_queue_tc_mapping[][2] = { - /* {event queue no, TC no} */ - {0, 0}, - {-1, -1} -}; - -static const s8 da850_queue_priority_mapping[][2] = { - /* {event queue no, Priority} */ - {0, 3}, - {-1, -1} -}; - -static struct edma_soc_info da830_edma_info[] = { - { - .n_channel = 32, - .n_region = 4, - .n_slot = 128, - .n_tc = 2, - .n_cc = 1, - .queue_tc_mapping = da8xx_queue_tc_mapping, - .queue_priority_mapping = da8xx_queue_priority_mapping, - }, -}; - -static struct edma_soc_info da850_edma_info[] = { +static struct edma_soc_info da8xx_edma_info[] = { { .n_channel = 32, .n_region = 4, .n_slot = 128, .n_tc = 2, .n_cc = 1, + .noevent = da8xx_dma_chan_no_event, .queue_tc_mapping = da8xx_queue_tc_mapping, .queue_priority_mapping = da8xx_queue_priority_mapping, }, - { - .n_channel = 32, - .n_region = 4, - .n_slot = 128, - .n_tc = 1, - .n_cc = 1, - .queue_tc_mapping = da850_queue_tc_mapping, - .queue_priority_mapping = da850_queue_priority_mapping, - }, }; -static struct resource da830_edma_resources[] = { +static struct resource da8xx_edma_resources[] = { { .name = "edma_cc0", .start = DA8XX_TPCC_BASE, @@ -175,91 +145,19 @@ static struct resource da830_edma_resources[] = { }, }; -static struct resource da850_edma_resources[] = { - { - .name = "edma_cc0", - .start = DA8XX_TPCC_BASE, - .end = DA8XX_TPCC_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma_tc0", - .start = DA8XX_TPTC0_BASE, - .end = DA8XX_TPTC0_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma_tc1", - .start = DA8XX_TPTC1_BASE, - .end = DA8XX_TPTC1_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma_cc1", - .start = DA850_TPCC1_BASE, - .end = DA850_TPCC1_BASE + SZ_32K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma_tc2", - .start = DA850_TPTC2_BASE, - .end = DA850_TPTC2_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "edma0", - .start = IRQ_DA8XX_CCINT0, - .flags = IORESOURCE_IRQ, - }, - { - .name = "edma0_err", - .start = IRQ_DA8XX_CCERRINT, - .flags = IORESOURCE_IRQ, - }, - { - .name = "edma1", - .start = IRQ_DA850_CCINT1, - .flags = IORESOURCE_IRQ, - }, - { - .name = "edma1_err", - .start = IRQ_DA850_CCERRINT1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device da830_edma_device = { +static struct platform_device da8xx_edma_device = { .name = "edma", .id = -1, .dev = { - .platform_data = da830_edma_info, + .platform_data = da8xx_edma_info, }, - .num_resources = ARRAY_SIZE(da830_edma_resources), - .resource = da830_edma_resources, -}; - -static struct platform_device da850_edma_device = { - .name = "edma", - .id = -1, - .dev = { - .platform_data = da850_edma_info, - }, - .num_resources = ARRAY_SIZE(da850_edma_resources), - .resource = da850_edma_resources, + .num_resources = ARRAY_SIZE(da8xx_edma_resources), + .resource = da8xx_edma_resources, }; int __init da8xx_register_edma(void) { - struct platform_device *pdev; - - if (cpu_is_davinci_da830()) - pdev = &da830_edma_device; - else if (cpu_is_davinci_da850()) - pdev = &da850_edma_device; - else - return -ENODEV; - - return platform_device_register(pdev); + return platform_device_register(&da8xx_edma_device); } static struct resource da8xx_i2c_resources0[] = { @@ -583,31 +481,11 @@ static struct platform_device da8xx_rtc_device = { int da8xx_register_rtc(void) { - int ret; - /* Unlock the rtc's registers */ __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c)); __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70)); - ret = platform_device_register(&da8xx_rtc_device); - if (!ret) - /* Atleast on DA850, RTC is a wakeup source */ - device_init_wakeup(&da8xx_rtc_device.dev, true); - - return ret; -} - -static void __iomem *da8xx_ddr2_ctlr_base; -void __iomem * __init da8xx_get_mem_ctlr(void) -{ - if (da8xx_ddr2_ctlr_base) - return da8xx_ddr2_ctlr_base; - - da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K); - if (!da8xx_ddr2_ctlr_base) - pr_warning("%s: Unable to map DDR2 controller", __func__); - - return da8xx_ddr2_ctlr_base; + return platform_device_register(&da8xx_rtc_device); } static struct resource da8xx_cpuidle_resources[] = { @@ -635,7 +513,6 @@ static struct platform_device da8xx_cpuidle_device = { int __init da8xx_register_cpuidle(void) { - da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr(); - return platform_device_register(&da8xx_cpuidle_device); } + diff --git a/trunk/arch/arm/mach-davinci/dm355.c b/trunk/arch/arm/mach-davinci/dm355.c index 3dc0a88712eb..dedf4d4f3a27 100644 --- a/trunk/arch/arm/mach-davinci/dm355.c +++ b/trunk/arch/arm/mach-davinci/dm355.c @@ -29,7 +29,6 @@ #include #include #include -#include #include "clock.h" #include "mux.h" @@ -126,6 +125,7 @@ static struct clk vpss_slave_clk = { .lpsc = DAVINCI_LPSC_VPSSSLV, }; + static struct clk clkout1_clk = { .name = "clkout1", .parent = &pll1_aux_clk, @@ -335,7 +335,7 @@ static struct clk usb_clk = { .lpsc = DAVINCI_LPSC_USB, }; -static struct clk_lookup dm355_clks[] = { +static struct davinci_clk dm355_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll1", &pll1_clk), CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), @@ -363,9 +363,9 @@ static struct clk_lookup dm355_clks[] = { CLK("davinci-asp.1", NULL, &asp1_clk), CLK("davinci_mmc.0", NULL, &mmcsd0_clk), CLK("davinci_mmc.1", NULL, &mmcsd1_clk), - CLK("spi_davinci.0", NULL, &spi0_clk), - CLK("spi_davinci.1", NULL, &spi1_clk), - CLK("spi_davinci.2", NULL, &spi2_clk), + CLK(NULL, "spi0", &spi0_clk), + CLK(NULL, "spi1", &spi1_clk), + CLK(NULL, "spi2", &spi2_clk), CLK(NULL, "gpio", &gpio_clk), CLK(NULL, "aemif", &aemif_clk), CLK(NULL, "pwm0", &pwm0_clk), @@ -392,40 +392,24 @@ static struct resource dm355_spi0_resources[] = { .flags = IORESOURCE_MEM, }, { - .start = IRQ_DM355_SPINT0_0, + .start = IRQ_DM355_SPINT0_1, .flags = IORESOURCE_IRQ, }, - { - .start = 17, - .flags = IORESOURCE_DMA, - }, - { - .start = 16, - .flags = IORESOURCE_DMA, - }, - { - .start = EVENTQ_1, - .flags = IORESOURCE_DMA, - }, + /* Not yet used, so not included: + * IORESOURCE_IRQ: + * - IRQ_DM355_SPINT0_0 + * IORESOURCE_DMA: + * - DAVINCI_DMA_SPI_SPIX + * - DAVINCI_DMA_SPI_SPIR + */ }; -static struct davinci_spi_platform_data dm355_spi0_pdata = { - .version = SPI_VERSION_1, - .num_chipselect = 2, - .clk_internal = 1, - .cs_hold = 1, - .intr_level = 0, - .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ - .c2tdelay = 0, - .t2cdelay = 0, -}; static struct platform_device dm355_spi0_device = { .name = "spi_davinci", .id = 0, .dev = { .dma_mask = &dm355_spi0_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &dm355_spi0_pdata, }, .num_resources = ARRAY_SIZE(dm355_spi0_resources), .resource = dm355_spi0_resources, @@ -580,6 +564,13 @@ static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { /*----------------------------------------------------------------------*/ +static const s8 dma_chan_dm355_no_event[] = { + 12, 13, 24, 56, 57, + 58, 59, 60, 61, 62, + 63, + -1 +}; + static const s8 queue_tc_mapping[][2] = { /* {event queue no, TC no} */ @@ -603,6 +594,7 @@ static struct edma_soc_info dm355_edma_info[] = { .n_slot = 128, .n_tc = 2, .n_cc = 1, + .noevent = dma_chan_dm355_no_event, .queue_tc_mapping = queue_tc_mapping, .queue_priority_mapping = queue_priority_mapping, }, @@ -673,17 +665,6 @@ static struct platform_device dm355_asp1_device = { .resource = dm355_asp1_resources, }; -static void dm355_ccdc_setup_pinmux(void) -{ - davinci_cfg_reg(DM355_VIN_PCLK); - davinci_cfg_reg(DM355_VIN_CAM_WEN); - davinci_cfg_reg(DM355_VIN_CAM_VD); - davinci_cfg_reg(DM355_VIN_CAM_HD); - davinci_cfg_reg(DM355_VIN_YIN_EN); - davinci_cfg_reg(DM355_VIN_CINL_EN); - davinci_cfg_reg(DM355_VIN_CINH_EN); -} - static struct resource dm355_vpss_resources[] = { { /* VPSS BL Base address */ @@ -720,10 +701,6 @@ static struct resource vpfe_resources[] = { .end = IRQ_VDINT1, .flags = IORESOURCE_IRQ, }, -}; - -static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); -static struct resource dm355_ccdc_resource[] = { /* CCDC Base address */ { .flags = IORESOURCE_MEM, @@ -731,18 +708,8 @@ static struct resource dm355_ccdc_resource[] = { .end = 0x01c70600 + 0x1ff, }, }; -static struct platform_device dm355_ccdc_dev = { - .name = "dm355_ccdc", - .id = -1, - .num_resources = ARRAY_SIZE(dm355_ccdc_resource), - .resource = dm355_ccdc_resource, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = dm355_ccdc_setup_pinmux, - }, -}; +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); static struct platform_device vpfe_capture_dev = { .name = CAPTURE_DRV_NAME, .id = -1, @@ -890,13 +857,20 @@ static int __init dm355_init_devices(void) if (!cpu_is_davinci_dm355()) return 0; - /* Add ccdc clock aliases */ - clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL); - clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL); davinci_cfg_reg(DM355_INT_EDMA_CC); platform_device_register(&dm355_edma_device); platform_device_register(&dm355_vpss_device); - platform_device_register(&dm355_ccdc_dev); + /* + * setup Mux configuration for vpfe input and register + * vpfe capture platform device + */ + davinci_cfg_reg(DM355_VIN_PCLK); + davinci_cfg_reg(DM355_VIN_CAM_WEN); + davinci_cfg_reg(DM355_VIN_CAM_VD); + davinci_cfg_reg(DM355_VIN_CAM_HD); + davinci_cfg_reg(DM355_VIN_YIN_EN); + davinci_cfg_reg(DM355_VIN_CINL_EN); + davinci_cfg_reg(DM355_VIN_CINH_EN); platform_device_register(&vpfe_capture_dev); return 0; diff --git a/trunk/arch/arm/mach-davinci/dm365.c b/trunk/arch/arm/mach-davinci/dm365.c index 27772e18e45b..2ec619ec1657 100644 --- a/trunk/arch/arm/mach-davinci/dm365.c +++ b/trunk/arch/arm/mach-davinci/dm365.c @@ -18,7 +18,6 @@ #include #include #include -#include #include @@ -33,8 +32,6 @@ #include #include #include -#include - #include "clock.h" #include "mux.h" @@ -406,7 +403,7 @@ static struct clk mjcp_clk = { .lpsc = DM365_LPSC_MJCP, }; -static struct clk_lookup dm365_clks[] = { +static struct davinci_clk dm365_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll1", &pll1_clk), CLK(NULL, "pll1_aux", &pll1_aux_clk), @@ -458,7 +455,7 @@ static struct clk_lookup dm365_clks[] = { CLK(NULL, "timer3", &timer3_clk), CLK(NULL, "usb", &usb_clk), CLK("davinci_emac.1", NULL, &emac_clk), - CLK("davinci_voicecodec", NULL, &voicecodec_clk), + CLK("voice_codec", NULL, &voicecodec_clk), CLK("davinci-asp.0", NULL, &asp0_clk), CLK(NULL, "rto", &rto_clk), CLK(NULL, "mjcp", &mjcp_clk), @@ -609,78 +606,9 @@ INT_CFG(DM365, INT_NSF_DISABLE, 25, 1, 0, false) EVT_CFG(DM365, EVT2_ASP_TX, 0, 1, 0, false) EVT_CFG(DM365, EVT3_ASP_RX, 1, 1, 0, false) -EVT_CFG(DM365, EVT2_VC_TX, 0, 1, 1, false) -EVT_CFG(DM365, EVT3_VC_RX, 1, 1, 1, false) #endif }; -static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32); - -static struct davinci_spi_platform_data dm365_spi0_pdata = { - .version = SPI_VERSION_1, - .num_chipselect = 2, - .clk_internal = 1, - .cs_hold = 1, - .intr_level = 0, - .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ - .c2tdelay = 0, - .t2cdelay = 0, -}; - -static struct resource dm365_spi0_resources[] = { - { - .start = 0x01c66000, - .end = 0x01c667ff, - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_DM365_SPIINT0_0, - .flags = IORESOURCE_IRQ, - }, - { - .start = 17, - .flags = IORESOURCE_DMA, - }, - { - .start = 16, - .flags = IORESOURCE_DMA, - }, - { - .start = EVENTQ_3, - .flags = IORESOURCE_DMA, - }, -}; - -static struct platform_device dm365_spi0_device = { - .name = "spi_davinci", - .id = 0, - .dev = { - .dma_mask = &dm365_spi0_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &dm365_spi0_pdata, - }, - .num_resources = ARRAY_SIZE(dm365_spi0_resources), - .resource = dm365_spi0_resources, -}; - -void __init dm365_init_spi0(unsigned chipselect_mask, - struct spi_board_info *info, unsigned len) -{ - davinci_cfg_reg(DM365_SPI0_SCLK); - davinci_cfg_reg(DM365_SPI0_SDI); - davinci_cfg_reg(DM365_SPI0_SDO); - - /* not all slaves will be wired up */ - if (chipselect_mask & BIT(0)) - davinci_cfg_reg(DM365_SPI0_SDENA0); - if (chipselect_mask & BIT(1)) - davinci_cfg_reg(DM365_SPI0_SDENA1); - - spi_register_board_info(info, len); - - platform_device_register(&dm365_spi0_device); -} - static struct emac_platform_data dm365_emac_pdata = { .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET, .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET, @@ -826,7 +754,7 @@ static struct edma_soc_info dm365_edma_info[] = { .n_cc = 1, .queue_tc_mapping = dm365_queue_tc_mapping, .queue_priority_mapping = dm365_queue_priority_mapping, - .default_queue = EVENTQ_3, + .default_queue = EVENTQ_2, }, }; @@ -907,31 +835,6 @@ static struct platform_device dm365_asp_device = { .resource = dm365_asp_resources, }; -static struct resource dm365_vc_resources[] = { - { - .start = DAVINCI_DM365_VC_BASE, - .end = DAVINCI_DM365_VC_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = DAVINCI_DMA_VC_TX, - .end = DAVINCI_DMA_VC_TX, - .flags = IORESOURCE_DMA, - }, - { - .start = DAVINCI_DMA_VC_RX, - .end = DAVINCI_DMA_VC_RX, - .flags = IORESOURCE_DMA, - }, -}; - -static struct platform_device dm365_vc_device = { - .name = "davinci_voicecodec", - .id = -1, - .num_resources = ARRAY_SIZE(dm365_vc_resources), - .resource = dm365_vc_resources, -}; - static struct resource dm365_rtc_resources[] = { { .start = DM365_RTC_BASE, @@ -1088,16 +991,9 @@ void __init dm365_init_asp(struct snd_platform_data *pdata) platform_device_register(&dm365_asp_device); } -void __init dm365_init_vc(struct snd_platform_data *pdata) -{ - davinci_cfg_reg(DM365_EVT2_VC_TX); - davinci_cfg_reg(DM365_EVT3_VC_RX); - dm365_vc_device.dev.platform_data = pdata; - platform_device_register(&dm365_vc_device); -} - void __init dm365_init_ks(struct davinci_ks_platform_data *pdata) { + davinci_cfg_reg(DM365_KEYSCAN); dm365_ks_device.dev.platform_data = pdata; platform_device_register(&dm365_ks_device); } @@ -1113,97 +1009,6 @@ void __init dm365_init(void) davinci_common_init(&davinci_soc_info_dm365); } -static struct resource dm365_vpss_resources[] = { - { - /* VPSS ISP5 Base address */ - .name = "isp5", - .start = 0x01c70000, - .end = 0x01c70000 + 0xff, - .flags = IORESOURCE_MEM, - }, - { - /* VPSS CLK Base address */ - .name = "vpss", - .start = 0x01c70200, - .end = 0x01c70200 + 0xff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device dm365_vpss_device = { - .name = "vpss", - .id = -1, - .dev.platform_data = "dm365_vpss", - .num_resources = ARRAY_SIZE(dm365_vpss_resources), - .resource = dm365_vpss_resources, -}; - -static struct resource vpfe_resources[] = { - { - .start = IRQ_VDINT0, - .end = IRQ_VDINT0, - .flags = IORESOURCE_IRQ, - }, - { - .start = IRQ_VDINT1, - .end = IRQ_VDINT1, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); -static struct platform_device vpfe_capture_dev = { - .name = CAPTURE_DRV_NAME, - .id = -1, - .num_resources = ARRAY_SIZE(vpfe_resources), - .resource = vpfe_resources, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -static void dm365_isif_setup_pinmux(void) -{ - davinci_cfg_reg(DM365_VIN_CAM_WEN); - davinci_cfg_reg(DM365_VIN_CAM_VD); - davinci_cfg_reg(DM365_VIN_CAM_HD); - davinci_cfg_reg(DM365_VIN_YIN4_7_EN); - davinci_cfg_reg(DM365_VIN_YIN0_3_EN); -} - -static struct resource isif_resource[] = { - /* ISIF Base address */ - { - .start = 0x01c71000, - .end = 0x01c71000 + 0x1ff, - .flags = IORESOURCE_MEM, - }, - /* ISIF Linearization table 0 */ - { - .start = 0x1C7C000, - .end = 0x1C7C000 + 0x2ff, - .flags = IORESOURCE_MEM, - }, - /* ISIF Linearization table 1 */ - { - .start = 0x1C7C400, - .end = 0x1C7C400 + 0x2ff, - .flags = IORESOURCE_MEM, - }, -}; -static struct platform_device dm365_isif_dev = { - .name = "isif", - .id = -1, - .num_resources = ARRAY_SIZE(isif_resource), - .resource = isif_resource, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = dm365_isif_setup_pinmux, - }, -}; - static int __init dm365_init_devices(void) { if (!cpu_is_davinci_dm365()) @@ -1212,16 +1017,7 @@ static int __init dm365_init_devices(void) davinci_cfg_reg(DM365_INT_EDMA_CC); platform_device_register(&dm365_edma_device); platform_device_register(&dm365_emac_device); - /* Add isif clock alias */ - clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL); - platform_device_register(&dm365_vpss_device); - platform_device_register(&dm365_isif_dev); - platform_device_register(&vpfe_capture_dev); + return 0; } postcore_initcall(dm365_init_devices); - -void dm365_set_vpfe_config(struct vpfe_config *cfg) -{ - vpfe_capture_dev.dev.platform_data = cfg; -} diff --git a/trunk/arch/arm/mach-davinci/dm644x.c b/trunk/arch/arm/mach-davinci/dm644x.c index 2f2ae8bc77bb..2cd008156dea 100644 --- a/trunk/arch/arm/mach-davinci/dm644x.c +++ b/trunk/arch/arm/mach-davinci/dm644x.c @@ -277,7 +277,7 @@ static struct clk timer2_clk = { .usecount = 1, /* REVISIT: why cant' this be disabled? */ }; -struct clk_lookup dm644x_clks[] = { +struct davinci_clk dm644x_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll1", &pll1_clk), CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), @@ -479,6 +479,15 @@ static u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] = { /*----------------------------------------------------------------------*/ +static const s8 dma_chan_dm644x_no_event[] = { + 0, 1, 12, 13, 14, + 15, 25, 30, 31, 45, + 46, 47, 55, 56, 57, + 58, 59, 60, 61, 62, + 63, + -1 +}; + static const s8 queue_tc_mapping[][2] = { /* {event queue no, TC no} */ @@ -502,6 +511,7 @@ static struct edma_soc_info dm644x_edma_info[] = { .n_slot = 128, .n_tc = 2, .n_cc = 1, + .noevent = dma_chan_dm644x_no_event, .queue_tc_mapping = queue_tc_mapping, .queue_priority_mapping = queue_priority_mapping, }, @@ -602,11 +612,6 @@ static struct resource vpfe_resources[] = { .end = IRQ_VDINT1, .flags = IORESOURCE_IRQ, }, -}; - -static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); -static struct resource dm644x_ccdc_resource[] = { - /* CCDC Base address */ { .start = 0x01c70400, .end = 0x01c70400 + 0xff, @@ -614,17 +619,7 @@ static struct resource dm644x_ccdc_resource[] = { }, }; -static struct platform_device dm644x_ccdc_dev = { - .name = "dm644x_ccdc", - .id = -1, - .num_resources = ARRAY_SIZE(dm644x_ccdc_resource), - .resource = dm644x_ccdc_resource, - .dev = { - .dma_mask = &vpfe_capture_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); static struct platform_device vpfe_capture_dev = { .name = CAPTURE_DRV_NAME, .id = -1, @@ -774,13 +769,9 @@ static int __init dm644x_init_devices(void) if (!cpu_is_davinci_dm644x()) return 0; - /* Add ccdc clock aliases */ - clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL); - clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL); platform_device_register(&dm644x_edma_device); platform_device_register(&dm644x_emac_device); platform_device_register(&dm644x_vpss_device); - platform_device_register(&dm644x_ccdc_dev); platform_device_register(&vpfe_capture_dev); return 0; diff --git a/trunk/arch/arm/mach-davinci/dm646x.c b/trunk/arch/arm/mach-davinci/dm646x.c index 893baf4ad37d..829a44bcf799 100644 --- a/trunk/arch/arm/mach-davinci/dm646x.c +++ b/trunk/arch/arm/mach-davinci/dm646x.c @@ -42,6 +42,7 @@ /* * Device specific clocks */ +#define DM646X_REF_FREQ 27000000 #define DM646X_AUX_FREQ 24000000 static struct pll_data pll1_data = { @@ -56,6 +57,7 @@ static struct pll_data pll2_data = { static struct clk ref_clk = { .name = "ref_clk", + .rate = DM646X_REF_FREQ, }; static struct clk aux_clkin = { @@ -311,7 +313,7 @@ static struct clk vpif1_clk = { .flags = ALWAYS_ENABLED, }; -struct clk_lookup dm646x_clks[] = { +struct davinci_clk dm646x_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "aux", &aux_clkin), CLK(NULL, "pll1", &pll1_clk), @@ -511,6 +513,14 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = { /*----------------------------------------------------------------------*/ +static const s8 dma_chan_dm646x_no_event[] = { + 0, 1, 2, 3, 13, + 14, 15, 24, 25, 26, + 27, 30, 31, 54, 55, + 56, + -1 +}; + /* Four Transfer Controllers on DM646x */ static const s8 dm646x_queue_tc_mapping[][2] = { @@ -539,6 +549,7 @@ static struct edma_soc_info dm646x_edma_info[] = { .n_slot = 512, .n_tc = 4, .n_cc = 1, + .noevent = dma_chan_dm646x_no_event, .queue_tc_mapping = dm646x_queue_tc_mapping, .queue_priority_mapping = dm646x_queue_priority_mapping, }, @@ -914,7 +925,6 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config, void __init dm646x_init(void) { - dm646x_board_setup_refclk(&ref_clk); davinci_common_init(&davinci_soc_info_dm646x); } diff --git a/trunk/arch/arm/mach-davinci/dma.c b/trunk/arch/arm/mach-davinci/dma.c index 15dd886df04c..648fbb760ae1 100644 --- a/trunk/arch/arm/mach-davinci/dma.c +++ b/trunk/arch/arm/mach-davinci/dma.c @@ -226,11 +226,11 @@ struct edma { */ DECLARE_BITMAP(edma_inuse, EDMA_MAX_PARAMENTRY); - /* The edma_unused bit for each channel is clear unless - * it is not being used on this platform. It uses a bit - * of SOC-specific initialization code. + /* The edma_noevent bit for each channel is clear unless + * it doesn't trigger DMA events on this platform. It uses a + * bit of SOC-specific initialization code. */ - DECLARE_BITMAP(edma_unused, EDMA_MAX_DMACH); + DECLARE_BITMAP(edma_noevent, EDMA_MAX_DMACH); unsigned irq_res_start; unsigned irq_res_end; @@ -243,7 +243,6 @@ struct edma { }; static struct edma *edma_info[EDMA_MAX_CC]; -static int arch_num_cc; /* dummy param set used to (re)initialize parameter RAM slots */ static const struct edmacc_param dummy_paramset = { @@ -556,27 +555,8 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id, return EDMA_CTLR_CHAN(ctlr, i - num_slots + 1); } -static int prepare_unused_channel_list(struct device *dev, void *data) -{ - struct platform_device *pdev = to_platform_device(dev); - int i, ctlr; - - for (i = 0; i < pdev->num_resources; i++) { - if ((pdev->resource[i].flags & IORESOURCE_DMA) && - (int)pdev->resource[i].start >= 0) { - ctlr = EDMA_CTLR(pdev->resource[i].start); - clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start), - edma_info[ctlr]->edma_unused); - } - } - - return 0; -} - /*-----------------------------------------------------------------------*/ -static bool unused_chan_list_done; - /* Resource alloc/free: dma channels, parameter RAM slots */ /** @@ -614,22 +594,7 @@ int edma_alloc_channel(int channel, void *data, enum dma_event_q eventq_no) { - unsigned i, done = 0, ctlr = 0; - int ret = 0; - - if (!unused_chan_list_done) { - /* - * Scan all the platform devices to find out the EDMA channels - * used and clear them in the unused list, making the rest - * available for ARM usage. - */ - ret = bus_for_each_dev(&platform_bus_type, NULL, NULL, - prepare_unused_channel_list); - if (ret < 0) - return ret; - - unused_chan_list_done = true; - } + unsigned i, done, ctlr = 0; if (channel >= 0) { ctlr = EDMA_CTLR(channel); @@ -637,15 +602,15 @@ int edma_alloc_channel(int channel, } if (channel < 0) { - for (i = 0; i < arch_num_cc; i++) { + for (i = 0; i < EDMA_MAX_CC; i++) { channel = 0; for (;;) { channel = find_next_bit(edma_info[i]-> - edma_unused, + edma_noevent, edma_info[i]->num_channels, channel); if (channel == edma_info[i]->num_channels) - break; + return -ENOMEM; if (!test_and_set_bit(channel, edma_info[i]->edma_inuse)) { done = 1; @@ -657,8 +622,6 @@ int edma_alloc_channel(int channel, if (done) break; } - if (!done) - return -ENOMEM; } else if (channel >= edma_info[ctlr]->num_channels) { return -EINVAL; } else if (test_and_set_bit(channel, edma_info[ctlr]->edma_inuse)) { @@ -679,7 +642,7 @@ int edma_alloc_channel(int channel, map_dmach_queue(ctlr, channel, eventq_no); - return EDMA_CTLR_CHAN(ctlr, channel); + return channel; } EXPORT_SYMBOL(edma_alloc_channel); @@ -1256,7 +1219,7 @@ int edma_start(unsigned channel) unsigned int mask = (1 << (channel & 0x1f)); /* EDMA channels without event association */ - if (test_bit(channel, edma_info[ctlr]->edma_unused)) { + if (test_bit(channel, edma_info[ctlr]->edma_noevent)) { pr_debug("EDMA: ESR%d %08x\n", j, edma_shadow0_read_array(ctlr, SH_ESR, j)); edma_shadow0_write_array(ctlr, SH_ESR, j, mask); @@ -1381,6 +1344,7 @@ static int __init edma_probe(struct platform_device *pdev) const s8 (*queue_tc_mapping)[2]; int i, j, found = 0; int status = -1; + const s8 *noevent; int irq[EDMA_MAX_CC] = {0, 0}; int err_irq[EDMA_MAX_CC] = {0, 0}; struct resource *r[EDMA_MAX_CC] = {NULL}; @@ -1443,9 +1407,11 @@ static int __init edma_probe(struct platform_device *pdev) memcpy_toio(edmacc_regs_base[j] + PARM_OFFSET(i), &dummy_paramset, PARM_SIZE); - /* Mark all channels as unused */ - memset(edma_info[j]->edma_unused, 0xff, - sizeof(edma_info[j]->edma_unused)); + noevent = info[j].noevent; + if (noevent) { + while (*noevent != -1) + set_bit(*noevent++, edma_info[j]->edma_noevent); + } sprintf(irq_name, "edma%d", j); irq[j] = platform_get_irq_byname(pdev, irq_name); @@ -1501,7 +1467,6 @@ static int __init edma_probe(struct platform_device *pdev) edma_write_array2(j, EDMA_DRAE, i, 1, 0x0); edma_write_array(j, EDMA_QRAE, i, 0x0); } - arch_num_cc++; } if (tc_errs_handled) { diff --git a/trunk/arch/arm/mach-davinci/include/mach/cdce949.h b/trunk/arch/arm/mach-davinci/include/mach/cdce949.h deleted file mode 100644 index c73331fae341..000000000000 --- a/trunk/arch/arm/mach-davinci/include/mach/cdce949.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * TI CDCE949 off-chip clock synthesizer support - * - * 2009 (C) Texas Instruments, Inc. http://www.ti.com/ - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ -#ifndef _MACH_DAVINCI_CDCE949_H -#define _MACH_DAVINCI_CDCE949_H - -#include - -#include - -int cdce_set_rate(struct clk *clk, unsigned long rate); - -#endif diff --git a/trunk/arch/arm/mach-davinci/include/mach/common.h b/trunk/arch/arm/mach-davinci/include/mach/common.h index 50a955f05ef9..6ca2c9a0a482 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/common.h +++ b/trunk/arch/arm/mach-davinci/include/mach/common.h @@ -43,7 +43,7 @@ struct davinci_soc_info { void __iomem *jtag_id_base; struct davinci_id *ids; unsigned long ids_num; - struct clk_lookup *cpu_clks; + struct davinci_clk *cpu_clks; void __iomem **psc_bases; unsigned long psc_bases_num; void __iomem *pinmux_base; diff --git a/trunk/arch/arm/mach-davinci/include/mach/cpuidle.h b/trunk/arch/arm/mach-davinci/include/mach/cpuidle.h index 74f088b0edfb..cbfc6a9c81b4 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/cpuidle.h +++ b/trunk/arch/arm/mach-davinci/include/mach/cpuidle.h @@ -12,7 +12,6 @@ struct davinci_cpuidle_config { u32 ddr2_pdown; - void __iomem *ddr2_ctlr_base; }; #endif diff --git a/trunk/arch/arm/mach-davinci/include/mach/da8xx.h b/trunk/arch/arm/mach-davinci/include/mach/da8xx.h index cc9be7fee627..90704910d343 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/trunk/arch/arm/mach-davinci/include/mach/da8xx.h @@ -13,17 +13,15 @@ #include