From e0bcfdfcbc6a4f8d162a0e24f38b52993a5f3815 Mon Sep 17 00:00:00 2001 From: Alexander Duyck Date: Fri, 21 Nov 2008 16:49:10 -0800 Subject: [PATCH] --- yaml --- r: 121976 b: refs/heads/master c: 005cbdfc29cfc23b8faadd3619eed43e6550bfc1 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/e1000e/netdev.c | 22 +++++++++++++++++++++- 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 2aa6ed6ac932..45b47ccbd2c8 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7e3aab4a9cd7d37f80eee75bebb6a71347f82476 +refs/heads/master: 005cbdfc29cfc23b8faadd3619eed43e6550bfc1 diff --git a/trunk/drivers/net/e1000e/netdev.c b/trunk/drivers/net/e1000e/netdev.c index cc0502bbb9ff..ebbb9f061c87 100644 --- a/trunk/drivers/net/e1000e/netdev.c +++ b/trunk/drivers/net/e1000e/netdev.c @@ -4462,7 +4462,27 @@ static int e1000_suspend(struct pci_dev *pdev, pm_message_t state) pci_disable_device(pdev); - pci_set_power_state(pdev, pci_choose_state(pdev, state)); + /* + * The pci-e switch on some quad port adapters will report a + * correctable error when the MAC transitions from D0 to D3. To + * prevent this we need to mask off the correctable errors on the + * downstream port of the pci-e switch. + */ + if (adapter->flags & FLAG_IS_QUAD_PORT) { + struct pci_dev *us_dev = pdev->bus->self; + int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP); + u16 devctl; + + pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); + pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, + (devctl & ~PCI_EXP_DEVCTL_CERE)); + + pci_set_power_state(pdev, pci_choose_state(pdev, state)); + + pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); + } else { + pci_set_power_state(pdev, pci_choose_state(pdev, state)); + } return 0; }