From e1fdde4def95f348ea0abc46aaba2a4bd32efdea Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Fri, 15 Feb 2013 13:38:16 +0000
Subject: [PATCH] --- yaml --- r: 360098 b: refs/heads/master c:
 2e6c91e392fd7be2ef0ba1e9a20e0ebe8ab79cf3 h: refs/heads/master v: v3

---
 [refs]                                         |  2 +-
 trunk/arch/mips/ath79/Kconfig                  |  4 ++++
 trunk/arch/mips/ath79/setup.c                  | 18 +++++++++++++++++-
 .../mips/include/asm/mach-ath79/ar71xx_regs.h  |  2 ++
 trunk/arch/mips/include/asm/mach-ath79/ath79.h | 17 +++++++++++++++++
 5 files changed, 41 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index d176d8b82e56..cd114dae10d2 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 908987797076b848f01b32c21d61d0e152efc236
+refs/heads/master: 2e6c91e392fd7be2ef0ba1e9a20e0ebe8ab79cf3
diff --git a/trunk/arch/mips/ath79/Kconfig b/trunk/arch/mips/ath79/Kconfig
index f44feee2d67f..cffdc8e3b63b 100644
--- a/trunk/arch/mips/ath79/Kconfig
+++ b/trunk/arch/mips/ath79/Kconfig
@@ -88,6 +88,10 @@ config SOC_AR934X
 	select PCI_AR724X if PCI
 	def_bool n
 
+config SOC_QCA955X
+	select USB_ARCH_HAS_EHCI
+	def_bool n
+
 config PCI_AR724X
 	def_bool n
 
diff --git a/trunk/arch/mips/ath79/setup.c b/trunk/arch/mips/ath79/setup.c
index 60d212ef8629..d5b3c9057018 100644
--- a/trunk/arch/mips/ath79/setup.c
+++ b/trunk/arch/mips/ath79/setup.c
@@ -164,13 +164,29 @@ static void __init ath79_detect_sys_type(void)
 		rev = id & AR934X_REV_ID_REVISION_MASK;
 		break;
 
+	case REV_ID_MAJOR_QCA9556:
+		ath79_soc = ATH79_SOC_QCA9556;
+		chip = "9556";
+		rev = id & QCA955X_REV_ID_REVISION_MASK;
+		break;
+
+	case REV_ID_MAJOR_QCA9558:
+		ath79_soc = ATH79_SOC_QCA9558;
+		chip = "9558";
+		rev = id & QCA955X_REV_ID_REVISION_MASK;
+		break;
+
 	default:
 		panic("ath79: unknown SoC, id:0x%08x", id);
 	}
 
 	ath79_soc_rev = rev;
 
-	sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
+	if (soc_is_qca955x())
+		sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",
+			chip, rev);
+	else
+		sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
 	pr_info("SoC: %s\n", ath79_sys_type);
 }
 
diff --git a/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index d02c2d4e600e..63a9f2b600b8 100644
--- a/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -392,6 +392,8 @@
 
 #define AR934X_REV_ID_REVISION_MASK     0xf
 
+#define QCA955X_REV_ID_REVISION_MASK	0xf
+
 /*
  * SPI block
  */
diff --git a/trunk/arch/mips/include/asm/mach-ath79/ath79.h b/trunk/arch/mips/include/asm/mach-ath79/ath79.h
index 4f248c3d7b23..1557934aaca9 100644
--- a/trunk/arch/mips/include/asm/mach-ath79/ath79.h
+++ b/trunk/arch/mips/include/asm/mach-ath79/ath79.h
@@ -32,6 +32,8 @@ enum ath79_soc_type {
 	ATH79_SOC_AR9341,
 	ATH79_SOC_AR9342,
 	ATH79_SOC_AR9344,
+	ATH79_SOC_QCA9556,
+	ATH79_SOC_QCA9558,
 };
 
 extern enum ath79_soc_type ath79_soc;
@@ -98,6 +100,21 @@ static inline int soc_is_ar934x(void)
 	return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
 }
 
+static inline int soc_is_qca9556(void)
+{
+	return ath79_soc == ATH79_SOC_QCA9556;
+}
+
+static inline int soc_is_qca9558(void)
+{
+	return ath79_soc == ATH79_SOC_QCA9558;
+}
+
+static inline int soc_is_qca955x(void)
+{
+	return soc_is_qca9556() || soc_is_qca9558();
+}
+
 extern void __iomem *ath79_ddr_base;
 extern void __iomem *ath79_pll_base;
 extern void __iomem *ath79_reset_base;