From e23188323c78e167b00c02d26d7bf4b8423dffb9 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 23 Jan 2013 18:56:08 -0500 Subject: [PATCH] --- yaml --- r: 358132 b: refs/heads/master c: ca57802e521de54341efc8a56f70571f79ffac72 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/r600.c | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 0cb36863679f..802816a7650f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 014bb209214d8dce9698efea71c68d20ba477abc +refs/heads/master: ca57802e521de54341efc8a56f70571f79ffac72 diff --git a/trunk/drivers/gpu/drm/radeon/r600.c b/trunk/drivers/gpu/drm/radeon/r600.c index 997707b2a33e..abb143c0bdca 100644 --- a/trunk/drivers/gpu/drm/radeon/r600.c +++ b/trunk/drivers/gpu/drm/radeon/r600.c @@ -1397,11 +1397,6 @@ static void r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) r600_print_gpu_status_regs(rdev); - rv515_mc_stop(rdev, &save); - if (r600_mc_wait_for_idle(rdev)) { - dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); - } - /* Disable CP parsing/prefetching */ if (rdev->family >= CHIP_RV770) WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1) | S_0086D8_CP_PFP_HALT(1)); @@ -1420,6 +1415,11 @@ static void r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) mdelay(50); + rv515_mc_stop(rdev, &save); + if (r600_mc_wait_for_idle(rdev)) { + dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); + } + if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE)) { if (rdev->family >= CHIP_RV770) grbm_soft_reset |= S_008020_SOFT_RESET_DB(1) |