From e24a4ff9665edb54031f6ee5bcd1b8673ba6d050 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Wed, 3 Oct 2007 13:23:18 +0100 Subject: [PATCH] --- yaml --- r: 68149 b: refs/heads/master c: 681c80b5d96076f447e8101ac4325c82d8dce508 h: refs/heads/master i: 68147: c64bf047cbf3d79c1e0e080c8e8cbb6e573321ab v: v3 --- [refs] | 2 +- trunk/drivers/ata/libata-core.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index e1c68205cbd1..2f8d8714a809 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 237d8440cb2b104a3b97fc971a9bce67960bb616 +refs/heads/master: 681c80b5d96076f447e8101ac4325c82d8dce508 diff --git a/trunk/drivers/ata/libata-core.c b/trunk/drivers/ata/libata-core.c index 1501d63db2cb..aecbdad960fb 100644 --- a/trunk/drivers/ata/libata-core.c +++ b/trunk/drivers/ata/libata-core.c @@ -3209,6 +3209,8 @@ static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, unsigned long deadline) { struct ata_ioports *ioaddr = &ap->ioaddr; + struct ata_device *dev; + int i = 0; DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); @@ -3219,6 +3221,25 @@ static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, udelay(20); /* FIXME: flush */ iowrite8(ap->ctl, ioaddr->ctl_addr); + /* If we issued an SRST then an ATA drive (not ATAPI) + * may have changed configuration and be in PIO0 timing. If + * we did a hard reset (or are coming from power on) this is + * true for ATA or ATAPI. Until we've set a suitable controller + * mode we should not touch the bus as we may be talking too fast. + */ + + ata_link_for_each_dev(dev, &ap->link) + dev->pio_mode = XFER_PIO_0; + + /* If the controller has a pio mode setup function then use + it to set the chipset to rights. Don't touch the DMA setup + as that will be dealt with when revalidating */ + if (ap->ops->set_piomode) { + ata_link_for_each_dev(dev, &ap->link) + if (devmask & (1 << i++)) + ap->ops->set_piomode(ap, dev); + } + /* spec mandates ">= 2ms" before checking status. * We wait 150ms, because that was the magic delay used for * ATAPI devices in Hale Landis's ATADRVR, for the period of time