From e2a828ad12901d01e7ef363faf7647674dcded4c Mon Sep 17 00:00:00 2001 From: Adam Jackson Date: Fri, 7 Oct 2011 14:38:46 -0400 Subject: [PATCH] --- yaml --- r: 293531 b: refs/heads/master c: 1f182b27d50ae9f5efeb28be5b65302c8a81e711 h: refs/heads/master i: 293529: f42996d545d9b3ee1ab2b6316ad11dc213292b4e 293527: cb8365a4580ae83d26cd1c644469a0409dd835c2 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 61fd6569b009..4352479d94ec 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 23c99e775d14f01ba45a5affd2fb51af4328359c +refs/heads/master: 1f182b27d50ae9f5efeb28be5b65302c8a81e711 diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index 3e21f3cb7879..ebe71eda9546 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -5235,8 +5235,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, /* Set up the display plane register */ dspcntr = DISPPLANE_GAMMA_ENABLE; - /* Ironlake's plane is forced to pipe, bit 24 is to - enable color space conversion */ if (pipe == 0) dspcntr &= ~DISPPLANE_SEL_PIPE_MASK; else