From e3d52b623e860c0c122a1730e2193d192879b0f6 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Thu, 14 Jun 2012 11:04:50 -0700 Subject: [PATCH] --- yaml --- r: 318603 b: refs/heads/master c: e3f33d46fd917747e966f8e6d25f2940223ad1ee h: refs/heads/master i: 318601: 84fa5a8aaea48424e76907344c5bb6a63a998a38 318599: dec65da3eb66998ea9e9ae50d5540043483e6edf v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/i915_reg.h | 3 +++ trunk/drivers/gpu/drm/i915/intel_pm.c | 2 ++ 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 25c60a38fe05..29af7024b824 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6edaa7fcf287b92fb231a9e23cd6b5b0fc3dddb2 +refs/heads/master: e3f33d46fd917747e966f8e6d25f2940223ad1ee diff --git a/trunk/drivers/gpu/drm/i915/i915_reg.h b/trunk/drivers/gpu/drm/i915/i915_reg.h index 5d7cf5f7e750..782e5d1dc218 100644 --- a/trunk/drivers/gpu/drm/i915/i915_reg.h +++ b/trunk/drivers/gpu/drm/i915/i915_reg.h @@ -4043,6 +4043,9 @@ # define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12) # define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11) +#define GEN7_UCGCTL4 0x940c +#define GEN7_L3BANK2X_CLOCK_GATE_DISABLE (1<<25) + #define GEN6_RPNSWREQ 0xA008 #define GEN6_TURBO_DISABLE (1<<31) #define GEN6_FREQUENCY(x) ((x)<<25) diff --git a/trunk/drivers/gpu/drm/i915/intel_pm.c b/trunk/drivers/gpu/drm/i915/intel_pm.c index 47c1a3e9b4af..17c16f026244 100644 --- a/trunk/drivers/gpu/drm/i915/intel_pm.c +++ b/trunk/drivers/gpu/drm/i915/intel_pm.c @@ -3517,6 +3517,8 @@ static void valleyview_init_clock_gating(struct drm_device *dev) GEN6_RCPBUNIT_CLOCK_GATE_DISABLE | GEN6_RCCUNIT_CLOCK_GATE_DISABLE); + I915_WRITE(GEN7_UCGCTL4, GEN7_L3BANK2X_CLOCK_GATE_DISABLE); + for_each_pipe(pipe) { I915_WRITE(DSPCNTR(pipe), I915_READ(DSPCNTR(pipe)) |