From e3ee91f56a357e31b5ef721bb3428931984de3c0 Mon Sep 17 00:00:00 2001
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
Date: Fri, 8 Jun 2012 17:01:59 +0300
Subject: [PATCH] --- yaml --- r: 313276 b: refs/heads/master c:
 4f4b5c7418692342551d38e28e8a686b1bb311db h: refs/heads/master v: v3

---
 [refs]                             | 2 +-
 trunk/arch/arm/boot/dts/omap4.dtsi | 9 +++++++++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index b87c1920c765..7674c7b623fb 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: db27ac80792d3173a2c8a4458dcf7694db46108e
+refs/heads/master: 4f4b5c7418692342551d38e28e8a686b1bb311db
diff --git a/trunk/arch/arm/boot/dts/omap4.dtsi b/trunk/arch/arm/boot/dts/omap4.dtsi
index 366464173476..5a5b5e84bd65 100644
--- a/trunk/arch/arm/boot/dts/omap4.dtsi
+++ b/trunk/arch/arm/boot/dts/omap4.dtsi
@@ -277,5 +277,14 @@
 			compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 			ti,hwmods = "wd_timer2";
 		};
+
+		mcpdm: mcpdm@40132000 {
+			compatible = "ti,omap4-mcpdm";
+			reg = <0x40132000 0x7f>, /* MPU private access */
+			      <0x49032000 0x7f>; /* L3 Interconnect */
+			interrupts = <0 112 0x4>;
+			interrupt-parent = <&gic>;
+			ti,hwmods = "mcpdm";
+		};
 	};
 };