From e42f1c823e3d8196cf7c8b5b1ac34116db9532f4 Mon Sep 17 00:00:00 2001
From: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Date: Tue, 29 Jun 2010 00:38:02 -0700
Subject: [PATCH] --- yaml --- r: 201135 b: refs/heads/master c:
 f5fa3cb9b790db1c401f4b506d7fcc503771af0d h: refs/heads/master i:   201133:
 27b6e4bebaaf4680a37d6cf113509b782a36243d   201131:
 d5f40b81159bb2ef2b680cd6a6365a375de49251   201127:
 b6f7eb5957717a47052209869f99c982605231a8   201119:
 4c1c6577a4788ba5a565f3312c4de6b89481eb03 v: v3

---
 [refs]                               | 2 +-
 trunk/arch/sparc/include/asm/cache.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index 495f13bf2ffa..6901e4f00e77 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: c67dda14389205f0a223c5089307495290939b3b
+refs/heads/master: f5fa3cb9b790db1c401f4b506d7fcc503771af0d
diff --git a/trunk/arch/sparc/include/asm/cache.h b/trunk/arch/sparc/include/asm/cache.h
index 0588b8c7faa2..69358b590c91 100644
--- a/trunk/arch/sparc/include/asm/cache.h
+++ b/trunk/arch/sparc/include/asm/cache.h
@@ -11,7 +11,6 @@
 
 #define L1_CACHE_SHIFT 5
 #define L1_CACHE_BYTES 32
-#define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)))
 
 #ifdef CONFIG_SPARC32
 #define SMP_CACHE_BYTES_SHIFT 5