From e56399df9337018adeb0bcd25251fedf7023f84f Mon Sep 17 00:00:00 2001
From: Andrew Morton <akpm@linux-foundation.org>
Date: Wed, 30 Jan 2008 13:32:12 +0100
Subject: [PATCH] --- yaml --- r: 80112 b: refs/heads/master c:
 b912a1c73739b6016ced049552392a148c1736c8 h: refs/heads/master v: v3

---
 [refs]                                |  2 +-
 trunk/arch/x86/kernel/cpu/mcheck/k7.c | 18 +++++++++---------
 trunk/arch/x86/kernel/cpu/mcheck/p4.c | 18 +++++++++---------
 trunk/arch/x86/kernel/cpu/mcheck/p6.c | 16 ++++++++--------
 4 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/[refs] b/[refs]
index 09aa219fe642..f114984d81ca 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 9e8b6d90ac973939c4605236d140ae64d459622b
+refs/heads/master: b912a1c73739b6016ced049552392a148c1736c8
diff --git a/trunk/arch/x86/kernel/cpu/mcheck/k7.c b/trunk/arch/x86/kernel/cpu/mcheck/k7.c
index 9e929409fd7a..55dfd4f9446a 100644
--- a/trunk/arch/x86/kernel/cpu/mcheck/k7.c
+++ b/trunk/arch/x86/kernel/cpu/mcheck/k7.c
@@ -27,11 +27,11 @@ static void k7_machine_check(struct pt_regs * regs, long error_code)
 	if (mcgstl & (1<<0))	/* Recoverable ? */
 		recover=0;
 
-	printk (KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
+	printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
 		smp_processor_id(), mcgsth, mcgstl);
 
-	for (i=1; i<nr_mce_banks; i++) {
-		rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high);
+	for (i = 1; i < nr_mce_banks; i++) {
+		rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high);
 		if (high&(1<<31)) {
 			char misc[20];
 			char addr[24];
@@ -42,17 +42,17 @@ static void k7_machine_check(struct pt_regs * regs, long error_code)
 				recover |= 2;
 			high &= ~(1<<31);
 			if (high & (1<<27)) {
-				rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh);
-				snprintf (misc, 20, "[%08x%08x]", ahigh, alow);
+				rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
+				snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
 			}
 			if (high & (1<<26)) {
-				rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
-				snprintf (addr, 24, " at %08x%08x", ahigh, alow);
+				rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
+				snprintf(addr, 24, " at %08x%08x", ahigh, alow);
 			}
-			printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
+			printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
 				smp_processor_id(), i, high, low, misc, addr);
 			/* Clear it */
-			wrmsr (MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
+			wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
 			/* Serialize */
 			wmb();
 			add_taint(TAINT_MACHINE_CHECK);
diff --git a/trunk/arch/x86/kernel/cpu/mcheck/p4.c b/trunk/arch/x86/kernel/cpu/mcheck/p4.c
index cb03a1b50504..77463a3e9adf 100644
--- a/trunk/arch/x86/kernel/cpu/mcheck/p4.c
+++ b/trunk/arch/x86/kernel/cpu/mcheck/p4.c
@@ -152,13 +152,13 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
 	if (mcgstl & (1<<0))	/* Recoverable ? */
 		recover=0;
 
-	printk (KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
+	printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
 		smp_processor_id(), mcgsth, mcgstl);
 
 	if (mce_num_extended_msrs > 0) {
 		struct intel_mce_extended_msrs dbg;
 		intel_get_extended_msrs(&dbg);
-		printk (KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n"
+		printk(KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n"
 			"\teax: %08x ebx: %08x ecx: %08x edx: %08x\n"
 			"\tesi: %08x edi: %08x ebp: %08x esp: %08x\n",
 			smp_processor_id(), dbg.eip, dbg.eflags,
@@ -166,8 +166,8 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
 			dbg.esi, dbg.edi, dbg.ebp, dbg.esp);
 	}
 
-	for (i=0; i<nr_mce_banks; i++) {
-		rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high);
+	for (i = 0; i < nr_mce_banks; i++) {
+		rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high);
 		if (high & (1<<31)) {
 			char misc[20];
 			char addr[24];
@@ -178,14 +178,14 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
 				recover |= 2;
 			high &= ~(1<<31);
 			if (high & (1<<27)) {
-				rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh);
-				snprintf (misc, 20, "[%08x%08x]", ahigh, alow);
+				rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
+				snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
 			}
 			if (high & (1<<26)) {
-				rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
-				snprintf (addr, 24, " at %08x%08x", ahigh, alow);
+				rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
+				snprintf(addr, 24, " at %08x%08x", ahigh, alow);
 			}
-			printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
+			printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
 				smp_processor_id(), i, high, low, misc, addr);
 		}
 	}
diff --git a/trunk/arch/x86/kernel/cpu/mcheck/p6.c b/trunk/arch/x86/kernel/cpu/mcheck/p6.c
index b61f3038c4c8..20376a2c0cf8 100644
--- a/trunk/arch/x86/kernel/cpu/mcheck/p6.c
+++ b/trunk/arch/x86/kernel/cpu/mcheck/p6.c
@@ -27,11 +27,11 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
 	if (mcgstl & (1<<0))	/* Recoverable ? */
 		recover=0;
 
-	printk (KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
+	printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
 		smp_processor_id(), mcgsth, mcgstl);
 
-	for (i=0; i<nr_mce_banks; i++) {
-		rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high);
+	for (i = 0; i < nr_mce_banks; i++) {
+		rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high);
 		if (high & (1<<31)) {
 			char misc[20];
 			char addr[24];
@@ -42,14 +42,14 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
 				recover |= 2;
 			high &= ~(1<<31);
 			if (high & (1<<27)) {
-				rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh);
-				snprintf (misc, 20, "[%08x%08x]", ahigh, alow);
+				rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
+				snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
 			}
 			if (high & (1<<26)) {
-				rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
-				snprintf (addr, 24, " at %08x%08x", ahigh, alow);
+				rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
+				snprintf(addr, 24, " at %08x%08x", ahigh, alow);
 			}
-			printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
+			printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
 				smp_processor_id(), i, high, low, misc, addr);
 		}
 	}