diff --git a/[refs] b/[refs] index f6a8684f8041..eba5a3eeae4c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a173fc693b25216c5c834978f4fafd731fd4ff94 +refs/heads/master: 11407e5713ad85f416705a1ba0daf490ffaeda42 diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 55ca0bea142c..75a9a5fc230a 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -269,7 +269,6 @@ S: Orphan F: drivers/platform/x86/wmi.c AD1889 ALSA SOUND DRIVER -M: Kyle McMartin M: Thibaut Varene W: http://wiki.parisc-linux.org/AD1889 L: linux-parisc@vger.kernel.org @@ -3047,7 +3046,6 @@ F: drivers/hwspinlock/hwspinlock_* F: include/linux/hwspinlock.h HARMONY SOUND DRIVER -M: Kyle McMartin L: linux-parisc@vger.kernel.org S: Maintained F: sound/parisc/harmony.* @@ -3318,6 +3316,12 @@ S: Maintained F: net/ieee802154/ F: drivers/ieee802154/ +IIO SUBSYSTEM AND DRIVERS +M: Jonathan Cameron +L: linux-iio@vger.kernel.org +S: Maintained +F: drivers/staging/iio/ + IKANOS/ADI EAGLE ADSL USB DRIVER M: Matthieu Castet M: Stanislaw Gruszka @@ -4994,9 +4998,8 @@ F: Documentation/blockdev/paride.txt F: drivers/block/paride/ PARISC ARCHITECTURE -M: Kyle McMartin -M: Helge Deller M: "James E.J. Bottomley" +M: Helge Deller L: linux-parisc@vger.kernel.org W: http://www.parisc-linux.org/ Q: http://patchwork.kernel.org/project/linux-parisc/list/ @@ -5855,7 +5858,7 @@ S: Maintained F: drivers/mmc/host/sdhci-spear.c SECURITY SUBSYSTEM -M: James Morris +M: James Morris L: linux-security-module@vger.kernel.org (suggested Cc:) T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git W: http://security.wiki.kernel.org/ @@ -5868,7 +5871,7 @@ S: Supported SELINUX SECURITY MODULE M: Stephen Smalley -M: James Morris +M: James Morris M: Eric Paris L: selinux@tycho.nsa.gov (subscribers-only, general discussion) W: http://selinuxproject.org diff --git a/trunk/Makefile b/trunk/Makefile index 7c44b676b77a..b61a9638b6fc 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 3 SUBLEVEL = 0 -EXTRAVERSION = -rc3 +EXTRAVERSION = -rc5 NAME = Saber-toothed Squirrel # *DOCUMENTATION* diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index 03646c4c13d1..e0d236d7ff73 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -81,6 +81,25 @@ choice prompt "Kernel low-level debugging port" depends on DEBUG_LL + config DEBUG_LL_UART_NONE + bool "No low-level debugging UART" + help + Say Y here if your platform doesn't provide a UART option + below. This relies on your platform choosing the right UART + definition internally in order for low-level debugging to + work. + + config DEBUG_ICEDCC + bool "Kernel low-level debugging via EmbeddedICE DCC channel" + help + Say Y here if you want the debug print routines to direct + their output to the EmbeddedICE macrocell's DCC channel using + co-processor 14. This is known to work on the ARM9 style ICE + channel and on the XScale with the PEEDI. + + Note that the system will appear to hang during boot if there + is nothing connected to read from the DCC. + config AT91_DEBUG_LL_DBGU0 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" depends on HAVE_AT91_DBGU0 @@ -89,6 +108,20 @@ choice bool "Kernel low-level debugging on 9263, 9g45 and cap9" depends on HAVE_AT91_DBGU1 + config DEBUG_FOOTBRIDGE_COM1 + bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" + depends on FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct + their output to the 8250 at PCI COM1. + + config DEBUG_DC21285_PORT + bool "Kernel low-level debugging messages via footbridge serial port" + depends on FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct + their output to the serial port in the DC21285 (Footbridge). + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -103,20 +136,6 @@ choice Say Y here if you want the debug print routines to direct their output to the second serial port on these devices. - config DEBUG_DC21285_PORT - bool "Kernel low-level debugging messages via footbridge serial port" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the serial port in the DC21285 (Footbridge). - - config DEBUG_FOOTBRIDGE_COM1 - bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the 8250 at PCI COM1. - config DEBUG_HIGHBANK_UART bool "Kernel low-level debugging messages via Highbank UART" depends on ARCH_HIGHBANK @@ -187,42 +206,38 @@ choice Say Y here if you want kernel low-level debugging support on i.MX6Q. - config DEBUG_MSM_UART1 - bool "Kernel low-level debugging messages via MSM UART1" - depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + config DEBUG_S3C_UART0 + depends on PLAT_SAMSUNG + bool "Use S3C UART 0 for low-level debug" help Say Y here if you want the debug print routines to direct - their output to the first serial port on MSM devices. + their output to UART 0. The port must have been initialised + by the boot-loader before use. - config DEBUG_MSM_UART2 - bool "Kernel low-level debugging messages via MSM UART2" - depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 - help - Say Y here if you want the debug print routines to direct - their output to the second serial port on MSM devices. + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. - config DEBUG_MSM_UART3 - bool "Kernel low-level debugging messages via MSM UART3" - depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + config DEBUG_S3C_UART1 + depends on PLAT_SAMSUNG + bool "Use S3C UART 1 for low-level debug" help Say Y here if you want the debug print routines to direct - their output to the third serial port on MSM devices. + their output to UART 1. The port must have been initialised + by the boot-loader before use. - config DEBUG_MSM8660_UART - bool "Kernel low-level debugging messages via MSM 8660 UART" - depends on ARCH_MSM8X60 - select MSM_HAS_DEBUG_UART_HS - help - Say Y here if you want the debug print routines to direct - their output to the serial port on MSM 8660 devices. + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. - config DEBUG_MSM8960_UART - bool "Kernel low-level debugging messages via MSM 8960 UART" - depends on ARCH_MSM8960 - select MSM_HAS_DEBUG_UART_HS + config DEBUG_S3C_UART2 + depends on PLAT_SAMSUNG + bool "Use S3C UART 2 for low-level debug" help Say Y here if you want the debug print routines to direct - their output to the serial port on MSM 8960 devices. + their output to UART 2. The port must have been initialised + by the boot-loader before use. + + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. config DEBUG_REALVIEW_STD_PORT bool "RealView Default UART" @@ -240,57 +255,42 @@ choice their output to the standard serial port on the RealView PB1176 platform. - config DEBUG_S3C_UART0 - depends on PLAT_SAMSUNG - bool "Use S3C UART 0 for low-level debug" + config DEBUG_MSM_UART1 + bool "Kernel low-level debugging messages via MSM UART1" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct - their output to UART 0. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. + their output to the first serial port on MSM devices. - config DEBUG_S3C_UART1 - depends on PLAT_SAMSUNG - bool "Use S3C UART 1 for low-level debug" + config DEBUG_MSM_UART2 + bool "Kernel low-level debugging messages via MSM UART2" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct - their output to UART 1. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. + their output to the second serial port on MSM devices. - config DEBUG_S3C_UART2 - depends on PLAT_SAMSUNG - bool "Use S3C UART 2 for low-level debug" + config DEBUG_MSM_UART3 + bool "Kernel low-level debugging messages via MSM UART3" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct - their output to UART 2. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. + their output to the third serial port on MSM devices. - config DEBUG_LL_UART_NONE - bool "No low-level debugging UART" + config DEBUG_MSM8660_UART + bool "Kernel low-level debugging messages via MSM 8660 UART" + depends on ARCH_MSM8X60 + select MSM_HAS_DEBUG_UART_HS help - Say Y here if your platform doesn't provide a UART option - below. This relies on your platform choosing the right UART - definition internally in order for low-level debugging to - work. + Say Y here if you want the debug print routines to direct + their output to the serial port on MSM 8660 devices. - config DEBUG_ICEDCC - bool "Kernel low-level debugging via EmbeddedICE DCC channel" + config DEBUG_MSM8960_UART + bool "Kernel low-level debugging messages via MSM 8960 UART" + depends on ARCH_MSM8960 + select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct - their output to the EmbeddedICE macrocell's DCC channel using - co-processor 14. This is known to work on the ARM9 style ICE - channel and on the XScale with the PEEDI. - - Note that the system will appear to hang during boot if there - is nothing connected to read from the DCC. + their output to the serial port on MSM 8960 devices. endchoice diff --git a/trunk/arch/arm/boot/dts/exynos4210.dtsi b/trunk/arch/arm/boot/dts/exynos4210.dtsi index 63d7578856c1..a1dd2ee83753 100644 --- a/trunk/arch/arm/boot/dts/exynos4210.dtsi +++ b/trunk/arch/arm/boot/dts/exynos4210.dtsi @@ -29,6 +29,7 @@ compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; + cpu-offset = <0x8000>; reg = <0x10490000 0x1000>, <0x10480000 0x100>; }; diff --git a/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts b/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts deleted file mode 100644 index 8a5dff807b45..000000000000 --- a/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts +++ /dev/null @@ -1,25 +0,0 @@ -/dts-v1/; - -/include/ "kirkwood.dtsi" - -/ { - model = "Globalscale Technologies Dreamplug"; - compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; - }; - - chosen { - bootargs = "console=ttyS0,115200n8 earlyprintk"; - }; - - serial@f1012000 { - compatible = "ns16550a"; - reg = <0xf1012000 0xff>; - reg-shift = <2>; - interrupts = <33>; - clock-frequency = <200000000>; - }; -}; diff --git a/trunk/arch/arm/boot/dts/kirkwood.dtsi b/trunk/arch/arm/boot/dts/kirkwood.dtsi deleted file mode 100644 index 771c6bbeb29a..000000000000 --- a/trunk/arch/arm/boot/dts/kirkwood.dtsi +++ /dev/null @@ -1,6 +0,0 @@ -/include/ "skeleton.dtsi" - -/ { - compatible = "marvell,kirkwood"; -}; - diff --git a/trunk/arch/arm/boot/dts/tegra-paz00.dts b/trunk/arch/arm/boot/dts/tegra-paz00.dts index 1a1d7023b69b..825d2957da0b 100644 --- a/trunk/arch/arm/boot/dts/tegra-paz00.dts +++ b/trunk/arch/arm/boot/dts/tegra-paz00.dts @@ -46,11 +46,11 @@ }; serial@70006200 { - status = "disable"; + clock-frequency = <216000000>; }; serial@70006300 { - clock-frequency = <216000000>; + status = "disable"; }; serial@70006400 { @@ -60,7 +60,7 @@ sdhci@c8000000 { cd-gpios = <&gpio 173 0>; /* gpio PV5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 155 0>; /* gpio PT3 */ + power-gpios = <&gpio 169 0>; /* gpio PV1 */ }; sdhci@c8000200 { diff --git a/trunk/arch/arm/common/it8152.c b/trunk/arch/arm/common/it8152.c index d1bcd7b13ebc..fb1f1cfce60c 100644 --- a/trunk/arch/arm/common/it8152.c +++ b/trunk/arch/arm/common/it8152.c @@ -320,13 +320,6 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) return -EBUSY; } -/* - * If we set up a device for bus mastering, we need to check the latency - * timer as we don't have even crappy BIOSes to set it properly. - * The implementation is from arch/i386/pci/i386.c - */ -unsigned int pcibios_max_latency = 255; - /* ITE bridge requires setting latency timer to avoid early bus access termination by PCI bus master devices */ diff --git a/trunk/arch/arm/common/pl330.c b/trunk/arch/arm/common/pl330.c index d8e44a43047c..ff3ad2244824 100644 --- a/trunk/arch/arm/common/pl330.c +++ b/trunk/arch/arm/common/pl330.c @@ -1502,12 +1502,13 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) struct pl330_thread *thrd = ch_id; struct pl330_dmac *pl330; unsigned long flags; - int ret = 0, active = thrd->req_running; + int ret = 0, active; if (!thrd || thrd->free || thrd->dmac->state == DYING) return -EINVAL; pl330 = thrd->dmac; + active = thrd->req_running; spin_lock_irqsave(&pl330->lock, flags); diff --git a/trunk/arch/arm/include/asm/assembler.h b/trunk/arch/arm/include/asm/assembler.h index 62f8095d46de..23371b17b23e 100644 --- a/trunk/arch/arm/include/asm/assembler.h +++ b/trunk/arch/arm/include/asm/assembler.h @@ -137,6 +137,11 @@ disable_irq .endm + .macro save_and_disable_irqs_notrace, oldcpsr + mrs \oldcpsr, cpsr + disable_irq_notrace + .endm + /* * Restore interrupt state previously stored in a register. We don't * guarantee that this will preserve the flags. diff --git a/trunk/arch/arm/include/asm/hardware/pl330.h b/trunk/arch/arm/include/asm/hardware/pl330.h index 575fa8186ca0..c1821385abfa 100644 --- a/trunk/arch/arm/include/asm/hardware/pl330.h +++ b/trunk/arch/arm/include/asm/hardware/pl330.h @@ -41,7 +41,7 @@ enum pl330_dstcachectrl { DCCTRL1, /* Bufferable only */ DCCTRL2, /* Cacheable, but do not allocate */ DCCTRL3, /* Cacheable and bufferable, but do not allocate */ - DINVALID1 = 8, + DINVALID1, /* AWCACHE = 0x1000 */ DINVALID2, DCCTRL6, /* Cacheable write-through, allocate on writes only */ DCCTRL7, /* Cacheable write-back, allocate on writes only */ diff --git a/trunk/arch/arm/include/asm/processor.h b/trunk/arch/arm/include/asm/processor.h index ce280b8d613c..cb8d638924fd 100644 --- a/trunk/arch/arm/include/asm/processor.h +++ b/trunk/arch/arm/include/asm/processor.h @@ -22,6 +22,7 @@ #include #include #include +#include #ifdef __KERNEL__ #define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \ diff --git a/trunk/arch/arm/include/asm/system.h b/trunk/arch/arm/include/asm/system.h index 424aa458c487..e4c96cc6ec0c 100644 --- a/trunk/arch/arm/include/asm/system.h +++ b/trunk/arch/arm/include/asm/system.h @@ -110,7 +110,6 @@ extern void cpu_init(void); void soft_restart(unsigned long); extern void (*arm_pm_restart)(char str, const char *cmd); -extern void (*arm_pm_idle)(void); #define UDBG_UNDEFINED (1 << 0) #define UDBG_SYSCALL (1 << 1) diff --git a/trunk/arch/arm/kernel/process.c b/trunk/arch/arm/kernel/process.c index 008e7ce766a7..971d65c253a9 100644 --- a/trunk/arch/arm/kernel/process.c +++ b/trunk/arch/arm/kernel/process.c @@ -61,6 +61,8 @@ extern void setup_mm_for_reboot(void); static volatile int hlt_counter; +#include + void disable_hlt(void) { hlt_counter++; @@ -179,17 +181,13 @@ void cpu_idle_wait(void) EXPORT_SYMBOL_GPL(cpu_idle_wait); /* - * This is our default idle handler. + * This is our default idle handler. We need to disable + * interrupts here to ensure we don't miss a wakeup call. */ - -void (*arm_pm_idle)(void); - static void default_idle(void) { - if (arm_pm_idle) - arm_pm_idle(); - else - cpu_do_idle(); + if (!need_resched()) + arch_idle(); local_irq_enable(); } @@ -217,10 +215,6 @@ void cpu_idle(void) cpu_die(); #endif - /* - * We need to disable interrupts here - * to ensure we don't miss a wakeup call. - */ local_irq_disable(); #ifdef CONFIG_PL310_ERRATA_769419 wmb(); @@ -228,18 +222,19 @@ void cpu_idle(void) if (hlt_counter) { local_irq_enable(); cpu_relax(); - } else if (!need_resched()) { + } else { stop_critical_timings(); if (cpuidle_idle_call()) pm_idle(); start_critical_timings(); /* - * pm_idle functions must always - * return with IRQs enabled. + * This will eventually be removed - pm_idle + * functions should always return with IRQs + * enabled. */ WARN_ON(irqs_disabled()); - } else local_irq_enable(); + } } leds_event(led_idle_end); rcu_idle_exit(); diff --git a/trunk/arch/arm/kernel/ptrace.c b/trunk/arch/arm/kernel/ptrace.c index e33870ff0ac0..ede6443c34d9 100644 --- a/trunk/arch/arm/kernel/ptrace.c +++ b/trunk/arch/arm/kernel/ptrace.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -904,6 +905,12 @@ long arch_ptrace(struct task_struct *child, long request, return ret; } +#ifdef __ARMEB__ +#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB +#else +#define AUDIT_ARCH_NR AUDIT_ARCH_ARM +#endif + asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) { unsigned long ip; @@ -918,7 +925,7 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) if (!ip) audit_syscall_exit(regs); else - audit_syscall_entry(AUDIT_ARCH_ARMEB, scno, regs->ARM_r0, + audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); if (!test_thread_flag(TIF_SYSCALL_TRACE)) diff --git a/trunk/arch/arm/kernel/smp_twd.c b/trunk/arch/arm/kernel/smp_twd.c index 4285daa077b0..7a79b24597b2 100644 --- a/trunk/arch/arm/kernel/smp_twd.c +++ b/trunk/arch/arm/kernel/smp_twd.c @@ -129,7 +129,7 @@ static struct notifier_block twd_cpufreq_nb = { static int twd_cpufreq_init(void) { - if (!IS_ERR(twd_clk)) + if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk)) return cpufreq_register_notifier(&twd_cpufreq_nb, CPUFREQ_TRANSITION_NOTIFIER); diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index 99a572702509..f84dfe67724f 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -266,6 +266,7 @@ void die(const char *str, struct pt_regs *regs, int err) { struct thread_info *thread = current_thread_info(); int ret; + enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE; oops_enter(); @@ -273,7 +274,9 @@ void die(const char *str, struct pt_regs *regs, int err) console_verbose(); bust_spinlocks(1); if (!user_mode(regs)) - report_bug(regs->ARM_pc, regs); + bug_type = report_bug(regs->ARM_pc, regs); + if (bug_type != BUG_TRAP_TYPE_NONE) + str = "Oops - BUG"; ret = __die(str, err, thread, regs); if (regs && kexec_should_crash(thread->task)) diff --git a/trunk/arch/arm/kernel/vmlinux.lds.S b/trunk/arch/arm/kernel/vmlinux.lds.S index 1e19691e0406..43a31fb06318 100644 --- a/trunk/arch/arm/kernel/vmlinux.lds.S +++ b/trunk/arch/arm/kernel/vmlinux.lds.S @@ -10,6 +10,7 @@ #include #define PROC_INFO \ + . = ALIGN(4); \ VMLINUX_SYMBOL(__proc_info_begin) = .; \ *(.proc.info.init) \ VMLINUX_SYMBOL(__proc_info_end) = .; diff --git a/trunk/arch/arm/mach-at91/at91cap9.c b/trunk/arch/arm/mach-at91/at91cap9.c index 8967d75c2ea3..a42edc25a87e 100644 --- a/trunk/arch/arm/mach-at91/at91cap9.c +++ b/trunk/arch/arm/mach-at91/at91cap9.c @@ -14,7 +14,6 @@ #include -#include #include #include #include @@ -314,12 +313,6 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = { } }; -static void at91cap9_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - /* -------------------------------------------------------------------- * AT91CAP9 processor initialization * -------------------------------------------------------------------- */ @@ -339,7 +332,6 @@ static void __init at91cap9_ioremap_registers(void) static void __init at91cap9_initialize(void) { - arm_pm_idle = at91cap9_idle; arm_pm_restart = at91sam9g45_restart; at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); diff --git a/trunk/arch/arm/mach-at91/at91rm9200.c b/trunk/arch/arm/mach-at91/at91rm9200.c index dd6e2de13420..99c3174e24a2 100644 --- a/trunk/arch/arm/mach-at91/at91rm9200.c +++ b/trunk/arch/arm/mach-at91/at91rm9200.c @@ -289,15 +289,6 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { } }; -static void at91rm9200_idle(void) -{ - /* - * Disable the processor clock. The processor will be automatically - * re-enabled by an interrupt or by a reset. - */ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); -} - static void at91rm9200_restart(char mode, const char *cmd) { /* @@ -323,7 +314,6 @@ static void __init at91rm9200_ioremap_registers(void) static void __init at91rm9200_initialize(void) { - arm_pm_idle = at91rm9200_idle; arm_pm_restart = at91rm9200_restart; at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) diff --git a/trunk/arch/arm/mach-at91/at91rm9200_devices.c b/trunk/arch/arm/mach-at91/at91rm9200_devices.c index 18bacec2b094..97676bdae998 100644 --- a/trunk/arch/arm/mach-at91/at91rm9200_devices.c +++ b/trunk/arch/arm/mach-at91/at91rm9200_devices.c @@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} * USB Device (Gadget) * -------------------------------------------------------------------- */ -#ifdef CONFIG_USB_AT91 +#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE) static struct at91_udc_data udc_data; static struct resource udc_resources[] = { diff --git a/trunk/arch/arm/mach-at91/at91sam9260.c b/trunk/arch/arm/mach-at91/at91sam9260.c index 9ac8c6fe3363..d4036ba43612 100644 --- a/trunk/arch/arm/mach-at91/at91sam9260.c +++ b/trunk/arch/arm/mach-at91/at91sam9260.c @@ -12,7 +12,6 @@ #include -#include #include #include #include @@ -329,15 +328,8 @@ static void __init at91sam9260_ioremap_registers(void) at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); } -static void at91sam9260_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - static void __init at91sam9260_initialize(void) { - arm_pm_idle = at91sam9260_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | (1 << AT91SAM9260_ID_IRQ2); diff --git a/trunk/arch/arm/mach-at91/at91sam9260_devices.c b/trunk/arch/arm/mach-at91/at91sam9260_devices.c index 642ccb6d26b2..5a24f0b4554d 100644 --- a/trunk/arch/arm/mach-at91/at91sam9260_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9260_devices.c @@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} * USB Device (Gadget) * -------------------------------------------------------------------- */ -#ifdef CONFIG_USB_AT91 +#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE) static struct at91_udc_data udc_data; static struct resource udc_resources[] = { @@ -1215,8 +1215,7 @@ void __init at91_add_device_serial(void) {} * CF/IDE * -------------------------------------------------------------------- */ -#if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \ - defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \ +#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \ defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) static struct at91_cf_data cf0_data; @@ -1313,10 +1312,8 @@ void __init at91_add_device_cf(struct at91_cf_data *data) if (data->flags & AT91_CF_TRUE_IDE) #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) pdev->name = "pata_at91"; -#elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) - pdev->name = "at91_ide"; #else -#warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91" +#warning "board requires AT91_CF_TRUE_IDE: enable pata_at91" #endif else pdev->name = "at91_cf"; diff --git a/trunk/arch/arm/mach-at91/at91sam9261.c b/trunk/arch/arm/mach-at91/at91sam9261.c index ab76868f01f5..023c2ff138df 100644 --- a/trunk/arch/arm/mach-at91/at91sam9261.c +++ b/trunk/arch/arm/mach-at91/at91sam9261.c @@ -12,7 +12,6 @@ #include -#include #include #include #include @@ -287,15 +286,8 @@ static void __init at91sam9261_ioremap_registers(void) at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); } -static void at91sam9261_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - static void __init at91sam9261_initialize(void) { - arm_pm_idle = at91sam9261_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | (1 << AT91SAM9261_ID_IRQ2); diff --git a/trunk/arch/arm/mach-at91/at91sam9261_devices.c b/trunk/arch/arm/mach-at91/at91sam9261_devices.c index fc59cbdb0e3c..1e28bed8f425 100644 --- a/trunk/arch/arm/mach-at91/at91sam9261_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9261_devices.c @@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} * USB Device (Gadget) * -------------------------------------------------------------------- */ -#ifdef CONFIG_USB_AT91 +#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE) static struct at91_udc_data udc_data; static struct resource udc_resources[] = { diff --git a/trunk/arch/arm/mach-at91/at91sam9263.c b/trunk/arch/arm/mach-at91/at91sam9263.c index 247ab633abcc..75e876c258af 100644 --- a/trunk/arch/arm/mach-at91/at91sam9263.c +++ b/trunk/arch/arm/mach-at91/at91sam9263.c @@ -12,7 +12,6 @@ #include -#include #include #include #include @@ -308,15 +307,8 @@ static void __init at91sam9263_ioremap_registers(void) at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); } -static void at91sam9263_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - static void __init at91sam9263_initialize(void) { - arm_pm_idle = at91sam9263_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); diff --git a/trunk/arch/arm/mach-at91/at91sam9263_devices.c b/trunk/arch/arm/mach-at91/at91sam9263_devices.c index 7b46b2787022..366a7765635b 100644 --- a/trunk/arch/arm/mach-at91/at91sam9263_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9263_devices.c @@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} * USB Device (Gadget) * -------------------------------------------------------------------- */ -#ifdef CONFIG_USB_AT91 +#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE) static struct at91_udc_data udc_data; static struct resource udc_resources[] = { @@ -355,8 +355,8 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} * Compact Flash (PCMCIA or IDE) * -------------------------------------------------------------------- */ -#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \ - defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) +#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \ + defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) static struct at91_cf_data cf0_data; @@ -450,7 +450,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */ at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */ - pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf"; + pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf"; platform_device_register(pdev); } #else diff --git a/trunk/arch/arm/mach-at91/at91sam9g45.c b/trunk/arch/arm/mach-at91/at91sam9g45.c index 5b12192e52ec..1cb6a96b1c1e 100644 --- a/trunk/arch/arm/mach-at91/at91sam9g45.c +++ b/trunk/arch/arm/mach-at91/at91sam9g45.c @@ -317,12 +317,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { } }; -static void at91sam9g45_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - /* -------------------------------------------------------------------- * AT91SAM9G45 processor initialization * -------------------------------------------------------------------- */ @@ -343,7 +337,6 @@ static void __init at91sam9g45_ioremap_registers(void) static void __init at91sam9g45_initialize(void) { - arm_pm_idle = at91sam9g45_idle; arm_pm_restart = at91sam9g45_restart; at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); diff --git a/trunk/arch/arm/mach-at91/at91sam9rl.c b/trunk/arch/arm/mach-at91/at91sam9rl.c index fd60e226a987..d2c91a841cb8 100644 --- a/trunk/arch/arm/mach-at91/at91sam9rl.c +++ b/trunk/arch/arm/mach-at91/at91sam9rl.c @@ -11,7 +11,6 @@ #include -#include #include #include #include @@ -292,15 +291,8 @@ static void __init at91sam9rl_ioremap_registers(void) at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); } -static void at91sam9rl_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - static void __init at91sam9rl_initialize(void) { - arm_pm_idle = at91sam9rl_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); diff --git a/trunk/arch/arm/mach-at91/at91x40.c b/trunk/arch/arm/mach-at91/at91x40.c index 0154b7f44ff1..56ba3bd035ae 100644 --- a/trunk/arch/arm/mach-at91/at91x40.c +++ b/trunk/arch/arm/mach-at91/at91x40.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -38,19 +37,8 @@ unsigned long clk_get_rate(struct clk *clk) return AT91X40_MASTER_CLOCK; } -static void at91x40_idle(void) -{ - /* - * Disable the processor clock. The processor will be automatically - * re-enabled by an interrupt or by a reset. - */ - at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); - cpu_do_idle(); -} - void __init at91x40_initialize(unsigned long main_clock) { - arm_pm_idle = at91x40_idle; at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) | (1 << AT91X40_ID_IRQ2); } diff --git a/trunk/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/trunk/arch/arm/mach-at91/include/mach/at91sam9_smc.h index eb18a70fa647..175e1fdd9fe8 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91sam9_smc.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91sam9_smc.h @@ -18,6 +18,35 @@ #include +#ifndef __ASSEMBLY__ +struct sam9_smc_config { + /* Setup register */ + u8 ncs_read_setup; + u8 nrd_setup; + u8 ncs_write_setup; + u8 nwe_setup; + + /* Pulse register */ + u8 ncs_read_pulse; + u8 nrd_pulse; + u8 ncs_write_pulse; + u8 nwe_pulse; + + /* Cycle register */ + u16 read_cycle; + u16 write_cycle; + + /* Mode register */ + u32 mode; + u8 tdf_cycles:4; +}; + +extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config); +extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config); +extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config); +extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config); +#endif + #define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */ #define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ #define AT91_SMC_NWESETUP_(x) ((x) << 0) diff --git a/trunk/arch/arm/mach-at91/include/mach/system.h b/trunk/arch/arm/mach-at91/include/mach/system.h new file mode 100644 index 000000000000..cbd64f3bcecd --- /dev/null +++ b/trunk/arch/arm/mach-at91/include/mach/system.h @@ -0,0 +1,50 @@ +/* + * arch/arm/mach-at91/include/mach/system.h + * + * Copyright (C) 2003 SAN People + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include +#include +#include + +static inline void arch_idle(void) +{ + /* + * Disable the processor clock. The processor will be automatically + * re-enabled by an interrupt or by a reset. + */ +#ifdef AT91_PS + at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); +#else + at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); +#endif +#ifndef CONFIG_CPU_ARM920T + /* + * Set the processor (CP15) into 'Wait for Interrupt' mode. + * Post-RM9200 processors need this in conjunction with the above + * to save power when idle. + */ + cpu_do_idle(); +#endif +} + +#endif diff --git a/trunk/arch/arm/mach-at91/sam9_smc.c b/trunk/arch/arm/mach-at91/sam9_smc.c index 8294783b679d..99a0a1d2b7dc 100644 --- a/trunk/arch/arm/mach-at91/sam9_smc.c +++ b/trunk/arch/arm/mach-at91/sam9_smc.c @@ -2,6 +2,7 @@ * linux/arch/arm/mach-at91/sam9_smc.c * * Copyright (C) 2008 Andrew Victor + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -22,7 +23,22 @@ static void __iomem *smc_base_addr[2]; -static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config) +static void sam9_smc_cs_write_mode(void __iomem *base, + struct sam9_smc_config *config) +{ + __raw_writel(config->mode + | AT91_SMC_TDF_(config->tdf_cycles), + base + AT91_SMC_MODE); +} + +void sam9_smc_write_mode(int id, int cs, + struct sam9_smc_config *config) +{ + sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config); +} + +static void sam9_smc_cs_configure(void __iomem *base, + struct sam9_smc_config *config) { /* Setup register */ @@ -45,16 +61,66 @@ static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_con base + AT91_SMC_CYCLE); /* Mode register */ - __raw_writel(config->mode - | AT91_SMC_TDF_(config->tdf_cycles), - base + AT91_SMC_MODE); + sam9_smc_cs_write_mode(base, config); } -void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config) +void sam9_smc_configure(int id, int cs, + struct sam9_smc_config *config) { sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config); } +static void sam9_smc_cs_read_mode(void __iomem *base, + struct sam9_smc_config *config) +{ + u32 val = __raw_readl(base + AT91_SMC_MODE); + + config->mode = (val & ~AT91_SMC_NWECYCLE); + config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ; +} + +void sam9_smc_read_mode(int id, int cs, + struct sam9_smc_config *config) +{ + sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config); +} + +static void sam9_smc_cs_read(void __iomem *base, + struct sam9_smc_config *config) +{ + u32 val; + + /* Setup register */ + val = __raw_readl(base + AT91_SMC_SETUP); + + config->nwe_setup = val & AT91_SMC_NWESETUP; + config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8; + config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16; + config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24; + + /* Pulse register */ + val = __raw_readl(base + AT91_SMC_PULSE); + + config->nwe_setup = val & AT91_SMC_NWEPULSE; + config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8; + config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16; + config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24; + + /* Cycle register */ + val = __raw_readl(base + AT91_SMC_CYCLE); + + config->write_cycle = val & AT91_SMC_NWECYCLE; + config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16; + + /* Mode register */ + sam9_smc_cs_read_mode(base, config); +} + +void sam9_smc_read(int id, int cs, struct sam9_smc_config *config) +{ + sam9_smc_cs_read(AT91_SMC_CS(id, cs), config); +} + void __init at91sam9_ioremap_smc(int id, u32 addr) { if (id > 1) { diff --git a/trunk/arch/arm/mach-at91/sam9_smc.h b/trunk/arch/arm/mach-at91/sam9_smc.h index 039c5ce17aec..3e52dcd4a59f 100644 --- a/trunk/arch/arm/mach-at91/sam9_smc.h +++ b/trunk/arch/arm/mach-at91/sam9_smc.h @@ -8,27 +8,4 @@ * published by the Free Software Foundation. */ -struct sam9_smc_config { - /* Setup register */ - u8 ncs_read_setup; - u8 nrd_setup; - u8 ncs_write_setup; - u8 nwe_setup; - - /* Pulse register */ - u8 ncs_read_pulse; - u8 nrd_pulse; - u8 ncs_write_pulse; - u8 nwe_pulse; - - /* Cycle register */ - u16 read_cycle; - u16 write_cycle; - - /* Mode register */ - u32 mode; - u8 tdf_cycles:4; -}; - -extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config); extern void __init at91sam9_ioremap_smc(int id, u32 addr); diff --git a/trunk/arch/arm/mach-bcmring/core.c b/trunk/arch/arm/mach-bcmring/core.c index 22e4e0a28ad1..6b67b7e8426c 100644 --- a/trunk/arch/arm/mach-bcmring/core.c +++ b/trunk/arch/arm/mach-bcmring/core.c @@ -52,8 +52,27 @@ #include #include -static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); -static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); +#define AMBA_DEVICE(name, initname, base, plat, size) \ +static struct amba_device name##_device = { \ + .dev = { \ + .coherent_dma_mask = ~0, \ + .init_name = initname, \ + .platform_data = plat \ + }, \ + .res = { \ + .start = MM_ADDR_IO_##base, \ + .end = MM_ADDR_IO_##base + (size) - 1, \ + .flags = IORESOURCE_MEM \ + }, \ + .dma_mask = ~0, \ + .irq = { \ + IRQ_##base \ + } \ +} + + +AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K); +AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K); static struct clk pll1_clk = { .name = "PLL1", diff --git a/trunk/arch/arm/mach-bcmring/include/mach/system.h b/trunk/arch/arm/mach-bcmring/include/mach/system.h new file mode 100644 index 000000000000..cb78250db649 --- /dev/null +++ b/trunk/arch/arm/mach-bcmring/include/mach/system.h @@ -0,0 +1,28 @@ +/* + * + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-clps711x/common.c b/trunk/arch/arm/mach-clps711x/common.c index 8736c1acc166..ab1711b9b4d6 100644 --- a/trunk/arch/arm/mach-clps711x/common.c +++ b/trunk/arch/arm/mach-clps711x/common.c @@ -225,19 +225,3 @@ void clps711x_restart(char mode, const char *cmd) { soft_restart(0); } - -static void clps711x_idle(void) -{ - clps_writel(1, HALT); - __asm__ __volatile__( - "mov r0, r0\n\ - mov r0, r0"); -} - -static int __init clps711x_idle_init(void) -{ - arm_pm_idle = clps711x_idle; - return 0; -} - -arch_initcall(clps711x_idle_init); diff --git a/trunk/arch/arm/mach-clps711x/include/mach/system.h b/trunk/arch/arm/mach-clps711x/include/mach/system.h new file mode 100644 index 000000000000..23d6ef8c84da --- /dev/null +++ b/trunk/arch/arm/mach-clps711x/include/mach/system.h @@ -0,0 +1,35 @@ +/* + * arch/arm/mach-clps711x/include/mach/system.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include +#include + +static inline void arch_idle(void) +{ + clps_writel(1, HALT); + __asm__ __volatile__( + "mov r0, r0\n\ + mov r0, r0"); +} + +#endif diff --git a/trunk/arch/arm/mach-cns3xxx/include/mach/system.h b/trunk/arch/arm/mach-cns3xxx/include/mach/system.h new file mode 100644 index 000000000000..9e56b7dc133a --- /dev/null +++ b/trunk/arch/arm/mach-cns3xxx/include/mach/system.h @@ -0,0 +1,25 @@ +/* + * Copyright 2000 Deep Blue Solutions Ltd + * Copyright 2003 ARM Limited + * Copyright 2008 Cavium Networks + * + * This file is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, Version 2, as + * published by the Free Software Foundation. + */ + +#ifndef __MACH_SYSTEM_H +#define __MACH_SYSTEM_H + +#include + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-davinci/include/mach/system.h b/trunk/arch/arm/mach-davinci/include/mach/system.h new file mode 100644 index 000000000000..fcb7a015aba5 --- /dev/null +++ b/trunk/arch/arm/mach-davinci/include/mach/system.h @@ -0,0 +1,21 @@ +/* + * DaVinci system defines + * + * Author: Kevin Hilman, MontaVista Software, Inc. + * + * 2007 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-dove/common.c b/trunk/arch/arm/mach-dove/common.c index dd1429ae6405..bda7aca04ca0 100644 --- a/trunk/arch/arm/mach-dove/common.c +++ b/trunk/arch/arm/mach-dove/common.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include "common.h" @@ -71,7 +72,7 @@ void __init dove_map_io(void) ****************************************************************************/ void __init dove_ehci0_init(void) { - orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0); + orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA); } /***************************************************************************** diff --git a/trunk/arch/arm/mach-dove/include/mach/system.h b/trunk/arch/arm/mach-dove/include/mach/system.h new file mode 100644 index 000000000000..3027954f6162 --- /dev/null +++ b/trunk/arch/arm/mach-dove/include/mach/system.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-dove/include/mach/system.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-ebsa110/core.c b/trunk/arch/arm/mach-ebsa110/core.c index 804c9122b7b3..294aad07f7a0 100644 --- a/trunk/arch/arm/mach-ebsa110/core.c +++ b/trunk/arch/arm/mach-ebsa110/core.c @@ -271,33 +271,8 @@ static struct platform_device *ebsa110_devices[] = { &am79c961_device, }; -/* - * EBSA110 idling methodology: - * - * We can not execute the "wait for interrupt" instruction since that - * will stop our MCLK signal (which provides the clock for the glue - * logic, and therefore the timer interrupt). - * - * Instead, we spin, polling the IRQ_STAT register for the occurrence - * of any interrupt with core clock down to the memory clock. - */ -static void ebsa110_idle(void) -{ - const char *irq_stat = (char *)0xff000000; - - /* disable clock switching */ - asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); - - /* wait for an interrupt to occur */ - while (!*irq_stat); - - /* enable clock switching */ - asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); -} - static int __init ebsa110_init(void) { - arm_pm_idle = ebsa110_idle; return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); } diff --git a/trunk/arch/arm/mach-ebsa110/include/mach/system.h b/trunk/arch/arm/mach-ebsa110/include/mach/system.h new file mode 100644 index 000000000000..2e4af65edb6f --- /dev/null +++ b/trunk/arch/arm/mach-ebsa110/include/mach/system.h @@ -0,0 +1,37 @@ +/* + * arch/arm/mach-ebsa110/include/mach/system.h + * + * Copyright (C) 1996-2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +/* + * EBSA110 idling methodology: + * + * We can not execute the "wait for interrupt" instruction since that + * will stop our MCLK signal (which provides the clock for the glue + * logic, and therefore the timer interrupt). + * + * Instead, we spin, polling the IRQ_STAT register for the occurrence + * of any interrupt with core clock down to the memory clock. + */ +static inline void arch_idle(void) +{ + const char *irq_stat = (char *)0xff000000; + + /* disable clock switching */ + asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); + + /* wait for an interrupt to occur */ + while (!*irq_stat); + + /* enable clock switching */ + asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); +} + +#endif diff --git a/trunk/arch/arm/mach-ep93xx/core.c b/trunk/arch/arm/mach-ep93xx/core.c index 903edb02fe4f..24203f9a6796 100644 --- a/trunk/arch/arm/mach-ep93xx/core.c +++ b/trunk/arch/arm/mach-ep93xx/core.c @@ -279,14 +279,48 @@ static struct amba_pl010_data ep93xx_uart_data = { .set_mctrl = ep93xx_uart_set_mctrl, }; -static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, - { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); +static struct amba_device uart1_device = { + .dev = { + .init_name = "apb:uart1", + .platform_data = &ep93xx_uart_data, + }, + .res = { + .start = EP93XX_UART1_PHYS_BASE, + .end = EP93XX_UART1_PHYS_BASE + 0x0fff, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_EP93XX_UART1, NO_IRQ }, + .periphid = 0x00041010, +}; + +static struct amba_device uart2_device = { + .dev = { + .init_name = "apb:uart2", + .platform_data = &ep93xx_uart_data, + }, + .res = { + .start = EP93XX_UART2_PHYS_BASE, + .end = EP93XX_UART2_PHYS_BASE + 0x0fff, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_EP93XX_UART2, NO_IRQ }, + .periphid = 0x00041010, +}; -static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, - { IRQ_EP93XX_UART2 }, &ep93xx_uart_data); +static struct amba_device uart3_device = { + .dev = { + .init_name = "apb:uart3", + .platform_data = &ep93xx_uart_data, + }, + .res = { + .start = EP93XX_UART3_PHYS_BASE, + .end = EP93XX_UART3_PHYS_BASE + 0x0fff, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_EP93XX_UART3, NO_IRQ }, + .periphid = 0x00041010, +}; -static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, - { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); static struct resource ep93xx_rtc_resource[] = { { diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/system.h b/trunk/arch/arm/mach-ep93xx/include/mach/system.h new file mode 100644 index 000000000000..b5bec7cb9b52 --- /dev/null +++ b/trunk/arch/arm/mach-ep93xx/include/mach/system.h @@ -0,0 +1,7 @@ +/* + * arch/arm/mach-ep93xx/include/mach/system.h + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-ep93xx/vision_ep9307.c b/trunk/arch/arm/mach-ep93xx/vision_ep9307.c index 03dd4012043e..d5fb44f16d31 100644 --- a/trunk/arch/arm/mach-ep93xx/vision_ep9307.c +++ b/trunk/arch/arm/mach-ep93xx/vision_ep9307.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include @@ -153,7 +154,6 @@ static struct i2c_board_info vision_i2c_info[] __initdata = { }, { I2C_BOARD_INFO("pca9539", 0x74), .platform_data = &pca953x_74_gpio_data, - .irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)), }, { I2C_BOARD_INFO("pca9539", 0x75), .platform_data = &pca953x_75_gpio_data, @@ -348,6 +348,8 @@ static void __init vision_init_machine(void) "pca9539:74")) pr_warn("cannot request interrupt gpio for pca9539:74\n"); + vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)); + ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info, ARRAY_SIZE(vision_i2c_info)); ep93xx_register_spi(&vision_spi_master, vision_spi_board_info, diff --git a/trunk/arch/arm/mach-exynos/clock-exynos4210.c b/trunk/arch/arm/mach-exynos/clock-exynos4210.c index a5823a7f249e..13312ccb2d93 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos4210.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos4210.c @@ -32,6 +32,7 @@ #include "common.h" +#ifdef CONFIG_PM_SLEEP static struct sleep_save exynos4210_clock_save[] = { SAVE_ITEM(S5P_CLKSRC_IMAGE), SAVE_ITEM(S5P_CLKSRC_LCD1), @@ -42,6 +43,7 @@ static struct sleep_save exynos4210_clock_save[] = { SAVE_ITEM(S5P_CLKGATE_IP_LCD1), SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210), }; +#endif static struct clksrc_clk *sysclks[] = { /* nothing here yet */ diff --git a/trunk/arch/arm/mach-exynos/clock-exynos4212.c b/trunk/arch/arm/mach-exynos/clock-exynos4212.c index 26a668b0d101..48af28566fa1 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos4212.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos4212.c @@ -32,12 +32,14 @@ #include "common.h" +#ifdef CONFIG_PM_SLEEP static struct sleep_save exynos4212_clock_save[] = { SAVE_ITEM(S5P_CLKSRC_IMAGE), SAVE_ITEM(S5P_CLKDIV_IMAGE), SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4212), SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4212), }; +#endif static struct clk *clk_src_mpll_user_list[] = { [0] = &clk_fin_mpll, diff --git a/trunk/arch/arm/mach-exynos/clock.c b/trunk/arch/arm/mach-exynos/clock.c index 5a8c42e90005..187287aa57ab 100644 --- a/trunk/arch/arm/mach-exynos/clock.c +++ b/trunk/arch/arm/mach-exynos/clock.c @@ -30,6 +30,7 @@ #include "common.h" +#ifdef CONFIG_PM_SLEEP static struct sleep_save exynos4_clock_save[] = { SAVE_ITEM(S5P_CLKDIV_LEFTBUS), SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), @@ -93,6 +94,7 @@ static struct sleep_save exynos4_clock_save[] = { SAVE_ITEM(S5P_CLKGATE_SCLKCPU), SAVE_ITEM(S5P_CLKGATE_IP_CPU), }; +#endif struct clk clk_sclk_hdmi27m = { .name = "sclk_hdmi27m", diff --git a/trunk/arch/arm/mach-exynos/common.c b/trunk/arch/arm/mach-exynos/common.c index 031c1e5b3dfe..c59e18871006 100644 --- a/trunk/arch/arm/mach-exynos/common.c +++ b/trunk/arch/arm/mach-exynos/common.c @@ -201,6 +201,14 @@ static struct map_desc exynos4_iodesc1[] __initdata = { }, }; +static void exynos_idle(void) +{ + if (!need_resched()) + cpu_do_idle(); + + local_irq_enable(); +} + void exynos4_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -459,6 +467,10 @@ early_initcall(exynos4_l2x0_cache_init); int __init exynos_init(void) { printk(KERN_INFO "EXYNOS: Initializing architecture\n"); + + /* set idle function */ + pm_idle = exynos_idle; + return device_register(&exynos4_dev); } diff --git a/trunk/arch/arm/mach-exynos/dma.c b/trunk/arch/arm/mach-exynos/dma.c index 91370def4a70..b10fcd270f07 100644 --- a/trunk/arch/arm/mach-exynos/dma.c +++ b/trunk/arch/arm/mach-exynos/dma.c @@ -74,8 +74,21 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = { .peri_id = pdma0_peri, }; -AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0, - {IRQ_PDMA0}, &exynos4_pdma0_pdata); +struct amba_device exynos4_device_pdma0 = { + .dev = { + .init_name = "dma-pl330.0", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &exynos4_pdma0_pdata, + }, + .res = { + .start = EXYNOS4_PA_PDMA0, + .end = EXYNOS4_PA_PDMA0 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA0, NO_IRQ}, + .periphid = 0x00041330, +}; u8 pdma1_peri[] = { DMACH_PCM0_RX, @@ -110,8 +123,21 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = { .peri_id = pdma1_peri, }; -AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1, - {IRQ_PDMA1}, &exynos4_pdma1_pdata); +struct amba_device exynos4_device_pdma1 = { + .dev = { + .init_name = "dma-pl330.1", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &exynos4_pdma1_pdata, + }, + .res = { + .start = EXYNOS4_PA_PDMA1, + .end = EXYNOS4_PA_PDMA1 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA1, NO_IRQ}, + .periphid = 0x00041330, +}; static int __init exynos4_dma_init(void) { @@ -120,11 +146,11 @@ static int __init exynos4_dma_init(void) dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); - amba_device_register(&exynos4_pdma0_device, &iomem_resource); + amba_device_register(&exynos4_device_pdma0, &iomem_resource); dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); - amba_device_register(&exynos4_pdma1_device, &iomem_resource); + amba_device_register(&exynos4_device_pdma1, &iomem_resource); return 0; } diff --git a/trunk/arch/arm/mach-exynos/include/mach/system.h b/trunk/arch/arm/mach-exynos/include/mach/system.h new file mode 100644 index 000000000000..0063a6de3dc8 --- /dev/null +++ b/trunk/arch/arm/mach-exynos/include/mach/system.h @@ -0,0 +1,20 @@ +/* linux/arch/arm/mach-exynos4/include/mach/system.h + * + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * EXYNOS4 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-exynos/mach-exynos4-dt.c b/trunk/arch/arm/mach-exynos/mach-exynos4-dt.c index 85fa02767d67..e6b02fdf1b09 100644 --- a/trunk/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/trunk/arch/arm/mach-exynos/mach-exynos4-dt.c @@ -15,11 +15,13 @@ #include #include +#include #include #include #include -#include + +#include "common.h" /* * The following lookup table is used to override device names when devices @@ -60,7 +62,7 @@ static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = { static void __init exynos4210_dt_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + exynos_init_io(NULL, 0); s3c24xx_init_clocks(24000000); } @@ -79,7 +81,9 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") /* Maintainer: Thomas Abraham */ .init_irq = exynos4_init_irq, .map_io = exynos4210_dt_map_io, + .handle_irq = gic_handle_irq, .init_machine = exynos4210_dt_machine_init, .timer = &exynos4_timer, .dt_compat = exynos4210_dt_compat, + .restart = exynos4_restart, MACHINE_END diff --git a/trunk/arch/arm/mach-exynos/mach-nuri.c b/trunk/arch/arm/mach-exynos/mach-nuri.c index b895ec031105..435261f83f46 100644 --- a/trunk/arch/arm/mach-exynos/mach-nuri.c +++ b/trunk/arch/arm/mach-exynos/mach-nuri.c @@ -220,14 +220,14 @@ static struct s3c_fb_pd_win nuri_fb_win0 = { .lower_margin = 1, .hsync_len = 48, .vsync_len = 3, - .xres = 1280, - .yres = 800, + .xres = 1024, + .yres = 600, .refresh = 60, }, .max_bpp = 24, .default_bpp = 16, - .virtual_x = 1280, - .virtual_y = 800, + .virtual_x = 1024, + .virtual_y = 2 * 600, }; static struct s3c_fb_platdata nuri_fb_pdata __initdata = { diff --git a/trunk/arch/arm/mach-exynos/mach-universal_c210.c b/trunk/arch/arm/mach-exynos/mach-universal_c210.c index 37ac93e8d6d9..0fc65ffde8ff 100644 --- a/trunk/arch/arm/mach-exynos/mach-universal_c210.c +++ b/trunk/arch/arm/mach-exynos/mach-universal_c210.c @@ -910,7 +910,7 @@ static struct s5p_fimc_isp_info universal_camera_sensors[] = { .bus_type = FIMC_MIPI_CSI2, .board_info = &m5mols_board_info, .i2c_bus_num = 0, - .clk_frequency = 21600000UL, + .clk_frequency = 24000000UL, .csi_data_align = 32, }, }; diff --git a/trunk/arch/arm/mach-exynos/pm.c b/trunk/arch/arm/mach-exynos/pm.c index a4f61a43c7ba..e19013051772 100644 --- a/trunk/arch/arm/mach-exynos/pm.c +++ b/trunk/arch/arm/mach-exynos/pm.c @@ -206,7 +206,7 @@ static void exynos4_pm_prepare(void) } -static int exynos4_pm_add(struct device *dev) +static int exynos4_pm_add(struct device *dev, struct subsys_interface *sif) { pm_cpu_prep = exynos4_pm_prepare; pm_cpu_sleep = exynos4_cpu_suspend; @@ -384,7 +384,9 @@ static void exynos4_pm_resume(void) exynos4_restore_pll(); +#ifdef CONFIG_SMP scu_enable(S5P_VA_SCU); +#endif #ifdef CONFIG_CACHE_L2X0 s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); diff --git a/trunk/arch/arm/mach-footbridge/include/mach/system.h b/trunk/arch/arm/mach-footbridge/include/mach/system.h new file mode 100644 index 000000000000..a174a5841bc2 --- /dev/null +++ b/trunk/arch/arm/mach-footbridge/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-footbridge/include/mach/system.h + * + * Copyright (C) 1996-1999 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-gemini/Makefile b/trunk/arch/arm/mach-gemini/Makefile index 7355c0bbcb5e..c5b24b95a76e 100644 --- a/trunk/arch/arm/mach-gemini/Makefile +++ b/trunk/arch/arm/mach-gemini/Makefile @@ -4,7 +4,7 @@ # Object file lists. -obj-y := irq.o mm.o time.o devices.o gpio.o idle.o +obj-y := irq.o mm.o time.o devices.o gpio.o # Board-specific support obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o diff --git a/trunk/arch/arm/mach-gemini/idle.c b/trunk/arch/arm/mach-gemini/idle.c deleted file mode 100644 index 92bbd6bb600a..000000000000 --- a/trunk/arch/arm/mach-gemini/idle.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * arch/arm/mach-gemini/idle.c - */ - -#include -#include -#include - -static void gemini_idle(void) -{ - /* - * Because of broken hardware we have to enable interrupts or the CPU - * will never wakeup... Acctualy it is not very good to enable - * interrupts first since scheduler can miss a tick, but there is - * no other way around this. Platforms that needs it for power saving - * should call enable_hlt() in init code, since by default it is - * disabled. - */ - local_irq_enable(); - cpu_do_idle(); -} - -static int __init gemini_idle_init(void) -{ - arm_pm_idle = gemini_idle; - return 0; -} - -arch_initcall(gemini_idle_init); diff --git a/trunk/arch/arm/mach-gemini/include/mach/system.h b/trunk/arch/arm/mach-gemini/include/mach/system.h index a33b5a1f8ab4..4d9c1f872472 100644 --- a/trunk/arch/arm/mach-gemini/include/mach/system.h +++ b/trunk/arch/arm/mach-gemini/include/mach/system.h @@ -14,6 +14,20 @@ #include #include +static inline void arch_idle(void) +{ + /* + * Because of broken hardware we have to enable interrupts or the CPU + * will never wakeup... Acctualy it is not very good to enable + * interrupts here since scheduler can miss a tick, but there is + * no other way around this. Platforms that needs it for power saving + * should call enable_hlt() in init code, since by default it is + * disabled. + */ + local_irq_enable(); + cpu_do_idle(); +} + static inline void arch_reset(char mode, const char *cmd) { __raw_writel(RESET_GLOBAL | RESET_CPU1, diff --git a/trunk/arch/arm/mach-gemini/irq.c b/trunk/arch/arm/mach-gemini/irq.c index ca70e5fcc7ac..9485a8fdf851 100644 --- a/trunk/arch/arm/mach-gemini/irq.c +++ b/trunk/arch/arm/mach-gemini/irq.c @@ -73,8 +73,8 @@ void __init gemini_init_irq(void) unsigned int i, mode = 0, level = 0; /* - * Disable the idle handler by default since it is buggy - * For more info see arch/arm/mach-gemini/idle.c + * Disable arch_idle() by default since it is buggy + * For more info see arch/arm/mach-gemini/include/mach/system.h */ disable_hlt(); diff --git a/trunk/arch/arm/mach-h720x/common.c b/trunk/arch/arm/mach-h720x/common.c index e756d1ac00c2..f8a2f6bb5483 100644 --- a/trunk/arch/arm/mach-h720x/common.c +++ b/trunk/arch/arm/mach-h720x/common.c @@ -247,21 +247,3 @@ void h720x_restart(char mode, const char *cmd) { CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; } - -static void h720x__idle(void) -{ - CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; - nop(); - nop(); - CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; - nop(); - nop(); -} - -static int __init h720x_idle_init(void) -{ - arm_pm_idle = h720x__idle; - return 0; -} - -arch_initcall(h720x_idle_init); diff --git a/trunk/arch/arm/mach-h720x/include/mach/system.h b/trunk/arch/arm/mach-h720x/include/mach/system.h new file mode 100644 index 000000000000..16ac46e239aa --- /dev/null +++ b/trunk/arch/arm/mach-h720x/include/mach/system.h @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-h720x/include/mach/system.h + * + * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * arch/arm/mach-h720x/include/mach/system.h + * + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H +#include + +static void arch_idle(void) +{ + CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; + nop(); + nop(); + CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; + nop(); + nop(); +} + +#endif diff --git a/trunk/drivers/staging/gma500/mid_bios.h b/trunk/arch/arm/mach-highbank/include/mach/system.h similarity index 57% rename from trunk/drivers/staging/gma500/mid_bios.h rename to trunk/arch/arm/mach-highbank/include/mach/system.h index 00e7d564b7eb..b1d8b5fbe373 100644 --- a/trunk/drivers/staging/gma500/mid_bios.h +++ b/trunk/arch/arm/mach-highbank/include/mach/system.h @@ -1,6 +1,5 @@ -/************************************************************************** - * Copyright (c) 2011, Intel Corporation. - * All Rights Reserved. +/* + * Copyright 2010-2011 Calxeda, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,10 +11,14 @@ * more details. * * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * - **************************************************************************/ + * this program. If not, see . + */ +#ifndef __MACH_SYSTEM_H +#define __MACH_SYSTEM_H -extern int mid_chip_setup(struct drm_device *dev); +static inline void arch_idle(void) +{ + cpu_do_idle(); +} +#endif diff --git a/trunk/arch/arm/mach-imx/mm-imx3.c b/trunk/arch/arm/mach-imx/mm-imx3.c index 8404ee72555a..31807d2a8b7b 100644 --- a/trunk/arch/arm/mach-imx/mm-imx3.c +++ b/trunk/arch/arm/mach-imx/mm-imx3.c @@ -34,29 +34,31 @@ static void imx3_idle(void) { unsigned long reg = 0; - __asm__ __volatile__( - /* disable I and D cache */ - "mrc p15, 0, %0, c1, c0, 0\n" - "bic %0, %0, #0x00001000\n" - "bic %0, %0, #0x00000004\n" - "mcr p15, 0, %0, c1, c0, 0\n" - /* invalidate I cache */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c5, 0\n" - /* clear and invalidate D cache */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c14, 0\n" - /* WFI */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c0, 4\n" - "nop\n" "nop\n" "nop\n" "nop\n" - "nop\n" "nop\n" "nop\n" - /* enable I and D cache */ - "mrc p15, 0, %0, c1, c0, 0\n" - "orr %0, %0, #0x00001000\n" - "orr %0, %0, #0x00000004\n" - "mcr p15, 0, %0, c1, c0, 0\n" - : "=r" (reg)); + if (!need_resched()) + __asm__ __volatile__( + /* disable I and D cache */ + "mrc p15, 0, %0, c1, c0, 0\n" + "bic %0, %0, #0x00001000\n" + "bic %0, %0, #0x00000004\n" + "mcr p15, 0, %0, c1, c0, 0\n" + /* invalidate I cache */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c5, 0\n" + /* clear and invalidate D cache */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c14, 0\n" + /* WFI */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c0, 4\n" + "nop\n" "nop\n" "nop\n" "nop\n" + "nop\n" "nop\n" "nop\n" + /* enable I and D cache */ + "mrc p15, 0, %0, c1, c0, 0\n" + "orr %0, %0, #0x00001000\n" + "orr %0, %0, #0x00000004\n" + "mcr p15, 0, %0, c1, c0, 0\n" + : "=r" (reg)); + local_irq_enable(); } static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, @@ -132,8 +134,8 @@ void __init imx31_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX31); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); + pm_idle = imx3_idle; imx_ioremap = imx3_ioremap; - arm_pm_idle = imx3_idle; } void __init mx31_init_irq(void) @@ -195,7 +197,7 @@ void __init imx35_init_early(void) mxc_set_cpu_type(MXC_CPU_MX35); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); - arm_pm_idle = imx3_idle; + pm_idle = imx3_idle; imx_ioremap = imx3_ioremap; } diff --git a/trunk/arch/arm/mach-imx/mm-imx5.c b/trunk/arch/arm/mach-imx/mm-imx5.c index 49549a72dc7d..bc17dfea3817 100644 --- a/trunk/arch/arm/mach-imx/mm-imx5.c +++ b/trunk/arch/arm/mach-imx/mm-imx5.c @@ -26,17 +26,23 @@ static struct clk *gpc_dvfs_clk; static void imx5_idle(void) { - /* gpc clock is needed for SRPG */ - if (gpc_dvfs_clk == NULL) { - gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); - if (IS_ERR(gpc_dvfs_clk)) - return; - } - clk_enable(gpc_dvfs_clk); - mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); - if (tzic_enable_wake() != 0) + if (!need_resched()) { + /* gpc clock is needed for SRPG */ + if (gpc_dvfs_clk == NULL) { + gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); + if (IS_ERR(gpc_dvfs_clk)) + goto err0; + } + clk_enable(gpc_dvfs_clk); + mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); + if (tzic_enable_wake()) + goto err1; cpu_do_idle(); - clk_disable(gpc_dvfs_clk); +err1: + clk_disable(gpc_dvfs_clk); + } +err0: + local_irq_enable(); } /* @@ -102,7 +108,7 @@ void __init imx51_init_early(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); - arm_pm_idle = imx5_idle; + pm_idle = imx5_idle; } void __init imx53_init_early(void) diff --git a/trunk/arch/arm/mach-imx/pm-imx27.c b/trunk/arch/arm/mach-imx/pm-imx27.c index 6fcffa7db978..e455d2f855bf 100644 --- a/trunk/arch/arm/mach-imx/pm-imx27.c +++ b/trunk/arch/arm/mach-imx/pm-imx27.c @@ -10,6 +10,7 @@ #include #include #include +#include #include static int mx27_suspend_enter(suspend_state_t state) @@ -22,7 +23,7 @@ static int mx27_suspend_enter(suspend_state_t state) cscr &= 0xFFFFFFFC; __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); /* Executes WFI */ - cpu_do_idle(); + arch_idle(); break; default: diff --git a/trunk/arch/arm/mach-integrator/core.c b/trunk/arch/arm/mach-integrator/core.c index 15b87f26ac96..019f0ab08f66 100644 --- a/trunk/arch/arm/mach-integrator/core.c +++ b/trunk/arch/arm/mach-integrator/core.c @@ -35,23 +35,67 @@ static struct amba_pl010_data integrator_uart_data; -#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT } -#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 } -#define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 } -#define KMI0_IRQ { IRQ_KMIINT0 } -#define KMI1_IRQ { IRQ_KMIINT1 } +static struct amba_device rtc_device = { + .dev = { + .init_name = "mb:15", + }, + .res = { + .start = INTEGRATOR_RTC_BASE, + .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_RTCINT, NO_IRQ }, +}; -static AMBA_APB_DEVICE(rtc, "mb:15", 0, - INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL); +static struct amba_device uart0_device = { + .dev = { + .init_name = "mb:16", + .platform_data = &integrator_uart_data, + }, + .res = { + .start = INTEGRATOR_UART0_BASE, + .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_UARTINT0, NO_IRQ }, +}; -static AMBA_APB_DEVICE(uart0, "mb:16", 0, - INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data); +static struct amba_device uart1_device = { + .dev = { + .init_name = "mb:17", + .platform_data = &integrator_uart_data, + }, + .res = { + .start = INTEGRATOR_UART1_BASE, + .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_UARTINT1, NO_IRQ }, +}; -static AMBA_APB_DEVICE(uart1, "mb:17", 0, - INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data); +static struct amba_device kmi0_device = { + .dev = { + .init_name = "mb:18", + }, + .res = { + .start = KMI0_BASE, + .end = KMI0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_KMIINT0, NO_IRQ }, +}; -static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL); -static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL); +static struct amba_device kmi1_device = { + .dev = { + .init_name = "mb:19", + }, + .res = { + .start = KMI1_BASE, + .end = KMI1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_KMIINT1, NO_IRQ }, +}; static struct amba_device *amba_devs[] __initdata = { &rtc_device, diff --git a/trunk/arch/arm/mach-integrator/impd1.c b/trunk/arch/arm/mach-integrator/impd1.c index 3e538da6cb1f..8cbb75a96bd4 100644 --- a/trunk/arch/arm/mach-integrator/impd1.c +++ b/trunk/arch/arm/mach-integrator/impd1.c @@ -401,21 +401,24 @@ static int impd1_probe(struct lm_device *dev) pc_base = dev->resource.start + idev->offset; - d = amba_device_alloc(NULL, pc_base, SZ_4K); + d = kzalloc(sizeof(struct amba_device), GFP_KERNEL); if (!d) continue; dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); d->dev.parent = &dev->dev; + d->res.start = dev->resource.start + idev->offset; + d->res.end = d->res.start + SZ_4K - 1; + d->res.flags = IORESOURCE_MEM; d->irq[0] = dev->irq; d->irq[1] = dev->irq; d->periphid = idev->id; d->dev.platform_data = idev->platform_data; - ret = amba_device_add(d, &dev->resource); + ret = amba_device_register(d, &dev->resource); if (ret) { dev_err(&d->dev, "unable to register device: %d\n", ret); - amba_device_put(d); + kfree(d); } } diff --git a/trunk/arch/arm/mach-integrator/include/mach/system.h b/trunk/arch/arm/mach-integrator/include/mach/system.h new file mode 100644 index 000000000000..901514eba4a6 --- /dev/null +++ b/trunk/arch/arm/mach-integrator/include/mach/system.h @@ -0,0 +1,33 @@ +/* + * arch/arm/mach-integrator/include/mach/system.h + * + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-integrator/integrator_cp.c b/trunk/arch/arm/mach-integrator/integrator_cp.c index be9ead4a3bcc..a8b6aa6003f3 100644 --- a/trunk/arch/arm/mach-integrator/integrator_cp.c +++ b/trunk/arch/arm/mach-integrator/integrator_cp.c @@ -347,14 +347,32 @@ static struct mmci_platform_data mmc_data = { .gpio_cd = -1, }; -#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 } -#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT } - -static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE, - INTEGRATOR_CP_MMC_IRQS, &mmc_data); +static struct amba_device mmc_device = { + .dev = { + .init_name = "mb:1c", + .platform_data = &mmc_data, + }, + .res = { + .start = INTEGRATOR_CP_MMC_BASE, + .end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }, + .periphid = 0, +}; -static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE, - INTEGRATOR_CP_AACI_IRQS, NULL); +static struct amba_device aaci_device = { + .dev = { + .init_name = "mb:1d", + }, + .res = { + .start = INTEGRATOR_CP_AACI_BASE, + .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_CP_AACIINT, NO_IRQ }, + .periphid = 0, +}; /* @@ -407,8 +425,21 @@ static struct clcd_board clcd_data = { .remove = versatile_clcd_remove_dma, }; -static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE, - { IRQ_CP_CLCDCINT }, &clcd_data); +static struct amba_device clcd_device = { + .dev = { + .init_name = "mb:c0", + .coherent_dma_mask = ~0, + .platform_data = &clcd_data, + }, + .res = { + .start = INTCP_PA_CLCD_BASE, + .end = INTCP_PA_CLCD_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .dma_mask = ~0, + .irq = { IRQ_CP_CLCDCINT, NO_IRQ }, + .periphid = 0, +}; static struct amba_device *amba_devs[] __initdata = { &mmc_device, diff --git a/trunk/arch/arm/mach-iop13xx/include/mach/system.h b/trunk/arch/arm/mach-iop13xx/include/mach/system.h new file mode 100644 index 000000000000..1f31ed3f8ae2 --- /dev/null +++ b/trunk/arch/arm/mach-iop13xx/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-iop13xx/include/mach/system.h + * + * Copyright (C) 2004 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-iop32x/include/mach/system.h b/trunk/arch/arm/mach-iop32x/include/mach/system.h new file mode 100644 index 000000000000..4a88727bca98 --- /dev/null +++ b/trunk/arch/arm/mach-iop32x/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-iop32x/include/mach/system.h + * + * Copyright (C) 2001 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-iop33x/include/mach/system.h b/trunk/arch/arm/mach-iop33x/include/mach/system.h new file mode 100644 index 000000000000..4f98e765397c --- /dev/null +++ b/trunk/arch/arm/mach-iop33x/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-iop33x/include/mach/system.h + * + * Copyright (C) 2001 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/system.h b/trunk/arch/arm/mach-ixp2000/include/mach/system.h new file mode 100644 index 000000000000..a7fb08b2b8e7 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/system.h @@ -0,0 +1,14 @@ +/* + * arch/arm/mach-ixp2000/include/mach/system.h + * + * Copyright (C) 2002 Intel Corp. + * Copyricht (C) 2003-2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-ixp23xx/core.c b/trunk/arch/arm/mach-ixp23xx/core.c index 7c1495e4fe7a..0923bb905cc0 100644 --- a/trunk/arch/arm/mach-ixp23xx/core.c +++ b/trunk/arch/arm/mach-ixp23xx/core.c @@ -441,9 +441,6 @@ static struct platform_device *ixp23xx_devices[] __initdata = { void __init ixp23xx_sys_init(void) { - /* by default, the idle code is disabled */ - disable_hlt(); - *IXP23XX_EXP_UNIT_FUSE |= 0xf; platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); } diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/system.h b/trunk/arch/arm/mach-ixp23xx/include/mach/system.h new file mode 100644 index 000000000000..277dda7334b9 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/system.h @@ -0,0 +1,16 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/system.h + * + * Copyright (C) 2003 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ +#if 0 + if (!hlt_counter) + cpu_do_idle(); +#endif +} diff --git a/trunk/arch/arm/mach-ixp4xx/common.c b/trunk/arch/arm/mach-ixp4xx/common.c index a6329a0a8ec4..3841ab4146ba 100644 --- a/trunk/arch/arm/mach-ixp4xx/common.c +++ b/trunk/arch/arm/mach-ixp4xx/common.c @@ -236,12 +236,6 @@ void __init ixp4xx_init_irq(void) { int i = 0; - /* - * ixp4xx does not implement the XScale PWRMODE register - * so it must not call cpu_do_idle(). - */ - disable_hlt(); - /* Route all sources to IRQ instead of FIQ */ *IXP4XX_ICLR = 0x0; diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/system.h b/trunk/arch/arm/mach-ixp4xx/include/mach/system.h new file mode 100644 index 000000000000..140a9bef4466 --- /dev/null +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/system.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-ixp4xx/include/mach/system.h + * + * Copyright (C) 2002 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +static inline void arch_idle(void) +{ + /* ixp4xx does not implement the XScale PWRMODE register, + * so it must not call cpu_do_idle() here. + */ +#if 0 + cpu_do_idle(); +#endif +} diff --git a/trunk/arch/arm/mach-kirkwood/Kconfig b/trunk/arch/arm/mach-kirkwood/Kconfig index 90ceab761929..7fc603b46891 100644 --- a/trunk/arch/arm/mach-kirkwood/Kconfig +++ b/trunk/arch/arm/mach-kirkwood/Kconfig @@ -44,20 +44,6 @@ config MACH_GURUPLUG Say 'Y' here if you want your kernel to support the Marvell GuruPlug Reference Board. -config ARCH_KIRKWOOD_DT - bool "Marvell Kirkwood Flattened Device Tree" - select USE_OF - help - Say 'Y' here if you want your kernel to support the - Marvell Kirkwood using flattened device tree. - -config MACH_DREAMPLUG_DT - bool "Marvell DreamPlug (Flattened Device Tree)" - select ARCH_KIRKWOOD_DT - help - Say 'Y' here if you want your kernel to support the - Marvell DreamPlug (Flattened Device Tree). - config MACH_TS219 bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" help diff --git a/trunk/arch/arm/mach-kirkwood/Makefile b/trunk/arch/arm/mach-kirkwood/Makefile index acbc5e1db06f..5dcaa81a2ec3 100644 --- a/trunk/arch/arm/mach-kirkwood/Makefile +++ b/trunk/arch/arm/mach-kirkwood/Makefile @@ -20,4 +20,3 @@ obj-$(CONFIG_MACH_NET5BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o obj-$(CONFIG_MACH_T5325) += t5325-setup.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o -obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o diff --git a/trunk/arch/arm/mach-kirkwood/Makefile.boot b/trunk/arch/arm/mach-kirkwood/Makefile.boot index 16f938522304..760a0efe7580 100644 --- a/trunk/arch/arm/mach-kirkwood/Makefile.boot +++ b/trunk/arch/arm/mach-kirkwood/Makefile.boot @@ -1,5 +1,3 @@ zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 - -dtb-$(CONFIG_MACH_DREAMPLUG_DT) += kirkwood-dreamplug.dtb diff --git a/trunk/arch/arm/mach-kirkwood/board-dt.c b/trunk/arch/arm/mach-kirkwood/board-dt.c deleted file mode 100644 index fbe6405602ed..000000000000 --- a/trunk/arch/arm/mach-kirkwood/board-dt.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Copyright 2012 (C), Jason Cooper - * - * arch/arm/mach-kirkwood/board-dt.c - * - * Marvell DreamPlug Reference Board Setup - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "common.h" -#include "mpp.h" - -static struct of_device_id kirkwood_dt_match_table[] __initdata = { - { .compatible = "simple-bus", }, - { } -}; - -struct mtd_partition dreamplug_partitions[] = { - { - .name = "u-boot", - .size = SZ_512K, - .offset = 0, - }, - { - .name = "u-boot env", - .size = SZ_64K, - .offset = SZ_512K + SZ_512K, - }, - { - .name = "dtb", - .size = SZ_64K, - .offset = SZ_512K + SZ_512K + SZ_512K, - }, -}; - -static const struct flash_platform_data dreamplug_spi_slave_data = { - .type = "mx25l1606e", - .name = "spi_flash", - .parts = dreamplug_partitions, - .nr_parts = ARRAY_SIZE(dreamplug_partitions), -}; - -static struct spi_board_info __initdata dreamplug_spi_slave_info[] = { - { - .modalias = "m25p80", - .platform_data = &dreamplug_spi_slave_data, - .irq = -1, - .max_speed_hz = 50000000, - .bus_num = 0, - .chip_select = 0, - }, -}; - -static struct mv643xx_eth_platform_data dreamplug_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(0), -}; - -static struct mv643xx_eth_platform_data dreamplug_ge01_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(1), -}; - -static struct mv_sata_platform_data dreamplug_sata_data = { - .n_ports = 1, -}; - -static struct mvsdio_platform_data dreamplug_mvsdio_data = { - /* unfortunately the CD signal has not been connected */ -}; - -static struct gpio_led dreamplug_led_pins[] = { - { - .name = "dreamplug:blue:bluetooth", - .gpio = 47, - .active_low = 1, - }, - { - .name = "dreamplug:green:wifi", - .gpio = 48, - .active_low = 1, - }, - { - .name = "dreamplug:green:wifi_ap", - .gpio = 49, - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data dreamplug_led_data = { - .leds = dreamplug_led_pins, - .num_leds = ARRAY_SIZE(dreamplug_led_pins), -}; - -static struct platform_device dreamplug_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &dreamplug_led_data, - } -}; - -static unsigned int dreamplug_mpp_config[] __initdata = { - MPP0_SPI_SCn, - MPP1_SPI_MOSI, - MPP2_SPI_SCK, - MPP3_SPI_MISO, - MPP47_GPIO, /* Bluetooth LED */ - MPP48_GPIO, /* Wifi LED */ - MPP49_GPIO, /* Wifi AP LED */ - 0 -}; - -static void __init dreamplug_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_mpp_conf(dreamplug_mpp_config); - - spi_register_board_info(dreamplug_spi_slave_info, - ARRAY_SIZE(dreamplug_spi_slave_info)); - kirkwood_spi_init(); - - kirkwood_ehci_init(); - kirkwood_ge00_init(&dreamplug_ge00_data); - kirkwood_ge01_init(&dreamplug_ge01_data); - kirkwood_sata_init(&dreamplug_sata_data); - kirkwood_sdio_init(&dreamplug_mvsdio_data); - - platform_device_register(&dreamplug_leds); -} - -static void __init kirkwood_dt_init(void) -{ - kirkwood_init(); - - if (of_machine_is_compatible("globalscale,dreamplug")) - dreamplug_init(); - - of_platform_populate(NULL, kirkwood_dt_match_table, NULL, NULL); -} - -static const char *kirkwood_dt_board_compat[] = { - "globalscale,dreamplug", - NULL -}; - -DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)") - /* Maintainer: Jason Cooper */ - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, - .init_machine = kirkwood_dt_init, - .restart = kirkwood_restart, - .dt_compat = kirkwood_dt_board_compat, -MACHINE_END diff --git a/trunk/arch/arm/mach-kirkwood/common.c b/trunk/arch/arm/mach-kirkwood/common.c index cc15426787b1..77d4852e19f2 100644 --- a/trunk/arch/arm/mach-kirkwood/common.c +++ b/trunk/arch/arm/mach-kirkwood/common.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -73,7 +74,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED; void __init kirkwood_ehci_init(void) { kirkwood_clk_ctrl |= CGC_USB0; - orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB); + orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA); } diff --git a/trunk/arch/arm/mach-kirkwood/include/mach/system.h b/trunk/arch/arm/mach-kirkwood/include/mach/system.h new file mode 100644 index 000000000000..5fddde002b5e --- /dev/null +++ b/trunk/arch/arm/mach-kirkwood/include/mach/system.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-kirkwood/include/mach/system.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-kirkwood/mpp.h b/trunk/arch/arm/mach-kirkwood/mpp.h index e8fda45c0736..d5a0d1da2e0e 100644 --- a/trunk/arch/arm/mach-kirkwood/mpp.h +++ b/trunk/arch/arm/mach-kirkwood/mpp.h @@ -31,314 +31,314 @@ #define MPP_F6282_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 0, 1 ) #define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP0_NF_IO2 MPP( 0, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 1, 1, 1, 1, 1, 1 ) +#define MPP0_NF_IO2 MPP( 0, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 0, 1, 1, 1, 1, 1 ) #define MPP1_GPO MPP( 1, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP1_NF_IO3 MPP( 1, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 1, 1, 1, 1, 1, 1 ) +#define MPP1_NF_IO3 MPP( 1, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 0, 1, 1, 1, 1, 1 ) #define MPP2_GPO MPP( 2, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP2_NF_IO4 MPP( 2, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 1, 1, 1, 1, 1, 1 ) +#define MPP2_NF_IO4 MPP( 2, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 0, 1, 1, 1, 1, 1 ) #define MPP3_GPO MPP( 3, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP3_NF_IO5 MPP( 3, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP3_SPI_MISO MPP( 3, 0x2, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP3_NF_IO5 MPP( 3, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP3_SPI_MISO MPP( 3, 0x2, 0, 0, 1, 1, 1, 1, 1 ) #define MPP4_GPIO MPP( 4, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP4_NF_IO6 MPP( 4, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP4_UART0_RXD MPP( 4, 0x2, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP4_NF_IO6 MPP( 4, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP4_UART0_RXD MPP( 4, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 0, 0, 0, 1, 1, 1 ) #define MPP4_LCD_VGA_HSYNC MPP( 4, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP4_PTP_CLK MPP( 4, 0xd, 1, 0, 1, 1, 1, 1, 0 ) +#define MPP4_PTP_CLK MPP( 4, 0xd, 0, 0, 1, 1, 1, 1, 0 ) #define MPP5_GPO MPP( 5, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP5_NF_IO7 MPP( 5, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 1, 1, 1, 1, 1, 0 ) -#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP5_NF_IO7 MPP( 5, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP5_LCD_VGA_VSYNC MPP( 5, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 1, 1, 1, 1, 1, 0 ) +#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 0, 1, 1, 1, 1, 0 ) #define MPP7_GPO MPP( 7, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 1, 1, 1, 1, 1, 0 ) -#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 1, 1, 1, 1, 1, 0 ) -#define MPP7_LCD_PWM MPP( 7, 0xb, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP7_LCD_PWM MPP( 7, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP8_GPIO MPP( 8, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP8_TW0_SDA MPP( 8, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP8_MII0_RXERR MPP( 8, 0x4, 1, 0, 0, 1, 1, 1, 1 ) -#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP8_PTP_CLK MPP( 8, 0xc, 1, 0, 1, 1, 1, 1, 0 ) -#define MPP8_MII0_COL MPP( 8, 0xd, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP8_TW0_SDA MPP( 8, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP8_MII0_RXERR MPP( 8, 0x4, 0, 0, 0, 1, 1, 1, 1 ) +#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP8_PTP_CLK MPP( 8, 0xc, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP8_MII0_COL MPP( 8, 0xd, 0, 0, 1, 1, 1, 1, 1 ) #define MPP9_GPIO MPP( 9, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP9_TW0_SCK MPP( 9, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP9_UART0_CTS MPP( 9, 0x2, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP9_UART1_CTS MPP( 9, 0x3, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 1, 0, 1, 1, 1, 1 ) -#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 1, 0, 1, 1, 1, 1, 0 ) -#define MPP9_MII0_CRS MPP( 9, 0xd, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP9_TW0_SCK MPP( 9, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP9_UART0_CTS MPP( 9, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP9_UART1_CTS MPP( 9, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 0, 0, 1, 1, 1, 1 ) +#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP9_MII0_CRS MPP( 9, 0xd, 0, 0, 1, 1, 1, 1, 1 ) #define MPP10_GPO MPP( 10, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP10_UART0_TXD MPP( 10, 0X3, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 1, 1, 1, 1, 1, 0 ) +#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP10_UART0_TXD MPP( 10, 0X3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 0, 1, 1, 1, 1, 0 ) #define MPP11_GPIO MPP( 11, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP11_SPI_MISO MPP( 11, 0x2, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP11_UART0_RXD MPP( 11, 0x3, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 1, 0, 1, 1, 1, 1, 0 ) -#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 1, 1, 1, 1, 1, 0 ) -#define MPP11_PTP_CLK MPP( 11, 0xd, 1, 0, 1, 1, 1, 1, 0 ) -#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP11_SPI_MISO MPP( 11, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP11_UART0_RXD MPP( 11, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP11_PTP_CLK MPP( 11, 0xd, 0, 0, 1, 1, 1, 1, 0 ) +#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 ) #define MPP12_GPIO MPP( 12, 0x0, 1, 1, 0, 0, 0, 1, 0 ) -#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP12_TW1_SDA MPP( 12, 0xd, 1, 0, 0, 0, 0, 0, 1 ) +#define MPP12_SD_CLK MPP( 12, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP12_TW1_SDA MPP( 12, 0xd, 0, 0, 0, 0, 0, 0, 1 ) #define MPP13_GPIO MPP( 13, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP13_SD_CMD MPP( 13, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP13_AU_SPDIFRMCLK MPP( 13, 0xa, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP13_LCDPWM MPP( 13, 0xb, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP13_SD_CMD MPP( 13, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP13_AU_SPDIFRMCLK MPP( 13, 0xa, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP13_LCDPWM MPP( 13, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP14_GPIO MPP( 14, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP14_SD_D0 MPP( 14, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP14_UART1_RXD MPP( 14, 0x3, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP14_AU_SPDIFI MPP( 14, 0xa, 1, 0, 0, 0, 0, 0, 1 ) -#define MPP14_AU_I2SDI MPP( 14, 0xb, 1, 0, 0, 0, 0, 0, 1 ) -#define MPP14_MII0_COL MPP( 14, 0xd, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP14_SD_D0 MPP( 14, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP14_UART1_RXD MPP( 14, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP14_AU_SPDIFI MPP( 14, 0xa, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP14_AU_I2SDI MPP( 14, 0xb, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP14_MII0_COL MPP( 14, 0xd, 0, 0, 1, 1, 1, 1, 1 ) #define MPP15_GPIO MPP( 15, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP15_SD_D1 MPP( 15, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 1, 0, 1, 1, 1, 1 ) -#define MPP15_SPI_CSn MPP( 15, 0xb, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP15_SD_D1 MPP( 15, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 0, 0, 1, 1, 1, 1 ) +#define MPP15_SPI_CSn MPP( 15, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP16_GPIO MPP( 16, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP16_SD_D2 MPP( 16, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP16_UART0_CTS MPP( 16, 0x2, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP16_UART1_RXD MPP( 16, 0x3, 1, 0, 1, 1, 1, 1, 1 ) -#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP16_LCD_EXT_REF_CLK MPP( 16, 0xb, 1, 0, 0, 0, 0, 0, 1 ) -#define MPP16_MII0_CRS MPP( 16, 0xd, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP16_SD_D2 MPP( 16, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP16_UART0_CTS MPP( 16, 0x2, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP16_UART1_RXD MPP( 16, 0x3, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP16_LCD_EXT_REF_CLK MPP( 16, 0xb, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP16_MII0_CRS MPP( 16, 0xd, 0, 0, 1, 1, 1, 1, 1 ) #define MPP17_GPIO MPP( 17, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP17_SD_D3 MPP( 17, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 1, 0, 1, 1, 1, 1 ) -#define MPP17_SATA1_ACTn MPP( 17, 0xa, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP17_TW1_SCK MPP( 17, 0xd, 1, 1, 0, 0, 0, 0, 1 ) +#define MPP17_SD_D3 MPP( 17, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 0, 0, 1, 1, 1, 1 ) +#define MPP17_SATA1_ACTn MPP( 17, 0xa, 0, 0, 0, 0, 0, 0, 1 ) +#define MPP17_TW1_SCK MPP( 17, 0xd, 0, 0, 0, 0, 0, 0, 1 ) #define MPP18_GPO MPP( 18, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP18_NF_IO0 MPP( 18, 0x1, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP18_PEX0_CLKREQ MPP( 18, 0x2, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP18_NF_IO0 MPP( 18, 0x1, 0, 0, 1, 1, 1, 1, 1 ) +#define MPP18_PEX0_CLKREQ MPP( 18, 0x2, 0, 0, 0, 0, 0, 0, 1 ) #define MPP19_GPO MPP( 19, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP19_NF_IO1 MPP( 19, 0x1, 1, 1, 1, 1, 1, 1, 1 ) +#define MPP19_NF_IO1 MPP( 19, 0x1, 0, 0, 1, 1, 1, 1, 1 ) #define MPP20_GPIO MPP( 20, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP20_TSMP0 MPP( 20, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP20_TSMP0 MPP( 20, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP20_GE1_TXD0 MPP( 20, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP20_AU_SPDIFI MPP( 20, 0x4, 1, 0, 0, 0, 1, 1, 1 ) -#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP20_AU_SPDIFI MPP( 20, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 0, 0, 0, 1, 1, 1 ) #define MPP20_LCD_D0 MPP( 20, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP21_GPIO MPP( 21, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP21_TSMP1 MPP( 21, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP21_TSMP1 MPP( 21, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP21_GE1_TXD1 MPP( 21, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP21_AU_SPDIFO MPP( 21, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP21_AU_SPDIFO MPP( 21, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP21_LCD_D1 MPP( 21, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP22_GPIO MPP( 22, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP22_TSMP2 MPP( 22, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP22_TSMP2 MPP( 22, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP22_GE1_TXD2 MPP( 22, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP22_AU_SPDIFRMKCLK MPP( 22, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP22_AU_SPDIFRMKCLK MPP( 22, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 0, 0, 0, 1, 1, 1 ) #define MPP22_LCD_D2 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP23_GPIO MPP( 23, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP23_TSMP3 MPP( 23, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP23_TSMP3 MPP( 23, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP23_GE1_TXD3 MPP( 23, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP23_AU_I2SBCLK MPP( 23, 0x4, 0, 1, 0, 0, 1, 1, 1 ) -#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP23_AU_I2SBCLK MPP( 23, 0x4, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP23_LCD_D3 MPP( 23, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP24_GPIO MPP( 24, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP24_TSMP4 MPP( 24, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP24_TDM_SPI_CS0 MPP( 24, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP24_TSMP4 MPP( 24, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP24_TDM_SPI_CS0 MPP( 24, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP24_GE1_RXD0 MPP( 24, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP24_AU_I2SDO MPP( 24, 0x4, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP24_AU_I2SDO MPP( 24, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP24_LCD_D4 MPP( 24, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP25_GPIO MPP( 25, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP25_TSMP5 MPP( 25, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP25_TSMP5 MPP( 25, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP25_GE1_RXD1 MPP( 25, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP25_AU_I2SLRCLK MPP( 25, 0x4, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP25_AU_I2SLRCLK MPP( 25, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP25_LCD_D5 MPP( 25, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP26_GPIO MPP( 26, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP26_TSMP6 MPP( 26, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP26_TSMP6 MPP( 26, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP26_GE1_RXD2 MPP( 26, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP26_AU_I2SMCLK MPP( 26, 0x4, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP26_AU_I2SMCLK MPP( 26, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP26_LCD_D6 MPP( 26, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP27_GPIO MPP( 27, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP27_TSMP7 MPP( 27, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP27_TSMP7 MPP( 27, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP27_GE1_RXD3 MPP( 27, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP27_AU_I2SDI MPP( 27, 0x4, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP27_AU_I2SDI MPP( 27, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP27_LCD_D7 MPP( 27, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP28_GPIO MPP( 28, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP28_TSMP8 MPP( 28, 0x1, 1, 1, 0, 0, 1, 1, 1 ) +#define MPP28_TSMP8 MPP( 28, 0x1, 0, 0, 0, 0, 1, 1, 1 ) #define MPP28_TDM_CODEC_INTn MPP( 28, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP28_GE1_COL MPP( 28, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP28_AU_EXTCLK MPP( 28, 0x4, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP28_AU_EXTCLK MPP( 28, 0x4, 0, 0, 0, 0, 1, 1, 1 ) #define MPP28_LCD_D8 MPP( 28, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP29_GPIO MPP( 29, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP29_TSMP9 MPP( 29, 0x1, 1, 1, 0, 0, 1, 1, 1 ) +#define MPP29_TSMP9 MPP( 29, 0x1, 0, 0, 0, 0, 1, 1, 1 ) #define MPP29_TDM_CODEC_RSTn MPP( 29, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP29_GE1_TCLK MPP( 29, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP29_LCD_D9 MPP( 29, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP30_GPIO MPP( 30, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP30_TSMP10 MPP( 30, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP30_TDM_PCLK MPP( 30, 0x2, 1, 1, 0, 0, 1, 1, 1 ) +#define MPP30_TSMP10 MPP( 30, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP30_TDM_PCLK MPP( 30, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP30_GE1_RXCTL MPP( 30, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP30_LCD_D10 MPP( 30, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP31_GPIO MPP( 31, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP31_TSMP11 MPP( 31, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP31_TDM_FS MPP( 31, 0x2, 1, 1, 0, 0, 1, 1, 1 ) +#define MPP31_TSMP11 MPP( 31, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP31_TDM_FS MPP( 31, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP31_GE1_RXCLK MPP( 31, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP31_LCD_D11 MPP( 31, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP32_GPIO MPP( 32, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP32_TSMP12 MPP( 32, 0x1, 1, 1, 0, 0, 1, 1, 1 ) -#define MPP32_TDM_DRX MPP( 32, 0x2, 1, 0, 0, 0, 1, 1, 1 ) +#define MPP32_TSMP12 MPP( 32, 0x1, 0, 0, 0, 0, 1, 1, 1 ) +#define MPP32_TDM_DRX MPP( 32, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP32_GE1_TCLKOUT MPP( 32, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP32_LCD_D12 MPP( 32, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP33_GPO MPP( 33, 0x0, 0, 1, 0, 1, 1, 1, 1 ) -#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP33_GE1_TXCTL MPP( 33, 0x3, 0, 0, 0, 1, 1, 1, 1 ) #define MPP33_LCD_D13 MPP( 33, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP34_GE1_TXEN MPP( 34, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP34_SATA1_ACTn MPP( 34, 0x5, 0, 1, 0, 0, 0, 1, 1 ) +#define MPP34_SATA1_ACTn MPP( 34, 0x5, 0, 0, 0, 0, 0, 1, 1 ) #define MPP34_LCD_D14 MPP( 34, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 1, 0, 0, 1, 1, 1 ) +#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 0, 0, 0, 1, 1, 1 ) #define MPP35_GE1_RXERR MPP( 35, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 1, 0, 1, 1, 1, 1 ) +#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 0, 0, 1, 1, 1, 1 ) #define MPP35_LCD_D15 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP35_MII0_RXERR MPP( 35, 0xc, 1, 0, 1, 1, 1, 1, 1 ) +#define MPP35_MII0_RXERR MPP( 35, 0xc, 0, 0, 1, 1, 1, 1, 1 ) #define MPP36_GPIO MPP( 36, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP36_TSMP0 MPP( 36, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP36_AU_SPDIFI MPP( 36, 0x4, 1, 0, 1, 0, 0, 1, 1 ) -#define MPP36_TW1_SDA MPP( 36, 0xb, 1, 1, 0, 0, 0, 0, 1 ) +#define MPP36_TSMP0 MPP( 36, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP36_AU_SPDIFI MPP( 36, 0x4, 0, 0, 1, 0, 0, 1, 1 ) +#define MPP36_TW1_SDA MPP( 36, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP37_GPIO MPP( 37, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP37_TSMP1 MPP( 37, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP37_AU_SPDIFO MPP( 37, 0x4, 0, 1, 1, 0, 0, 1, 1 ) -#define MPP37_TW1_SCK MPP( 37, 0xb, 1, 1, 0, 0, 0, 0, 1 ) +#define MPP37_TSMP1 MPP( 37, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP37_AU_SPDIFO MPP( 37, 0x4, 0, 0, 1, 0, 0, 1, 1 ) +#define MPP37_TW1_SCK MPP( 37, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP38_GPIO MPP( 38, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP38_TSMP2 MPP( 38, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP38_AU_SPDIFRMLCLK MPP( 38, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP38_TSMP2 MPP( 38, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP38_AU_SPDIFRMLCLK MPP( 38, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP38_LCD_D18 MPP( 38, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP39_GPIO MPP( 39, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP39_TSMP3 MPP( 39, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP39_AU_I2SBCLK MPP( 39, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP39_TSMP3 MPP( 39, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP39_AU_I2SBCLK MPP( 39, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP39_LCD_D19 MPP( 39, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP40_GPIO MPP( 40, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP40_TSMP4 MPP( 40, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP40_AU_I2SDO MPP( 40, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP40_TSMP4 MPP( 40, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP40_AU_I2SDO MPP( 40, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP40_LCD_D20 MPP( 40, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP41_GPIO MPP( 41, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP41_TSMP5 MPP( 41, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 1, 0, 0, 0, 0, 1, 1 ) -#define MPP41_AU_I2SLRCLK MPP( 41, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP41_TSMP5 MPP( 41, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP41_AU_I2SLRCLK MPP( 41, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP41_LCD_D21 MPP( 41, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP42_GPIO MPP( 42, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP42_TSMP6 MPP( 42, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP42_AU_I2SMCLK MPP( 42, 0x4, 0, 1, 1, 0, 0, 1, 1 ) +#define MPP42_TSMP6 MPP( 42, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP42_AU_I2SMCLK MPP( 42, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP42_LCD_D22 MPP( 42, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP43_GPIO MPP( 43, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP43_TSMP7 MPP( 43, 0x1, 1, 1, 0, 0, 0, 1, 1 ) +#define MPP43_TSMP7 MPP( 43, 0x1, 0, 0, 0, 0, 0, 1, 1 ) #define MPP43_TDM_CODEC_INTn MPP( 43, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP43_AU_I2SDI MPP( 43, 0x4, 1, 0, 1, 0, 0, 1, 1 ) +#define MPP43_AU_I2SDI MPP( 43, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP43_LCD_D23 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP44_GPIO MPP( 44, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP44_TSMP8 MPP( 44, 0x1, 1, 1, 0, 0, 0, 1, 1 ) +#define MPP44_TSMP8 MPP( 44, 0x1, 0, 0, 0, 0, 0, 1, 1 ) #define MPP44_TDM_CODEC_RSTn MPP( 44, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP44_AU_EXTCLK MPP( 44, 0x4, 1, 0, 1, 0, 0, 1, 1 ) +#define MPP44_AU_EXTCLK MPP( 44, 0x4, 0, 0, 1, 0, 0, 1, 1 ) #define MPP44_LCD_CLK MPP( 44, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP45_GPIO MPP( 45, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP45_TSMP9 MPP( 45, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP45_TDM_PCLK MPP( 45, 0x2, 1, 1, 0, 0, 0, 1, 1 ) +#define MPP45_TSMP9 MPP( 45, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP45_TDM_PCLK MPP( 45, 0x2, 0, 0, 0, 0, 0, 1, 1 ) #define MPP245_LCD_E MPP( 45, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP46_GPIO MPP( 46, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP46_TSMP10 MPP( 46, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP46_TDM_FS MPP( 46, 0x2, 1, 1, 0, 0, 0, 1, 1 ) +#define MPP46_TSMP10 MPP( 46, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP46_TDM_FS MPP( 46, 0x2, 0, 0, 0, 0, 0, 1, 1 ) #define MPP46_LCD_HSYNC MPP( 46, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP47_GPIO MPP( 47, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP47_TSMP11 MPP( 47, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP47_TDM_DRX MPP( 47, 0x2, 1, 0, 0, 0, 0, 1, 1 ) +#define MPP47_TSMP11 MPP( 47, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP47_TDM_DRX MPP( 47, 0x2, 0, 0, 0, 0, 0, 1, 1 ) #define MPP47_LCD_VSYNC MPP( 47, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP48_TSMP12 MPP( 48, 0x1, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP48_TDM_DTX MPP( 48, 0x2, 0, 1, 0, 0, 0, 1, 1 ) +#define MPP48_TSMP12 MPP( 48, 0x1, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP48_TDM_DTX MPP( 48, 0x2, 0, 0, 0, 0, 0, 1, 1 ) #define MPP48_LCD_D16 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1, 0 ) #define MPP49_GPO MPP( 49, 0x0, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP49_TSMP9 MPP( 49, 0x1, 1, 1, 0, 0, 0, 1, 0 ) -#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 1, 0, 0, 0, 1, 1 ) -#define MPP49_PTP_CLK MPP( 49, 0x5, 1, 0, 0, 0, 0, 1, 0 ) -#define MPP49_PEX0_CLKREQ MPP( 49, 0xa, 0, 1, 0, 0, 0, 0, 1 ) +#define MPP49_TSMP9 MPP( 49, 0x1, 0, 0, 0, 0, 0, 1, 0 ) +#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 0, 0, 0, 0, 1, 1 ) +#define MPP49_PTP_CLK MPP( 49, 0x5, 0, 0, 0, 0, 0, 1, 0 ) +#define MPP49_PEX0_CLKREQ MPP( 49, 0xa, 0, 0, 0, 0, 0, 0, 1 ) #define MPP49_LCD_D17 MPP( 49, 0xb, 0, 0, 0, 0, 0, 0, 1 ) #define MPP_MAX 49 diff --git a/trunk/arch/arm/mach-ks8695/include/mach/system.h b/trunk/arch/arm/mach-ks8695/include/mach/system.h new file mode 100644 index 000000000000..59fe992395bf --- /dev/null +++ b/trunk/arch/arm/mach-ks8695/include/mach/system.h @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-s3c2410/include/mach/system.h + * + * Copyright (C) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - System function defines and includes + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks, + */ + cpu_do_idle(); + +} + +#endif diff --git a/trunk/arch/arm/mach-lpc32xx/include/mach/system.h b/trunk/arch/arm/mach-lpc32xx/include/mach/system.h new file mode 100644 index 000000000000..bf176c991520 --- /dev/null +++ b/trunk/arch/arm/mach-lpc32xx/include/mach/system.h @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-lpc32xx/include/mach/system.h + * + * Author: Kevin Wells + * + * Copyright (C) 2010 NXP Semiconductors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-lpc32xx/phy3250.c b/trunk/arch/arm/mach-lpc32xx/phy3250.c index 5d51c102c255..bfee5b455105 100644 --- a/trunk/arch/arm/mach-lpc32xx/phy3250.c +++ b/trunk/arch/arm/mach-lpc32xx/phy3250.c @@ -149,8 +149,20 @@ static struct clcd_board lpc32xx_clcd_data = { .remove = lpc32xx_clcd_remove, }; -static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0, - LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data); +static struct amba_device lpc32xx_clcd_device = { + .dev = { + .coherent_dma_mask = ~0, + .init_name = "dev:clcd", + .platform_data = &lpc32xx_clcd_data, + }, + .res = { + .start = LPC32XX_LCD_BASE, + .end = (LPC32XX_LCD_BASE + SZ_4K - 1), + .flags = IORESOURCE_MEM, + }, + .dma_mask = ~0, + .irq = {IRQ_LPC32XX_LCD, NO_IRQ}, +}; /* * AMBA SSP (SPI) @@ -179,8 +191,20 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = { .enable_dma = 0, }; -static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0, - LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data); +static struct amba_device lpc32xx_ssp0_device = { + .dev = { + .coherent_dma_mask = ~0, + .init_name = "dev:ssp0", + .platform_data = &lpc32xx_ssp0_data, + }, + .res = { + .start = LPC32XX_SSP0_BASE, + .end = (LPC32XX_SSP0_BASE + SZ_4K - 1), + .flags = IORESOURCE_MEM, + }, + .dma_mask = ~0, + .irq = {IRQ_LPC32XX_SSP0, NO_IRQ}, +}; /* AT25 driver registration */ static int __init phy3250_spi_board_register(void) diff --git a/trunk/arch/arm/mach-mmp/include/mach/system.h b/trunk/arch/arm/mach-mmp/include/mach/system.h new file mode 100644 index 000000000000..1d001eab81e1 --- /dev/null +++ b/trunk/arch/arm/mach-mmp/include/mach/system.h @@ -0,0 +1,16 @@ +/* + * linux/arch/arm/mach-mmp/include/mach/system.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_MACH_SYSTEM_H +#define __ASM_MACH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} +#endif /* __ASM_MACH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-msm/idle.S b/trunk/arch/arm/mach-msm/idle.S new file mode 100644 index 000000000000..6a94f0527137 --- /dev/null +++ b/trunk/arch/arm/mach-msm/idle.S @@ -0,0 +1,36 @@ +/* arch/arm/mach-msm/include/mach/idle.S + * + * Idle processing for MSM7K - work around bugs with SWFI. + * + * Copyright (c) 2007 QUALCOMM Incorporated. + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include + +ENTRY(arch_idle) +#ifdef CONFIG_MSM7X00A_IDLE + mrc p15, 0, r1, c1, c0, 0 /* read current CR */ + bic r0, r1, #(1 << 2) /* clear dcache bit */ + bic r0, r0, #(1 << 12) /* clear icache bit */ + mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ + + mov r0, #0 /* prepare wfi value */ + mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ + mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ + mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ + + mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ +#endif + mov pc, lr diff --git a/trunk/arch/arm/mach-msm/idle.c b/trunk/arch/arm/mach-msm/idle.c deleted file mode 100644 index 0c9e13c65743..000000000000 --- a/trunk/arch/arm/mach-msm/idle.c +++ /dev/null @@ -1,49 +0,0 @@ -/* arch/arm/mach-msm/idle.c - * - * Idle processing for MSM7K - work around bugs with SWFI. - * - * Copyright (c) 2007 QUALCOMM Incorporated. - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include - -static void msm_idle(void) -{ -#ifdef CONFIG_MSM7X00A_IDLE - asm volatile ( - - "mrc p15, 0, r1, c1, c0, 0 /* read current CR */ \n\t" - "bic r0, r1, #(1 << 2) /* clear dcache bit */ \n\t" - "bic r0, r0, #(1 << 12) /* clear icache bit */ \n\t" - "mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ \n\t" - - "mov r0, #0 /* prepare wfi value */ \n\t" - "mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ \n\t" - "mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ \n\t" - "mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ \n\t" - - "mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ \n\t" - - : : : "r0","r1" ); -#endif -} - -static int __init msm_idle_init(void) -{ - arm_pm_idle = msm_idle; - return 0; -} - -arch_initcall(msm_idle_init); diff --git a/trunk/arch/arm/mach-msm/include/mach/system.h b/trunk/arch/arm/mach-msm/include/mach/system.h index f5fb2ec87ffe..311db2b35da0 100644 --- a/trunk/arch/arm/mach-msm/include/mach/system.h +++ b/trunk/arch/arm/mach-msm/include/mach/system.h @@ -12,6 +12,7 @@ * GNU General Public License for more details. * */ +void arch_idle(void); /* low level hardware reset hook -- for example, hitting the * PSHOLD line on the PMIC to hard reset the system diff --git a/trunk/arch/arm/mach-mv78xx0/common.c b/trunk/arch/arm/mach-mv78xx0/common.c index 0cdd41004ad0..a5dcf766a3f9 100644 --- a/trunk/arch/arm/mach-mv78xx0/common.c +++ b/trunk/arch/arm/mach-mv78xx0/common.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -169,7 +170,7 @@ void __init mv78xx0_map_io(void) ****************************************************************************/ void __init mv78xx0_ehci0_init(void) { - orion_ehci_init(USB0_PHYS_BASE, IRQ_MV78XX0_USB_0); + orion_ehci_init(USB0_PHYS_BASE, IRQ_MV78XX0_USB_0, EHCI_PHY_NA); } diff --git a/trunk/arch/arm/mach-mv78xx0/include/mach/system.h b/trunk/arch/arm/mach-mv78xx0/include/mach/system.h new file mode 100644 index 000000000000..8c3a5387cec7 --- /dev/null +++ b/trunk/arch/arm/mach-mv78xx0/include/mach/system.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/system.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-mv78xx0/mpp.h b/trunk/arch/arm/mach-mv78xx0/mpp.h index b61b50927123..3752302ae2ee 100644 --- a/trunk/arch/arm/mach-mv78xx0/mpp.h +++ b/trunk/arch/arm/mach-mv78xx0/mpp.h @@ -24,296 +24,296 @@ #define MPP_78100_A0_MASK MPP(0, 0x0, 0, 0, 1) #define MPP0_GPIO MPP(0, 0x0, 1, 1, 1) -#define MPP0_GE0_COL MPP(0, 0x1, 1, 0, 1) -#define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 1, 1) +#define MPP0_GE0_COL MPP(0, 0x1, 0, 0, 1) +#define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 0, 1) #define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1) #define MPP1_GPIO MPP(1, 0x0, 1, 1, 1) -#define MPP1_GE0_RXERR MPP(1, 0x1, 1, 0, 1) -#define MPP1_GE1_TXCTL MPP(1, 0x2, 0, 1, 1) +#define MPP1_GE0_RXERR MPP(1, 0x1, 0, 0, 1) +#define MPP1_GE1_TXCTL MPP(1, 0x2, 0, 0, 1) #define MPP1_UNUSED MPP(1, 0x3, 0, 0, 1) #define MPP2_GPIO MPP(2, 0x0, 1, 1, 1) -#define MPP2_GE0_CRS MPP(2, 0x1, 1, 0, 1) -#define MPP2_GE1_RXCTL MPP(2, 0x2, 1, 0, 1) +#define MPP2_GE0_CRS MPP(2, 0x1, 0, 0, 1) +#define MPP2_GE1_RXCTL MPP(2, 0x2, 0, 0, 1) #define MPP2_UNUSED MPP(2, 0x3, 0, 0, 1) #define MPP3_GPIO MPP(3, 0x0, 1, 1, 1) -#define MPP3_GE0_TXERR MPP(3, 0x1, 0, 1, 1) -#define MPP3_GE1_RXCLK MPP(3, 0x2, 1, 0, 1) +#define MPP3_GE0_TXERR MPP(3, 0x1, 0, 0, 1) +#define MPP3_GE1_RXCLK MPP(3, 0x2, 0, 0, 1) #define MPP3_UNUSED MPP(3, 0x3, 0, 0, 1) #define MPP4_GPIO MPP(4, 0x0, 1, 1, 1) -#define MPP4_GE0_TXD4 MPP(4, 0x1, 0, 1, 1) -#define MPP4_GE1_TXD0 MPP(4, 0x2, 0, 1, 1) +#define MPP4_GE0_TXD4 MPP(4, 0x1, 0, 0, 1) +#define MPP4_GE1_TXD0 MPP(4, 0x2, 0, 0, 1) #define MPP4_UNUSED MPP(4, 0x3, 0, 0, 1) #define MPP5_GPIO MPP(5, 0x0, 1, 1, 1) -#define MPP5_GE0_TXD5 MPP(5, 0x1, 0, 1, 1) -#define MPP5_GE1_TXD1 MPP(5, 0x2, 0, 1, 1) +#define MPP5_GE0_TXD5 MPP(5, 0x1, 0, 0, 1) +#define MPP5_GE1_TXD1 MPP(5, 0x2, 0, 0, 1) #define MPP5_UNUSED MPP(5, 0x3, 0, 0, 1) #define MPP6_GPIO MPP(6, 0x0, 1, 1, 1) -#define MPP6_GE0_TXD6 MPP(6, 0x1, 0, 1, 1) -#define MPP6_GE1_TXD2 MPP(6, 0x2, 0, 1, 1) +#define MPP6_GE0_TXD6 MPP(6, 0x1, 0, 0, 1) +#define MPP6_GE1_TXD2 MPP(6, 0x2, 0, 0, 1) #define MPP6_UNUSED MPP(6, 0x3, 0, 0, 1) #define MPP7_GPIO MPP(7, 0x0, 1, 1, 1) -#define MPP7_GE0_TXD7 MPP(7, 0x1, 0, 1, 1) -#define MPP7_GE1_TXD3 MPP(7, 0x2, 0, 1, 1) +#define MPP7_GE0_TXD7 MPP(7, 0x1, 0, 0, 1) +#define MPP7_GE1_TXD3 MPP(7, 0x2, 0, 0, 1) #define MPP7_UNUSED MPP(7, 0x3, 0, 0, 1) #define MPP8_GPIO MPP(8, 0x0, 1, 1, 1) -#define MPP8_GE0_RXD4 MPP(8, 0x1, 1, 0, 1) -#define MPP8_GE1_RXD0 MPP(8, 0x2, 1, 0, 1) +#define MPP8_GE0_RXD4 MPP(8, 0x1, 0, 0, 1) +#define MPP8_GE1_RXD0 MPP(8, 0x2, 0, 0, 1) #define MPP8_UNUSED MPP(8, 0x3, 0, 0, 1) #define MPP9_GPIO MPP(9, 0x0, 1, 1, 1) -#define MPP9_GE0_RXD5 MPP(9, 0x1, 1, 0, 1) -#define MPP9_GE1_RXD1 MPP(9, 0x2, 1, 0, 1) +#define MPP9_GE0_RXD5 MPP(9, 0x1, 0, 0, 1) +#define MPP9_GE1_RXD1 MPP(9, 0x2, 0, 0, 1) #define MPP9_UNUSED MPP(9, 0x3, 0, 0, 1) #define MPP10_GPIO MPP(10, 0x0, 1, 1, 1) -#define MPP10_GE0_RXD6 MPP(10, 0x1, 1, 0, 1) -#define MPP10_GE1_RXD2 MPP(10, 0x2, 1, 0, 1) +#define MPP10_GE0_RXD6 MPP(10, 0x1, 0, 0, 1) +#define MPP10_GE1_RXD2 MPP(10, 0x2, 0, 0, 1) #define MPP10_UNUSED MPP(10, 0x3, 0, 0, 1) #define MPP11_GPIO MPP(11, 0x0, 1, 1, 1) -#define MPP11_GE0_RXD7 MPP(11, 0x1, 1, 0, 1) -#define MPP11_GE1_RXD3 MPP(11, 0x2, 1, 0, 1) +#define MPP11_GE0_RXD7 MPP(11, 0x1, 0, 0, 1) +#define MPP11_GE1_RXD3 MPP(11, 0x2, 0, 0, 1) #define MPP11_UNUSED MPP(11, 0x3, 0, 0, 1) #define MPP12_GPIO MPP(12, 0x0, 1, 1, 1) -#define MPP12_M_BB MPP(12, 0x3, 1, 0, 1) -#define MPP12_UA0_CTSn MPP(12, 0x4, 1, 0, 1) -#define MPP12_NAND_FLASH_REn0 MPP(12, 0x5, 0, 1, 1) -#define MPP12_TDM0_SCSn MPP(12, 0X6, 0, 1, 1) +#define MPP12_M_BB MPP(12, 0x3, 0, 0, 1) +#define MPP12_UA0_CTSn MPP(12, 0x4, 0, 0, 1) +#define MPP12_NAND_FLASH_REn0 MPP(12, 0x5, 0, 0, 1) +#define MPP12_TDM0_SCSn MPP(12, 0X6, 0, 0, 1) #define MPP12_UNUSED MPP(12, 0x1, 0, 0, 1) #define MPP13_GPIO MPP(13, 0x0, 1, 1, 1) -#define MPP13_SYSRST_OUTn MPP(13, 0x3, 0, 1, 1) -#define MPP13_UA0_RTSn MPP(13, 0x4, 0, 1, 1) -#define MPP13_NAN_FLASH_WEn0 MPP(13, 0x5, 0, 1, 1) -#define MPP13_TDM_SCLK MPP(13, 0x6, 0, 1, 1) +#define MPP13_SYSRST_OUTn MPP(13, 0x3, 0, 0, 1) +#define MPP13_UA0_RTSn MPP(13, 0x4, 0, 0, 1) +#define MPP13_NAN_FLASH_WEn0 MPP(13, 0x5, 0, 0, 1) +#define MPP13_TDM_SCLK MPP(13, 0x6, 0, 0, 1) #define MPP13_UNUSED MPP(13, 0x1, 0, 0, 1) #define MPP14_GPIO MPP(14, 0x0, 1, 1, 1) -#define MPP14_SATA1_ACTn MPP(14, 0x3, 0, 1, 1) -#define MPP14_UA1_CTSn MPP(14, 0x4, 1, 0, 1) -#define MPP14_NAND_FLASH_REn1 MPP(14, 0x5, 0, 1, 1) -#define MPP14_TDM_SMOSI MPP(14, 0x6, 0, 1, 1) +#define MPP14_SATA1_ACTn MPP(14, 0x3, 0, 0, 1) +#define MPP14_UA1_CTSn MPP(14, 0x4, 0, 0, 1) +#define MPP14_NAND_FLASH_REn1 MPP(14, 0x5, 0, 0, 1) +#define MPP14_TDM_SMOSI MPP(14, 0x6, 0, 0, 1) #define MPP14_UNUSED MPP(14, 0x1, 0, 0, 1) #define MPP15_GPIO MPP(15, 0x0, 1, 1, 1) -#define MPP15_SATA0_ACTn MPP(15, 0x3, 0, 1, 1) -#define MPP15_UA1_RTSn MPP(15, 0x4, 0, 1, 1) -#define MPP15_NAND_FLASH_WEn1 MPP(15, 0x5, 0, 1, 1) -#define MPP15_TDM_SMISO MPP(15, 0x6, 1, 0, 1) +#define MPP15_SATA0_ACTn MPP(15, 0x3, 0, 0, 1) +#define MPP15_UA1_RTSn MPP(15, 0x4, 0, 0, 1) +#define MPP15_NAND_FLASH_WEn1 MPP(15, 0x5, 0, 0, 1) +#define MPP15_TDM_SMISO MPP(15, 0x6, 0, 0, 1) #define MPP15_UNUSED MPP(15, 0x1, 0, 0, 1) #define MPP16_GPIO MPP(16, 0x0, 1, 1, 1) -#define MPP16_SATA1_PRESENTn MPP(16, 0x3, 0, 1, 1) -#define MPP16_UA2_TXD MPP(16, 0x4, 0, 1, 1) -#define MPP16_NAND_FLASH_REn3 MPP(16, 0x5, 0, 1, 1) -#define MPP16_TDM_INTn MPP(16, 0x6, 1, 0, 1) +#define MPP16_SATA1_PRESENTn MPP(16, 0x3, 0, 0, 1) +#define MPP16_UA2_TXD MPP(16, 0x4, 0, 0, 1) +#define MPP16_NAND_FLASH_REn3 MPP(16, 0x5, 0, 0, 1) +#define MPP16_TDM_INTn MPP(16, 0x6, 0, 0, 1) #define MPP16_UNUSED MPP(16, 0x1, 0, 0, 1) #define MPP17_GPIO MPP(17, 0x0, 1, 1, 1) -#define MPP17_SATA0_PRESENTn MPP(17, 0x3, 0, 1, 1) -#define MPP17_UA2_RXD MPP(17, 0x4, 1, 0, 1) -#define MPP17_NAND_FLASH_WEn3 MPP(17, 0x5, 0, 1, 1) -#define MPP17_TDM_RSTn MPP(17, 0x6, 0, 1, 1) +#define MPP17_SATA0_PRESENTn MPP(17, 0x3, 0, 0, 1) +#define MPP17_UA2_RXD MPP(17, 0x4, 0, 0, 1) +#define MPP17_NAND_FLASH_WEn3 MPP(17, 0x5, 0, 0, 1) +#define MPP17_TDM_RSTn MPP(17, 0x6, 0, 0, 1) #define MPP17_UNUSED MPP(17, 0x1, 0, 0, 1) #define MPP18_GPIO MPP(18, 0x0, 1, 1, 1) -#define MPP18_UA0_CTSn MPP(18, 0x4, 1, 0, 1) -#define MPP18_BOOT_FLASH_REn MPP(18, 0x5, 0, 1, 1) +#define MPP18_UA0_CTSn MPP(18, 0x4, 0, 0, 1) +#define MPP18_BOOT_FLASH_REn MPP(18, 0x5, 0, 0, 1) #define MPP18_UNUSED MPP(18, 0x1, 0, 0, 1) #define MPP19_GPIO MPP(19, 0x0, 1, 1, 1) -#define MPP19_UA0_CTSn MPP(19, 0x4, 0, 1, 1) -#define MPP19_BOOT_FLASH_WEn MPP(19, 0x5, 0, 1, 1) +#define MPP19_UA0_CTSn MPP(19, 0x4, 0, 0, 1) +#define MPP19_BOOT_FLASH_WEn MPP(19, 0x5, 0, 0, 1) #define MPP19_UNUSED MPP(19, 0x1, 0, 0, 1) #define MPP20_GPIO MPP(20, 0x0, 1, 1, 1) -#define MPP20_UA1_CTSs MPP(20, 0x4, 1, 0, 1) -#define MPP20_TDM_PCLK MPP(20, 0x6, 1, 1, 0) +#define MPP20_UA1_CTSs MPP(20, 0x4, 0, 0, 1) +#define MPP20_TDM_PCLK MPP(20, 0x6, 0, 0, 0) #define MPP20_UNUSED MPP(20, 0x1, 0, 0, 1) #define MPP21_GPIO MPP(21, 0x0, 1, 1, 1) -#define MPP21_UA1_CTSs MPP(21, 0x4, 0, 1, 1) -#define MPP21_TDM_FSYNC MPP(21, 0x6, 1, 1, 0) +#define MPP21_UA1_CTSs MPP(21, 0x4, 0, 0, 1) +#define MPP21_TDM_FSYNC MPP(21, 0x6, 0, 0, 0) #define MPP21_UNUSED MPP(21, 0x1, 0, 0, 1) #define MPP22_GPIO MPP(22, 0x0, 1, 1, 1) -#define MPP22_UA3_TDX MPP(22, 0x4, 0, 1, 1) -#define MPP22_NAND_FLASH_REn2 MPP(22, 0x5, 0, 1, 1) -#define MPP22_TDM_DRX MPP(22, 0x6, 1, 0, 1) +#define MPP22_UA3_TDX MPP(22, 0x4, 0, 0, 1) +#define MPP22_NAND_FLASH_REn2 MPP(22, 0x5, 0, 0, 1) +#define MPP22_TDM_DRX MPP(22, 0x6, 0, 0, 1) #define MPP22_UNUSED MPP(22, 0x1, 0, 0, 1) #define MPP23_GPIO MPP(23, 0x0, 1, 1, 1) -#define MPP23_UA3_RDX MPP(23, 0x4, 1, 0, 1) -#define MPP23_NAND_FLASH_WEn2 MPP(23, 0x5, 0, 1, 1) -#define MPP23_TDM_DTX MPP(23, 0x6, 0, 1, 1) +#define MPP23_UA3_RDX MPP(23, 0x4, 0, 0, 1) +#define MPP23_NAND_FLASH_WEn2 MPP(23, 0x5, 0, 0, 1) +#define MPP23_TDM_DTX MPP(23, 0x6, 0, 0, 1) #define MPP23_UNUSED MPP(23, 0x1, 0, 0, 1) #define MPP24_GPIO MPP(24, 0x0, 1, 1, 1) -#define MPP24_UA2_TXD MPP(24, 0x4, 0, 1, 1) -#define MPP24_TDM_INTn MPP(24, 0x6, 1, 0, 1) +#define MPP24_UA2_TXD MPP(24, 0x4, 0, 0, 1) +#define MPP24_TDM_INTn MPP(24, 0x6, 0, 0, 1) #define MPP24_UNUSED MPP(24, 0x1, 0, 0, 1) #define MPP25_GPIO MPP(25, 0x0, 1, 1, 1) -#define MPP25_UA2_RXD MPP(25, 0x4, 1, 0, 1) -#define MPP25_TDM_RSTn MPP(25, 0x6, 0, 1, 1) +#define MPP25_UA2_RXD MPP(25, 0x4, 0, 0, 1) +#define MPP25_TDM_RSTn MPP(25, 0x6, 0, 0, 1) #define MPP25_UNUSED MPP(25, 0x1, 0, 0, 1) #define MPP26_GPIO MPP(26, 0x0, 1, 1, 1) -#define MPP26_UA2_CTSn MPP(26, 0x4, 1, 0, 1) -#define MPP26_TDM_PCLK MPP(26, 0x6, 1, 1, 1) +#define MPP26_UA2_CTSn MPP(26, 0x4, 0, 0, 1) +#define MPP26_TDM_PCLK MPP(26, 0x6, 0, 0, 1) #define MPP26_UNUSED MPP(26, 0x1, 0, 0, 1) #define MPP27_GPIO MPP(27, 0x0, 1, 1, 1) -#define MPP27_UA2_RTSn MPP(27, 0x4, 0, 1, 1) -#define MPP27_TDM_FSYNC MPP(27, 0x6, 1, 1, 1) +#define MPP27_UA2_RTSn MPP(27, 0x4, 0, 0, 1) +#define MPP27_TDM_FSYNC MPP(27, 0x6, 0, 0, 1) #define MPP27_UNUSED MPP(27, 0x1, 0, 0, 1) #define MPP28_GPIO MPP(28, 0x0, 1, 1, 1) -#define MPP28_UA3_TXD MPP(28, 0x4, 0, 1, 1) -#define MPP28_TDM_DRX MPP(28, 0x6, 1, 0, 1) +#define MPP28_UA3_TXD MPP(28, 0x4, 0, 0, 1) +#define MPP28_TDM_DRX MPP(28, 0x6, 0, 0, 1) #define MPP28_UNUSED MPP(28, 0x1, 0, 0, 1) #define MPP29_GPIO MPP(29, 0x0, 1, 1, 1) -#define MPP29_UA3_RXD MPP(29, 0x4, 1, 0, 1) -#define MPP29_SYSRST_OUTn MPP(29, 0x5, 0, 1, 1) -#define MPP29_TDM_DTX MPP(29, 0x6, 0, 1, 1) +#define MPP29_UA3_RXD MPP(29, 0x4, 0, 0, 1) +#define MPP29_SYSRST_OUTn MPP(29, 0x5, 0, 0, 1) +#define MPP29_TDM_DTX MPP(29, 0x6, 0, 0, 1) #define MPP29_UNUSED MPP(29, 0x1, 0, 0, 1) #define MPP30_GPIO MPP(30, 0x0, 1, 1, 1) -#define MPP30_UA3_CTSn MPP(30, 0x4, 1, 0, 1) +#define MPP30_UA3_CTSn MPP(30, 0x4, 0, 0, 1) #define MPP30_UNUSED MPP(30, 0x1, 0, 0, 1) #define MPP31_GPIO MPP(31, 0x0, 1, 1, 1) -#define MPP31_UA3_RTSn MPP(31, 0x4, 0, 1, 1) -#define MPP31_TDM1_SCSn MPP(31, 0x6, 0, 1, 1) +#define MPP31_UA3_RTSn MPP(31, 0x4, 0, 0, 1) +#define MPP31_TDM1_SCSn MPP(31, 0x6, 0, 0, 1) #define MPP31_UNUSED MPP(31, 0x1, 0, 0, 1) #define MPP32_GPIO MPP(32, 0x1, 1, 1, 1) -#define MPP32_UA3_TDX MPP(32, 0x4, 0, 1, 1) -#define MPP32_SYSRST_OUTn MPP(32, 0x5, 0, 1, 1) -#define MPP32_TDM0_RXQ MPP(32, 0x6, 0, 1, 1) +#define MPP32_UA3_TDX MPP(32, 0x4, 0, 0, 1) +#define MPP32_SYSRST_OUTn MPP(32, 0x5, 0, 0, 1) +#define MPP32_TDM0_RXQ MPP(32, 0x6, 0, 0, 1) #define MPP32_UNUSED MPP(32, 0x3, 0, 0, 1) #define MPP33_GPIO MPP(33, 0x1, 1, 1, 1) -#define MPP33_UA3_RDX MPP(33, 0x4, 1, 0, 1) -#define MPP33_TDM0_TXQ MPP(33, 0x6, 0, 1, 1) +#define MPP33_UA3_RDX MPP(33, 0x4, 0, 0, 1) +#define MPP33_TDM0_TXQ MPP(33, 0x6, 0, 0, 1) #define MPP33_UNUSED MPP(33, 0x3, 0, 0, 1) #define MPP34_GPIO MPP(34, 0x1, 1, 1, 1) -#define MPP34_UA2_TDX MPP(34, 0x4, 0, 1, 1) -#define MPP34_TDM1_RXQ MPP(34, 0x6, 0, 1, 1) +#define MPP34_UA2_TDX MPP(34, 0x4, 0, 0, 1) +#define MPP34_TDM1_RXQ MPP(34, 0x6, 0, 0, 1) #define MPP34_UNUSED MPP(34, 0x3, 0, 0, 1) #define MPP35_GPIO MPP(35, 0x1, 1, 1, 1) -#define MPP35_UA2_RDX MPP(35, 0x4, 1, 0, 1) -#define MPP35_TDM1_TXQ MPP(35, 0x6, 0, 1, 1) +#define MPP35_UA2_RDX MPP(35, 0x4, 0, 0, 1) +#define MPP35_TDM1_TXQ MPP(35, 0x6, 0, 0, 1) #define MPP35_UNUSED MPP(35, 0x3, 0, 0, 1) #define MPP36_GPIO MPP(36, 0x1, 1, 1, 1) -#define MPP36_UA0_CTSn MPP(36, 0x2, 1, 0, 1) -#define MPP36_UA2_TDX MPP(36, 0x4, 0, 1, 1) -#define MPP36_TDM0_SCSn MPP(36, 0x6, 0, 1, 1) +#define MPP36_UA0_CTSn MPP(36, 0x2, 0, 0, 1) +#define MPP36_UA2_TDX MPP(36, 0x4, 0, 0, 1) +#define MPP36_TDM0_SCSn MPP(36, 0x6, 0, 0, 1) #define MPP36_UNUSED MPP(36, 0x3, 0, 0, 1) #define MPP37_GPIO MPP(37, 0x1, 1, 1, 1) -#define MPP37_UA0_RTSn MPP(37, 0x2, 0, 1, 1) -#define MPP37_UA2_RXD MPP(37, 0x4, 1, 0, 1) -#define MPP37_SYSRST_OUTn MPP(37, 0x5, 0, 1, 1) -#define MPP37_TDM_SCLK MPP(37, 0x6, 0, 1, 1) +#define MPP37_UA0_RTSn MPP(37, 0x2, 0, 0, 1) +#define MPP37_UA2_RXD MPP(37, 0x4, 0, 0, 1) +#define MPP37_SYSRST_OUTn MPP(37, 0x5, 0, 0, 1) +#define MPP37_TDM_SCLK MPP(37, 0x6, 0, 0, 1) #define MPP37_UNUSED MPP(37, 0x3, 0, 0, 1) #define MPP38_GPIO MPP(38, 0x1, 1, 1, 1) -#define MPP38_UA1_CTSn MPP(38, 0x2, 1, 0, 1) -#define MPP38_UA3_TXD MPP(38, 0x4, 0, 1, 1) -#define MPP38_SYSRST_OUTn MPP(38, 0x5, 0, 1, 1) -#define MPP38_TDM_SMOSI MPP(38, 0x6, 0, 1, 1) +#define MPP38_UA1_CTSn MPP(38, 0x2, 0, 0, 1) +#define MPP38_UA3_TXD MPP(38, 0x4, 0, 0, 1) +#define MPP38_SYSRST_OUTn MPP(38, 0x5, 0, 0, 1) +#define MPP38_TDM_SMOSI MPP(38, 0x6, 0, 0, 1) #define MPP38_UNUSED MPP(38, 0x3, 0, 0, 1) #define MPP39_GPIO MPP(39, 0x1, 1, 1, 1) -#define MPP39_UA1_RTSn MPP(39, 0x2, 0, 1, 1) -#define MPP39_UA3_RXD MPP(39, 0x4, 1, 0, 1) -#define MPP39_SYSRST_OUTn MPP(39, 0x5, 0, 1, 1) -#define MPP39_TDM_SMISO MPP(39, 0x6, 1, 0, 1) +#define MPP39_UA1_RTSn MPP(39, 0x2, 0, 0, 1) +#define MPP39_UA3_RXD MPP(39, 0x4, 0, 0, 1) +#define MPP39_SYSRST_OUTn MPP(39, 0x5, 0, 0, 1) +#define MPP39_TDM_SMISO MPP(39, 0x6, 0, 0, 1) #define MPP39_UNUSED MPP(39, 0x3, 0, 0, 1) #define MPP40_GPIO MPP(40, 0x1, 1, 1, 1) -#define MPP40_TDM_INTn MPP(40, 0x6, 1, 0, 1) +#define MPP40_TDM_INTn MPP(40, 0x6, 0, 0, 1) #define MPP40_UNUSED MPP(40, 0x0, 0, 0, 1) #define MPP41_GPIO MPP(41, 0x1, 1, 1, 1) -#define MPP41_TDM_RSTn MPP(41, 0x6, 0, 1, 1) +#define MPP41_TDM_RSTn MPP(41, 0x6, 0, 0, 1) #define MPP41_UNUSED MPP(41, 0x0, 0, 0, 1) #define MPP42_GPIO MPP(42, 0x1, 1, 1, 1) -#define MPP42_TDM_PCLK MPP(42, 0x6, 1, 1, 1) +#define MPP42_TDM_PCLK MPP(42, 0x6, 0, 0, 1) #define MPP42_UNUSED MPP(42, 0x0, 0, 0, 1) #define MPP43_GPIO MPP(43, 0x1, 1, 1, 1) -#define MPP43_TDM_FSYNC MPP(43, 0x6, 1, 1, 1) +#define MPP43_TDM_FSYNC MPP(43, 0x6, 0, 0, 1) #define MPP43_UNUSED MPP(43, 0x0, 0, 0, 1) #define MPP44_GPIO MPP(44, 0x1, 1, 1, 1) -#define MPP44_TDM_DRX MPP(44, 0x6, 1, 0, 1) +#define MPP44_TDM_DRX MPP(44, 0x6, 0, 0, 1) #define MPP44_UNUSED MPP(44, 0x0, 0, 0, 1) #define MPP45_GPIO MPP(45, 0x1, 1, 1, 1) -#define MPP45_SATA0_ACTn MPP(45, 0x3, 0, 1, 1) -#define MPP45_TDM_DRX MPP(45, 0x6, 0, 1, 1) +#define MPP45_SATA0_ACTn MPP(45, 0x3, 0, 0, 1) +#define MPP45_TDM_DRX MPP(45, 0x6, 0, 0, 1) #define MPP45_UNUSED MPP(45, 0x0, 0, 0, 1) #define MPP46_GPIO MPP(46, 0x1, 1, 1, 1) -#define MPP46_TDM_SCSn MPP(46, 0x6, 0, 1, 1) +#define MPP46_TDM_SCSn MPP(46, 0x6, 0, 0, 1) #define MPP46_UNUSED MPP(46, 0x0, 0, 0, 1) @@ -323,14 +323,14 @@ #define MPP48_GPIO MPP(48, 0x1, 1, 1, 1) -#define MPP48_SATA1_ACTn MPP(48, 0x3, 0, 1, 1) +#define MPP48_SATA1_ACTn MPP(48, 0x3, 0, 0, 1) #define MPP48_UNUSED MPP(48, 0x2, 0, 0, 1) #define MPP49_GPIO MPP(49, 0x1, 1, 1, 1) -#define MPP49_SATA0_ACTn MPP(49, 0x3, 0, 1, 1) -#define MPP49_M_BB MPP(49, 0x4, 1, 0, 1) +#define MPP49_SATA0_ACTn MPP(49, 0x3, 0, 0, 1) +#define MPP49_M_BB MPP(49, 0x4, 0, 0, 1) #define MPP49_UNUSED MPP(49, 0x2, 0, 0, 1) diff --git a/trunk/arch/arm/mach-mxs/Kconfig b/trunk/arch/arm/mach-mxs/Kconfig index c57f9964a713..cf00b3e3be85 100644 --- a/trunk/arch/arm/mach-mxs/Kconfig +++ b/trunk/arch/arm/mach-mxs/Kconfig @@ -83,18 +83,6 @@ config MODULE_M28 select MXS_HAVE_PLATFORM_MXSFB select MXS_OCOTP -config MODULE_APX4 - bool - select SOC_IMX28 - select LEDS_GPIO_REGISTER - select MXS_HAVE_AMBA_DUART - select MXS_HAVE_PLATFORM_AUART - select MXS_HAVE_PLATFORM_FEC - select MXS_HAVE_PLATFORM_MXS_I2C - select MXS_HAVE_PLATFORM_MXS_MMC - select MXS_HAVE_PLATFORM_MXS_SAIF - select MXS_OCOTP - config MACH_TX28 bool "Ka-Ro TX28 module" select MODULE_TX28 @@ -103,8 +91,4 @@ config MACH_M28EVK bool "Support DENX M28EVK Platform" select MODULE_M28 -config MACH_APX4DEVKIT - bool "Support Bluegiga APX4 Development Kit" - select MODULE_APX4 - endif diff --git a/trunk/arch/arm/mach-mxs/Makefile b/trunk/arch/arm/mach-mxs/Makefile index 908bf9a567f1..8c93b24896bf 100644 --- a/trunk/arch/arm/mach-mxs/Makefile +++ b/trunk/arch/arm/mach-mxs/Makefile @@ -11,7 +11,6 @@ obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o obj-$(CONFIG_MACH_M28EVK) += mach-m28evk.o -obj-$(CONFIG_MACH_APX4DEVKIT) += mach-apx4devkit.o obj-$(CONFIG_MODULE_TX28) += module-tx28.o obj-$(CONFIG_MACH_TX28) += mach-tx28.o diff --git a/trunk/arch/arm/mach-mxs/devices.c b/trunk/arch/arm/mach-mxs/devices.c index 01faffec3064..fe3e847930c9 100644 --- a/trunk/arch/arm/mach-mxs/devices.c +++ b/trunk/arch/arm/mach-mxs/devices.c @@ -77,18 +77,16 @@ struct platform_device *__init mxs_add_platform_device_dmamask( int __init mxs_add_amba_device(const struct amba_device *dev) { - struct amba_device *adev = amba_device_alloc(dev->dev.init_name, - dev->res.start, resource_size(&dev->res)); + struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL); if (!adev) { pr_err("%s: failed to allocate memory", __func__); return -ENOMEM; } - adev->irq[0] = dev->irq[0]; - adev->irq[1] = dev->irq[1]; + *adev = *dev; - return amba_device_add(adev, &iomem_resource); + return amba_device_register(adev, &iomem_resource); } struct device mxs_apbh_bus = { diff --git a/trunk/arch/arm/mach-mxs/devices/amba-duart.c b/trunk/arch/arm/mach-mxs/devices/amba-duart.c index a5479f766046..a559db09b49c 100644 --- a/trunk/arch/arm/mach-mxs/devices/amba-duart.c +++ b/trunk/arch/arm/mach-mxs/devices/amba-duart.c @@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \ .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ .flags = IORESOURCE_MEM, \ }, \ - .irq = {soc ## _INT_DUART}, \ + .irq = {soc ## _INT_DUART, NO_IRQ}, \ } #ifdef CONFIG_SOC_IMX23 diff --git a/trunk/arch/arm/mach-mxs/include/mach/digctl.h b/trunk/arch/arm/mach-mxs/include/mach/digctl.h index 17964066303f..49a888c65d6d 100644 --- a/trunk/arch/arm/mach-mxs/include/mach/digctl.h +++ b/trunk/arch/arm/mach-mxs/include/mach/digctl.h @@ -18,5 +18,4 @@ #define HW_DIGCTL_CTRL 0x0 #define BP_DIGCTL_CTRL_SAIF_CLKMUX 10 #define BM_DIGCTL_CTRL_SAIF_CLKMUX (0x3 << 10) -#define HW_DIGCTL_CHIPID 0x310 #endif diff --git a/trunk/arch/arm/mach-mxs/include/mach/mxs.h b/trunk/arch/arm/mach-mxs/include/mach/mxs.h index 7d4fb6d0afda..bde5f6634747 100644 --- a/trunk/arch/arm/mach-mxs/include/mach/mxs.h +++ b/trunk/arch/arm/mach-mxs/include/mach/mxs.h @@ -23,9 +23,21 @@ #include #endif #include -#include #include +/* + * MXS CPU types + */ +#define cpu_is_mx23() ( \ + machine_is_mx23evk() || \ + machine_is_stmp378x() || \ + 0) +#define cpu_is_mx28() ( \ + machine_is_mx28evk() || \ + machine_is_m28evk() || \ + machine_is_tx28() || \ + 0) + /* * IO addresses common to MXS-based */ @@ -97,21 +109,6 @@ static inline void __mxs_togl(u32 mask, void __iomem *reg) { __raw_writel(mask, reg + MXS_TOG_ADDR); } - -/* - * MXS CPU types - */ -#define MXS_CHIPID (MXS_IO_ADDRESS(MXS_DIGCTL_BASE_ADDR) + HW_DIGCTL_CHIPID) - -static inline int cpu_is_mx23(void) -{ - return ((__raw_readl(MXS_CHIPID) >> 16) == 0x3780); -} - -static inline int cpu_is_mx28(void) -{ - return ((__raw_readl(MXS_CHIPID) >> 16) == 0x2800); -} #endif #endif /* __MACH_MXS_H__ */ diff --git a/trunk/arch/arm/mach-mxs/include/mach/system.h b/trunk/arch/arm/mach-mxs/include/mach/system.h new file mode 100644 index 000000000000..e7ad1bb29423 --- /dev/null +++ b/trunk/arch/arm/mach-mxs/include/mach/system.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MACH_MXS_SYSTEM_H__ +#define __MACH_MXS_SYSTEM_H__ + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif /* __MACH_MXS_SYSTEM_H__ */ diff --git a/trunk/arch/arm/mach-mxs/include/mach/uncompress.h b/trunk/arch/arm/mach-mxs/include/mach/uncompress.h index ef2811495446..67776746f143 100644 --- a/trunk/arch/arm/mach-mxs/include/mach/uncompress.h +++ b/trunk/arch/arm/mach-mxs/include/mach/uncompress.h @@ -18,6 +18,8 @@ #ifndef __MACH_MXS_UNCOMPRESS_H__ #define __MACH_MXS_UNCOMPRESS_H__ +#include + unsigned long mxs_duart_base; #define MXS_DUART(x) (*(volatile unsigned long *)(mxs_duart_base + (x))) @@ -53,17 +55,16 @@ static inline void flush(void) #define MX23_DUART_BASE_ADDR 0x80070000 #define MX28_DUART_BASE_ADDR 0x80074000 -#define MXS_DIGCTL_CHIPID 0x8001c310 static inline void __arch_decomp_setup(unsigned long arch_id) { - u16 chipid = (*(volatile unsigned long *) MXS_DIGCTL_CHIPID) >> 16; - - switch (chipid) { - case 0x3780: + switch (arch_id) { + case MACH_TYPE_MX23EVK: mxs_duart_base = MX23_DUART_BASE_ADDR; break; - case 0x2800: + case MACH_TYPE_MX28EVK: + case MACH_TYPE_M28EVK: + case MACH_TYPE_TX28: mxs_duart_base = MX28_DUART_BASE_ADDR; break; default: diff --git a/trunk/arch/arm/mach-mxs/mach-apx4devkit.c b/trunk/arch/arm/mach-mxs/mach-apx4devkit.c deleted file mode 100644 index 48a7fab571a6..000000000000 --- a/trunk/arch/arm/mach-mxs/mach-apx4devkit.c +++ /dev/null @@ -1,260 +0,0 @@ -/* - * Copyright (C) 2011-2012 - * Lauri Hintsala, Bluegiga, - * Veli-Pekka Peltola, Bluegiga, - * - * based on: mach-mx28evk.c - * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "devices-mx28.h" - -#define APX4DEVKIT_GPIO_USERLED MXS_GPIO_NR(3, 28) - -static const iomux_cfg_t apx4devkit_pads[] __initconst = { - /* duart */ - MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL, - MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL, - - /* auart0 */ - MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL, - MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL, - MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL, - MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL, - - /* auart1 */ - MX28_PAD_AUART1_RX__AUART1_RX | MXS_PAD_CTRL, - MX28_PAD_AUART1_TX__AUART1_TX | MXS_PAD_CTRL, - - /* auart2 */ - MX28_PAD_SSP2_SCK__AUART2_RX | MXS_PAD_CTRL, - MX28_PAD_SSP2_MOSI__AUART2_TX | MXS_PAD_CTRL, - - /* auart3 */ - MX28_PAD_SSP2_MISO__AUART3_RX | MXS_PAD_CTRL, - MX28_PAD_SSP2_SS0__AUART3_TX | MXS_PAD_CTRL, - -#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP) - /* fec0 */ - MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC, - MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC, - MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC, - MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC, - MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC, - MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC, - MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC, - MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC, - MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC, - - /* i2c */ - MX28_PAD_I2C0_SCL__I2C0_SCL, - MX28_PAD_I2C0_SDA__I2C0_SDA, - - /* mmc0 */ - MX28_PAD_SSP0_DATA0__SSP0_D0 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA1__SSP0_D1 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA2__SSP0_D2 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA3__SSP0_D3 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA4__SSP0_D4 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA5__SSP0_D5 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA6__SSP0_D6 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA7__SSP0_D7 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_CMD__SSP0_CMD | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - MX28_PAD_SSP0_SCK__SSP0_SCK | - (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - - /* led */ - MX28_PAD_PWM3__GPIO_3_28 | MXS_PAD_CTRL, - - /* saif0 & saif1 */ - MX28_PAD_SAIF0_MCLK__SAIF0_MCLK | - (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK | - (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK | - (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 | - (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 | - (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), -}; - -/* led */ -static const struct gpio_led apx4devkit_leds[] __initconst = { - { - .name = "user-led", - .default_trigger = "heartbeat", - .gpio = APX4DEVKIT_GPIO_USERLED, - }, -}; - -static const struct gpio_led_platform_data apx4devkit_led_data __initconst = { - .leds = apx4devkit_leds, - .num_leds = ARRAY_SIZE(apx4devkit_leds), -}; - -static const struct fec_platform_data mx28_fec_pdata __initconst = { - .phy = PHY_INTERFACE_MODE_RMII, -}; - -static const struct mxs_mmc_platform_data apx4devkit_mmc_pdata __initconst = { - .wp_gpio = -EINVAL, - .flags = SLOTF_4_BIT_CAPABLE, -}; - -static const struct i2c_board_info apx4devkit_i2c_boardinfo[] __initconst = { - { I2C_BOARD_INFO("sgtl5000", 0x0a) }, /* ASoC */ - { I2C_BOARD_INFO("pcf8563", 0x51) }, /* RTC */ -}; - -#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || \ - defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE) -static struct regulator_consumer_supply apx4devkit_audio_consumer_supplies[] = { - REGULATOR_SUPPLY("VDDA", "0-000a"), - REGULATOR_SUPPLY("VDDIO", "0-000a"), -}; - -static struct regulator_init_data apx4devkit_vdd_reg_init_data = { - .constraints = { - .name = "3V3", - .always_on = 1, - }, - .consumer_supplies = apx4devkit_audio_consumer_supplies, - .num_consumer_supplies = ARRAY_SIZE(apx4devkit_audio_consumer_supplies), -}; - -static struct fixed_voltage_config apx4devkit_vdd_pdata = { - .supply_name = "board-3V3", - .microvolts = 3300000, - .gpio = -EINVAL, - .enabled_at_boot = 1, - .init_data = &apx4devkit_vdd_reg_init_data, -}; - -static struct platform_device apx4devkit_voltage_regulator = { - .name = "reg-fixed-voltage", - .id = -1, - .num_resources = 0, - .dev = { - .platform_data = &apx4devkit_vdd_pdata, - }, -}; - -static void __init apx4devkit_add_regulators(void) -{ - platform_device_register(&apx4devkit_voltage_regulator); -} -#else -static void __init apx4devkit_add_regulators(void) {} -#endif - -static const struct mxs_saif_platform_data - apx4devkit_mxs_saif_pdata[] __initconst = { - /* working on EXTMSTR0 mode (saif0 master, saif1 slave) */ - { - .master_mode = 1, - .master_id = 0, - }, { - .master_mode = 0, - .master_id = 0, - }, -}; - -static int apx4devkit_phy_fixup(struct phy_device *phy) -{ - phy->dev_flags |= MICREL_PHY_50MHZ_CLK; - return 0; -} - -static void __init apx4devkit_init(void) -{ - mxs_iomux_setup_multiple_pads(apx4devkit_pads, - ARRAY_SIZE(apx4devkit_pads)); - - mx28_add_duart(); - mx28_add_auart0(); - mx28_add_auart1(); - mx28_add_auart2(); - mx28_add_auart3(); - - /* - * Register fixup for the Micrel KS8031 PHY clock - * (shares same ID with KS8051) - */ - phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK, - apx4devkit_phy_fixup); - - mx28_add_fec(0, &mx28_fec_pdata); - - mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata); - - gpio_led_register_device(0, &apx4devkit_led_data); - - mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); - mx28_add_saif(0, &apx4devkit_mxs_saif_pdata[0]); - mx28_add_saif(1, &apx4devkit_mxs_saif_pdata[1]); - - apx4devkit_add_regulators(); - - mx28_add_mxs_i2c(0); - i2c_register_board_info(0, apx4devkit_i2c_boardinfo, - ARRAY_SIZE(apx4devkit_i2c_boardinfo)); - - mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0, NULL, 0); -} - -static void __init apx4devkit_timer_init(void) -{ - mx28_clocks_init(); -} - -static struct sys_timer apx4devkit_timer = { - .init = apx4devkit_timer_init, -}; - -MACHINE_START(APX4DEVKIT, "Bluegiga APX4 Development Kit") - .map_io = mx28_map_io, - .init_irq = mx28_init_irq, - .timer = &apx4devkit_timer, - .init_machine = apx4devkit_init, - .restart = mxs_restart, -MACHINE_END diff --git a/trunk/arch/arm/mach-mxs/mach-m28evk.c b/trunk/arch/arm/mach-mxs/mach-m28evk.c index 06d79963611c..2f2758230edf 100644 --- a/trunk/arch/arm/mach-mxs/mach-m28evk.c +++ b/trunk/arch/arm/mach-mxs/mach-m28evk.c @@ -247,15 +247,18 @@ static int __init m28evk_fec_get_mac(void) u32 val; const u32 *ocotp = mxs_get_ocotp(); - if (!ocotp) + if (!ocotp) { + pr_err("%s: timeout when reading fec mac from OCOTP\n", + __func__); return -ETIMEDOUT; + } /* * OCOTP only stores the last 4 octets for each mac address, * so hard-code DENX OUI (C0:E5:4E) here. */ for (i = 0; i < 2; i++) { - val = ocotp[i]; + val = ocotp[i * 4]; mx28_fec_pdata[i].mac[0] = 0xC0; mx28_fec_pdata[i].mac[1] = 0xE5; mx28_fec_pdata[i].mac[2] = 0x4E; diff --git a/trunk/arch/arm/mach-mxs/mach-mx28evk.c b/trunk/arch/arm/mach-mxs/mach-mx28evk.c index e386c142f93c..fdb0a5664dd6 100644 --- a/trunk/arch/arm/mach-mxs/mach-mx28evk.c +++ b/trunk/arch/arm/mach-mxs/mach-mx28evk.c @@ -223,6 +223,7 @@ static const struct gpio_led_platform_data mx28evk_led_data __initconst = { /* fec */ static void __init mx28evk_fec_reset(void) { + int ret; struct clk *clk; /* Enable fec phy clock */ @@ -230,7 +231,32 @@ static void __init mx28evk_fec_reset(void) if (!IS_ERR(clk)) clk_prepare_enable(clk); - gpio_set_value(MX28EVK_FEC_PHY_RESET, 0); + /* Power up fec phy */ + ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power"); + if (ret) { + pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret); + return; + } + + ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0); + if (ret) { + pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret); + return; + } + + /* Reset fec phy */ + ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset"); + if (ret) { + pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret); + return; + } + + gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0); + if (ret) { + pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret); + return; + } + mdelay(1); gpio_set_value(MX28EVK_FEC_PHY_RESET, 1); } @@ -252,14 +278,14 @@ static int __init mx28evk_fec_get_mac(void) const u32 *ocotp = mxs_get_ocotp(); if (!ocotp) - return -ETIMEDOUT; + goto error; /* * OCOTP only stores the last 4 octets for each mac address, * so hard-code Freescale OUI (00:04:9f) here. */ for (i = 0; i < 2; i++) { - val = ocotp[i]; + val = ocotp[i * 4]; mx28_fec_pdata[i].mac[0] = 0x00; mx28_fec_pdata[i].mac[1] = 0x04; mx28_fec_pdata[i].mac[2] = 0x9f; @@ -269,6 +295,10 @@ static int __init mx28evk_fec_get_mac(void) } return 0; + +error: + pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__); + return -ETIMEDOUT; } /* @@ -387,14 +417,9 @@ static void __init mx28evk_add_regulators(void) static void __init mx28evk_add_regulators(void) {} #endif -static const struct gpio mx28evk_gpios[] __initconst = { +static struct gpio mx28evk_lcd_gpios[] = { { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" }, { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, - { MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT, "flexcan-switch" }, - { MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW, "mmc0-slot-power" }, - { MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, "mmc1-slot-power" }, - { MX28EVK_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" }, - { MX28EVK_FEC_PHY_RESET, GPIOF_DIR_OUT, "fec-phy-reset" }, }; static const struct mxs_saif_platform_data @@ -422,18 +447,25 @@ static void __init mx28evk_init(void) if (mx28evk_fec_get_mac()) pr_warn("%s: failed on fec mac setup\n", __func__); - ret = gpio_request_array(mx28evk_gpios, ARRAY_SIZE(mx28evk_gpios)); - if (ret) - pr_err("One or more GPIOs failed to be requested: %d\n", ret); - mx28evk_fec_reset(); mx28_add_fec(0, &mx28_fec_pdata[0]); mx28_add_fec(1, &mx28_fec_pdata[1]); - mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]); - mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]); + ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT, + "flexcan-switch"); + if (ret) { + pr_err("failed to request gpio flexcan-switch: %d\n", ret); + } else { + mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]); + mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]); + } - mx28_add_mxsfb(&mx28evk_mxsfb_pdata); + ret = gpio_request_array(mx28evk_lcd_gpios, + ARRAY_SIZE(mx28evk_lcd_gpios)); + if (ret) + pr_warn("failed to request gpio pins for lcd: %d\n", ret); + else + mx28_add_mxsfb(&mx28evk_mxsfb_pdata); mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); mx28_add_saif(0, &mx28evk_mxs_saif_pdata[0]); @@ -448,8 +480,20 @@ static void __init mx28evk_init(void) mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0, NULL, 0); - mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); - mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); + /* power on mmc slot by writing 0 to the gpio */ + ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW, + "mmc0-slot-power"); + if (ret) + pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret); + else + mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); + + ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, + "mmc1-slot-power"); + if (ret) + pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); + else + mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); mx28_add_rtc_stmp3xxx(); diff --git a/trunk/arch/arm/mach-mxs/pm.c b/trunk/arch/arm/mach-mxs/pm.c index a9b4bbcdafb4..fb042da29bda 100644 --- a/trunk/arch/arm/mach-mxs/pm.c +++ b/trunk/arch/arm/mach-mxs/pm.c @@ -15,12 +15,13 @@ #include #include #include +#include static int mxs_suspend_enter(suspend_state_t state) { switch (state) { case PM_SUSPEND_MEM: - cpu_do_idle(); + arch_idle(); break; default: diff --git a/trunk/arch/arm/mach-netx/fb.c b/trunk/arch/arm/mach-netx/fb.c index 2cdf6ef69bee..b9913234bbf6 100644 --- a/trunk/arch/arm/mach-netx/fb.c +++ b/trunk/arch/arm/mach-netx/fb.c @@ -92,7 +92,18 @@ void clk_put(struct clk *clk) { } -static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL); +static struct amba_device fb_device = { + .dev = { + .init_name = "fb", + .coherent_dma_mask = ~0, + }, + .res = { + .start = 0x00104000, + .end = 0x00104fff, + .flags = IORESOURCE_MEM, + }, + .irq = { NETX_IRQ_LCD, NO_IRQ }, +}; int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) { diff --git a/trunk/arch/arm/mach-netx/include/mach/system.h b/trunk/arch/arm/mach-netx/include/mach/system.h new file mode 100644 index 000000000000..b38fa36d58c4 --- /dev/null +++ b/trunk/arch/arm/mach-netx/include/mach/system.h @@ -0,0 +1,28 @@ +/* + * arch/arm/mach-netx/include/mach/system.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif + diff --git a/trunk/arch/arm/mach-nomadik/board-nhk8815.c b/trunk/arch/arm/mach-nomadik/board-nhk8815.c index f6f74adbe8c4..7c878bf00340 100644 --- a/trunk/arch/arm/mach-nomadik/board-nhk8815.c +++ b/trunk/arch/arm/mach-nomadik/board-nhk8815.c @@ -185,11 +185,20 @@ static void __init nhk8815_onenand_init(void) #endif } -static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE, - { IRQ_UART0 }, NULL); +#define __MEM_4K_RESOURCE(x) \ + .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} -static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE, - { IRQ_UART1 }, NULL); +static struct amba_device uart0_device = { + .dev = { .init_name = "uart0" }, + __MEM_4K_RESOURCE(NOMADIK_UART0_BASE), + .irq = {IRQ_UART0, NO_IRQ}, +}; + +static struct amba_device uart1_device = { + .dev = { .init_name = "uart1" }, + __MEM_4K_RESOURCE(NOMADIK_UART1_BASE), + .irq = {IRQ_UART1, NO_IRQ}, +}; static struct amba_device *amba_devs[] __initdata = { &uart0_device, diff --git a/trunk/arch/arm/mach-nomadik/cpu-8815.c b/trunk/arch/arm/mach-nomadik/cpu-8815.c index 27f43a46985e..65df7b4fdd3e 100644 --- a/trunk/arch/arm/mach-nomadik/cpu-8815.c +++ b/trunk/arch/arm/mach-nomadik/cpu-8815.c @@ -97,7 +97,12 @@ static struct platform_device cpu8815_platform_gpio[] = { GPIO_DEVICE(3), }; -static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL); +static struct amba_device cpu8815_amba_rng = { + .dev = { + .init_name = "rng", + }, + __MEM_4K_RESOURCE(NOMADIK_RNG_BASE), +}; static struct platform_device *platform_devs[] __initdata = { cpu8815_platform_gpio + 0, @@ -107,7 +112,7 @@ static struct platform_device *platform_devs[] __initdata = { }; static struct amba_device *amba_devs[] __initdata = { - &cpu8815_amba_rng_device + &cpu8815_amba_rng }; static int __init cpu8815_init(void) diff --git a/trunk/arch/arm/mach-nomadik/include/mach/system.h b/trunk/arch/arm/mach-nomadik/include/mach/system.h new file mode 100644 index 000000000000..25e198b8976c --- /dev/null +++ b/trunk/arch/arm/mach-nomadik/include/mach/system.h @@ -0,0 +1,32 @@ +/* + * mach-nomadik/include/mach/system.h + * + * Copyright (C) 2008 STMicroelectronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-omap1/include/mach/system.h b/trunk/arch/arm/mach-omap1/include/mach/system.h new file mode 100644 index 000000000000..a6c1b3a16dfc --- /dev/null +++ b/trunk/arch/arm/mach-omap1/include/mach/system.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/system.h + */ + +#include diff --git a/trunk/arch/arm/mach-omap1/pm.c b/trunk/arch/arm/mach-omap1/pm.c index 0c2c3669d594..89ea20ca0ccc 100644 --- a/trunk/arch/arm/mach-omap1/pm.c +++ b/trunk/arch/arm/mach-omap1/pm.c @@ -42,9 +42,9 @@ #include #include #include -#include #include +#include #include #include @@ -108,7 +108,13 @@ void omap1_pm_idle(void) __u32 use_idlect1 = arm_idlect1_mask; int do_sleep = 0; + local_irq_disable(); local_fiq_disable(); + if (need_resched()) { + local_fiq_enable(); + local_irq_enable(); + return; + } #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) #warning Enable 32kHz OS timer in order to allow sleep states in idle @@ -151,12 +157,14 @@ void omap1_pm_idle(void) omap_writel(saved_idlect1, ARM_IDLECT1); local_fiq_enable(); + local_irq_enable(); return; } omap_sram_suspend(omap_readl(ARM_IDLECT1), omap_readl(ARM_IDLECT2)); local_fiq_enable(); + local_irq_enable(); } /* @@ -575,6 +583,8 @@ static void omap_pm_init_proc(void) #endif /* DEBUG && CONFIG_PROC_FS */ +static void (*saved_idle)(void) = NULL; + /* * omap_pm_prepare - Do preliminary suspend work. * @@ -582,7 +592,8 @@ static void omap_pm_init_proc(void) static int omap_pm_prepare(void) { /* We cannot sleep in idle until we have resumed */ - disable_hlt(); + saved_idle = pm_idle; + pm_idle = NULL; return 0; } @@ -619,7 +630,7 @@ static int omap_pm_enter(suspend_state_t state) static void omap_pm_finish(void) { - enable_hlt(); + pm_idle = saved_idle; } @@ -676,7 +687,7 @@ static int __init omap_pm_init(void) return -ENODEV; } - arm_pm_idle = omap1_pm_idle; + pm_idle = omap1_pm_idle; if (cpu_is_omap7xx()) setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); diff --git a/trunk/arch/arm/mach-omap2/Makefile b/trunk/arch/arm/mach-omap2/Makefile index fc9b238cbc19..bd76394ccaf8 100644 --- a/trunk/arch/arm/mach-omap2/Makefile +++ b/trunk/arch/arm/mach-omap2/Makefile @@ -11,9 +11,9 @@ hwmod-common = omap_hwmod.o \ omap_hwmod_common_data.o clock-common = clock.o clock_common_data.o \ clkt_dpll.o clkt_clksel.o -secure-common = omap-smc.o omap-secure.o +secure-common = omap-smc.o omap-secure.o -obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) $(secure-common) +obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) diff --git a/trunk/arch/arm/mach-omap2/board-4430sdp.c b/trunk/arch/arm/mach-omap2/board-4430sdp.c index 21fc87648660..4e9071589bfb 100644 --- a/trunk/arch/arm/mach-omap2/board-4430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-4430sdp.c @@ -814,7 +814,7 @@ static struct omap_dss_board_info sdp4430_dss_data = { .default_device = &sdp4430_lcd_device, }; -static void omap_4430sdp_display_init(void) +static void __init omap_4430sdp_display_init(void) { int r; @@ -851,7 +851,7 @@ static struct omap_board_mux board_mux[] __initdata = { #define board_mux NULL #endif -static void omap4_sdp4430_wifi_mux_init(void) +static void __init omap4_sdp4430_wifi_mux_init(void) { omap_mux_init_gpio(GPIO_WIFI_IRQ, OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE); @@ -878,12 +878,17 @@ static struct wl12xx_platform_data omap4_sdp4430_wlan_data __initdata = { .board_tcxo_clock = WL12XX_TCXOCLOCK_26, }; -static void omap4_sdp4430_wifi_init(void) +static void __init omap4_sdp4430_wifi_init(void) { + int ret; + omap4_sdp4430_wifi_mux_init(); - if (wl12xx_set_platform_data(&omap4_sdp4430_wlan_data)) - pr_err("Error setting wl12xx data\n"); - platform_device_register(&omap_vwlan_device); + ret = wl12xx_set_platform_data(&omap4_sdp4430_wlan_data); + if (ret) + pr_err("Error setting wl12xx data: %d\n", ret); + ret = platform_device_register(&omap_vwlan_device); + if (ret) + pr_err("Error registering wl12xx device: %d\n", ret); } static void __init omap_4430sdp_init(void) diff --git a/trunk/arch/arm/mach-omap2/board-cm-t35.c b/trunk/arch/arm/mach-omap2/board-cm-t35.c index e921e3be24a4..d73316ed4207 100644 --- a/trunk/arch/arm/mach-omap2/board-cm-t35.c +++ b/trunk/arch/arm/mach-omap2/board-cm-t35.c @@ -437,7 +437,7 @@ static struct usbhs_omap_board_data usbhs_bdata __initdata = { .reset_gpio_port[2] = -EINVAL }; -static void cm_t35_init_usbh(void) +static void __init cm_t35_init_usbh(void) { int err; diff --git a/trunk/arch/arm/mach-omap2/board-generic.c b/trunk/arch/arm/mach-omap2/board-generic.c index d58756060483..ad497620539b 100644 --- a/trunk/arch/arm/mach-omap2/board-generic.c +++ b/trunk/arch/arm/mach-omap2/board-generic.c @@ -17,6 +17,7 @@ #include #include +#include #include #include @@ -102,6 +103,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, + .handle_irq = omap2_intc_handle_irq, .init_machine = omap_generic_init, .timer = &omap2_timer, .dt_compat = omap242x_boards_compat, @@ -141,6 +143,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_init, .timer = &omap3_timer, .dt_compat = omap3_boards_compat, @@ -160,6 +163,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") .map_io = omap4_map_io, .init_early = omap4430_init_early, .init_irq = gic_init_irq, + .handle_irq = gic_handle_irq, .init_machine = omap4_init, .timer = &omap4_timer, .dt_compat = omap4_boards_compat, diff --git a/trunk/arch/arm/mach-omap2/board-omap3evm.c b/trunk/arch/arm/mach-omap2/board-omap3evm.c index 003fe34c9343..c775bead1497 100644 --- a/trunk/arch/arm/mach-omap2/board-omap3evm.c +++ b/trunk/arch/arm/mach-omap2/board-omap3evm.c @@ -617,6 +617,21 @@ static struct gpio omap3_evm_ehci_gpios[] __initdata = { { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" }, }; +static void __init omap3_evm_wl12xx_init(void) +{ +#ifdef CONFIG_WL12XX_PLATFORM_DATA + int ret; + + /* WL12xx WLAN Init */ + ret = wl12xx_set_platform_data(&omap3evm_wlan_data); + if (ret) + pr_err("error setting wl12xx data: %d\n", ret); + ret = platform_device_register(&omap3evm_wlan_regulator); + if (ret) + pr_err("error registering wl12xx device: %d\n", ret); +#endif +} + static void __init omap3_evm_init(void) { omap3_evm_get_revision(); @@ -665,13 +680,7 @@ static void __init omap3_evm_init(void) omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL); omap3evm_init_smsc911x(); omap3_evm_display_init(); - -#ifdef CONFIG_WL12XX_PLATFORM_DATA - /* WL12xx WLAN Init */ - if (wl12xx_set_platform_data(&omap3evm_wlan_data)) - pr_err("error setting wl12xx data\n"); - platform_device_register(&omap3evm_wlan_regulator); -#endif + omap3_evm_wl12xx_init(); } MACHINE_START(OMAP3EVM, "OMAP3 EVM") diff --git a/trunk/arch/arm/mach-omap2/board-omap4panda.c b/trunk/arch/arm/mach-omap2/board-omap4panda.c index b7779c206a90..28fc271f7031 100644 --- a/trunk/arch/arm/mach-omap2/board-omap4panda.c +++ b/trunk/arch/arm/mach-omap2/board-omap4panda.c @@ -488,13 +488,15 @@ void omap4_panda_display_init(void) static void __init omap4_panda_init(void) { int package = OMAP_PACKAGE_CBS; + int ret; if (omap_rev() == OMAP4430_REV_ES1_0) package = OMAP_PACKAGE_CBL; omap4_mux_init(board_mux, NULL, package); - if (wl12xx_set_platform_data(&omap_panda_wlan_data)) - pr_err("error setting wl12xx data\n"); + ret = wl12xx_set_platform_data(&omap_panda_wlan_data); + if (ret) + pr_err("error setting wl12xx data: %d\n", ret); omap4_panda_i2c_init(); platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); diff --git a/trunk/arch/arm/mach-omap2/board-zoom-peripherals.c b/trunk/arch/arm/mach-omap2/board-zoom-peripherals.c index 8d7ce11cfeaf..c126461836ac 100644 --- a/trunk/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/trunk/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -296,8 +296,10 @@ static void enable_board_wakeup_source(void) void __init zoom_peripherals_init(void) { - if (wl12xx_set_platform_data(&omap_zoom_wlan_data)) - pr_err("error setting wl12xx data\n"); + int ret = wl12xx_set_platform_data(&omap_zoom_wlan_data); + + if (ret) + pr_err("error setting wl12xx data: %d\n", ret); omap_i2c_init(); platform_device_register(&omap_vwlan_device); diff --git a/trunk/arch/arm/mach-omap2/emu.c b/trunk/arch/arm/mach-omap2/emu.c index ce91aad4cdad..9c442e290ccb 100644 --- a/trunk/arch/arm/mach-omap2/emu.c +++ b/trunk/arch/arm/mach-omap2/emu.c @@ -30,8 +30,29 @@ MODULE_AUTHOR("Alexander Shishkin"); #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) -static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL); -static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL); +static struct amba_device omap3_etb_device = { + .dev = { + .init_name = "etb", + }, + .res = { + .start = ETB_BASE, + .end = ETB_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .periphid = 0x000bb907, +}; + +static struct amba_device omap3_etm_device = { + .dev = { + .init_name = "etm", + }, + .res = { + .start = ETM_BASE, + .end = ETM_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .periphid = 0x102bb921, +}; static int __init emu_init(void) { @@ -45,3 +66,4 @@ static int __init emu_init(void) } subsys_initcall(emu_init); + diff --git a/trunk/arch/arm/mach-omap2/hsmmc.c b/trunk/arch/arm/mach-omap2/hsmmc.c index ad0adb5a1e0e..b40c28895298 100644 --- a/trunk/arch/arm/mach-omap2/hsmmc.c +++ b/trunk/arch/arm/mach-omap2/hsmmc.c @@ -293,8 +293,8 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller, } } -static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, - struct omap_mmc_platform_data *mmc) +static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, + struct omap_mmc_platform_data *mmc) { char *hc_name; @@ -430,7 +430,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, #define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 -void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) +void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) { struct omap_hwmod *oh; struct platform_device *pdev; @@ -487,7 +487,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) kfree(mmc_data); } -void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) +void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) { u32 reg; diff --git a/trunk/arch/arm/mach-omap2/include/mach/system.h b/trunk/arch/arm/mach-omap2/include/mach/system.h new file mode 100644 index 000000000000..d488721ab90b --- /dev/null +++ b/trunk/arch/arm/mach-omap2/include/mach/system.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap2/include/mach/system.h + */ + +#include diff --git a/trunk/arch/arm/mach-omap2/mux.c b/trunk/arch/arm/mach-omap2/mux.c index e1cc75d1a57a..fb8bc9fa43b1 100644 --- a/trunk/arch/arm/mach-omap2/mux.c +++ b/trunk/arch/arm/mach-omap2/mux.c @@ -100,8 +100,8 @@ void omap_mux_write_array(struct omap_mux_partition *partition, static char *omap_mux_options; -static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition, - int gpio, int val) +static int _omap_mux_init_gpio(struct omap_mux_partition *partition, + int gpio, int val) { struct omap_mux_entry *e; struct omap_mux *gpio_mux = NULL; @@ -145,7 +145,7 @@ static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition, return 0; } -int __init omap_mux_init_gpio(int gpio, int val) +int omap_mux_init_gpio(int gpio, int val) { struct omap_mux_partition *partition; int ret; @@ -159,9 +159,9 @@ int __init omap_mux_init_gpio(int gpio, int val) return -ENODEV; } -static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, - const char *muxname, - struct omap_mux **found_mux) +static int _omap_mux_get_by_name(struct omap_mux_partition *partition, + const char *muxname, + struct omap_mux **found_mux) { struct omap_mux *mux = NULL; struct omap_mux_entry *e; @@ -240,7 +240,7 @@ omap_mux_get_by_name(const char *muxname, return -ENODEV; } -int __init omap_mux_init_signal(const char *muxname, int val) +int omap_mux_init_signal(const char *muxname, int val) { struct omap_mux_partition *partition = NULL; struct omap_mux *mux = NULL; @@ -1094,8 +1094,8 @@ static void omap_mux_init_package(struct omap_mux *superset, omap_mux_package_init_balls(package_balls, superset); } -static void omap_mux_init_signals(struct omap_mux_partition *partition, - struct omap_board_mux *board_mux) +static void __init omap_mux_init_signals(struct omap_mux_partition *partition, + struct omap_board_mux *board_mux) { omap_mux_set_cmdline_signals(); omap_mux_write_array(partition, board_mux); @@ -1109,8 +1109,8 @@ static void omap_mux_init_package(struct omap_mux *superset, { } -static void omap_mux_init_signals(struct omap_mux_partition *partition, - struct omap_board_mux *board_mux) +static void __init omap_mux_init_signals(struct omap_mux_partition *partition, + struct omap_board_mux *board_mux) { } diff --git a/trunk/arch/arm/mach-omap2/omap-headsmp.S b/trunk/arch/arm/mach-omap2/omap-headsmp.S index b13ef7ef5ef4..503ac777a2ba 100644 --- a/trunk/arch/arm/mach-omap2/omap-headsmp.S +++ b/trunk/arch/arm/mach-omap2/omap-headsmp.S @@ -18,6 +18,7 @@ #include #include + __CPUINIT /* * OMAP4 specific entry point for secondary CPU to jump from ROM * code. This routine also provides a holding flag into which diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod.c b/trunk/arch/arm/mach-omap2/omap_hwmod.c index 5192cabb40ed..eba6cd3816f5 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod.c @@ -1517,8 +1517,8 @@ static int _enable(struct omap_hwmod *oh) if (oh->_state != _HWMOD_STATE_INITIALIZED && oh->_state != _HWMOD_STATE_IDLE && oh->_state != _HWMOD_STATE_DISABLED) { - WARN(1, "omap_hwmod: %s: enabled state can only be entered " - "from initialized, idle, or disabled state\n", oh->name); + WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n", + oh->name); return -EINVAL; } @@ -1600,8 +1600,8 @@ static int _idle(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: idling\n", oh->name); if (oh->_state != _HWMOD_STATE_ENABLED) { - WARN(1, "omap_hwmod: %s: idle state can only be entered from " - "enabled state\n", oh->name); + WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n", + oh->name); return -EINVAL; } @@ -1682,8 +1682,8 @@ static int _shutdown(struct omap_hwmod *oh) if (oh->_state != _HWMOD_STATE_IDLE && oh->_state != _HWMOD_STATE_ENABLED) { - WARN(1, "omap_hwmod: %s: disabled state can only be entered " - "from idle, or enabled state\n", oh->name); + WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n", + oh->name); return -EINVAL; } @@ -2240,8 +2240,8 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh) BUG_ON(!oh); if (!oh->class->sysc || !oh->class->sysc->sysc_flags) { - WARN(1, "omap_device: %s: OCP barrier impossible due to " - "device configuration\n", oh->name); + WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n", + oh->name); return; } diff --git a/trunk/arch/arm/mach-omap2/pm24xx.c b/trunk/arch/arm/mach-omap2/pm24xx.c index 1f736222a629..23de98d03841 100644 --- a/trunk/arch/arm/mach-omap2/pm24xx.c +++ b/trunk/arch/arm/mach-omap2/pm24xx.c @@ -82,13 +82,7 @@ static int omap2_fclks_active(void) f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); - /* Ignore UART clocks. These are handled by UART core (serial.c) */ - f1 &= ~(OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_UART2_MASK); - f2 &= ~OMAP24XX_EN_UART3_MASK; - - if (f1 | f2) - return 1; - return 0; + return (f1 | f2) ? 1 : 0; } static void omap2_enter_full_retention(void) @@ -232,6 +226,7 @@ static int omap2_can_sleep(void) static void omap2_pm_idle(void) { + local_irq_disable(); local_fiq_disable(); if (!omap2_can_sleep()) { @@ -248,6 +243,7 @@ static void omap2_pm_idle(void) out: local_fiq_enable(); + local_irq_enable(); } #ifdef CONFIG_SUSPEND @@ -466,7 +462,7 @@ static int __init omap2_pm_init(void) } suspend_set_ops(&omap_pm_ops); - arm_pm_idle = omap2_pm_idle; + pm_idle = omap2_pm_idle; return 0; } diff --git a/trunk/arch/arm/mach-omap2/pm34xx.c b/trunk/arch/arm/mach-omap2/pm34xx.c index b77df735fa6c..fc6987578920 100644 --- a/trunk/arch/arm/mach-omap2/pm34xx.c +++ b/trunk/arch/arm/mach-omap2/pm34xx.c @@ -418,9 +418,10 @@ void omap_sram_idle(void) static void omap3_pm_idle(void) { + local_irq_disable(); local_fiq_disable(); - if (omap_irq_pending()) + if (omap_irq_pending() || need_resched()) goto out; trace_power_start(POWER_CSTATE, 1, smp_processor_id()); @@ -433,6 +434,7 @@ static void omap3_pm_idle(void) out: local_fiq_enable(); + local_irq_enable(); } #ifdef CONFIG_SUSPEND @@ -846,7 +848,7 @@ static int __init omap3_pm_init(void) suspend_set_ops(&omap_pm_ops); #endif /* CONFIG_SUSPEND */ - arm_pm_idle = omap3_pm_idle; + pm_idle = omap3_pm_idle; omap3_idle_init(); /* diff --git a/trunk/arch/arm/mach-omap2/pm44xx.c b/trunk/arch/arm/mach-omap2/pm44xx.c index c840689df24a..c264ef7219c1 100644 --- a/trunk/arch/arm/mach-omap2/pm44xx.c +++ b/trunk/arch/arm/mach-omap2/pm44xx.c @@ -173,16 +173,18 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) * omap_default_idle - OMAP4 default ilde routine.' * * Implements OMAP4 memory, IO ordering requirements which can't be addressed - * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and + * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and * by secondary CPU with CONFIG_CPUIDLE. */ static void omap_default_idle(void) { + local_irq_disable(); local_fiq_disable(); omap_do_wfi(); local_fiq_enable(); + local_irq_enable(); } /** @@ -253,8 +255,8 @@ static int __init omap4_pm_init(void) suspend_set_ops(&omap_pm_ops); #endif /* CONFIG_SUSPEND */ - /* Overwrite the default cpu_do_idle() */ - arm_pm_idle = omap_default_idle; + /* Overwrite the default arch_idle() */ + pm_idle = omap_default_idle; omap4_idle_init(); diff --git a/trunk/arch/arm/mach-omap2/prm44xx.c b/trunk/arch/arm/mach-omap2/prm44xx.c index 33dd655e6aab..a1d6154dc120 100644 --- a/trunk/arch/arm/mach-omap2/prm44xx.c +++ b/trunk/arch/arm/mach-omap2/prm44xx.c @@ -19,6 +19,7 @@ #include "common.h" #include +#include #include #include "vp.h" diff --git a/trunk/arch/arm/mach-omap2/prm_common.c b/trunk/arch/arm/mach-omap2/prm_common.c index 873b51d494ea..860118ab43e2 100644 --- a/trunk/arch/arm/mach-omap2/prm_common.c +++ b/trunk/arch/arm/mach-omap2/prm_common.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include diff --git a/trunk/arch/arm/mach-omap2/serial.c b/trunk/arch/arm/mach-omap2/serial.c index 247d89478f24..f590afc1f673 100644 --- a/trunk/arch/arm/mach-omap2/serial.c +++ b/trunk/arch/arm/mach-omap2/serial.c @@ -107,18 +107,18 @@ static void omap_uart_set_noidle(struct platform_device *pdev) omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO); } -static void omap_uart_set_forceidle(struct platform_device *pdev) +static void omap_uart_set_smartidle(struct platform_device *pdev) { struct omap_device *od = to_omap_device(pdev); - omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE); + omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART); } #else static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable) {} static void omap_uart_set_noidle(struct platform_device *pdev) {} -static void omap_uart_set_forceidle(struct platform_device *pdev) {} +static void omap_uart_set_smartidle(struct platform_device *pdev) {} #endif /* CONFIG_PM */ #ifdef CONFIG_OMAP_MUX @@ -349,7 +349,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata, omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; omap_up.flags = UPF_BOOT_AUTOCONF; omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count; - omap_up.set_forceidle = omap_uart_set_forceidle; + omap_up.set_forceidle = omap_uart_set_smartidle; omap_up.set_noidle = omap_uart_set_noidle; omap_up.enable_wakeup = omap_uart_enable_wakeup; omap_up.dma_rx_buf_size = info->dma_rx_buf_size; diff --git a/trunk/arch/arm/mach-omap2/vc.c b/trunk/arch/arm/mach-omap2/vc.c index 031d116fbf10..175b7d86d86a 100644 --- a/trunk/arch/arm/mach-omap2/vc.c +++ b/trunk/arch/arm/mach-omap2/vc.c @@ -247,7 +247,7 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) * omap_vc_i2c_init - initialize I2C interface to PMIC * @voltdm: voltage domain containing VC data * - * Use PMIC supplied seetings for I2C high-speed mode and + * Use PMIC supplied settings for I2C high-speed mode and * master code (if set) and program the VC I2C configuration * register. * @@ -265,8 +265,8 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) if (initialized) { if (voltdm->pmic->i2c_high_speed != i2c_high_speed) - pr_warn("%s: I2C config for all channels must match.", - __func__); + pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).", + __func__, voltdm->name, i2c_high_speed); return; } @@ -292,9 +292,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) u32 val; if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { - pr_err("%s: PMIC info requried to configure vc for" - "vdd_%s not populated.Hence cannot initialize vc\n", - __func__, voltdm->name); + pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name); return; } diff --git a/trunk/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/trunk/arch/arm/mach-omap2/voltagedomains3xxx_data.c index c005e2f5e383..57db2038b23c 100644 --- a/trunk/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/trunk/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -108,6 +108,7 @@ void __init omap3xxx_voltagedomains_init(void) * XXX Will depend on the process, validation, and binning * for the currently-running IC */ +#ifdef CONFIG_PM_OPP if (cpu_is_omap3630()) { omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; @@ -115,6 +116,7 @@ void __init omap3xxx_voltagedomains_init(void) omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; } +#endif if (cpu_is_omap3517() || cpu_is_omap3505()) voltdms = voltagedomains_am35xx; diff --git a/trunk/arch/arm/mach-omap2/voltagedomains44xx_data.c b/trunk/arch/arm/mach-omap2/voltagedomains44xx_data.c index 4e11d022595d..c3115f6853d4 100644 --- a/trunk/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/trunk/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -100,9 +100,11 @@ void __init omap44xx_voltagedomains_init(void) * XXX Will depend on the process, validation, and binning * for the currently-running IC */ +#ifdef CONFIG_PM_OPP omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data; omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data; omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data; +#endif for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) voltdm->sys_clk.name = sys_clk_name; diff --git a/trunk/arch/arm/mach-omap2/vp.c b/trunk/arch/arm/mach-omap2/vp.c index 807391d84a9d..0df88820978d 100644 --- a/trunk/arch/arm/mach-omap2/vp.c +++ b/trunk/arch/arm/mach-omap2/vp.c @@ -41,6 +41,11 @@ void __init omap_vp_init(struct voltagedomain *voltdm) u32 val, sys_clk_rate, timeout, waittime; u32 vddmin, vddmax, vstepmin, vstepmax; + if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { + pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name); + return; + } + if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); diff --git a/trunk/arch/arm/mach-orion5x/common.c b/trunk/arch/arm/mach-orion5x/common.c index 0e28bae20bd4..5dad38ec00ea 100644 --- a/trunk/arch/arm/mach-orion5x/common.c +++ b/trunk/arch/arm/mach-orion5x/common.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -72,7 +73,8 @@ void __init orion5x_map_io(void) ****************************************************************************/ void __init orion5x_ehci0_init(void) { - orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL); + orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL, + EHCI_PHY_ORION); } diff --git a/trunk/arch/arm/mach-orion5x/include/mach/system.h b/trunk/arch/arm/mach-orion5x/include/mach/system.h new file mode 100644 index 000000000000..825a2650cefa --- /dev/null +++ b/trunk/arch/arm/mach-orion5x/include/mach/system.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-orion5x/include/mach/system.h + * + * Tzachi Perelstein + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-picoxcell/include/mach/system.h b/trunk/arch/arm/mach-picoxcell/include/mach/system.h new file mode 100644 index 000000000000..1a5d8cb57df4 --- /dev/null +++ b/trunk/arch/arm/mach-picoxcell/include/mach/system.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching and wait for interrupt + * tricks. + */ + cpu_do_idle(); +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-pnx4008/include/mach/system.h b/trunk/arch/arm/mach-pnx4008/include/mach/system.h new file mode 100644 index 000000000000..60cfe7188091 --- /dev/null +++ b/trunk/arch/arm/mach-pnx4008/include/mach/system.h @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-pnx4008/include/mach/system.h + * + * Copyright (C) 2003 Philips Semiconductors + * Copyright (C) 2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-prima2/include/mach/system.h b/trunk/arch/arm/mach-prima2/include/mach/system.h new file mode 100644 index 000000000000..2c7d2a9d0c92 --- /dev/null +++ b/trunk/arch/arm/mach-prima2/include/mach/system.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-prima2/include/mach/system.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_SYSTEM_H__ +#define __MACH_SYSTEM_H__ + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-pxa/hx4700.c b/trunk/arch/arm/mach-pxa/hx4700.c index fb9b62dcf4ca..de877a9d3e4c 100644 --- a/trunk/arch/arm/mach-pxa/hx4700.c +++ b/trunk/arch/arm/mach-pxa/hx4700.c @@ -704,10 +704,9 @@ static void hx4700_set_vpp(struct platform_device *pdev, int vpp) gpio_set_value(GPIO91_HX4700_FLASH_VPEN, vpp); } -static struct resource strataflash_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_128M - 1, - .flags = IORESOURCE_MEM, +static struct resource strataflash_resource[] = { + [0] = DEFINE_RES_MEM(PXA_CS0_PHYS, SZ_64M), + [1] = DEFINE_RES_MEM(PXA_CS0_PHYS + SZ_64M, SZ_64M), }; static struct physmap_flash_data strataflash_data = { @@ -718,8 +717,8 @@ static struct physmap_flash_data strataflash_data = { static struct platform_device strataflash = { .name = "physmap-flash", .id = -1, - .resource = &strataflash_resource, - .num_resources = 1, + .resource = strataflash_resource, + .num_resources = ARRAY_SIZE(strataflash_resource), .dev = { .platform_data = &strataflash_data, }, diff --git a/trunk/arch/arm/mach-pxa/include/mach/system.h b/trunk/arch/arm/mach-pxa/include/mach/system.h new file mode 100644 index 000000000000..c5afacd3cc0b --- /dev/null +++ b/trunk/arch/arm/mach-pxa/include/mach/system.h @@ -0,0 +1,15 @@ +/* + * arch/arm/mach-pxa/include/mach/system.h + * + * Author: Nicolas Pitre + * Created: Jun 15, 2001 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-realview/core.h b/trunk/arch/arm/mach-realview/core.h index f8f2c0ac4c01..735b57aaf2d6 100644 --- a/trunk/arch/arm/mach-realview/core.h +++ b/trunk/arch/arm/mach-realview/core.h @@ -28,11 +28,21 @@ #include #include -#define APB_DEVICE(name, busid, base, plat) \ -static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) - -#define AHB_DEVICE(name, busid, base, plat) \ -static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) +#define AMBA_DEVICE(name,busid,base,plat) \ +static struct amba_device name##_device = { \ + .dev = { \ + .coherent_dma_mask = ~0, \ + .init_name = busid, \ + .platform_data = plat, \ + }, \ + .res = { \ + .start = REALVIEW_##base##_BASE, \ + .end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \ + .flags = IORESOURCE_MEM, \ + }, \ + .dma_mask = ~0, \ + .irq = base##_IRQ, \ +} struct machine_desc; diff --git a/trunk/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/trunk/arch/arm/mach-realview/include/mach/irqs-pb1176.h index 708f84156f2c..5c3c625e3e04 100644 --- a/trunk/arch/arm/mach-realview/include/mach/irqs-pb1176.h +++ b/trunk/arch/arm/mach-realview/include/mach/irqs-pb1176.h @@ -40,7 +40,6 @@ #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ -#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16) #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ @@ -74,6 +73,7 @@ #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ +#define IRQ_PB1176_GPIO0 -1 #define IRQ_PB1176_SCTL -1 #define NR_GIC_PB1176 2 diff --git a/trunk/arch/arm/mach-realview/include/mach/system.h b/trunk/arch/arm/mach-realview/include/mach/system.h new file mode 100644 index 000000000000..471b671159ce --- /dev/null +++ b/trunk/arch/arm/mach-realview/include/mach/system.h @@ -0,0 +1,33 @@ +/* + * arch/arm/mach-realview/include/mach/system.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-realview/realview_eb.c b/trunk/arch/arm/mach-realview/realview_eb.c index 157e1bc6e83c..9578145f2df0 100644 --- a/trunk/arch/arm/mach-realview/realview_eb.c +++ b/trunk/arch/arm/mach-realview/realview_eb.c @@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * These devices are connected via the core APB bridge */ -#define GPIO2_IRQ { IRQ_EB_GPIO2 } -#define GPIO3_IRQ { IRQ_EB_GPIO3 } +#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } -#define AACI_IRQ { IRQ_EB_AACI } +#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } -#define KMI0_IRQ { IRQ_EB_KMI0 } -#define KMI1_IRQ { IRQ_EB_KMI1 } +#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } /* * These devices are connected directly to the multi-layer AHB switch */ -#define EB_SMC_IRQ { } -#define MPMC_IRQ { } -#define EB_CLCD_IRQ { IRQ_EB_CLCD } -#define DMAC_IRQ { IRQ_EB_DMA } +#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } +#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } /* * These devices are connected via the core APB bridge */ -#define SCTL_IRQ { } -#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } -#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } -#define GPIO1_IRQ { IRQ_EB_GPIO1 } -#define EB_RTC_IRQ { IRQ_EB_RTC } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } +#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } +#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } /* * These devices are connected via the DMA APB bridge */ -#define SCI_IRQ { IRQ_EB_SCI } -#define EB_UART0_IRQ { IRQ_EB_UART0 } -#define EB_UART1_IRQ { IRQ_EB_UART1 } -#define EB_UART2_IRQ { IRQ_EB_UART2 } -#define EB_UART3_IRQ { IRQ_EB_UART3 } -#define EB_SSP_IRQ { IRQ_EB_SSP } +#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } +#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } +#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } +#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } +#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } +#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL); -AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); +AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL); +AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); +AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/trunk/arch/arm/mach-realview/realview_pb1176.c b/trunk/arch/arm/mach-realview/realview_pb1176.c index b1d7cafa1a6d..e4abe94fb11a 100644 --- a/trunk/arch/arm/mach-realview/realview_pb1176.c +++ b/trunk/arch/arm/mach-realview/realview_pb1176.c @@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * RealView PB1176 AMBA devices */ -#define GPIO2_IRQ { IRQ_PB1176_GPIO2 } -#define GPIO3_IRQ { IRQ_PB1176_GPIO3 } -#define AACI_IRQ { IRQ_PB1176_AACI } +#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } +#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } -#define KMI0_IRQ { IRQ_PB1176_KMI0 } -#define KMI1_IRQ { IRQ_PB1176_KMI1 } -#define PB1176_SMC_IRQ { } -#define MPMC_IRQ { } -#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } -#define SCTL_IRQ { } -#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } -#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } -#define GPIO1_IRQ { IRQ_PB1176_GPIO1 } -#define PB1176_RTC_IRQ { IRQ_DC1176_RTC } -#define SCI_IRQ { IRQ_PB1176_SCI } -#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } -#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } -#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } -#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } -#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } -#define PB1176_SSP_IRQ { IRQ_DC1176_SSP } +#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } +#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } +#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } +#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } +#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } +#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } +#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } +#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } +#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } +#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } +#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); -APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); -AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); +AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); +AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); +AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); static struct amba_device *amba_devs[] __initdata = { &uart0_device, diff --git a/trunk/arch/arm/mach-realview/realview_pb11mp.c b/trunk/arch/arm/mach-realview/realview_pb11mp.c index ae7fe54f6eb6..2147335f66f5 100644 --- a/trunk/arch/arm/mach-realview/realview_pb11mp.c +++ b/trunk/arch/arm/mach-realview/realview_pb11mp.c @@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PB11MPCore AMBA devices */ -#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } -#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } -#define AACI_IRQ { IRQ_TC11MP_AACI } +#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } +#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } -#define KMI0_IRQ { IRQ_TC11MP_KMI0 } -#define KMI1_IRQ { IRQ_TC11MP_KMI1 } -#define PB11MP_SMC_IRQ { } -#define MPMC_IRQ { } -#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } -#define DMAC_IRQ { IRQ_PB11MP_DMAC } -#define SCTL_IRQ { } -#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } -#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } -#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } -#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } -#define SCI_IRQ { IRQ_PB11MP_SCI } -#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } -#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } -#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } -#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } -#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } +#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } +#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } +#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } +#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } +#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } +#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } +#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } +#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } +#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } +#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } +#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); +AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); /* Primecells on the NEC ISSP chip */ -AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); +AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); +AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/trunk/arch/arm/mach-realview/realview_pba8.c b/trunk/arch/arm/mach-realview/realview_pba8.c index 59650174e6ed..25b2e59296f8 100644 --- a/trunk/arch/arm/mach-realview/realview_pba8.c +++ b/trunk/arch/arm/mach-realview/realview_pba8.c @@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PBA8Core AMBA devices */ -#define GPIO2_IRQ { IRQ_PBA8_GPIO2 } -#define GPIO3_IRQ { IRQ_PBA8_GPIO3 } -#define AACI_IRQ { IRQ_PBA8_AACI } +#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } +#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } -#define KMI0_IRQ { IRQ_PBA8_KMI0 } -#define KMI1_IRQ { IRQ_PBA8_KMI1 } -#define PBA8_SMC_IRQ { } -#define MPMC_IRQ { } -#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD } -#define DMAC_IRQ { IRQ_PBA8_DMAC } -#define SCTL_IRQ { } -#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG } -#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 } -#define GPIO1_IRQ { IRQ_PBA8_GPIO1 } -#define PBA8_RTC_IRQ { IRQ_PBA8_RTC } -#define SCI_IRQ { IRQ_PBA8_SCI } -#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 } -#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 } -#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 } -#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 } -#define PBA8_SSP_IRQ { IRQ_PBA8_SSP } +#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } +#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } +#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } +#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } +#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } +#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } +#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } +#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } +#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } +#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } +#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); +AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); /* Primecells on the NEC ISSP chip */ -AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); +AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); +AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/trunk/arch/arm/mach-realview/realview_pbx.c b/trunk/arch/arm/mach-realview/realview_pbx.c index 1cd9956f5875..ac715645b860 100644 --- a/trunk/arch/arm/mach-realview/realview_pbx.c +++ b/trunk/arch/arm/mach-realview/realview_pbx.c @@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PBXCore AMBA devices */ -#define GPIO2_IRQ { IRQ_PBX_GPIO2 } -#define GPIO3_IRQ { IRQ_PBX_GPIO3 } -#define AACI_IRQ { IRQ_PBX_AACI } +#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } +#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } -#define KMI0_IRQ { IRQ_PBX_KMI0 } -#define KMI1_IRQ { IRQ_PBX_KMI1 } -#define PBX_SMC_IRQ { } -#define MPMC_IRQ { } -#define PBX_CLCD_IRQ { IRQ_PBX_CLCD } -#define DMAC_IRQ { IRQ_PBX_DMAC } -#define SCTL_IRQ { } -#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG } -#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 } -#define GPIO1_IRQ { IRQ_PBX_GPIO1 } -#define PBX_RTC_IRQ { IRQ_PBX_RTC } -#define SCI_IRQ { IRQ_PBX_SCI } -#define PBX_UART0_IRQ { IRQ_PBX_UART0 } -#define PBX_UART1_IRQ { IRQ_PBX_UART1 } -#define PBX_UART2_IRQ { IRQ_PBX_UART2 } -#define PBX_UART3_IRQ { IRQ_PBX_UART3 } -#define PBX_SSP_IRQ { IRQ_PBX_SSP } +#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } +#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } +#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } +#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } +#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } +#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } +#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } +#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } +#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } +#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } +#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); +AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); /* Primecells on the NEC ISSP chip */ -AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); +AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); +AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/trunk/arch/arm/mach-rpc/include/mach/system.h b/trunk/arch/arm/mach-rpc/include/mach/system.h new file mode 100644 index 000000000000..359bab94b6af --- /dev/null +++ b/trunk/arch/arm/mach-rpc/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-rpc/include/mach/system.h + * + * Copyright (C) 1996-1999 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-s3c2410/cpu-freq.c b/trunk/arch/arm/mach-s3c2410/cpu-freq.c index 7dc6c46b5e2b..5404535da1a5 100644 --- a/trunk/arch/arm/mach-s3c2410/cpu-freq.c +++ b/trunk/arch/arm/mach-s3c2410/cpu-freq.c @@ -115,7 +115,8 @@ static struct s3c_cpufreq_info s3c2410_cpufreq_info = { .debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs), }; -static int s3c2410_cpufreq_add(struct device *dev) +static int s3c2410_cpufreq_add(struct device *dev, + struct subsys_interface *sif) { return s3c_cpufreq_register(&s3c2410_cpufreq_info); } @@ -133,7 +134,8 @@ static int __init s3c2410_cpufreq_init(void) arch_initcall(s3c2410_cpufreq_init); -static int s3c2410a_cpufreq_add(struct device *dev) +static int s3c2410a_cpufreq_add(struct device *dev, + struct subsys_interface *sif) { /* alter the maximum freq settings for S3C2410A. If a board knows * it only has a maximum of 200, then it should register its own @@ -144,7 +146,7 @@ static int s3c2410a_cpufreq_add(struct device *dev) s3c2410_cpufreq_info.max.pclk = 66500000; s3c2410_cpufreq_info.name = "s3c2410a"; - return s3c2410_cpufreq_add(dev); + return s3c2410_cpufreq_add(dev, sif); } static struct subsys_interface s3c2410a_cpufreq_interface = { diff --git a/trunk/arch/arm/mach-s3c2410/dma.c b/trunk/arch/arm/mach-s3c2410/dma.c index 2afd00014a77..4803338cf56e 100644 --- a/trunk/arch/arm/mach-s3c2410/dma.c +++ b/trunk/arch/arm/mach-s3c2410/dma.c @@ -132,7 +132,8 @@ static struct s3c24xx_dma_order __initdata s3c2410_dma_order = { }, }; -static int __init s3c2410_dma_add(struct device *dev) +static int __init s3c2410_dma_add(struct device *dev, + struct subsys_interface *sif) { s3c2410_dma_init(); s3c24xx_dma_order_set(&s3c2410_dma_order); @@ -148,7 +149,7 @@ static struct subsys_interface s3c2410_dma_interface = { static int __init s3c2410_dma_drvinit(void) { - return subsys_interface_register(&s3c2410_interface); + return subsys_interface_register(&s3c2410_dma_interface); } arch_initcall(s3c2410_dma_drvinit); diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/system.h b/trunk/arch/arm/mach-s3c2410/include/mach/system.h new file mode 100644 index 000000000000..5e215c1a5c8f --- /dev/null +++ b/trunk/arch/arm/mach-s3c2410/include/mach/system.h @@ -0,0 +1,54 @@ +/* arch/arm/mach-s3c2410/include/mach/system.h + * + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks + * + * S3C2410 - System function defines and includes + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include + +#include +#include + +#include + +void (*s3c24xx_idle)(void); + +void s3c24xx_default_idle(void) +{ + unsigned long tmp; + int i; + + /* idle the system by using the idle mode which will wait for an + * interrupt to happen before restarting the system. + */ + + /* Warning: going into idle state upsets jtag scanning */ + + __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, + S3C2410_CLKCON); + + /* the samsung port seems to do a loop and then unset idle.. */ + for (i = 0; i < 50; i++) { + tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ + } + + /* this bit is not cleared on re-start... */ + + __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, + S3C2410_CLKCON); +} + +static void arch_idle(void) +{ + if (s3c24xx_idle != NULL) + (s3c24xx_idle)(); + else + s3c24xx_default_idle(); +} diff --git a/trunk/arch/arm/mach-s3c2410/pll.c b/trunk/arch/arm/mach-s3c2410/pll.c index c07438bfc99f..e0b3b347da82 100644 --- a/trunk/arch/arm/mach-s3c2410/pll.c +++ b/trunk/arch/arm/mach-s3c2410/pll.c @@ -66,7 +66,7 @@ static struct cpufreq_frequency_table pll_vals_12MHz[] = { { .frequency = 270000000, .index = PLLVAL(127, 1, 1), }, }; -static int s3c2410_plls_add(struct device *dev) +static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif) { return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz)); } diff --git a/trunk/arch/arm/mach-s3c2410/pm.c b/trunk/arch/arm/mach-s3c2410/pm.c index fda5385deff6..03f706dd6009 100644 --- a/trunk/arch/arm/mach-s3c2410/pm.c +++ b/trunk/arch/arm/mach-s3c2410/pm.c @@ -111,7 +111,7 @@ struct syscore_ops s3c2410_pm_syscore_ops = { .resume = s3c2410_pm_resume, }; -static int s3c2410_pm_add(struct device *dev) +static int s3c2410_pm_add(struct device *dev, struct subsys_interface *sif) { pm_cpu_prep = s3c2410_pm_prepare; pm_cpu_sleep = s3c2410_cpu_suspend; diff --git a/trunk/arch/arm/mach-s3c2412/cpu-freq.c b/trunk/arch/arm/mach-s3c2412/cpu-freq.c index d8664b7652ce..125be7d5fa60 100644 --- a/trunk/arch/arm/mach-s3c2412/cpu-freq.c +++ b/trunk/arch/arm/mach-s3c2412/cpu-freq.c @@ -194,7 +194,8 @@ static struct s3c_cpufreq_info s3c2412_cpufreq_info = { .debug_io_show = s3c_cpufreq_debugfs_call(s3c2412_iotiming_debugfs), }; -static int s3c2412_cpufreq_add(struct device *dev) +static int s3c2412_cpufreq_add(struct device *dev, + struct subsys_interface *sif) { unsigned long fclk_rate; diff --git a/trunk/arch/arm/mach-s3c2412/dma.c b/trunk/arch/arm/mach-s3c2412/dma.c index 142acd3b5e15..38472ac920ff 100644 --- a/trunk/arch/arm/mach-s3c2412/dma.c +++ b/trunk/arch/arm/mach-s3c2412/dma.c @@ -159,7 +159,8 @@ static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { .map_size = ARRAY_SIZE(s3c2412_dma_mappings), }; -static int __init s3c2412_dma_add(struct device *dev) +static int __init s3c2412_dma_add(struct device *dev, + struct subsys_interface *sif) { s3c2410_dma_init(); return s3c24xx_dma_init_map(&s3c2412_dma_sel); diff --git a/trunk/arch/arm/mach-s3c2412/irq.c b/trunk/arch/arm/mach-s3c2412/irq.c index a8a46c1644f4..e65619ddbccc 100644 --- a/trunk/arch/arm/mach-s3c2412/irq.c +++ b/trunk/arch/arm/mach-s3c2412/irq.c @@ -170,7 +170,7 @@ static int s3c2412_irq_rtc_wake(struct irq_data *data, unsigned int state) static struct irq_chip s3c2412_irq_rtc_chip; -static int s3c2412_irq_add(struct device *dev) +static int s3c2412_irq_add(struct device *dev, struct subsys_interface *sif) { unsigned int irqno; diff --git a/trunk/arch/arm/mach-s3c2412/pm.c b/trunk/arch/arm/mach-s3c2412/pm.c index d1adfa65f66d..d04588506ec4 100644 --- a/trunk/arch/arm/mach-s3c2412/pm.c +++ b/trunk/arch/arm/mach-s3c2412/pm.c @@ -56,7 +56,7 @@ static void s3c2412_pm_prepare(void) { } -static int s3c2412_pm_add(struct device *dev) +static int s3c2412_pm_add(struct device *dev, struct subsys_interface *sif) { pm_cpu_prep = s3c2412_pm_prepare; pm_cpu_sleep = s3c2412_cpu_suspend; diff --git a/trunk/arch/arm/mach-s3c2412/s3c2412.c b/trunk/arch/arm/mach-s3c2412/s3c2412.c index c6eac9871093..aff6e85a97c6 100644 --- a/trunk/arch/arm/mach-s3c2412/s3c2412.c +++ b/trunk/arch/arm/mach-s3c2412/s3c2412.c @@ -32,6 +32,8 @@ #include #include +#include + #include #include @@ -162,7 +164,7 @@ void __init s3c2412_map_io(void) /* set our idle function */ - arm_pm_idle = s3c2412_idle; + s3c24xx_idle = s3c2412_idle; /* register our io-tables */ diff --git a/trunk/arch/arm/mach-s3c2416/irq.c b/trunk/arch/arm/mach-s3c2416/irq.c index 36df761061de..fd49f35e448e 100644 --- a/trunk/arch/arm/mach-s3c2416/irq.c +++ b/trunk/arch/arm/mach-s3c2416/irq.c @@ -213,7 +213,8 @@ static int __init s3c2416_add_sub(unsigned int base, return 0; } -static int __init s3c2416_irq_add(struct device *dev) +static int __init s3c2416_irq_add(struct device *dev, + struct subsys_interface *sif) { printk(KERN_INFO "S3C2416: IRQ Support\n"); diff --git a/trunk/arch/arm/mach-s3c2416/pm.c b/trunk/arch/arm/mach-s3c2416/pm.c index 3bdb15a0d419..1bd4817b8eb8 100644 --- a/trunk/arch/arm/mach-s3c2416/pm.c +++ b/trunk/arch/arm/mach-s3c2416/pm.c @@ -48,7 +48,7 @@ static void s3c2416_pm_prepare(void) __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1); } -static int s3c2416_pm_add(struct device *dev) +static int s3c2416_pm_add(struct device *dev, struct subsys_interface *sif) { pm_cpu_prep = s3c2416_pm_prepare; pm_cpu_sleep = s3c2416_cpu_suspend; diff --git a/trunk/arch/arm/mach-s3c2416/s3c2416.c b/trunk/arch/arm/mach-s3c2416/s3c2416.c index 08bb0355159d..5287d2808d3e 100644 --- a/trunk/arch/arm/mach-s3c2416/s3c2416.c +++ b/trunk/arch/arm/mach-s3c2416/s3c2416.c @@ -44,6 +44,7 @@ #include #include +#include #include #include @@ -87,6 +88,8 @@ int __init s3c2416_init(void) { printk(KERN_INFO "S3C2416: Initializing architecture\n"); + /* s3c24xx_idle = s3c2416_idle; */ + /* change WDT IRQ number */ s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; diff --git a/trunk/arch/arm/mach-s3c2440/clock.c b/trunk/arch/arm/mach-s3c2440/clock.c index bedbc87a3426..414364eb426c 100644 --- a/trunk/arch/arm/mach-s3c2440/clock.c +++ b/trunk/arch/arm/mach-s3c2440/clock.c @@ -149,7 +149,7 @@ static struct clk_lookup s3c2440_clk_lookup[] = { CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), }; -static int s3c2440_clk_add(struct device *dev) +static int s3c2440_clk_add(struct device *dev, struct subsys_interface *sif) { struct clk *clock_upll; struct clk *clock_h; diff --git a/trunk/arch/arm/mach-s3c2440/dma.c b/trunk/arch/arm/mach-s3c2440/dma.c index 15b1ddf8f626..5f0a0c8ef84f 100644 --- a/trunk/arch/arm/mach-s3c2440/dma.c +++ b/trunk/arch/arm/mach-s3c2440/dma.c @@ -174,7 +174,8 @@ static struct s3c24xx_dma_order __initdata s3c2440_dma_order = { }, }; -static int __init s3c2440_dma_add(struct device *dev) +static int __init s3c2440_dma_add(struct device *dev, + struct subsys_interface *sif) { s3c2410_dma_init(); s3c24xx_dma_order_set(&s3c2440_dma_order); diff --git a/trunk/arch/arm/mach-s3c2440/irq.c b/trunk/arch/arm/mach-s3c2440/irq.c index 4fee9bc6bcb5..4a18cde439cc 100644 --- a/trunk/arch/arm/mach-s3c2440/irq.c +++ b/trunk/arch/arm/mach-s3c2440/irq.c @@ -92,7 +92,7 @@ static struct irq_chip s3c_irq_wdtac97 = { .irq_ack = s3c_irq_wdtac97_ack, }; -static int s3c2440_irq_add(struct device *dev) +static int s3c2440_irq_add(struct device *dev, struct subsys_interface *sif) { unsigned int irqno; diff --git a/trunk/arch/arm/mach-s3c2440/s3c2440-cpufreq.c b/trunk/arch/arm/mach-s3c2440/s3c2440-cpufreq.c index cf7596694efe..61776764d9f4 100644 --- a/trunk/arch/arm/mach-s3c2440/s3c2440-cpufreq.c +++ b/trunk/arch/arm/mach-s3c2440/s3c2440-cpufreq.c @@ -270,7 +270,8 @@ struct s3c_cpufreq_info s3c2440_cpufreq_info = { .debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs), }; -static int s3c2440_cpufreq_add(struct device *dev) +static int s3c2440_cpufreq_add(struct device *dev, + struct subsys_interface *sif) { xtal = s3c_cpufreq_clk_get(NULL, "xtal"); hclk = s3c_cpufreq_clk_get(NULL, "hclk"); diff --git a/trunk/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c b/trunk/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c index b5368ae8d7fe..551fb433be87 100644 --- a/trunk/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c +++ b/trunk/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c @@ -51,7 +51,7 @@ static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = { { .frequency = 400000000, .index = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */ }; -static int s3c2440_plls12_add(struct device *dev) +static int s3c2440_plls12_add(struct device *dev, struct subsys_interface *sif) { struct clk *xtal_clk; unsigned long xtal; diff --git a/trunk/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c b/trunk/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c index 42f2b5cd2399..3f15bcf64290 100644 --- a/trunk/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c +++ b/trunk/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c @@ -79,7 +79,8 @@ static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = { { .frequency = 402192000, .index = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */ }; -static int s3c2440_plls169344_add(struct device *dev) +static int s3c2440_plls169344_add(struct device *dev, + struct subsys_interface *sif) { struct clk *xtal_clk; unsigned long xtal; diff --git a/trunk/arch/arm/mach-s3c2440/s3c2442.c b/trunk/arch/arm/mach-s3c2440/s3c2442.c index 8004e0497bf4..22cb7c94a8c8 100644 --- a/trunk/arch/arm/mach-s3c2440/s3c2442.c +++ b/trunk/arch/arm/mach-s3c2440/s3c2442.c @@ -122,7 +122,7 @@ static struct clk s3c2442_clk_cam_upll = { }, }; -static int s3c2442_clk_add(struct device *dev) +static int s3c2442_clk_add(struct device *dev, struct subsys_interface *sif) { struct clk *clock_upll; struct clk *clock_h; diff --git a/trunk/arch/arm/mach-s3c2440/s3c244x-clock.c b/trunk/arch/arm/mach-s3c2440/s3c244x-clock.c index b3fdbdda3d5f..6d9b688c442b 100644 --- a/trunk/arch/arm/mach-s3c2440/s3c244x-clock.c +++ b/trunk/arch/arm/mach-s3c2440/s3c244x-clock.c @@ -72,7 +72,7 @@ static struct clk clk_arm = { }, }; -static int s3c244x_clk_add(struct device *dev) +static int s3c244x_clk_add(struct device *dev, struct subsys_interface *sif) { unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); unsigned long clkdivn; diff --git a/trunk/arch/arm/mach-s3c2440/s3c244x-irq.c b/trunk/arch/arm/mach-s3c2440/s3c244x-irq.c index 74d3dcf46a48..5fe8e58d3afd 100644 --- a/trunk/arch/arm/mach-s3c2440/s3c244x-irq.c +++ b/trunk/arch/arm/mach-s3c2440/s3c244x-irq.c @@ -91,7 +91,7 @@ static struct irq_chip s3c_irq_cam = { .irq_ack = s3c_irq_cam_ack, }; -static int s3c244x_irq_add(struct device *dev) +static int s3c244x_irq_add(struct device *dev, struct subsys_interface *sif) { unsigned int irqno; diff --git a/trunk/arch/arm/mach-s3c2443/dma.c b/trunk/arch/arm/mach-s3c2443/dma.c index de6b4a23c9ed..14224517e621 100644 --- a/trunk/arch/arm/mach-s3c2443/dma.c +++ b/trunk/arch/arm/mach-s3c2443/dma.c @@ -135,7 +135,8 @@ static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = { .map_size = ARRAY_SIZE(s3c2443_dma_mappings), }; -static int __init s3c2443_dma_add(struct device *dev) +static int __init s3c2443_dma_add(struct device *dev, + struct subsys_interface *sif) { s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100); return s3c24xx_dma_init_map(&s3c2443_dma_sel); diff --git a/trunk/arch/arm/mach-s3c2443/irq.c b/trunk/arch/arm/mach-s3c2443/irq.c index 35e4ff24fb43..ac2829f56d12 100644 --- a/trunk/arch/arm/mach-s3c2443/irq.c +++ b/trunk/arch/arm/mach-s3c2443/irq.c @@ -241,7 +241,8 @@ static int __init s3c2443_add_sub(unsigned int base, return 0; } -static int __init s3c2443_irq_add(struct device *dev) +static int __init s3c2443_irq_add(struct device *dev, + struct subsys_interface *sif) { printk("S3C2443: IRQ Support\n"); diff --git a/trunk/arch/arm/mach-s3c64xx/clock.c b/trunk/arch/arm/mach-s3c64xx/clock.c index 31bb27dc4aeb..aebbcc291b4e 100644 --- a/trunk/arch/arm/mach-s3c64xx/clock.c +++ b/trunk/arch/arm/mach-s3c64xx/clock.c @@ -138,6 +138,11 @@ static struct clk init_clocks_off[] = { .ctrlbit = S3C_CLKCON_PCLK_TSADC, }, { .name = "i2c", +#ifdef CONFIG_S3C_DEV_I2C1 + .devname = "s3c2440-i2c.0", +#else + .devname = "s3c2440-i2c", +#endif .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_IIC, diff --git a/trunk/arch/arm/mach-s3c64xx/common.c b/trunk/arch/arm/mach-s3c64xx/common.c index 4a7394d4bd9e..bee7dcd4df7c 100644 --- a/trunk/arch/arm/mach-s3c64xx/common.c +++ b/trunk/arch/arm/mach-s3c64xx/common.c @@ -49,7 +49,7 @@ /* uart registration process */ -void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) +static void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) { s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); } diff --git a/trunk/arch/arm/mach-s3c64xx/include/mach/system.h b/trunk/arch/arm/mach-s3c64xx/include/mach/system.h new file mode 100644 index 000000000000..353ed4389ae7 --- /dev/null +++ b/trunk/arch/arm/mach-s3c64xx/include/mach/system.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/system.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C6400 - system implementation + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_IRQ_H */ diff --git a/trunk/arch/arm/mach-s5p64x0/common.c b/trunk/arch/arm/mach-s5p64x0/common.c index 9143f8b19962..52b89a376447 100644 --- a/trunk/arch/arm/mach-s5p64x0/common.c +++ b/trunk/arch/arm/mach-s5p64x0/common.c @@ -146,12 +146,15 @@ static void s5p64x0_idle(void) { unsigned long val; - val = __raw_readl(S5P64X0_PWR_CFG); - val &= ~(0x3 << 5); - val |= (0x1 << 5); - __raw_writel(val, S5P64X0_PWR_CFG); + if (!need_resched()) { + val = __raw_readl(S5P64X0_PWR_CFG); + val &= ~(0x3 << 5); + val |= (0x1 << 5); + __raw_writel(val, S5P64X0_PWR_CFG); - cpu_do_idle(); + cpu_do_idle(); + } + local_irq_enable(); } /* @@ -283,7 +286,7 @@ int __init s5p64x0_init(void) printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); /* set idle function */ - arm_pm_idle = s5p64x0_idle; + pm_idle = s5p64x0_idle; return device_register(&s5p64x0_dev); } diff --git a/trunk/arch/arm/mach-s5p64x0/dma.c b/trunk/arch/arm/mach-s5p64x0/dma.c index f7f68ad77910..f820c0744405 100644 --- a/trunk/arch/arm/mach-s5p64x0/dma.c +++ b/trunk/arch/arm/mach-s5p64x0/dma.c @@ -108,22 +108,34 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = { .peri_id = s5p6450_pdma_peri, }; -AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA, - {IRQ_DMA0}, NULL); +struct amba_device s5p64x0_device_pdma = { + .dev = { + .init_name = "dma-pl330", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .res = { + .start = S5P64X0_PA_PDMA, + .end = S5P64X0_PA_PDMA + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_DMA0, NO_IRQ}, + .periphid = 0x00041330, +}; static int __init s5p64x0_dma_init(void) { if (soc_is_s5p6450()) { dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); - s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata; + s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; } else { dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); - s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata; + s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; } - amba_device_register(&s5p64x0_pdma_device, &iomem_resource); + amba_device_register(&s5p64x0_device_pdma, &iomem_resource); return 0; } diff --git a/trunk/arch/arm/mach-s5p64x0/include/mach/system.h b/trunk/arch/arm/mach-s5p64x0/include/mach/system.h new file mode 100644 index 000000000000..cf26e0954a2f --- /dev/null +++ b/trunk/arch/arm/mach-s5p64x0/include/mach/system.h @@ -0,0 +1,21 @@ +/* linux/arch/arm/mach-s5p64x0/include/mach/system.h + * + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5P64X0 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-s5p64x0/pm.c b/trunk/arch/arm/mach-s5p64x0/pm.c index 23f9b22439c9..9cba18bfe47b 100644 --- a/trunk/arch/arm/mach-s5p64x0/pm.c +++ b/trunk/arch/arm/mach-s5p64x0/pm.c @@ -160,7 +160,7 @@ static void s5p64x0_pm_prepare(void) } -static int s5p64x0_pm_add(struct device *dev) +static int s5p64x0_pm_add(struct device *dev, struct subsys_interface *sif) { pm_cpu_prep = s5p64x0_pm_prepare; pm_cpu_sleep = s5p64x0_cpu_suspend; diff --git a/trunk/arch/arm/mach-s5pc100/common.c b/trunk/arch/arm/mach-s5pc100/common.c index ff71e2d467c6..c9095730a7f5 100644 --- a/trunk/arch/arm/mach-s5pc100/common.c +++ b/trunk/arch/arm/mach-s5pc100/common.c @@ -129,6 +129,14 @@ static struct map_desc s5pc100_iodesc[] __initdata = { } }; +static void s5pc100_idle(void) +{ + if (!need_resched()) + cpu_do_idle(); + + local_irq_enable(); +} + /* * s5pc100_map_io * @@ -202,6 +210,10 @@ core_initcall(s5pc100_core_init); int __init s5pc100_init(void) { printk(KERN_INFO "S5PC100: Initializing architecture\n"); + + /* set idle function */ + pm_idle = s5pc100_idle; + return device_register(&s5pc100_dev); } diff --git a/trunk/arch/arm/mach-s5pc100/dma.c b/trunk/arch/arm/mach-s5pc100/dma.c index 96b1ab3dcd48..c841f4d313f2 100644 --- a/trunk/arch/arm/mach-s5pc100/dma.c +++ b/trunk/arch/arm/mach-s5pc100/dma.c @@ -73,8 +73,21 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = { .peri_id = pdma0_peri, }; -AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0, - {IRQ_PDMA0}, &s5pc100_pdma0_pdata); +struct amba_device s5pc100_device_pdma0 = { + .dev = { + .init_name = "dma-pl330.0", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pc100_pdma0_pdata, + }, + .res = { + .start = S5PC100_PA_PDMA0, + .end = S5PC100_PA_PDMA0 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA0, NO_IRQ}, + .periphid = 0x00041330, +}; u8 pdma1_peri[] = { DMACH_UART0_RX, @@ -114,18 +127,31 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = { .peri_id = pdma1_peri, }; -AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1, - {IRQ_PDMA1}, &s5pc100_pdma1_pdata); +struct amba_device s5pc100_device_pdma1 = { + .dev = { + .init_name = "dma-pl330.1", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pc100_pdma1_pdata, + }, + .res = { + .start = S5PC100_PA_PDMA1, + .end = S5PC100_PA_PDMA1 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA1, NO_IRQ}, + .periphid = 0x00041330, +}; static int __init s5pc100_dma_init(void) { dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); - amba_device_register(&s5pc100_pdma0_device, &iomem_resource); + amba_device_register(&s5pc100_device_pdma0, &iomem_resource); dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); - amba_device_register(&s5pc100_pdma1_device, &iomem_resource); + amba_device_register(&s5pc100_device_pdma1, &iomem_resource); return 0; } diff --git a/trunk/arch/arm/mach-s5pc100/include/mach/system.h b/trunk/arch/arm/mach-s5pc100/include/mach/system.h new file mode 100644 index 000000000000..afc96c298518 --- /dev/null +++ b/trunk/arch/arm/mach-s5pc100/include/mach/system.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s5pc100/include/mach/system.h + * + * Copyright 2009 Samsung Electronics Co. + * Byungho Min + * + * S5PC100 - system implementation + * + * Based on mach-s3c6400/include/mach/system.h + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_IRQ_H */ diff --git a/trunk/arch/arm/mach-s5pv210/clock.c b/trunk/arch/arm/mach-s5pv210/clock.c index c78dfddd77fd..b9ec0c35379f 100644 --- a/trunk/arch/arm/mach-s5pv210/clock.c +++ b/trunk/arch/arm/mach-s5pv210/clock.c @@ -175,7 +175,7 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable) return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable); } -static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable) +static int s5pv210_clk_hdmiphy_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); } @@ -372,7 +372,7 @@ static struct clk init_clocks_off[] = { }, { .name = "hdmiphy", .devname = "s5pv210-hdmi", - .enable = exynos4_clk_hdmiphy_ctrl, + .enable = s5pv210_clk_hdmiphy_ctrl, .ctrlbit = (1 << 0), }, { .name = "dacphy", diff --git a/trunk/arch/arm/mach-s5pv210/common.c b/trunk/arch/arm/mach-s5pv210/common.c index 4c9e9027df9a..9c1bcdcc12c3 100644 --- a/trunk/arch/arm/mach-s5pv210/common.c +++ b/trunk/arch/arm/mach-s5pv210/common.c @@ -142,6 +142,14 @@ static struct map_desc s5pv210_iodesc[] __initdata = { } }; +static void s5pv210_idle(void) +{ + if (!need_resched()) + cpu_do_idle(); + + local_irq_enable(); +} + void s5pv210_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -239,6 +247,10 @@ core_initcall(s5pv210_core_init); int __init s5pv210_init(void) { printk(KERN_INFO "S5PV210: Initializing architecture\n"); + + /* set idle function */ + pm_idle = s5pv210_idle; + return device_register(&s5pv210_dev); } diff --git a/trunk/arch/arm/mach-s5pv210/dma.c b/trunk/arch/arm/mach-s5pv210/dma.c index f6885d247d14..a6113e0267f2 100644 --- a/trunk/arch/arm/mach-s5pv210/dma.c +++ b/trunk/arch/arm/mach-s5pv210/dma.c @@ -71,8 +71,21 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = { .peri_id = pdma0_peri, }; -AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0, - {IRQ_PDMA0}, &s5pv210_pdma0_pdata); +struct amba_device s5pv210_device_pdma0 = { + .dev = { + .init_name = "dma-pl330.0", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pv210_pdma0_pdata, + }, + .res = { + .start = S5PV210_PA_PDMA0, + .end = S5PV210_PA_PDMA0 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA0, NO_IRQ}, + .periphid = 0x00041330, +}; u8 pdma1_peri[] = { DMACH_UART0_RX, @@ -114,18 +127,31 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = { .peri_id = pdma1_peri, }; -AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1, - {IRQ_PDMA1}, &s5pv210_pdma1_pdata); +struct amba_device s5pv210_device_pdma1 = { + .dev = { + .init_name = "dma-pl330.1", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pv210_pdma1_pdata, + }, + .res = { + .start = S5PV210_PA_PDMA1, + .end = S5PV210_PA_PDMA1 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA1, NO_IRQ}, + .periphid = 0x00041330, +}; static int __init s5pv210_dma_init(void) { dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); - amba_device_register(&s5pv210_pdma0_device, &iomem_resource); + amba_device_register(&s5pv210_device_pdma0, &iomem_resource); dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); - amba_device_register(&s5pv210_pdma1_device, &iomem_resource); + amba_device_register(&s5pv210_device_pdma1, &iomem_resource); return 0; } diff --git a/trunk/arch/arm/mach-s5pv210/include/mach/system.h b/trunk/arch/arm/mach-s5pv210/include/mach/system.h new file mode 100644 index 000000000000..bf288ced860a --- /dev/null +++ b/trunk/arch/arm/mach-s5pv210/include/mach/system.h @@ -0,0 +1,21 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/system.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-s5pv210/pm.c b/trunk/arch/arm/mach-s5pv210/pm.c index 677c71c41e50..736bfb103cbc 100644 --- a/trunk/arch/arm/mach-s5pv210/pm.c +++ b/trunk/arch/arm/mach-s5pv210/pm.c @@ -133,7 +133,7 @@ static void s5pv210_pm_prepare(void) s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); } -static int s5pv210_pm_add(struct device *dev) +static int s5pv210_pm_add(struct device *dev, struct subsys_interface *sif) { pm_cpu_prep = s5pv210_pm_prepare; pm_cpu_sleep = s5pv210_cpu_suspend; diff --git a/trunk/arch/arm/mach-sa1100/include/mach/system.h b/trunk/arch/arm/mach-sa1100/include/mach/system.h new file mode 100644 index 000000000000..e17b208f76d4 --- /dev/null +++ b/trunk/arch/arm/mach-sa1100/include/mach/system.h @@ -0,0 +1,9 @@ +/* + * arch/arm/mach-sa1100/include/mach/system.h + * + * Copyright (c) 1999 Nicolas Pitre + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-shark/core.c b/trunk/arch/arm/mach-shark/core.c index 6a2a7f2c2557..a851c254ad6c 100644 --- a/trunk/arch/arm/mach-shark/core.c +++ b/trunk/arch/arm/mach-shark/core.c @@ -149,16 +149,10 @@ static struct sys_timer shark_timer = { .init = shark_timer_init, }; -static void shark_init_early(void) -{ - disable_hlt(); -} - MACHINE_START(SHARK, "Shark") /* Maintainer: Alexander Schulz */ .atag_offset = 0x3000, .map_io = shark_map_io, - .init_early = shark_init_early, .init_irq = shark_init_irq, .timer = &shark_timer, .dma_zone_size = SZ_4M, diff --git a/trunk/arch/arm/mach-shark/include/mach/system.h b/trunk/arch/arm/mach-shark/include/mach/system.h new file mode 100644 index 000000000000..1b2f2c5050a8 --- /dev/null +++ b/trunk/arch/arm/mach-shark/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-shark/include/mach/system.h + * + * by Alexander Schulz + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ +} + +#endif diff --git a/trunk/arch/arm/mach-shmobile/board-ag5evm.c b/trunk/arch/arm/mach-shmobile/board-ag5evm.c index eff8a96c75ee..068b754bc348 100644 --- a/trunk/arch/arm/mach-shmobile/board-ag5evm.c +++ b/trunk/arch/arm/mach-shmobile/board-ag5evm.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -37,7 +38,6 @@ #include #include #include -#include #include