From e5fe2c7da5827a63c94a5c233b3e36e2b19f348b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 12 Jan 2010 13:48:27 +0900 Subject: [PATCH] --- yaml --- r: 181049 b: refs/heads/master c: ee2760ea58d81fc00bcc2137232ed9bc28202aec h: refs/heads/master i: 181047: fc3c2a095e43f1f9f5afb4679de002f591374dbf v: v3 --- [refs] | 2 +- trunk/arch/sh/Kconfig | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 16473f5bc154..6c9b19814a2c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 53e6d8e0060fe2bb9b11238f8250fdfbb0589425 +refs/heads/master: ee2760ea58d81fc00bcc2137232ed9bc28202aec diff --git a/trunk/arch/sh/Kconfig b/trunk/arch/sh/Kconfig index 2121fbb2ff4c..ae6c73689036 100644 --- a/trunk/arch/sh/Kconfig +++ b/trunk/arch/sh/Kconfig @@ -726,8 +726,9 @@ config GUSA_RB disabling interrupts around the atomic sequence. config SPARSE_IRQ - bool "Support sparse irq numbering" - depends on EXPERIMENTAL + def_bool y + depends on SUPERH32 && !SH_DREAMCAST && !SH_HIGHLANDER && \ + !SH_RTS7751R2D && !HD64461 && !SH_7724_SOLUTION_ENGINE help This enables support for sparse irqs. This is useful in general as most CPUs have a fairly sparse array of IRQ vectors, which