From e633a1b433989c1369692d5689cf2ad269350b16 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Wed, 24 Jan 2007 22:40:57 +0300 Subject: [PATCH] --- yaml --- r: 46817 b: refs/heads/master c: dbbb06b7f6ae8037a5f6b4498e492791e1929635 h: refs/heads/master i: 46815: cd38564ecb2fc971e9d667efa5d168d8de81175f v: v3 --- [refs] | 2 +- trunk/arch/powerpc/mm/mem.c | 20 ++++++++++---------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/[refs] b/[refs] index f63867bde583..7ae752753cf7 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: f25222b99542bcadf1cc53cc9aa0e304849242ca +refs/heads/master: dbbb06b7f6ae8037a5f6b4498e492791e1929635 diff --git a/trunk/arch/powerpc/mm/mem.c b/trunk/arch/powerpc/mm/mem.c index d1c0758c5611..c85eda63d2b3 100644 --- a/trunk/arch/powerpc/mm/mem.c +++ b/trunk/arch/powerpc/mm/mem.c @@ -490,19 +490,19 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, !cpu_has_feature(CPU_FTR_NOEXECUTE) && pfn_valid(pfn)) { struct page *page = pfn_to_page(pfn); +#ifdef CONFIG_8xx + /* On 8xx, cache control instructions (particularly + * "dcbst" from flush_dcache_icache) fault as write + * operation if there is an unpopulated TLB entry + * for the address in question. To workaround that, + * we invalidate the TLB here, thus avoiding dcbst + * misbehaviour. + */ + _tlbie(address); +#endif if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) { if (vma->vm_mm == current->active_mm) { -#ifdef CONFIG_8xx - /* On 8xx, cache control instructions (particularly - * "dcbst" from flush_dcache_icache) fault as write - * operation if there is an unpopulated TLB entry - * for the address in question. To workaround that, - * we invalidate the TLB here, thus avoiding dcbst - * misbehaviour. - */ - _tlbie(address); -#endif __flush_dcache_icache((void *) address); } else flush_dcache_icache_page(page);