From e7c65cb2eba16249cd075371a10a6b89d4a990b6 Mon Sep 17 00:00:00 2001
From: Stephen Warren <swarren@nvidia.com>
Date: Mon, 26 Mar 2012 16:49:39 -0600
Subject: [PATCH] --- yaml --- r: 308117 b: refs/heads/master c:
 18b81fb733356025a6ad48b85092a0456e348ff0 h: refs/heads/master i:   308115:
 c662b095c07f7a1132d94b2df5bee4254462bb26 v: v3

---
 [refs]                                       | 2 +-
 trunk/arch/arm/mach-tegra/board-dt-tegra30.c | 9 +++++++++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index b983f7892575..ff11efa1be3a 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 6437626928467e81aa4a3087d88cd3f443b3e9ec
+refs/heads/master: 18b81fb733356025a6ad48b85092a0456e348ff0
diff --git a/trunk/arch/arm/mach-tegra/board-dt-tegra30.c b/trunk/arch/arm/mach-tegra/board-dt-tegra30.c
index 5f7c03e972f3..3de21c0b5461 100644
--- a/trunk/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/trunk/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -57,6 +57,15 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
 static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
 	/* name		parent		rate		enabled */
 	{ "uarta",	"pll_p",	408000000,	true },
+	{ "pll_a",	"pll_p_out1",	564480000,	true },
+	{ "pll_a_out0",	"pll_a",	11289600,	true },
+	{ "extern1",	"pll_a_out0",	0,		true },
+	{ "clk_out_1",	"extern1",	0,		true },
+	{ "i2s0",	"pll_a_out0",	11289600,	false},
+	{ "i2s1",	"pll_a_out0",	11289600,	false},
+	{ "i2s2",	"pll_a_out0",	11289600,	false},
+	{ "i2s3",	"pll_a_out0",	11289600,	false},
+	{ "i2s4",	"pll_a_out0",	11289600,	false},
 	{ NULL,		NULL,		0,		0},
 };