From e7e554d54b6c06fa611a7d2fe84e31a8d141155e Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Tue, 22 May 2012 09:30:33 -0700 Subject: [PATCH] --- yaml --- r: 309374 b: refs/heads/master c: 89ba829e38bd500f438bc08af4229204c8ed7f35 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_pm.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 54d7d13d4da3..36a2b8663d3d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0af78a2bb4296839cfe7a855cd128e8687e77bc1 +refs/heads/master: 89ba829e38bd500f438bc08af4229204c8ed7f35 diff --git a/trunk/drivers/gpu/drm/i915/intel_pm.c b/trunk/drivers/gpu/drm/i915/intel_pm.c index bbca4e403b84..00462ef96627 100644 --- a/trunk/drivers/gpu/drm/i915/intel_pm.c +++ b/trunk/drivers/gpu/drm/i915/intel_pm.c @@ -2438,7 +2438,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10); I915_WRITE(GEN6_RP_CONTROL, GEN6_RP_MEDIA_TURBO | - GEN6_RP_MEDIA_HW_MODE | + GEN6_RP_MEDIA_HW_NORMAL_MODE | GEN6_RP_MEDIA_IS_GFX | GEN6_RP_ENABLE | GEN6_RP_UP_BUSY_AVG |