From e8074928962d0708c3137d0b786c8b5f1ef50b3d Mon Sep 17 00:00:00 2001 From: Eliezer Tamir Date: Thu, 28 Feb 2008 11:57:29 -0800 Subject: [PATCH] --- yaml --- r: 86495 b: refs/heads/master c: e8717a47266b1527e620ddf262613b9d010bbbe7 h: refs/heads/master i: 86493: 2fae78b83af6a7a3503deddf4df77b2b0385c8b0 86491: a4cb6a1557b0f09879e00605216a74a020ea925b 86487: e13a39c26ac7d39881636330e06b50a00649d20e 86479: 2a351704f42c537888d3d5f5e752d8deee5dcdd1 86463: af32b9bd9cbe1ca38e311133f055f37a56ad9d5b v: v3 --- [refs] | 2 +- trunk/drivers/net/bnx2x_init.h | 12 ++++++++---- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index 51a373b8d6a8..d07f4adf1717 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 228241eb58ad13e7cf2ddd9c92eabb5c3055cf5c +refs/heads/master: e8717a47266b1527e620ddf262613b9d010bbbe7 diff --git a/trunk/drivers/net/bnx2x_init.h b/trunk/drivers/net/bnx2x_init.h index 04f93bff2ef4..dcaecc53bdb1 100644 --- a/trunk/drivers/net/bnx2x_init.h +++ b/trunk/drivers/net/bnx2x_init.h @@ -1,6 +1,6 @@ /* bnx2x_init.h: Broadcom Everest network driver. * - * Copyright (c) 2007 Broadcom Corporation + * Copyright (c) 2007-2008 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -409,7 +409,7 @@ static void bnx2x_init_pxp(struct bnx2x *bp) pci_read_config_word(bp->pdev, bp->pcie_cap + PCI_EXP_DEVCTL, (u16 *)&val); - DP(NETIF_MSG_HW, "read 0x%x from devctl\n", val); + DP(NETIF_MSG_HW, "read 0x%x from devctl\n", (u16)val); w_order = ((val & PCI_EXP_DEVCTL_PAYLOAD) >> 5); r_order = ((val & PCI_EXP_DEVCTL_READRQ) >> 12); @@ -472,10 +472,14 @@ static void bnx2x_init_pxp(struct bnx2x *bp) REG_WR(bp, PXP2_REG_PSWRQ_BW_WR, val); REG_WR(bp, PXP2_REG_RQ_WR_MBS0, w_order); - REG_WR(bp, PXP2_REG_RQ_WR_MBS0 + 8, w_order); + REG_WR(bp, PXP2_REG_RQ_WR_MBS1, w_order); REG_WR(bp, PXP2_REG_RQ_RD_MBS0, r_order); - REG_WR(bp, PXP2_REG_RQ_RD_MBS0 + 8, r_order); + REG_WR(bp, PXP2_REG_RQ_RD_MBS1, r_order); + if (r_order == MAX_RD_ORD) + REG_WR(bp, PXP2_REG_RQ_PDR_LIMIT, 0xe00); + + REG_WR(bp, PXP2_REG_WR_USDMDP_TH, (0x18 << w_order)); REG_WR(bp, PXP2_REG_WR_DMAE_TH, (128 << w_order)/16); }