From e80c2636824f769816a82063d7411ad8337df67d Mon Sep 17 00:00:00 2001 From: Luciano Coelho Date: Thu, 10 May 2012 12:14:03 +0300 Subject: [PATCH] --- yaml --- r: 314104 b: refs/heads/master c: 7ae25da3967298199881c72ee476a1f9ec682fd8 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/wireless/ti/wl18xx/main.c | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 587c081332f1..85d5175a5fc2 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4afc37a0c1c58415ac3ad1c07afd8ebf81cb90c5 +refs/heads/master: 7ae25da3967298199881c72ee476a1f9ec682fd8 diff --git a/trunk/drivers/net/wireless/ti/wl18xx/main.c b/trunk/drivers/net/wireless/ti/wl18xx/main.c index 6047a6d90975..afa2334d0aea 100644 --- a/trunk/drivers/net/wireless/ti/wl18xx/main.c +++ b/trunk/drivers/net/wireless/ti/wl18xx/main.c @@ -588,6 +588,9 @@ static int wl18xx_identify_chip(struct wl1271 *wl) WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED | WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN; + /* PG 1.0 has some problems with MCS_13, so disable it */ + wl->ht_cap.mcs.rx_mask[1] &= ~BIT(5); + /* TODO: need to blocksize alignment for RX/TX separately? */ break; default: @@ -914,6 +917,10 @@ static void wl18xx_set_rx_csum(struct wl1271 *wl, skb->ip_summed = CHECKSUM_UNNECESSARY; } +/* + * TODO: instead of having these two functions to get the rate mask, + * we should modify the wlvif->rate_set instead + */ static u32 wl18xx_sta_get_ap_rate_mask(struct wl1271 *wl, struct wl12xx_vif *wlvif) { @@ -940,6 +947,17 @@ static u32 wl18xx_ap_get_mimo_wide_rate_mask(struct wl1271 *wl, return CONF_TX_RATE_USE_WIDE_CHAN; } else { wl1271_debug(DEBUG_ACX, "using MIMO rate mask"); + + /* + * PG 1.0 has some problems with MCS_13, so disable it + * + * TODO: instead of hacking this in here, we should + * make it more general and change a bit in the + * wlvif->rate_set instead. + */ + if (wl->chip.id == CHIP_ID_185x_PG10) + return CONF_TX_MIMO_RATES & ~CONF_HW_BIT_RATE_MCS_13; + return CONF_TX_MIMO_RATES; } }