From e8a268ec3e59032807c6ec9b540ce3152b480c43 Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@suse.de>
Date: Tue, 11 Oct 2005 01:28:33 +0200
Subject: [PATCH] --- yaml --- r: 9797 b: refs/heads/master c:
 3c92c2ba33cd7d666c5f83cc32aa590e794e91b0 h: refs/heads/master i:   9795:
 6902a042e8111dc4e5c5c457605b724e12eaf76c v: v3

---
 [refs]                           | 2 +-
 trunk/arch/i386/kernel/cpu/amd.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index e708faa4fd8f..0de36e6aa9a1 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 421c7ce6d001fce28b1fa8fdd2e7ded0ed8a0ad5
+refs/heads/master: 3c92c2ba33cd7d666c5f83cc32aa590e794e91b0
diff --git a/trunk/arch/i386/kernel/cpu/amd.c b/trunk/arch/i386/kernel/cpu/amd.c
index 4c1ddf2b57cc..53a1681cd964 100644
--- a/trunk/arch/i386/kernel/cpu/amd.c
+++ b/trunk/arch/i386/kernel/cpu/amd.c
@@ -29,7 +29,7 @@ static void __init init_amd(struct cpuinfo_x86 *c)
 	int r;
 
 #ifdef CONFIG_SMP
-	unsigned long value;
+	unsigned long long value;
 
 	/* Disable TLB flush filter by setting HWCR.FFDIS on K8
 	 * bit 6 of msr C001_0015