From e8a2a76efc03e106eeace97e7ac54b8fa3c11dea Mon Sep 17 00:00:00 2001
From: Roland Stigge <stigge@antcom.de>
Date: Thu, 25 Oct 2012 13:26:39 +0200
Subject: [PATCH] --- yaml --- r: 342239 b: refs/heads/master c:
 a1fff236b43dfe6394fd04b0302f5a261e1cc3e5 h: refs/heads/master i:   342237:
 509ba3e13de89eeadf6565602d9017bc7ca0fd16   342235:
 b28852e507fdfe52da646503b9906247f0cea893   342231:
 34bb558ffe07d77ade9d91d2ef85aed5c7c74252   342223:
 c6a96fab8b407eeb73af96d259a33ab28623adff   342207:
 bc1161832da35f85147eb792ff620e1d06ddf5ac v: v3

---
 [refs]                             |  2 +-
 trunk/arch/arm/boot/dts/imx53.dtsi | 46 ++++++++++++++++++++++++++++++
 2 files changed, 47 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 037096a4780f..c48528fa48bd 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: d90df97863c7838847abd0f144c71db60aa00643
+refs/heads/master: a1fff236b43dfe6394fd04b0302f5a261e1cc3e5
diff --git a/trunk/arch/arm/boot/dts/imx53.dtsi b/trunk/arch/arm/boot/dts/imx53.dtsi
index a5dd4ce6fd02..8b33195a5a33 100644
--- a/trunk/arch/arm/boot/dts/imx53.dtsi
+++ b/trunk/arch/arm/boot/dts/imx53.dtsi
@@ -320,6 +320,24 @@
 					};
 				};
 
+				can1 {
+					pinctrl_can1_1: can1grp-1 {
+						fsl,pins = <
+							847 0x80000000  /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */
+							853 0x80000000  /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */
+						>;
+					};
+				};
+
+				can2 {
+					pinctrl_can2_1: can2grp-1 {
+						fsl,pins = <
+							67  0x80000000  /* MX53_PAD_KEY_COL4__CAN2_TXCAN */
+							74  0x80000000  /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */
+						>;
+					};
+				};
+
 				i2c1 {
 					pinctrl_i2c1_1: i2c1grp-1 {
 						fsl,pins = <
@@ -338,6 +356,15 @@
 					};
 				};
 
+				i2c3 {
+					pinctrl_i2c3_1: i2c3grp-1 {
+						fsl,pins = <
+							1102 0xc0000000	/* MX53_PAD_GPIO_6__I2C3_SDA */
+							1130 0xc0000000	/* MX53_PAD_GPIO_5__I2C3_SCL */
+						>;
+					};
+				};
+
 				uart1 {
 					pinctrl_uart1_1: uart1grp-1 {
 						fsl,pins = <
@@ -373,6 +400,25 @@
 						>;
 					};
 				};
+
+				uart4 {
+					pinctrl_uart4_1: uart4grp-1 {
+						fsl,pins = <
+							11 0x1c5	/* MX53_PAD_KEY_COL0__UART4_TXD_MUX */
+							18 0x1c5	/* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */
+						>;
+					};
+				};
+
+				uart5 {
+					pinctrl_uart5_1: uart5grp-1 {
+						fsl,pins = <
+							24 0x1c5	/* MX53_PAD_KEY_COL1__UART5_TXD_MUX */
+							31 0x1c5	/* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */
+						>;
+					};
+				};
+
 			};
 
 			uart1: serial@53fbc000 {