From e937487f45eea17f61b5d191029410d916588717 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Tue, 6 Nov 2012 06:09:38 -0800 Subject: [PATCH] --- yaml --- r: 339582 b: refs/heads/master c: 98fb96aaad39f5ec1f111b591f55e5df0de28622 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/include/debug/vexpress.S | 10 ++++++---- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index 802e708e8ba3..a6ba3c6fe496 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 5a6a86121f55681b5ae7891d19a462883635beef +refs/heads/master: 98fb96aaad39f5ec1f111b591f55e5df0de28622 diff --git a/trunk/arch/arm/include/debug/vexpress.S b/trunk/arch/arm/include/debug/vexpress.S index 9f509f55d078..0c6abbf4c82b 100644 --- a/trunk/arch/arm/include/debug/vexpress.S +++ b/trunk/arch/arm/include/debug/vexpress.S @@ -23,12 +23,14 @@ .macro addruart,rp,rv,tmp @ Make an educated guess regarding the memory map: - @ - the original A9 core tile, which has MPCore peripherals - @ located at 0x1e000000, should use UART at 0x10009000 + @ - the original A9 core tile (based on ARM Cortex-A9 r0p1) + @ should use UART at 0x10009000 @ - all other (RS1 complaint) tiles use UART mapped @ at 0x1c090000 - mrc p15, 4, \tmp, c15, c0, 0 - cmp \tmp, #0x1e000000 + mrc p15, 0, \rp, c0, c0, 0 + movw \rv, #0xc091 + movt \rv, #0x410f + cmp \rp, \rv @ Original memory map moveq \rp, #DEBUG_LL_UART_OFFSET