From ea04408f30dd3d7821998f84a0bb27b3da72671f Mon Sep 17 00:00:00 2001 From: Jerome Glisse Date: Thu, 18 Feb 2010 14:23:49 +0000 Subject: [PATCH] --- yaml --- r: 185595 b: refs/heads/master c: 8e36113082821980c60ce89a6c5d45fc9492fc26 h: refs/heads/master i: 185593: 2be844208ecf4d0ea214acb5242fa25ec822fd9c 185591: cbd9d7d105cf2af259682cecd33b19d0cea3cadd v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/r300.c | 7 ++++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index ac54f7559a05..dd2fd18c0e28 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: f735261baab3a275a273533c391d2d1b86a9e66a +refs/heads/master: 8e36113082821980c60ce89a6c5d45fc9492fc26 diff --git a/trunk/drivers/gpu/drm/radeon/r300.c b/trunk/drivers/gpu/drm/radeon/r300.c index 7e9f95653cbe..b188aae764cc 100644 --- a/trunk/drivers/gpu/drm/radeon/r300.c +++ b/trunk/drivers/gpu/drm/radeon/r300.c @@ -461,7 +461,8 @@ int r300_gpu_reset(struct radeon_device *rdev) */ void r300_mc_init(struct radeon_device *rdev) { - uint32_t tmp; + u64 base; + u32 tmp; /* DDR for all card after R300 & IGP */ rdev->mc.vram_is_ddr = true; @@ -474,6 +475,10 @@ void r300_mc_init(struct radeon_device *rdev) default: rdev->mc.vram_width = 128; break; } r100_vram_init_sizes(rdev); + base = rdev->mc.aper_base; + if (rdev->flags & RADEON_IS_IGP) + base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16; + radeon_vram_location(rdev, &rdev->mc, base); if (!(rdev->flags & RADEON_IS_AGP)) radeon_gtt_location(rdev, &rdev->mc); }