From ea1704f71109df0fb4d4e596e33b1eebc3bcffe6 Mon Sep 17 00:00:00 2001 From: Wu Zhangjin Date: Sat, 24 Jul 2010 09:22:15 +0800 Subject: [PATCH] --- yaml --- r: 204594 b: refs/heads/master c: e608aadd17b2430ad9f6c412311bfcc120222ae3 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/mips/loongson/lemote-2f/irq.c | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/[refs] b/[refs] index c84b9a1f9128..1cf88dcd08bd 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: de3bc0e7ba5e89d63cb2dbac4e49a5c4b18669b5 +refs/heads/master: e608aadd17b2430ad9f6c412311bfcc120222ae3 diff --git a/trunk/arch/mips/loongson/lemote-2f/irq.c b/trunk/arch/mips/loongson/lemote-2f/irq.c index 71347d7030c5..081db102bb98 100644 --- a/trunk/arch/mips/loongson/lemote-2f/irq.c +++ b/trunk/arch/mips/loongson/lemote-2f/irq.c @@ -19,7 +19,6 @@ #include #define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */ -#define LOONGSON_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */ #define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */ #define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */ #define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */