From ea3391835b6b4132e087c320ceb722750a6682aa Mon Sep 17 00:00:00 2001 From: Sebastien Guiriec Date: Tue, 23 Oct 2012 10:37:11 +0200 Subject: [PATCH] --- yaml --- r: 339883 b: refs/heads/master c: 8e80f66069d54fd22e1a8e452a760f511f501b48 h: refs/heads/master i: 339881: fe750f5becd1e9dc39679a698f97b1fe8b2f2bac 339879: b44be08b9d1973f27a2258c2fb4e77b99af5fcc0 v: v3 --- [refs] | 2 +- trunk/arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 7dbf7a528364..a386d2bf861c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d7118bbd5095982ddc179387e9fd7d0524fdcf10 +refs/heads/master: 8e80f66069d54fd22e1a8e452a760f511f501b48 diff --git a/trunk/arch/arm/boot/dts/omap5.dtsi b/trunk/arch/arm/boot/dts/omap5.dtsi index 9abcff75e8b7..7cc47ad849b3 100644 --- a/trunk/arch/arm/boot/dts/omap5.dtsi +++ b/trunk/arch/arm/boot/dts/omap5.dtsi @@ -237,36 +237,48 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; + reg = <0x4806a000 0x100>; + interrupts = <0 72 0x4>; ti,hwmods = "uart1"; clock-frequency = <48000000>; }; uart2: serial@4806c000 { compatible = "ti,omap4-uart"; + reg = <0x4806c000 0x100>; + interrupts = <0 73 0x4>; ti,hwmods = "uart2"; clock-frequency = <48000000>; }; uart3: serial@48020000 { compatible = "ti,omap4-uart"; + reg = <0x48020000 0x100>; + interrupts = <0 74 0x4>; ti,hwmods = "uart3"; clock-frequency = <48000000>; }; uart4: serial@4806e000 { compatible = "ti,omap4-uart"; + reg = <0x4806e000 0x100>; + interrupts = <0 70 0x4>; ti,hwmods = "uart4"; clock-frequency = <48000000>; }; uart5: serial@48066000 { - compatible = "ti,omap5-uart"; + compatible = "ti,omap4-uart"; + reg = <0x48066000 0x100>; + interrupts = <0 105 0x4>; ti,hwmods = "uart5"; clock-frequency = <48000000>; }; uart6: serial@48068000 { - compatible = "ti,omap6-uart"; + compatible = "ti,omap4-uart"; + reg = <0x48068000 0x100>; + interrupts = <0 106 0x4>; ti,hwmods = "uart6"; clock-frequency = <48000000>; };