diff --git a/[refs] b/[refs] index 501dcbdcd44a..191758038309 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0d08a84770cb03aea24268e515342d44df8ea588 +refs/heads/master: 8b32bc03256c82a6a4fcb3c2520b54469b74ec82 diff --git a/trunk/arch/powerpc/platforms/pasemi/cpufreq.c b/trunk/arch/powerpc/platforms/pasemi/cpufreq.c index 8caa1667cf34..58556b028a4c 100644 --- a/trunk/arch/powerpc/platforms/pasemi/cpufreq.c +++ b/trunk/arch/powerpc/platforms/pasemi/cpufreq.c @@ -32,6 +32,7 @@ #include #include #include +#include #define SDCASR_REG 0x0100 #define SDCASR_REG_STRIDE 0x1000 @@ -124,6 +125,11 @@ static void set_astate(int cpu, unsigned int astate) local_irq_restore(flags); } +int check_astate(void) +{ + return get_cur_astate(hard_smp_processor_id()); +} + void restore_astate(int cpu) { set_astate(cpu, current_astate); diff --git a/trunk/arch/powerpc/platforms/pasemi/pasemi.h b/trunk/arch/powerpc/platforms/pasemi/pasemi.h index 516acabb4e96..c96127b029b6 100644 --- a/trunk/arch/powerpc/platforms/pasemi/pasemi.h +++ b/trunk/arch/powerpc/platforms/pasemi/pasemi.h @@ -16,8 +16,14 @@ extern void idle_doze(void); /* Restore astate to last set */ #ifdef CONFIG_PPC_PASEMI_CPUFREQ +extern int check_astate(void); extern void restore_astate(int cpu); #else +static inline int check_astate(void) +{ + /* Always return >0 so we never power save */ + return 1; +} static inline void restore_astate(int cpu) { } diff --git a/trunk/arch/powerpc/platforms/pasemi/powersave.S b/trunk/arch/powerpc/platforms/pasemi/powersave.S index 6d0fba6aab17..56f45adcd089 100644 --- a/trunk/arch/powerpc/platforms/pasemi/powersave.S +++ b/trunk/arch/powerpc/platforms/pasemi/powersave.S @@ -62,7 +62,16 @@ sleep_common: mflr r0 std r0, 16(r1) stdu r1,-64(r1) +#ifdef CONFIG_PPC_PASEMI_CPUFREQ + std r3, 48(r1) + /* Only do power savings when in astate 0 */ + bl .check_astate + cmpwi r3,0 + bne 1f + + ld r3, 48(r1) +#endif LOAD_REG_IMMEDIATE(r6,MSR_DR|MSR_IR|MSR_ME|MSR_EE) mfmsr r4 andc r5,r4,r6 @@ -73,7 +82,7 @@ sleep_common: mtmsrd r4,0 - addi r1,r1,64 +1: addi r1,r1,64 ld r0,16(r1) mtlr r0 blr