diff --git a/[refs] b/[refs] index ebd59a98ef4c..64a1d9821d1b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9604006d283fb67dda5ee9e0e15b7cc6c62e1557 +refs/heads/master: 8965eb19386fdf5ccd0ef8b02593eb8560aa3416 diff --git a/trunk/Documentation/cgroups.txt b/trunk/Documentation/cgroups.txt index 824fc0274471..c298a6690e0d 100644 --- a/trunk/Documentation/cgroups.txt +++ b/trunk/Documentation/cgroups.txt @@ -310,8 +310,8 @@ and then start a subshell 'sh' in that cgroup: cd /dev/cgroup mkdir Charlie cd Charlie - /bin/echo 2-3 > cpuset.cpus - /bin/echo 1 > cpuset.mems + /bin/echo 2-3 > cpus + /bin/echo 1 > mems /bin/echo $$ > tasks sh # The subshell 'sh' is now running in cgroup Charlie diff --git a/trunk/Documentation/hwmon/adt7473 b/trunk/Documentation/hwmon/adt7473 index 2126de34c711..22d8b19046ab 100644 --- a/trunk/Documentation/hwmon/adt7473 +++ b/trunk/Documentation/hwmon/adt7473 @@ -69,8 +69,7 @@ point2: Set the pwm speed at a higher temperature bound. The ADT7473 will scale the pwm between the lower and higher pwm speed when the temperature is between the two temperature boundaries. PWM values range -from 0 (off) to 255 (full speed). Fan speed will be set to maximum when the -temperature sensor associated with the PWM control exceeds temp#_max. +from 0 (off) to 255 (full speed). Notes ----- diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index b18242f8d96b..f5583dc7ea39 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -367,12 +367,12 @@ S: Maintained for 2.4; PCI support for 2.6. AMD GEODE CS5536 USB DEVICE CONTROLLER DRIVER P: Thomas Dahlmann M: thomas.dahlmann@amd.com -L: linux-geode@lists.infradead.org (moderated for non-subscribers) +L: info-linux@geode.amd.com (subscribers-only) S: Supported AMD GEODE PROCESSOR/CHIPSET SUPPORT P: Jordan Crouse -L: linux-geode@lists.infradead.org (moderated for non-subscribers) +L: info-linux@geode.amd.com (subscribers-only) W: http://www.amd.com/us-en/ConnectivitySolutions/TechnicalResources/0,,50_2334_2452_11363,00.html S: Supported diff --git a/trunk/arch/m68knommu/Kconfig b/trunk/arch/m68knommu/Kconfig index 8e8441587c22..07eb4c4bab82 100644 --- a/trunk/arch/m68knommu/Kconfig +++ b/trunk/arch/m68knommu/Kconfig @@ -671,9 +671,6 @@ config ROMKERNEL endchoice -if COLDFIRE -source "kernel/Kconfig.preempt" -endif source "mm/Kconfig" endmenu diff --git a/trunk/arch/m68knommu/kernel/vmlinux.lds.S b/trunk/arch/m68knommu/kernel/vmlinux.lds.S index 93e69236ed6f..5592e0bf951f 100644 --- a/trunk/arch/m68knommu/kernel/vmlinux.lds.S +++ b/trunk/arch/m68knommu/kernel/vmlinux.lds.S @@ -114,16 +114,6 @@ SECTIONS { *(__kcrctab_gpl) __stop___kcrctab_gpl = .; - /* Kernel symbol table: Normal unused symbols */ - __start___kcrctab_unused = .; - *(__kcrctab_unused) - __stop___kcrctab_unused = .; - - /* Kernel symbol table: GPL-only unused symbols */ - __start___kcrctab_unused_gpl = .; - *(__kcrctab_unused_gpl) - __stop___kcrctab_unused_gpl = .; - /* Kernel symbol table: GPL-future symbols */ __start___kcrctab_gpl_future = .; *(__kcrctab_gpl_future) diff --git a/trunk/arch/mips/au1000/common/Makefile b/trunk/arch/mips/au1000/common/Makefile index dd0e19dacfcf..90e2d7a46e8e 100644 --- a/trunk/arch/mips/au1000/common/Makefile +++ b/trunk/arch/mips/au1000/common/Makefile @@ -1,8 +1,9 @@ # -# Copyright 2000, 2008 MontaVista Software Inc. -# Author: MontaVista Software, Inc. +# Copyright 2000 MontaVista Software Inc. +# Author: MontaVista Software, Inc. +# ppopov@mvista.com or source@mvista.com # -# Makefile for the Alchemy Au1xx0 CPUs, generic files. +# Makefile for the Alchemy Au1000 CPU, generic files. # obj-y += prom.o irq.o puts.o time.o reset.o \ diff --git a/trunk/arch/mips/au1000/common/au1xxx_irqmap.c b/trunk/arch/mips/au1000/common/au1xxx_irqmap.c index c7ca1596394c..37a10a01de9d 100644 --- a/trunk/arch/mips/au1000/common/au1xxx_irqmap.c +++ b/trunk/arch/mips/au1000/common/au1xxx_irqmap.c @@ -40,20 +40,20 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = { #if defined(CONFIG_SOC_AU1000) - { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0 }, + { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, @@ -62,32 +62,32 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = { { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, #elif defined(CONFIG_SOC_AU1500) - { AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0 }, + { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, @@ -100,26 +100,26 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = { { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, #elif defined(CONFIG_SOC_AU1100) - { AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0 }, + { AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, @@ -128,33 +128,33 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = { { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 }, - /* { AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0 }, */ - { AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + /*{ AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0},*/ + { AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, #elif defined(CONFIG_SOC_AU1550) - { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1550_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, { AU1550_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, - { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1550_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, { AU1550_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, { AU1550_PCI_RST_INT, INTC_INT_LOW_LEVEL, 0 }, - { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, @@ -163,26 +163,26 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = { { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0}, { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, { AU1550_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, - { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, #elif defined(CONFIG_SOC_AU1200) - { AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1200_SWT_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1200_MAE_BE_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1200_MAE_FE_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0}, { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, @@ -191,10 +191,10 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = { { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, - { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0 }, + { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0}, { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0 }, - { AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0 }, + { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0}, + { AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0}, #else #error "Error: Unknown Alchemy SOC" @@ -203,3 +203,4 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = { }; int __initdata au1xxx_ic0_nr_irqs = ARRAY_SIZE(au1xxx_ic0_map); + diff --git a/trunk/arch/mips/au1000/common/clocks.c b/trunk/arch/mips/au1000/common/clocks.c index 46f8ee0e2657..3ce6cace0eb0 100644 --- a/trunk/arch/mips/au1000/common/clocks.c +++ b/trunk/arch/mips/au1000/common/clocks.c @@ -1,9 +1,10 @@ /* * BRIEF MODULE DESCRIPTION - * Simple Au1xx0 clocks routines. + * Simple Au1000 clocks routines. * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -29,8 +30,8 @@ #include #include -static unsigned int au1x00_clock; /* Hz */ -static unsigned int lcd_clock; /* KHz */ +static unsigned int au1x00_clock; // Hz +static unsigned int lcd_clock; // KHz static unsigned long uart_baud_base; /* @@ -46,6 +47,8 @@ unsigned int get_au1x00_speed(void) return au1x00_clock; } + + /* * The UART baud base is not known at compile time ... if * we want to be able to use the same code on different @@ -70,23 +73,24 @@ void set_au1x00_uart_baud_base(unsigned long new_baud_base) void set_au1x00_lcd_clock(void) { unsigned int static_cfg0; - unsigned int sys_busclk = (get_au1x00_speed() / 1000) / - ((int)(au_readl(SYS_POWERCTRL) & 0x03) + 2); + unsigned int sys_busclk = + (get_au1x00_speed()/1000) / + ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2); static_cfg0 = au_readl(MEM_STCFG0); - if (static_cfg0 & (1 << 11)) + if (static_cfg0 & (1<<11)) lcd_clock = sys_busclk / 5; /* note: BCLK switching fails with D5 */ else lcd_clock = sys_busclk / 4; if (lcd_clock > 50000) /* Epson MAX */ - printk(KERN_WARNING "warning: LCD clock too high (%u KHz)\n", - lcd_clock); + printk("warning: LCD clock too high (%d KHz)\n", lcd_clock); } unsigned int get_au1x00_lcd_clock(void) { return lcd_clock; } + EXPORT_SYMBOL(get_au1x00_lcd_clock); diff --git a/trunk/arch/mips/au1000/common/cputable.c b/trunk/arch/mips/au1000/common/cputable.c index ba6430bc2d03..8c93a05d7382 100644 --- a/trunk/arch/mips/au1000/common/cputable.c +++ b/trunk/arch/mips/au1000/common/cputable.c @@ -14,7 +14,7 @@ #include -struct cpu_spec *cur_cpu_spec[NR_CPUS]; +struct cpu_spec* cur_cpu_spec[NR_CPUS]; /* With some thought, we can probably use the mask to reduce the * size of the table. @@ -39,7 +39,8 @@ struct cpu_spec cpu_specs[] = { { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0, 0 } }; -void set_cpuspec(void) +void +set_cpuspec(void) { struct cpu_spec *sp; u32 prid; diff --git a/trunk/arch/mips/au1000/common/dbdma.c b/trunk/arch/mips/au1000/common/dbdma.c index 42d555236de1..53377dfc0640 100644 --- a/trunk/arch/mips/au1000/common/dbdma.c +++ b/trunk/arch/mips/au1000/common/dbdma.c @@ -53,11 +53,12 @@ */ static DEFINE_SPINLOCK(au1xxx_dbdma_spin_lock); -/* I couldn't find a macro that did this... */ +/* I couldn't find a macro that did this...... +*/ #define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1)) static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE; -static int dbdma_initialized; +static int dbdma_initialized=0; static void au1xxx_dbdma_init(void); static dbdev_tab_t dbdev_tab[] = { @@ -148,7 +149,7 @@ static dbdev_tab_t dbdev_tab[] = { { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, -#endif /* CONFIG_SOC_AU1200 */ +#endif // CONFIG_SOC_AU1200 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, @@ -176,7 +177,8 @@ static dbdev_tab_t dbdev_tab[] = { static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS]; -static dbdev_tab_t *find_dbdev_id(u32 id) +static dbdev_tab_t * +find_dbdev_id(u32 id) { int i; dbdev_tab_t *p; @@ -188,27 +190,29 @@ static dbdev_tab_t *find_dbdev_id(u32 id) return NULL; } -void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp) +void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp) { - return phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); + return phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); } EXPORT_SYMBOL(au1xxx_ddma_get_nextptr_virt); -u32 au1xxx_ddma_add_device(dbdev_tab_t *dev) +u32 +au1xxx_ddma_add_device(dbdev_tab_t *dev) { u32 ret = 0; - dbdev_tab_t *p; - static u16 new_id = 0x1000; + dbdev_tab_t *p=NULL; + static u16 new_id=0x1000; p = find_dbdev_id(~0); - if (NULL != p) { + if ( NULL != p ) + { memcpy(p, dev, sizeof(dbdev_tab_t)); p->dev_id = DSCR_DEV2CUSTOM_ID(new_id, dev->dev_id); ret = p->dev_id; new_id++; #if 0 - printk(KERN_DEBUG "add_device: id:%x flags:%x padd:%x\n", - p->dev_id, p->dev_flags, p->dev_physaddr); + printk("add_device: id:%x flags:%x padd:%x\n", + p->dev_id, p->dev_flags, p->dev_physaddr ); #endif } @@ -216,8 +220,10 @@ u32 au1xxx_ddma_add_device(dbdev_tab_t *dev) } EXPORT_SYMBOL(au1xxx_ddma_add_device); -/* Allocate a channel and return a non-zero descriptor if successful. */ -u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, +/* Allocate a channel and return a non-zero descriptor if successful. +*/ +u32 +au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, void (*callback)(int, void *), void *callparam) { unsigned long flags; @@ -228,8 +234,7 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, chan_tab_t *ctp; au1x_dma_chan_t *cp; - /* - * We do the intialization on the first channel allocation. + /* We do the intialization on the first channel allocation. * We have to wait because of the interrupt handler initialization * which can't be done successfully during board set up. */ @@ -237,17 +242,16 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, au1xxx_dbdma_init(); dbdma_initialized = 1; - stp = find_dbdev_id(srcid); - if (stp == NULL) + if ((stp = find_dbdev_id(srcid)) == NULL) return 0; - dtp = find_dbdev_id(destid); - if (dtp == NULL) + if ((dtp = find_dbdev_id(destid)) == NULL) return 0; used = 0; rv = 0; - /* Check to see if we can get both channels. */ + /* Check to see if we can get both channels. + */ spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags); if (!(stp->dev_flags & DEV_FLAGS_INUSE) || (stp->dev_flags & DEV_FLAGS_ANYUSE)) { @@ -257,30 +261,35 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, (dtp->dev_flags & DEV_FLAGS_ANYUSE)) { /* Got destination */ dtp->dev_flags |= DEV_FLAGS_INUSE; - } else { - /* Can't get dest. Release src. */ + } + else { + /* Can't get dest. Release src. + */ stp->dev_flags &= ~DEV_FLAGS_INUSE; used++; } - } else + } + else { used++; + } spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags); if (!used) { - /* Let's see if we can allocate a channel for it. */ + /* Let's see if we can allocate a channel for it. + */ ctp = NULL; chan = 0; spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags); - for (i = 0; i < NUM_DBDMA_CHANS; i++) + for (i=0; ichan_callback = callback; ctp->chan_callparam = callparam; - /* Initialize channel configuration. */ + /* Initialize channel configuration. + */ i = 0; if (stp->dev_intlevel) i |= DDMA_CFG_SED; @@ -316,7 +326,8 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, * operations. */ rv = (u32)(&chan_tab_ptr[chan]); - } else { + } + else { /* Release devices */ stp->dev_flags &= ~DEV_FLAGS_INUSE; dtp->dev_flags &= ~DEV_FLAGS_INUSE; @@ -326,11 +337,11 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, } EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc); -/* - * Set the device width if source or destination is a FIFO. +/* Set the device width if source or destination is a FIFO. * Should be 8, 16, or 32 bits. */ -u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits) +u32 +au1xxx_dbdma_set_devwidth(u32 chanid, int bits) { u32 rv; chan_tab_t *ctp; @@ -354,8 +365,10 @@ u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits) } EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth); -/* Allocate a descriptor ring, initializing as much as possible. */ -u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) +/* Allocate a descriptor ring, initializing as much as possible. +*/ +u32 +au1xxx_dbdma_ring_alloc(u32 chanid, int entries) { int i; u32 desc_base, srcid, destid; @@ -365,45 +378,43 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) dbdev_tab_t *stp, *dtp; au1x_ddma_desc_t *dp; - /* - * I guess we could check this to be within the + /* I guess we could check this to be within the * range of the table...... */ ctp = *((chan_tab_t **)chanid); stp = ctp->chan_src; dtp = ctp->chan_dest; - /* - * The descriptors must be 32-byte aligned. There is a + /* The descriptors must be 32-byte aligned. There is a * possibility the allocation will give us such an address, * and if we try that first we are likely to not waste larger * slabs of memory. */ desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), - GFP_KERNEL|GFP_DMA); + GFP_KERNEL|GFP_DMA); if (desc_base == 0) return 0; if (desc_base & 0x1f) { - /* - * Lost....do it again, allocate extra, and round + /* Lost....do it again, allocate extra, and round * the address base. */ kfree((const void *)desc_base); i = entries * sizeof(au1x_ddma_desc_t); i += (sizeof(au1x_ddma_desc_t) - 1); - desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA); - if (desc_base == 0) + if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0) return 0; desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t)); } dp = (au1x_ddma_desc_t *)desc_base; - /* Keep track of the base descriptor. */ + /* Keep track of the base descriptor. + */ ctp->chan_desc_base = dp; - /* Initialize the rings with as much information as we know. */ + /* Initialize the rings with as much information as we know. + */ srcid = stp->dev_id; destid = dtp->dev_id; @@ -415,12 +426,11 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) cmd0 |= DSCR_CMD0_IE | DSCR_CMD0_CV; cmd0 |= DSCR_CMD0_ST(DSCR_CMD0_ST_NOCHANGE); - /* Is it mem to mem transfer? */ - if (((DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_THROTTLE) || - (DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_ALWAYS)) && - ((DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_THROTTLE) || - (DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_ALWAYS))) - cmd0 |= DSCR_CMD0_MEM; + /* is it mem to mem transfer? */ + if(((DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_THROTTLE) || (DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_ALWAYS)) && + ((DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_THROTTLE) || (DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_ALWAYS))) { + cmd0 |= DSCR_CMD0_MEM; + } switch (stp->dev_devwidth) { case 8: @@ -448,17 +458,15 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) break; } - /* - * If the device is marked as an in/out FIFO, ensure it is + /* If the device is marked as an in/out FIFO, ensure it is * set non-coherent. */ if (stp->dev_flags & DEV_FLAGS_IN) - cmd0 |= DSCR_CMD0_SN; /* Source in FIFO */ + cmd0 |= DSCR_CMD0_SN; /* Source in fifo */ if (dtp->dev_flags & DEV_FLAGS_OUT) - cmd0 |= DSCR_CMD0_DN; /* Destination out FIFO */ + cmd0 |= DSCR_CMD0_DN; /* Destination out fifo */ - /* - * Set up source1. For now, assume no stride and increment. + /* Set up source1. For now, assume no stride and increment. * A channel attribute update can change this later. */ switch (stp->dev_tsize) { @@ -477,19 +485,19 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) break; } - /* If source input is FIFO, set static address. */ + /* If source input is fifo, set static address. + */ if (stp->dev_flags & DEV_FLAGS_IN) { - if (stp->dev_flags & DEV_FLAGS_BURSTABLE) + if ( stp->dev_flags & DEV_FLAGS_BURSTABLE ) src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST); else - src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC); - } + src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC); + } if (stp->dev_physaddr) src0 = stp->dev_physaddr; - /* - * Set up dest1. For now, assume no stride and increment. + /* Set up dest1. For now, assume no stride and increment. * A channel attribute update can change this later. */ switch (dtp->dev_tsize) { @@ -508,24 +516,22 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) break; } - /* If destination output is FIFO, set static address. */ + /* If destination output is fifo, set static address. + */ if (dtp->dev_flags & DEV_FLAGS_OUT) { - if (dtp->dev_flags & DEV_FLAGS_BURSTABLE) - dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST); - else - dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC); + if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE ) + dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST); + else + dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC); } - if (dtp->dev_physaddr) dest0 = dtp->dev_physaddr; #if 0 - printk(KERN_DEBUG "did:%x sid:%x cmd0:%x cmd1:%x source0:%x " - "source1:%x dest0:%x dest1:%x\n", - dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, - src1, dest0, dest1); + printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n", + dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 ); #endif - for (i = 0; i < entries; i++) { + for (i=0; idscr_cmd0 = cmd0; dp->dscr_cmd1 = cmd1; dp->dscr_source0 = src0; @@ -539,49 +545,49 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) dp++; } - /* Make last descrptor point to the first. */ + /* Make last descrptor point to the first. + */ dp--; dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(ctp->chan_desc_base)); ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base; - return (u32)ctp->chan_desc_base; + return (u32)(ctp->chan_desc_base); } EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc); -/* - * Put a source buffer into the DMA ring. +/* Put a source buffer into the DMA ring. * This updates the source pointer and byte count. Normally used * for memory to fifo transfers. */ -u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags) +u32 +_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags) { chan_tab_t *ctp; au1x_ddma_desc_t *dp; - /* - * I guess we could check this to be within the + /* I guess we could check this to be within the * range of the table...... */ - ctp = *(chan_tab_t **)chanid; + ctp = *((chan_tab_t **)chanid); - /* - * We should have multiple callers for a particular channel, + /* We should have multiple callers for a particular channel, * an interrupt doesn't affect this pointer nor the descriptor, * so no locking should be needed. */ dp = ctp->put_ptr; - /* - * If the descriptor is valid, we are way ahead of the DMA + /* If the descriptor is valid, we are way ahead of the DMA * engine, so just return an error condition. */ - if (dp->dscr_cmd0 & DSCR_CMD0_V) + if (dp->dscr_cmd0 & DSCR_CMD0_V) { return 0; + } - /* Load up buffer address and byte count. */ + /* Load up buffer address and byte count. + */ dp->dscr_source0 = virt_to_phys(buf); dp->dscr_cmd1 = nbytes; - /* Check flags */ + /* Check flags */ if (flags & DDMA_FLAGS_IE) dp->dscr_cmd0 |= DSCR_CMD0_IE; if (flags & DDMA_FLAGS_NOIE) @@ -589,21 +595,23 @@ u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags) /* * There is an errata on the Au1200/Au1550 parts that could result - * in "stale" data being DMA'ed. It has to do with the snoop logic on - * the cache eviction buffer. DMA_NONCOHERENT is on by default for - * these parts. If it is fixed in the future, these dma_cache_inv will + * in "stale" data being DMA'd. It has to do with the snoop logic on + * the dache eviction buffer. NONCOHERENT_IO is on by default for + * these parts. If it is fixedin the future, these dma_cache_inv will * just be nothing more than empty macros. See io.h. - */ + * */ dma_cache_wback_inv((unsigned long)buf, nbytes); - dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ au_sync(); dma_cache_wback_inv((unsigned long)dp, sizeof(dp)); - ctp->chan_ptr->ddma_dbell = 0; + ctp->chan_ptr->ddma_dbell = 0; - /* Get next descriptor pointer. */ + /* Get next descriptor pointer. + */ ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); - /* Return something non-zero. */ + /* return something not zero. + */ return nbytes; } EXPORT_SYMBOL(_au1xxx_dbdma_put_source); @@ -646,77 +654,81 @@ _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags) dp->dscr_dest0 = virt_to_phys(buf); dp->dscr_cmd1 = nbytes; #if 0 - printk(KERN_DEBUG "cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n", - dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0, - dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1); + printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n", + dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0, + dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 ); #endif /* * There is an errata on the Au1200/Au1550 parts that could result in - * "stale" data being DMA'ed. It has to do with the snoop logic on the - * cache eviction buffer. DMA_NONCOHERENT is on by default for these - * parts. If it is fixed in the future, these dma_cache_inv will just + * "stale" data being DMA'd. It has to do with the snoop logic on the + * dache eviction buffer. NONCOHERENT_IO is on by default for these + * parts. If it is fixedin the future, these dma_cache_inv will just * be nothing more than empty macros. See io.h. - */ + * */ dma_cache_inv((unsigned long)buf, nbytes); dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ au_sync(); dma_cache_wback_inv((unsigned long)dp, sizeof(dp)); - ctp->chan_ptr->ddma_dbell = 0; + ctp->chan_ptr->ddma_dbell = 0; - /* Get next descriptor pointer. */ + /* Get next descriptor pointer. + */ ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); - /* Return something non-zero. */ + /* return something not zero. + */ return nbytes; } EXPORT_SYMBOL(_au1xxx_dbdma_put_dest); -/* - * Get a destination buffer into the DMA ring. +/* Get a destination buffer into the DMA ring. * Normally used to get a full buffer from the ring during fifo * to memory transfers. This does not set the valid bit, you will * have to put another destination buffer to keep the DMA going. */ -u32 au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes) +u32 +au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes) { chan_tab_t *ctp; au1x_ddma_desc_t *dp; u32 rv; - /* - * I guess we could check this to be within the + /* I guess we could check this to be within the * range of the table...... */ ctp = *((chan_tab_t **)chanid); - /* - * We should have multiple callers for a particular channel, + /* We should have multiple callers for a particular channel, * an interrupt doesn't affect this pointer nor the descriptor, * so no locking should be needed. */ dp = ctp->get_ptr; - /* - * If the descriptor is valid, we are way ahead of the DMA + /* If the descriptor is valid, we are way ahead of the DMA * engine, so just return an error condition. */ if (dp->dscr_cmd0 & DSCR_CMD0_V) return 0; - /* Return buffer address and byte count. */ + /* Return buffer address and byte count. + */ *buf = (void *)(phys_to_virt(dp->dscr_dest0)); *nbytes = dp->dscr_cmd1; rv = dp->dscr_stat; - /* Get next descriptor pointer. */ + /* Get next descriptor pointer. + */ ctp->get_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); - /* Return something non-zero. */ + /* return something not zero. + */ return rv; } + EXPORT_SYMBOL_GPL(au1xxx_dbdma_get_dest); -void au1xxx_dbdma_stop(u32 chanid) +void +au1xxx_dbdma_stop(u32 chanid) { chan_tab_t *ctp; au1x_dma_chan_t *cp; @@ -731,7 +743,7 @@ void au1xxx_dbdma_stop(u32 chanid) udelay(1); halt_timeout++; if (halt_timeout > 100) { - printk(KERN_WARNING "warning: DMA channel won't halt\n"); + printk("warning: DMA channel won't halt\n"); break; } } @@ -741,12 +753,12 @@ void au1xxx_dbdma_stop(u32 chanid) } EXPORT_SYMBOL(au1xxx_dbdma_stop); -/* - * Start using the current descriptor pointer. If the DBDMA encounters - * a non-valid descriptor, it will stop. In this case, we can just +/* Start using the current descriptor pointer. If the dbdma encounters + * a not valid descriptor, it will stop. In this case, we can just * continue by adding a buffer to the list and starting again. */ -void au1xxx_dbdma_start(u32 chanid) +void +au1xxx_dbdma_start(u32 chanid) { chan_tab_t *ctp; au1x_dma_chan_t *cp; @@ -761,7 +773,8 @@ void au1xxx_dbdma_start(u32 chanid) } EXPORT_SYMBOL(au1xxx_dbdma_start); -void au1xxx_dbdma_reset(u32 chanid) +void +au1xxx_dbdma_reset(u32 chanid) { chan_tab_t *ctp; au1x_ddma_desc_t *dp; @@ -771,14 +784,14 @@ void au1xxx_dbdma_reset(u32 chanid) ctp = *((chan_tab_t **)chanid); ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base; - /* Run through the descriptors and reset the valid indicator. */ + /* Run through the descriptors and reset the valid indicator. + */ dp = ctp->chan_desc_base; do { dp->dscr_cmd0 &= ~DSCR_CMD0_V; - /* - * Reset our software status -- this is used to determine - * if a descriptor is in use by upper level software. Since + /* reset our SW status -- this is used to determine + * if a descriptor is in use by upper level SW. Since * posting can reset 'V' bit. */ dp->sw_status = 0; @@ -787,7 +800,8 @@ void au1xxx_dbdma_reset(u32 chanid) } EXPORT_SYMBOL(au1xxx_dbdma_reset); -u32 au1xxx_get_dma_residue(u32 chanid) +u32 +au1xxx_get_dma_residue(u32 chanid) { chan_tab_t *ctp; au1x_dma_chan_t *cp; @@ -796,15 +810,18 @@ u32 au1xxx_get_dma_residue(u32 chanid) ctp = *((chan_tab_t **)chanid); cp = ctp->chan_ptr; - /* This is only valid if the channel is stopped. */ + /* This is only valid if the channel is stopped. + */ rv = cp->ddma_bytecnt; au_sync(); return rv; } + EXPORT_SYMBOL_GPL(au1xxx_get_dma_residue); -void au1xxx_dbdma_chan_free(u32 chanid) +void +au1xxx_dbdma_chan_free(u32 chanid) { chan_tab_t *ctp; dbdev_tab_t *stp, *dtp; @@ -825,7 +842,8 @@ void au1xxx_dbdma_chan_free(u32 chanid) } EXPORT_SYMBOL(au1xxx_dbdma_chan_free); -static irqreturn_t dbdma_interrupt(int irq, void *dev_id) +static irqreturn_t +dbdma_interrupt(int irq, void *dev_id) { u32 intstat; u32 chan_index; @@ -841,12 +859,13 @@ static irqreturn_t dbdma_interrupt(int irq, void *dev_id) cp = ctp->chan_ptr; dp = ctp->cur_ptr; - /* Reset interrupt. */ + /* Reset interrupt. + */ cp->ddma_irq = 0; au_sync(); if (ctp->chan_callback) - ctp->chan_callback(irq, ctp->chan_callparam); + (ctp->chan_callback)(irq, ctp->chan_callparam); ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); return IRQ_RETVAL(1); @@ -871,47 +890,47 @@ static void au1xxx_dbdma_init(void) if (request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED, "Au1xxx dbdma", (void *)dbdma_gptr)) - printk(KERN_ERR "Can't get 1550 dbdma irq"); + printk("Can't get 1550 dbdma irq"); } -void au1xxx_dbdma_dump(u32 chanid) +void +au1xxx_dbdma_dump(u32 chanid) { - chan_tab_t *ctp; - au1x_ddma_desc_t *dp; - dbdev_tab_t *stp, *dtp; - au1x_dma_chan_t *cp; - u32 i = 0; + chan_tab_t *ctp; + au1x_ddma_desc_t *dp; + dbdev_tab_t *stp, *dtp; + au1x_dma_chan_t *cp; + u32 i = 0; ctp = *((chan_tab_t **)chanid); stp = ctp->chan_src; dtp = ctp->chan_dest; cp = ctp->chan_ptr; - printk(KERN_DEBUG "Chan %x, stp %x (dev %d) dtp %x (dev %d) \n", - (u32)ctp, (u32)stp, stp - dbdev_tab, (u32)dtp, - dtp - dbdev_tab); - printk(KERN_DEBUG "desc base %x, get %x, put %x, cur %x\n", - (u32)(ctp->chan_desc_base), (u32)(ctp->get_ptr), - (u32)(ctp->put_ptr), (u32)(ctp->cur_ptr)); - - printk(KERN_DEBUG "dbdma chan %x\n", (u32)cp); - printk(KERN_DEBUG "cfg %08x, desptr %08x, statptr %08x\n", - cp->ddma_cfg, cp->ddma_desptr, cp->ddma_statptr); - printk(KERN_DEBUG "dbell %08x, irq %08x, stat %08x, bytecnt %08x\n", - cp->ddma_dbell, cp->ddma_irq, cp->ddma_stat, - cp->ddma_bytecnt); - - /* Run through the descriptors */ + printk("Chan %x, stp %x (dev %d) dtp %x (dev %d) \n", + (u32)ctp, (u32)stp, stp - dbdev_tab, (u32)dtp, dtp - dbdev_tab); + printk("desc base %x, get %x, put %x, cur %x\n", + (u32)(ctp->chan_desc_base), (u32)(ctp->get_ptr), + (u32)(ctp->put_ptr), (u32)(ctp->cur_ptr)); + + printk("dbdma chan %x\n", (u32)cp); + printk("cfg %08x, desptr %08x, statptr %08x\n", + cp->ddma_cfg, cp->ddma_desptr, cp->ddma_statptr); + printk("dbell %08x, irq %08x, stat %08x, bytecnt %08x\n", + cp->ddma_dbell, cp->ddma_irq, cp->ddma_stat, cp->ddma_bytecnt); + + + /* Run through the descriptors + */ dp = ctp->chan_desc_base; do { - printk(KERN_DEBUG "Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n", - i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1); - printk(KERN_DEBUG "src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n", - dp->dscr_source0, dp->dscr_source1, - dp->dscr_dest0, dp->dscr_dest1); - printk(KERN_DEBUG "stat %08x, nxtptr %08x\n", - dp->dscr_stat, dp->dscr_nxtptr); + printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n", + i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1); + printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n", + dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1); + printk("stat %08x, nxtptr %08x\n", + dp->dscr_stat, dp->dscr_nxtptr); dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); } while (dp != ctp->chan_desc_base); } @@ -919,33 +938,32 @@ void au1xxx_dbdma_dump(u32 chanid) /* Put a descriptor into the DMA ring. * This updates the source/destination pointers and byte count. */ -u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr) +u32 +au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr ) { chan_tab_t *ctp; au1x_ddma_desc_t *dp; - u32 nbytes = 0; + u32 nbytes=0; - /* - * I guess we could check this to be within the - * range of the table...... - */ + /* I guess we could check this to be within the + * range of the table...... + */ ctp = *((chan_tab_t **)chanid); - /* - * We should have multiple callers for a particular channel, - * an interrupt doesn't affect this pointer nor the descriptor, - * so no locking should be needed. - */ + /* We should have multiple callers for a particular channel, + * an interrupt doesn't affect this pointer nor the descriptor, + * so no locking should be needed. + */ dp = ctp->put_ptr; - /* - * If the descriptor is valid, we are way ahead of the DMA - * engine, so just return an error condition. - */ + /* If the descriptor is valid, we are way ahead of the DMA + * engine, so just return an error condition. + */ if (dp->dscr_cmd0 & DSCR_CMD0_V) return 0; - /* Load up buffer addresses and byte count. */ + /* Load up buffer addresses and byte count. + */ dp->dscr_dest0 = dscr->dscr_dest0; dp->dscr_source0 = dscr->dscr_source0; dp->dscr_dest1 = dscr->dscr_dest1; @@ -957,11 +975,14 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr) dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V; ctp->chan_ptr->ddma_dbell = 0; - /* Get next descriptor pointer. */ + /* Get next descriptor pointer. + */ ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); - /* Return something non-zero. */ + /* return something not zero. + */ return nbytes; } #endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */ + diff --git a/trunk/arch/mips/au1000/common/dbg_io.c b/trunk/arch/mips/au1000/common/dbg_io.c index af5be7df2f2a..eae1bb2ca26e 100644 --- a/trunk/arch/mips/au1000/common/dbg_io.c +++ b/trunk/arch/mips/au1000/common/dbg_io.c @@ -1,4 +1,3 @@ -#include #include @@ -9,6 +8,12 @@ * uart to be used for debugging. */ #define DEBUG_BASE UART_DEBUG_BASE +/**/ + +/* we need uint32 uint8 */ +/* #include "types.h" */ +typedef unsigned char uint8; +typedef unsigned int uint32; #define UART16550_BAUD_2400 2400 #define UART16550_BAUD_4800 4800 @@ -46,15 +51,17 @@ #define UART_MOD_CNTRL 0x100 /* Module Control */ /* memory-mapped read/write of the port */ -#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff) -#define UART16550_WRITE(y, z) (au_writel(z & 0xff, DEBUG_BASE + y)) +#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff) +#define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y)) extern unsigned long calc_clock(void); -void debugInit(u32 baud, u8 data, u8 parity, u8 stop) +void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) { - if (UART16550_READ(UART_MOD_CNTRL) != 0x3) + + if (UART16550_READ(UART_MOD_CNTRL) != 0x3) { UART16550_WRITE(UART_MOD_CNTRL, 3); + } calc_clock(); /* disable interrupts */ @@ -62,7 +69,7 @@ void debugInit(u32 baud, u8 data, u8 parity, u8 stop) /* set up baud rate */ { - u32 divisor; + uint32 divisor; /* set divisor */ divisor = get_au1x00_uart_baud_base() / baud; @@ -73,9 +80,9 @@ void debugInit(u32 baud, u8 data, u8 parity, u8 stop) UART16550_WRITE(UART_LCR, (data | parity | stop)); } -static int remoteDebugInitialized; +static int remoteDebugInitialized = 0; -u8 getDebugChar(void) +uint8 getDebugChar(void) { if (!remoteDebugInitialized) { remoteDebugInitialized = 1; @@ -85,13 +92,15 @@ u8 getDebugChar(void) UART16550_STOP_1BIT); } - while ((UART16550_READ(UART_LSR) & 0x1) == 0); + while((UART16550_READ(UART_LSR) & 0x1) == 0); return UART16550_READ(UART_RX); } -int putDebugChar(u8 byte) +int putDebugChar(uint8 byte) { +// int i; + if (!remoteDebugInitialized) { remoteDebugInitialized = 1; debugInit(UART16550_BAUD_115200, @@ -100,8 +109,9 @@ int putDebugChar(u8 byte) UART16550_STOP_1BIT); } - while ((UART16550_READ(UART_LSR) & 0x40) == 0); + while ((UART16550_READ(UART_LSR)&0x40) == 0); UART16550_WRITE(UART_TX, byte); + //for (i=0;i<0xfff;i++); return 1; } diff --git a/trunk/arch/mips/au1000/common/dma.c b/trunk/arch/mips/au1000/common/dma.c index d6fbda232e6a..95f69ea146e9 100644 --- a/trunk/arch/mips/au1000/common/dma.c +++ b/trunk/arch/mips/au1000/common/dma.c @@ -1,11 +1,12 @@ /* * * BRIEF MODULE DESCRIPTION - * A DMA channel allocator for Au1x00. API is modeled loosely off of + * A DMA channel allocator for Au1000. API is modeled loosely off of * linux/kernel/dma.c. * - * Copyright 2000, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2000 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * stevel@mvista.com or source@mvista.com * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify it @@ -38,8 +39,7 @@ #include #include -#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || \ - defined(CONFIG_SOC_AU1100) +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100) /* * A note on resource allocation: * @@ -56,6 +56,7 @@ * returned from request_dma. */ + DEFINE_SPINLOCK(au1000_dma_spin_lock); struct dma_chan au1000_dma_table[NUM_AU1000_DMA_CHANNELS] = { @@ -70,7 +71,7 @@ struct dma_chan au1000_dma_table[NUM_AU1000_DMA_CHANNELS] = { }; EXPORT_SYMBOL(au1000_dma_table); -/* Device FIFO addresses and default DMA modes */ +// Device FIFO addresses and default DMA modes static const struct dma_dev { unsigned int fifo_addr; unsigned int dma_mode; @@ -79,8 +80,8 @@ static const struct dma_dev { {UART0_ADDR + UART_RX, 0}, {0, 0}, {0, 0}, - {AC97C_DATA, DMA_DW16 }, /* coherent */ - {AC97C_DATA, DMA_DR | DMA_DW16 }, /* coherent */ + {AC97C_DATA, DMA_DW16 }, // coherent + {AC97C_DATA, DMA_DR | DMA_DW16 }, // coherent {UART3_ADDR + UART_TX, DMA_DW8 | DMA_NC}, {UART3_ADDR + UART_RX, DMA_DR | DMA_DW8 | DMA_NC}, {USBD_EP0RD, DMA_DR | DMA_DW8 | DMA_NC}, @@ -100,10 +101,10 @@ int au1000_dma_read_proc(char *buf, char **start, off_t fpos, struct dma_chan *chan; for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) { - chan = get_dma_chan(i); - if (chan != NULL) + if ((chan = get_dma_chan(i)) != NULL) { len += sprintf(buf + len, "%2d: %s\n", i, chan->dev_str); + } } if (fpos >= len) { @@ -112,19 +113,18 @@ int au1000_dma_read_proc(char *buf, char **start, off_t fpos, return 0; } *start = buf + fpos; - len -= fpos; - if (len > length) + if ((len -= fpos) > length) return length; *eof = 1; return len; } -/* Device FIFO addresses and default DMA modes - 2nd bank */ +// Device FIFO addresses and default DMA modes - 2nd bank static const struct dma_dev dma_dev_table_bank2[DMA_NUM_DEV_BANK2] = { - { SD0_XMIT_FIFO, DMA_DS | DMA_DW8 }, /* coherent */ - { SD0_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8 }, /* coherent */ - { SD1_XMIT_FIFO, DMA_DS | DMA_DW8 }, /* coherent */ - { SD1_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8 } /* coherent */ + {SD0_XMIT_FIFO, DMA_DS | DMA_DW8}, // coherent + {SD0_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8}, // coherent + {SD1_XMIT_FIFO, DMA_DS | DMA_DW8}, // coherent + {SD1_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8} // coherent }; void dump_au1000_dma_channel(unsigned int dmanr) @@ -150,6 +150,7 @@ void dump_au1000_dma_channel(unsigned int dmanr) au_readl(chan->io + DMA_BUFFER1_COUNT)); } + /* * Finds a free channel, and binds the requested device to it. * Returns the allocated channel number, or negative on error. @@ -168,14 +169,14 @@ int request_au1000_dma(int dev_id, const char *dev_str, if (dev_id < 0 || dev_id >= (DMA_NUM_DEV + DMA_NUM_DEV_BANK2)) return -EINVAL; #else - if (dev_id < 0 || dev_id >= DMA_NUM_DEV) + if (dev_id < 0 || dev_id >= DMA_NUM_DEV) return -EINVAL; #endif - for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) + for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) { if (au1000_dma_table[i].dev_id < 0) break; - + } if (i == NUM_AU1000_DMA_CHANNELS) return -ENODEV; @@ -184,15 +185,15 @@ int request_au1000_dma(int dev_id, const char *dev_str, if (dev_id >= DMA_NUM_DEV) { dev_id -= DMA_NUM_DEV; dev = &dma_dev_table_bank2[dev_id]; - } else + } else { dev = &dma_dev_table[dev_id]; + } if (irqhandler) { chan->irq = AU1000_DMA_INT_BASE + i; chan->irq_dev = irq_dev_id; - ret = request_irq(chan->irq, irqhandler, irqflags, dev_str, - chan->irq_dev); - if (ret) { + if ((ret = request_irq(chan->irq, irqhandler, irqflags, + dev_str, chan->irq_dev))) { chan->irq = 0; chan->irq_dev = NULL; return ret; @@ -202,7 +203,7 @@ int request_au1000_dma(int dev_id, const char *dev_str, chan->irq_dev = NULL; } - /* fill it in */ + // fill it in chan->io = DMA_CHANNEL_BASE + i * DMA_CHANNEL_LEN; chan->dev_id = dev_id; chan->dev_str = dev_str; @@ -219,9 +220,8 @@ EXPORT_SYMBOL(request_au1000_dma); void free_au1000_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) { - printk(KERN_ERR "Error trying to free DMA%d\n", dmanr); + printk("Trying to free DMA%d\n", dmanr); return; } @@ -235,4 +235,4 @@ void free_au1000_dma(unsigned int dmanr) } EXPORT_SYMBOL(free_au1000_dma); -#endif /* AU1000 AU1500 AU1100 */ +#endif // AU1000 AU1500 AU1100 diff --git a/trunk/arch/mips/au1000/common/gpio.c b/trunk/arch/mips/au1000/common/gpio.c index b485d94ce8a5..525452589971 100644 --- a/trunk/arch/mips/au1000/common/gpio.c +++ b/trunk/arch/mips/au1000/common/gpio.c @@ -69,7 +69,7 @@ static int au1xxx_gpio2_direction_output(unsigned gpio, int value) static int au1xxx_gpio1_read(unsigned gpio) { - return (gpio1->pinstaterd >> gpio) & 0x01; + return ((gpio1->pinstaterd >> gpio) & 0x01); } static void au1xxx_gpio1_write(unsigned gpio, int value) @@ -104,6 +104,7 @@ int au1xxx_gpio_get_value(unsigned gpio) else return au1xxx_gpio1_read(gpio); } + EXPORT_SYMBOL(au1xxx_gpio_get_value); void au1xxx_gpio_set_value(unsigned gpio, int value) @@ -117,6 +118,7 @@ void au1xxx_gpio_set_value(unsigned gpio, int value) else au1xxx_gpio1_write(gpio, value); } + EXPORT_SYMBOL(au1xxx_gpio_set_value); int au1xxx_gpio_direction_input(unsigned gpio) @@ -130,6 +132,7 @@ int au1xxx_gpio_direction_input(unsigned gpio) return au1xxx_gpio1_direction_input(gpio); } + EXPORT_SYMBOL(au1xxx_gpio_direction_input); int au1xxx_gpio_direction_output(unsigned gpio, int value) @@ -143,4 +146,5 @@ int au1xxx_gpio_direction_output(unsigned gpio, int value) return au1xxx_gpio1_direction_output(gpio, value); } + EXPORT_SYMBOL(au1xxx_gpio_direction_output); diff --git a/trunk/arch/mips/au1000/common/irq.c b/trunk/arch/mips/au1000/common/irq.c index 40c6ceceb5f9..f0626992fd75 100644 --- a/trunk/arch/mips/au1000/common/irq.c +++ b/trunk/arch/mips/au1000/common/irq.c @@ -210,8 +210,10 @@ static inline void mask_and_ack_either_edge_irq(unsigned int irq_nr) au_sync(); } + static inline void mask_and_ack_level_irq(unsigned int irq_nr) { + local_disable_irq(irq_nr); au_sync(); #if defined(CONFIG_MIPS_PB1000) @@ -261,14 +263,14 @@ void restore_local_and_enable(int controller, unsigned long mask) unsigned long flags, new_mask; spin_lock_irqsave(&irq_lock, flags); - for (i = 0; i < 32; i++) + for (i = 0; i < 32; i++) { if (mask & (1 << i)) { if (controller) local_enable_irq(i + 32); else local_enable_irq(i); } - + } if (controller) new_mask = au_readl(IC1_MASKSET); else diff --git a/trunk/arch/mips/au1000/common/pci.c b/trunk/arch/mips/au1000/common/pci.c index 7866cf50cf99..7e966b31e3e1 100644 --- a/trunk/arch/mips/au1000/common/pci.c +++ b/trunk/arch/mips/au1000/common/pci.c @@ -2,8 +2,9 @@ * BRIEF MODULE DESCRIPTION * Alchemy/AMD Au1x00 PCI support. * - * Copyright 2001-2003, 2007-2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001-2003, 2007 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) * @@ -85,9 +86,9 @@ static int __init au1x_pci_setup(void) u32 prid = read_c0_prid(); if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { - au_writel((1 << 16) | au_readl(Au1500_PCI_CFG), - Au1500_PCI_CFG); - printk(KERN_INFO "Non-coherent PCI accesses enabled\n"); + au_writel((1 << 16) | au_readl(Au1500_PCI_CFG), + Au1500_PCI_CFG); + printk("Non-coherent PCI accesses enabled\n"); } } #endif diff --git a/trunk/arch/mips/au1000/common/platform.c b/trunk/arch/mips/au1000/common/platform.c index 8cae7753ef79..31d2a2270878 100644 --- a/trunk/arch/mips/au1000/common/platform.c +++ b/trunk/arch/mips/au1000/common/platform.c @@ -269,8 +269,8 @@ static struct platform_device au1x00_pcmcia_device = { #ifdef SMBUS_PSC_BASE static struct resource pbdb_smbus_resources[] = { { - .start = CPHYSADDR(SMBUS_PSC_BASE), - .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff), + .start = SMBUS_PSC_BASE, + .end = SMBUS_PSC_BASE + 0x24 - 1, .flags = IORESOURCE_MEM, }, }; @@ -302,17 +302,16 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = { #endif }; -static int __init au1xxx_platform_init(void) +int __init au1xxx_platform_init(void) { unsigned int uartclk = get_au1x00_uart_baud_base() * 16; int i; /* Fill up uartclk. */ - for (i = 0; au1x00_uart_data[i].flags; i++) + for (i = 0; au1x00_uart_data[i].flags ; i++) au1x00_uart_data[i].uartclk = uartclk; - return platform_add_devices(au1xxx_platform_devices, - ARRAY_SIZE(au1xxx_platform_devices)); + return platform_add_devices(au1xxx_platform_devices, ARRAY_SIZE(au1xxx_platform_devices)); } arch_initcall(au1xxx_platform_init); diff --git a/trunk/arch/mips/au1000/common/power.c b/trunk/arch/mips/au1000/common/power.c index 2166b9e1e80c..a8cd2c1b9e1b 100644 --- a/trunk/arch/mips/au1000/common/power.c +++ b/trunk/arch/mips/au1000/common/power.c @@ -1,9 +1,10 @@ /* * BRIEF MODULE DESCRIPTION - * Au1xx0 Power Management routines. + * Au1000 Power Management routines. * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * Some of the routines are right out of init/main.c, whose * copyrights apply here. @@ -42,10 +43,10 @@ #ifdef CONFIG_PM #define DEBUG 1 -#ifdef DEBUG -#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__, ## args) +#ifdef DEBUG +# define DPRINTK(fmt, args...) printk("%s: " fmt, __func__, ## args) #else -#define DPRINTK(fmt, args...) +# define DPRINTK(fmt, args...) #endif static void au1000_calibrate_delay(void); @@ -56,8 +57,7 @@ extern void local_enable_irq(unsigned int irq_nr); static DEFINE_SPINLOCK(pm_lock); -/* - * We need to save/restore a bunch of core registers that are +/* We need to save/restore a bunch of core registers that are * either volatile or reset to some state across a processor sleep. * If reading a register doesn't provide a proper result for a * later restore, we have to provide a function for loading that @@ -78,25 +78,24 @@ static unsigned int sleep_usbhost_enable; static unsigned int sleep_usbdev_enable; static unsigned int sleep_static_memctlr[4][3]; -/* - * Define this to cause the value you write to /proc/sys/pm/sleep to +/* Define this to cause the value you write to /proc/sys/pm/sleep to * set the TOY timer for the amount of time you want to sleep. * This is done mainly for testing, but may be useful in other cases. * The value is number of 32KHz ticks to sleep. */ #define SLEEP_TEST_TIMEOUT 1 -#ifdef SLEEP_TEST_TIMEOUT -static int sleep_ticks; +#ifdef SLEEP_TEST_TIMEOUT +static int sleep_ticks; void wakeup_counter0_set(int ticks); #endif -static void save_core_regs(void) +static void +save_core_regs(void) { extern void save_au1xxx_intctl(void); extern void pm_eth0_shutdown(void); - /* - * Do the serial ports.....these really should be a pm_* + /* Do the serial ports.....these really should be a pm_* * registered function by the driver......but of course the * standard serial driver doesn't understand our Au1xxx * unique registers. @@ -107,24 +106,27 @@ static void save_core_regs(void) sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK); sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL); - /* Shutdown USB host/device. */ + /* Shutdown USB host/device. + */ sleep_usbhost_enable = au_readl(USB_HOST_CONFIG); - /* There appears to be some undocumented reset register.... */ + /* There appears to be some undocumented reset register.... + */ au_writel(0, 0xb0100004); au_sync(); au_writel(0, USB_HOST_CONFIG); au_sync(); sleep_usbdev_enable = au_readl(USBD_ENABLE); au_writel(0, USBD_ENABLE); au_sync(); - /* Save interrupt controller state. */ + /* Save interrupt controller state. + */ save_au1xxx_intctl(); - /* Clocks and PLLs. */ + /* Clocks and PLLs. + */ sleep_aux_pll_cntrl = au_readl(SYS_AUXPLL); - /* - * We don't really need to do this one, but unless we + /* We don't really need to do this one, but unless we * write it again it won't have a valid value if we * happen to read it. */ @@ -132,7 +134,8 @@ static void save_core_regs(void) sleep_pin_function = au_readl(SYS_PINFUNC); - /* Save the static memory controller configuration. */ + /* Save the static memory controller configuration. + */ sleep_static_memctlr[0][0] = au_readl(MEM_STCFG0); sleep_static_memctlr[0][1] = au_readl(MEM_STTIME0); sleep_static_memctlr[0][2] = au_readl(MEM_STADDR0); @@ -147,7 +150,8 @@ static void save_core_regs(void) sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3); } -static void restore_core_regs(void) +static void +restore_core_regs(void) { extern void restore_au1xxx_intctl(void); extern void wakeup_counter0_adjust(void); @@ -156,7 +160,8 @@ static void restore_core_regs(void) au_writel(sleep_cpu_pll_cntrl, SYS_CPUPLL); au_sync(); au_writel(sleep_pin_function, SYS_PINFUNC); au_sync(); - /* Restore the static memory controller configuration. */ + /* Restore the static memory controller configuration. + */ au_writel(sleep_static_memctlr[0][0], MEM_STCFG0); au_writel(sleep_static_memctlr[0][1], MEM_STTIME0); au_writel(sleep_static_memctlr[0][2], MEM_STADDR0); @@ -170,8 +175,7 @@ static void restore_core_regs(void) au_writel(sleep_static_memctlr[3][1], MEM_STTIME3); au_writel(sleep_static_memctlr[3][2], MEM_STADDR3); - /* - * Enable the UART if it was enabled before sleep. + /* Enable the UART if it was enabled before sleep. * I guess I should define module control bits........ */ if (sleep_uart0_enable & 0x02) { @@ -198,7 +202,7 @@ void wakeup_from_suspend(void) int au_sleep(void) { unsigned long wakeup, flags; - extern void save_and_sleep(void); + extern void save_and_sleep(void); spin_lock_irqsave(&pm_lock, flags); @@ -206,22 +210,23 @@ int au_sleep(void) flush_cache_all(); - /** - ** The code below is all system dependent and we should probably + /** The code below is all system dependent and we should probably ** have a function call out of here to set this up. You need ** to configure the GPIO or timer interrupts that will bring ** you out of sleep. ** For testing, the TOY counter wakeup is useful. **/ + #if 0 au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD); - /* GPIO 6 can cause a wake up event */ + /* gpio 6 can cause a wake up event */ wakeup = au_readl(SYS_WAKEMSK); wakeup &= ~(1 << 8); /* turn off match20 wakeup */ - wakeup |= 1 << 6; /* turn on GPIO 6 wakeup */ + wakeup |= 1 << 6; /* turn on gpio 6 wakeup */ #else - /* For testing, allow match20 to wake us up. */ + /* For testing, allow match20 to wake us up. + */ #ifdef SLEEP_TEST_TIMEOUT wakeup_counter0_set(sleep_ticks); #endif @@ -235,8 +240,7 @@ int au_sleep(void) save_and_sleep(); - /* - * After a wakeup, the cpu vectors back to 0x1fc00000, so + /* after a wakeup, the cpu vectors back to 0x1fc00000 so * it's up to the boot code to get us back here. */ restore_core_regs(); @@ -244,22 +248,24 @@ int au_sleep(void) return 0; } -static int pm_do_sleep(ctl_table *ctl, int write, struct file *file, - void __user *buffer, size_t *len, loff_t *ppos) +static int pm_do_sleep(ctl_table * ctl, int write, struct file *file, + void __user *buffer, size_t * len, loff_t *ppos) { #ifdef SLEEP_TEST_TIMEOUT #define TMPBUFLEN2 16 char buf[TMPBUFLEN2], *p; #endif - if (!write) + if (!write) { *len = 0; - else { + } else { #ifdef SLEEP_TEST_TIMEOUT - if (*len > TMPBUFLEN2 - 1) + if (*len > TMPBUFLEN2 - 1) { return -EFAULT; - if (copy_from_user(buf, buffer, *len)) + } + if (copy_from_user(buf, buffer, *len)) { return -EFAULT; + } buf[*len] = 0; p = buf; sleep_ticks = simple_strtoul(p, &p, 0); @@ -270,8 +276,8 @@ static int pm_do_sleep(ctl_table *ctl, int write, struct file *file, return 0; } -static int pm_do_freq(ctl_table *ctl, int write, struct file *file, - void __user *buffer, size_t *len, loff_t *ppos) +static int pm_do_freq(ctl_table * ctl, int write, struct file *file, + void __user *buffer, size_t * len, loff_t *ppos) { int retval = 0, i; unsigned long val, pll; @@ -279,14 +285,14 @@ static int pm_do_freq(ctl_table *ctl, int write, struct file *file, #define MAX_CPU_FREQ 396 char buf[TMPBUFLEN], *p; unsigned long flags, intc0_mask, intc1_mask; - unsigned long old_baud_base, old_cpu_freq, old_clk, old_refresh; + unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk, + old_refresh; unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh; - unsigned long baud_rate; spin_lock_irqsave(&pm_lock, flags); - if (!write) + if (!write) { *len = 0; - else { + } else { /* Parse the new frequency */ if (*len > TMPBUFLEN - 1) { spin_unlock_irqrestore(&pm_lock, flags); @@ -306,7 +312,7 @@ static int pm_do_freq(ctl_table *ctl, int write, struct file *file, pll = val / 12; if ((pll > 33) || (pll < 7)) { /* 396 MHz max, 84 MHz min */ - /* Revisit this for higher speed CPUs */ + /* revisit this for higher speed cpus */ spin_unlock_irqrestore(&pm_lock, flags); return -EFAULT; } @@ -315,28 +321,30 @@ static int pm_do_freq(ctl_table *ctl, int write, struct file *file, old_cpu_freq = get_au1x00_speed(); new_cpu_freq = pll * 12 * 1000000; - new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL) - & 0x03) + 2) * 16)); + new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16)); set_au1x00_speed(new_cpu_freq); set_au1x00_uart_baud_base(new_baud_base); old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff; - new_refresh = ((old_refresh * new_cpu_freq) / old_cpu_freq) | - (au_readl(MEM_SDREFCFG) & ~0x1ffffff); + new_refresh = + ((old_refresh * new_cpu_freq) / + old_cpu_freq) | (au_readl(MEM_SDREFCFG) & ~0x1ffffff); au_writel(pll, SYS_CPUPLL); au_sync_delay(1); au_writel(new_refresh, MEM_SDREFCFG); au_sync_delay(1); - for (i = 0; i < 4; i++) - if (au_readl(UART_BASE + UART_MOD_CNTRL + - i * 0x00100000) == 3) { - old_clk = au_readl(UART_BASE + UART_CLK + - i * 0x00100000); + for (i = 0; i < 4; i++) { + if (au_readl + (UART_BASE + UART_MOD_CNTRL + + i * 0x00100000) == 3) { + old_clk = + au_readl(UART_BASE + UART_CLK + + i * 0x00100000); + // baud_rate = baud_base/clk baud_rate = old_baud_base / old_clk; - /* - * We won't get an exact baud rate and the error + /* we won't get an exact baud rate and the error * could be significant enough that our new * calculation will result in a clock that will * give us a baud rate that's too far off from @@ -351,14 +359,18 @@ static int pm_do_freq(ctl_table *ctl, int write, struct file *file, else if (baud_rate > 17000) baud_rate = 19200; else - baud_rate = 9600; + (baud_rate = 9600); + // new_clk = new_baud_base/baud_rate new_clk = new_baud_base / baud_rate; - au_writel(new_clk, UART_BASE + UART_CLK + - i * 0x00100000); + au_writel(new_clk, + UART_BASE + UART_CLK + + i * 0x00100000); au_sync_delay(10); } + } } + /* * We don't want _any_ interrupts other than match20. Otherwise our * au1000_calibrate_delay() calculation will be off, potentially a lot. @@ -416,15 +428,14 @@ static int __init pm_init(void) __initcall(pm_init); + /* * This is right out of init/main.c */ -/* - * This is the number of bits of precision for the loops_per_jiffy. - * Each bit takes on average 1.5/HZ seconds. This (like the original) - * is a little better than 1%. - */ +/* This is the number of bits of precision for the loops_per_jiffy. Each + bit takes on average 1.5/HZ seconds. This (like the original) is a little + better than 1% */ #define LPS_PREC 8 static void au1000_calibrate_delay(void) @@ -432,14 +443,14 @@ static void au1000_calibrate_delay(void) unsigned long ticks, loopbit; int lps_precision = LPS_PREC; - loops_per_jiffy = 1 << 12; + loops_per_jiffy = (1 << 12); while (loops_per_jiffy <<= 1) { - /* Wait for "start of" clock tick */ + /* wait for "start of" clock tick */ ticks = jiffies; while (ticks == jiffies) /* nothing */ ; - /* Go ... */ + /* Go .. */ ticks = jiffies; __delay(loops_per_jiffy); ticks = jiffies - ticks; @@ -447,10 +458,8 @@ static void au1000_calibrate_delay(void) break; } - /* - * Do a binary approximation to get loops_per_jiffy set to be equal - * one clock (up to lps_precision bits) - */ +/* Do a binary approximation to get loops_per_jiffy set to equal one clock + (up to lps_precision bits) */ loops_per_jiffy >>= 1; loopbit = loops_per_jiffy; while (lps_precision-- && (loopbit >>= 1)) { @@ -463,4 +472,4 @@ static void au1000_calibrate_delay(void) loops_per_jiffy &= ~loopbit; } } -#endif /* CONFIG_PM */ +#endif /* CONFIG_PM */ diff --git a/trunk/arch/mips/au1000/common/prom.c b/trunk/arch/mips/au1000/common/prom.c index 18b310b475ca..f10af829e4ec 100644 --- a/trunk/arch/mips/au1000/common/prom.c +++ b/trunk/arch/mips/au1000/common/prom.c @@ -3,8 +3,9 @@ * BRIEF MODULE DESCRIPTION * PROM library initialisation code, supports YAMON and U-Boot. * - * Copyright 2000-2001, 2006, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2000, 2001, 2006 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This file was derived from Carsten Langgaard's * arch/mips/mips-boards/xx files. @@ -56,7 +57,7 @@ void prom_init_cmdline(void) actr = 1; /* Always ignore argv[0] */ cp = &(arcs_cmdline[0]); - while (actr < prom_argc) { + while(actr < prom_argc) { strcpy(cp, prom_argv[actr]); cp += strlen(prom_argv[actr]); *cp++ = ' '; @@ -83,8 +84,10 @@ char *prom_getenv(char *envname) if (yamon) { if (strcmp(envname, *env++) == 0) return *env; - } else if (strncmp(envname, *env, i) == 0 && (*env)[i] == '=') - return *env + i + 1; + } else { + if (strncmp(envname, *env, i) == 0 && (*env)[i] == '=') + return *env + i + 1; + } env++; } @@ -107,13 +110,13 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str) { int i; - for (i = 0; i < 6; i++) { + for(i = 0; i < 6; i++) { unsigned char num; - if ((*str == '.') || (*str == ':')) + if((*str == '.') || (*str == ':')) str++; - num = str2hexnum(*str++) << 4; - num |= str2hexnum(*str++); + num = str2hexnum(*str++) << 4; + num |= (str2hexnum(*str++)); ea[i] = num; } } diff --git a/trunk/arch/mips/au1000/common/puts.c b/trunk/arch/mips/au1000/common/puts.c index 55bbe24d45b6..e34c67e89293 100644 --- a/trunk/arch/mips/au1000/common/puts.c +++ b/trunk/arch/mips/au1000/common/puts.c @@ -1,10 +1,11 @@ /* * * BRIEF MODULE DESCRIPTION - * Low level UART routines to directly access Alchemy UART. + * Low level uart routines to directly access a 16550 uart. * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -39,12 +40,12 @@ static volatile unsigned long * const com1 = (unsigned long *)SERIAL_BASE; + #ifdef SLOW_DOWN static inline void slow_down(void) { - int k; - - for (k = 0; k < 10000; k++); + int k; + for (k=0; k<10000; k++); } #else #define slow_down() @@ -53,16 +54,16 @@ static inline void slow_down(void) void prom_putchar(const unsigned char c) { - unsigned char ch; - int i = 0; - - do { - ch = com1[SER_CMD]; - slow_down(); - i++; - if (i > TIMEOUT) - break; - } while (0 == (ch & TX_BUSY)); + unsigned char ch; + int i = 0; - com1[SER_DATA] = c; + do { + ch = com1[SER_CMD]; + slow_down(); + i++; + if (i>TIMEOUT) { + break; + } + } while (0 == (ch & TX_BUSY)); + com1[SER_DATA] = c; } diff --git a/trunk/arch/mips/au1000/common/reset.c b/trunk/arch/mips/au1000/common/reset.c index d555429c8d6f..60cec537c745 100644 --- a/trunk/arch/mips/au1000/common/reset.c +++ b/trunk/arch/mips/au1000/common/reset.c @@ -1,10 +1,11 @@ /* * * BRIEF MODULE DESCRIPTION - * Au1xx0 reset routines. + * Au1000 reset routines. * - * Copyright 2001, 2006, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -27,11 +28,10 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include - #include extern int au_sleep(void); +extern void (*flush_cache_all)(void); void au1000_restart(char *command) { @@ -40,8 +40,8 @@ void au1000_restart(char *command) u32 prid = read_c0_prid(); printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n"); - - switch (prid & 0xFF000000) { + switch (prid & 0xFF000000) + { case 0x00000000: /* Au1000 */ au_writel(0x02, 0xb0000010); /* ac97_enable */ au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */ @@ -138,6 +138,9 @@ void au1000_restart(char *command) au_writel(0x00, 0xb1900064); /* sys_auxpll */ au_writel(0x00, 0xb1900100); /* sys_pininputen */ break; + + default: + break; } set_c0_status(ST0_BEV | ST0_ERL); @@ -155,25 +158,25 @@ void au1000_restart(char *command) void au1000_halt(void) { #if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) - /* Power off system */ - printk(KERN_NOTICE "\n** Powering off...\n"); - au_writew(au_readw(0xAF00001C) | (3 << 14), 0xAF00001C); + /* power off system */ + printk("\n** Powering off...\n"); + au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C); au_sync(); - while (1); /* should not get here */ + while(1); /* should not get here */ #else printk(KERN_NOTICE "\n** You can safely turn off the power\n"); #ifdef CONFIG_MIPS_MIRAGE au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT); #endif #ifdef CONFIG_MIPS_DB1200 - au_writew(au_readw(0xB980001C) | (1 << 14), 0xB980001C); + au_writew(au_readw(0xB980001C) | (1<<14), 0xB980001C); #endif #ifdef CONFIG_PM au_sleep(); - /* Should not get here */ - printk(KERN_ERR "Unable to put CPU in sleep mode\n"); - while (1); + /* should not get here */ + printk(KERN_ERR "Unable to put cpu in sleep mode\n"); + while(1); #else while (1) __asm__(".set\tmips3\n\t" diff --git a/trunk/arch/mips/au1000/common/setup.c b/trunk/arch/mips/au1000/common/setup.c index 1ac6b06f42a3..0e86f7a6b4a7 100644 --- a/trunk/arch/mips/au1000/common/setup.c +++ b/trunk/arch/mips/au1000/common/setup.c @@ -1,6 +1,7 @@ /* - * Copyright 2000, 2007-2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. cpu_bclk) { + bclk = sp->cpu_bclk; + if (bclk) + { /* Enable BCLK switching */ - bclk = au_readl(SYS_POWERCTRL); - au_writel(bclk | 0x60, SYS_POWERCTRL); - printk(KERN_INFO "BCLK switching enabled!\n"); + bclk = au_readl(0xB190003C); + au_writel(bclk | 0x60, 0xB190003C); + printk("BCLK switching enabled!\n"); } - if (sp->cpu_od) - /* Various early Au1xx0 errata corrected by this */ - set_c0_config(1 << 19); /* Set Config[OD] */ - else + if (sp->cpu_od) { + /* Various early Au1000 Errata corrected by this */ + set_c0_config(1<<19); /* Set Config[OD] */ + } + else { /* Clear to obtain best system bus performance */ - clear_c0_config(1 << 19); /* Clear Config[OD] */ + clear_c0_config(1<<19); /* Clear Config[OD] */ + } argptr = prom_getcmdline(); #ifdef CONFIG_SERIAL_8250_CONSOLE - argptr = strstr(argptr, "console="); - if (argptr == NULL) { + if ((argptr = strstr(argptr, "console=")) == NULL) { argptr = prom_getcmdline(); strcat(argptr, " console=ttyS0,115200"); } #endif #ifdef CONFIG_FB_AU1100 - argptr = strstr(argptr, "video="); - if (argptr == NULL) { - argptr = prom_getcmdline(); - /* default panel */ - /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ - } + if ((argptr = strstr(argptr, "video=")) == NULL) { + argptr = prom_getcmdline(); + /* default panel */ + /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ + } #endif + #if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000) /* au1000 does not support vra, au1500 and au1100 do */ strcat(argptr, " au1000_audio=vra"); @@ -125,7 +129,7 @@ void __init plat_mem_setup(void) /* This routine should be valid for all Au1x based boards */ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) { - /* Don't fixup 36-bit addresses */ + /* Don't fixup 36 bit addresses */ if ((phys_addr >> 32) != 0) return phys_addr; @@ -141,17 +145,17 @@ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) } #endif - /* - * All Au1xx0 SOCs have a PCMCIA controller. - * We setup our 32-bit pseudo addresses to be equal to the - * 36-bit addr >> 4, to make it easier to check the address + /* All Au1x SOCs have a pcmcia controller */ + /* We setup our 32 bit pseudo addresses to be equal to the + * 36 bit addr >> 4, to make it easier to check the address * and fix it. - * The PCMCIA socket 0 physical attribute address is 0xF 4000 0000. + * The Au1x socket 0 phys attribute address is 0xF 4000 0000. * The pseudo address we use is 0xF400 0000. Any address over - * 0xF400 0000 is a PCMCIA pseudo address. + * 0xF400 0000 is a pcmcia pseudo address. */ - if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) + if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) { return (phys_t)(phys_addr << 4); + } /* default nop */ return phys_addr; diff --git a/trunk/arch/mips/au1000/common/time.c b/trunk/arch/mips/au1000/common/time.c index 563d9390a872..bdb6d73b26fb 100644 --- a/trunk/arch/mips/au1000/common/time.c +++ b/trunk/arch/mips/au1000/common/time.c @@ -25,9 +25,11 @@ * * Setting up the clock on the MIPS boards. * - * We provide the clock interrupt processing and the timer offset compute - * functions. If CONFIG_PM is selected, we also ensure the 32KHz timer is - * available. -- Dan + * Update. Always configure the kernel with CONFIG_NEW_TIME_C. This + * will use the user interface gettimeofday() functions from the + * arch/mips/kernel/time.c, and we provide the clock interrupt processing + * and the timer offset compute functions. If CONFIG_PM is selected, + * we also ensure the 32KHz timer is available. -- Dan */ #include @@ -45,7 +47,8 @@ extern int allow_au1k_wait; /* default off for CP0 Counter */ #if HZ < 100 || HZ > 1000 #error "unsupported HZ value! Must be in [100,1000]" #endif -#define MATCH20_INC (328 * 100 / HZ) /* magic number 328 is for HZ=100... */ +#define MATCH20_INC (328*100/HZ) /* magic number 328 is for HZ=100... */ +extern void startup_match20_interrupt(irq_handler_t handler); static unsigned long last_pc0, last_match20; #endif @@ -58,7 +61,7 @@ static irqreturn_t counter0_irq(int irq, void *dev_id) { unsigned long pc0; int time_elapsed; - static int jiffie_drift; + static int jiffie_drift = 0; if (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) { /* should never happen! */ @@ -67,11 +70,13 @@ static irqreturn_t counter0_irq(int irq, void *dev_id) } pc0 = au_readl(SYS_TOYREAD); - if (pc0 < last_match20) + if (pc0 < last_match20) { /* counter overflowed */ time_elapsed = (0xffffffff - last_match20) + pc0; - else + } + else { time_elapsed = pc0 - last_match20; + } while (time_elapsed > 0) { do_timer(1); @@ -87,9 +92,8 @@ static irqreturn_t counter0_irq(int irq, void *dev_id) au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2); au_sync(); - /* - * Our counter ticks at 10.009765625 ms/tick, we we're running - * almost 10 uS too slow per tick. + /* our counter ticks at 10.009765625 ms/tick, we we're running + * almost 10uS too slow per tick. */ if (jiffie_drift >= 999) { @@ -113,17 +117,20 @@ struct irqaction counter0_action = { /* When we wakeup from sleep, we have to "catch up" on all of the * timer ticks we have missed. */ -void wakeup_counter0_adjust(void) +void +wakeup_counter0_adjust(void) { unsigned long pc0; int time_elapsed; pc0 = au_readl(SYS_TOYREAD); - if (pc0 < last_match20) + if (pc0 < last_match20) { /* counter overflowed */ time_elapsed = (0xffffffff - last_match20) + pc0; - else + } + else { time_elapsed = pc0 - last_match20; + } while (time_elapsed > 0) { time_elapsed -= MATCH20_INC; @@ -136,8 +143,10 @@ void wakeup_counter0_adjust(void) } -/* This is just for debugging to set the timer for a sleep delay. */ -void wakeup_counter0_set(int ticks) +/* This is just for debugging to set the timer for a sleep delay. +*/ +void +wakeup_counter0_set(int ticks) { unsigned long pc0; @@ -148,22 +157,21 @@ void wakeup_counter0_set(int ticks) } #endif -/* - * I haven't found anyone that doesn't use a 12 MHz source clock, +/* I haven't found anyone that doesn't use a 12 MHz source clock, * but just in case..... */ #define AU1000_SRC_CLK 12000000 /* * We read the real processor speed from the PLL. This is important - * because it is more accurate than computing it from the 32 KHz + * because it is more accurate than computing it from the 32KHz * counter, if it exists. If we don't have an accurate processor * speed, all of the peripherals that derive their clocks based on * this advertised speed will introduce error and sometimes not work * properly. This function is futher convoluted to still allow configurations * to do that in case they have really, really old silicon with a - * write-only PLL register, that we need the 32 KHz when power management - * "wait" is enabled, and we need to detect if the 32 KHz isn't present + * write-only PLL register, that we need the 32KHz when power management + * "wait" is enabled, and we need to detect if the 32KHz isn't present * but requested......got it? :-) -- Dan */ unsigned long calc_clock(void) @@ -174,7 +182,8 @@ unsigned long calc_clock(void) spin_lock_irqsave(&time_lock, flags); - /* Power management cares if we don't have a 32 KHz counter. */ + /* Power management cares if we don't have a 32KHz counter. + */ no_au1xxx_32khz = 0; counter = au_readl(SYS_COUNTER_CNTRL); if (counter & SYS_CNTRL_E0) { @@ -184,7 +193,7 @@ unsigned long calc_clock(void) while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S); /* RTC now ticks at 32.768/16 kHz */ - au_writel(trim_divide - 1, SYS_RTCTRIM); + au_writel(trim_divide-1, SYS_RTCTRIM); while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S); while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S); @@ -206,11 +215,9 @@ unsigned long calc_clock(void) #endif else cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK; - /* On Alchemy CPU:counter ratio is 1:1 */ mips_hpt_frequency = cpu_speed; - /* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */ - set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL) - & 0x03) + 2) * 16)); + // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) + set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16)); spin_unlock_irqrestore(&time_lock, flags); return cpu_speed; } @@ -221,10 +228,10 @@ void __init plat_time_init(void) est_freq += 5000; /* round */ est_freq -= est_freq%10000; - printk(KERN_INFO "CPU frequency %u.%02u MHz\n", - est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000); - set_au1x00_speed(est_freq); - set_au1x00_lcd_clock(); /* program the LCD clock */ + printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, + (est_freq%1000000)*100/1000000); + set_au1x00_speed(est_freq); + set_au1x00_lcd_clock(); // program the LCD clock #ifdef CONFIG_PM /* @@ -236,29 +243,30 @@ void __init plat_time_init(void) * counter 0 interrupt as a special irq and it doesn't show * up under /proc/interrupts. * - * Check to ensure we really have a 32 KHz oscillator before + * Check to ensure we really have a 32KHz oscillator before * we do this. */ if (no_au1xxx_32khz) - printk(KERN_WARNING "WARNING: no 32KHz clock found.\n"); + printk("WARNING: no 32KHz clock found.\n"); else { while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S); au_writel(0, SYS_TOYWRITE); while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S); - au_writel(au_readl(SYS_WAKEMSK) | (1 << 8), SYS_WAKEMSK); + au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK); au_writel(~0, SYS_WAKESRC); au_sync(); while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20); - /* Setup match20 to interrupt once every HZ */ + /* setup match20 to interrupt once every HZ */ last_pc0 = last_match20 = au_readl(SYS_TOYREAD); au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2); au_sync(); while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20); setup_irq(AU1000_TOY_MATCH2_INT, &counter0_action); - /* We can use the real 'wait' instruction. */ + /* We can use the real 'wait' instruction. + */ allow_au1k_wait = 1; } diff --git a/trunk/arch/mips/au1000/db1x00/Makefile b/trunk/arch/mips/au1000/db1x00/Makefile index 274db3b55d82..51d62bd5d900 100644 --- a/trunk/arch/mips/au1000/db1x00/Makefile +++ b/trunk/arch/mips/au1000/db1x00/Makefile @@ -1,8 +1,8 @@ # -# Copyright 2000, 2008 MontaVista Software Inc. -# Author: MontaVista Software, Inc. -# -# Makefile for the Alchemy Semiconductor DBAu1xx0 boards. +# Copyright 2000 MontaVista Software Inc. +# Author: MontaVista Software, Inc. +# ppopov@mvista.com or source@mvista.com # +# Makefile for the Alchemy Semiconductor Db1x00 board. lib-y := init.o board_setup.o irqmap.o diff --git a/trunk/arch/mips/au1000/db1x00/board_setup.c b/trunk/arch/mips/au1000/db1x00/board_setup.c index 9e5ccbbfcedd..b7dcbad5c586 100644 --- a/trunk/arch/mips/au1000/db1x00/board_setup.c +++ b/trunk/arch/mips/au1000/db1x00/board_setup.c @@ -3,8 +3,9 @@ * BRIEF MODULE DESCRIPTION * Alchemy Db1x00 board setup. * - * Copyright 2000, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2000 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -36,49 +37,49 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; void board_reset(void) { - /* Hit BCSR.SW_RESET[RESET] */ + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ bcsr->swreset = 0x0000; } void __init board_setup(void) { - u32 pin_func = 0; + u32 pin_func; - /* Not valid for Au1550 */ -#if defined(CONFIG_IRDA) && \ - (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) - /* Set IRFIRSEL instead of GPIO15 */ - pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF; + pin_func = 0; + /* not valid for 1550 */ + +#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) + /* set IRFIRSEL instead of GPIO15 */ + pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8)); au_writel(pin_func, SYS_PINFUNC); - /* Power off until the driver is in use */ + /* power off until the driver is in use */ bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK; - bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF; + bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF; au_sync(); #endif bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */ #ifdef CONFIG_MIPS_MIRAGE - /* Enable GPIO[31:0] inputs */ + /* enable GPIO[31:0] inputs */ au_writel(0, SYS_PININPUTEN); - /* GPIO[20] is output, tristate the other input primary GPIOs */ - au_writel(~(1 << 20), SYS_TRIOUTCLR); + /* GPIO[20] is output, tristate the other input primary GPIO's */ + au_writel((u32)(~(1<<20)), SYS_TRIOUTCLR); - /* Set GPIO[210:208] instead of SSI_0 */ - pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0; + /* set GPIO[210:208] instead of SSI_0 */ + pin_func = au_readl(SYS_PINFUNC) | (u32)(1); - /* Set GPIO[215:211] for LEDs */ - pin_func |= 5 << 2; + /* set GPIO[215:211] for LED's */ + pin_func |= (u32)((5<<2)); - /* Set GPIO[214:213] for more LEDs */ - pin_func |= 5 << 12; + /* set GPIO[214:213] for more LED's */ + pin_func |= (u32)((5<<12)); - /* Set GPIO[207:200] instead of PCMCIA/LCD */ - pin_func |= SYS_PF_LCD | SYS_PF_PC; + /* set GPIO[207:200] instead of PCMCIA/LCD */ + pin_func |= (u32)((3<<17)); au_writel(pin_func, SYS_PINFUNC); - /* - * Enable speaker amplifier. This should + /* Enable speaker amplifier. This should * be part of the audio driver. */ au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR); @@ -88,21 +89,21 @@ void __init board_setup(void) au_sync(); #ifdef CONFIG_MIPS_DB1000 - printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n"); + printk("AMD Alchemy Au1000/Db1000 Board\n"); #endif #ifdef CONFIG_MIPS_DB1500 - printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n"); + printk("AMD Alchemy Au1500/Db1500 Board\n"); #endif #ifdef CONFIG_MIPS_DB1100 - printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n"); + printk("AMD Alchemy Au1100/Db1100 Board\n"); #endif #ifdef CONFIG_MIPS_BOSPORUS - printk(KERN_INFO "AMD Alchemy Bosporus Board\n"); + printk("AMD Alchemy Bosporus Board\n"); #endif #ifdef CONFIG_MIPS_MIRAGE - printk(KERN_INFO "AMD Alchemy Mirage Board\n"); + printk("AMD Alchemy Mirage Board\n"); #endif #ifdef CONFIG_MIPS_DB1550 - printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n"); + printk("AMD Alchemy Au1550/Db1550 Board\n"); #endif } diff --git a/trunk/arch/mips/au1000/db1x00/init.c b/trunk/arch/mips/au1000/db1x00/init.c index 5ebe0de5e459..d3b967caf70c 100644 --- a/trunk/arch/mips/au1000/db1x00/init.c +++ b/trunk/arch/mips/au1000/db1x00/init.c @@ -2,8 +2,9 @@ * BRIEF MODULE DESCRIPTION * PB1000 board setup * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -48,8 +49,8 @@ void __init prom_init(void) unsigned long memsize; prom_argc = fw_arg0; - prom_argv = (char **)fw_arg1; - prom_envp = (char **)fw_arg2; + prom_argv = (char **) fw_arg1; + prom_envp = (char **) fw_arg2; prom_init_cmdline(); @@ -57,6 +58,6 @@ void __init prom_init(void) if (!memsize_str) memsize = 0x04000000; else - memsize = strict_strtol(memsize_str, 0, NULL); + memsize = simple_strtol(memsize_str, NULL, 0); add_memory_region(0, memsize, BOOT_MEM_RAM); } diff --git a/trunk/arch/mips/au1000/db1x00/irqmap.c b/trunk/arch/mips/au1000/db1x00/irqmap.c index 94c090e8bf7a..eaa50c7b6341 100644 --- a/trunk/arch/mips/au1000/db1x00/irqmap.c +++ b/trunk/arch/mips/au1000/db1x00/irqmap.c @@ -32,32 +32,32 @@ #ifdef CONFIG_MIPS_DB1500 char irq_tab_alchemy[][5] __initdata = { - [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT371 */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ + [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT371 */ + [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ }; #endif #ifdef CONFIG_MIPS_BOSPORUS char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 11 - miniPCI */ - [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - SN1741 */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ + [11] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 11 - miniPCI */ + [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - SN1741 */ + [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ }; #endif #ifdef CONFIG_MIPS_MIRAGE char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, INTD, INTX, INTX, INTX }, /* IDSEL 11 - SMI VGX */ - [12] = { -1, INTX, INTX, INTC, INTX }, /* IDSEL 12 - PNX1300 */ - [13] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 13 - miniPCI */ + [11] = { -1, INTD, INTX, INTX, INTX}, /* IDSEL 11 - SMI VGX */ + [12] = { -1, INTX, INTX, INTC, INTX}, /* IDSEL 12 - PNX1300 */ + [13] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 13 - miniPCI */ }; #endif #ifdef CONFIG_MIPS_DB1550 char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, INTC, INTX, INTX, INTX }, /* IDSEL 11 - on-board HPT371 */ - [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */ + [11] = { -1, INTC, INTX, INTX, INTX}, /* IDSEL 11 - on-board HPT371 */ + [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */ + [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */ }; #endif diff --git a/trunk/arch/mips/au1000/mtx-1/Makefile b/trunk/arch/mips/au1000/mtx-1/Makefile index 7c67b3d33bec..85a90941de4f 100644 --- a/trunk/arch/mips/au1000/mtx-1/Makefile +++ b/trunk/arch/mips/au1000/mtx-1/Makefile @@ -1,6 +1,7 @@ # # Copyright 2003 MontaVista Software Inc. -# Author: MontaVista Software, Inc. +# Author: MontaVista Software, Inc. +# ppopov@mvista.com or source@mvista.com # Bruno Randolf # # Makefile for 4G Systems MTX-1 board. diff --git a/trunk/arch/mips/au1000/mtx-1/board_setup.c b/trunk/arch/mips/au1000/mtx-1/board_setup.c index 3f8079186cf2..5736354829c6 100644 --- a/trunk/arch/mips/au1000/mtx-1/board_setup.c +++ b/trunk/arch/mips/au1000/mtx-1/board_setup.c @@ -3,8 +3,9 @@ * BRIEF MODULE DESCRIPTION * 4G Systems MTX-1 board setup. * - * Copyright 2003, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2003 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * Bruno Randolf * * This program is free software; you can redistribute it and/or modify it @@ -33,7 +34,7 @@ #include extern int (*board_pci_idsel)(unsigned int devsel, int assert); -int mtx1_pci_idsel(unsigned int devsel, int assert); +int mtx1_pci_idsel(unsigned int devsel, int assert); void board_reset(void) { @@ -44,36 +45,36 @@ void board_reset(void) void __init board_setup(void) { #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) - /* Enable USB power switch */ - au_writel(au_readl(GPIO2_DIR) | 0x10, GPIO2_DIR); - au_writel(0x100000, GPIO2_OUTPUT); + // enable USB power switch + au_writel( au_readl(GPIO2_DIR) | 0x10, GPIO2_DIR ); + au_writel( 0x100000, GPIO2_OUTPUT ); #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ #ifdef CONFIG_PCI #if defined(__MIPSEB__) - au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG); + au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); #else au_writel(0xf, Au1500_PCI_CFG); #endif #endif - /* Initialize sys_pinfunc */ - au_writel(SYS_PF_NI2, SYS_PINFUNC); + // initialize sys_pinfunc: + au_writel( SYS_PF_NI2, SYS_PINFUNC ); - /* Initialize GPIO */ - au_writel(0xFFFFFFFF, SYS_TRIOUTCLR); - au_writel(0x00000001, SYS_OUTPUTCLR); /* set M66EN (PCI 66MHz) to OFF */ - au_writel(0x00000008, SYS_OUTPUTSET); /* set PCI CLKRUN# to OFF */ - au_writel(0x00000002, SYS_OUTPUTSET); /* set EXT_IO3 ON */ - au_writel(0x00000020, SYS_OUTPUTCLR); /* set eth PHY TX_ER to OFF */ + // initialize GPIO + au_writel( 0xFFFFFFFF, SYS_TRIOUTCLR ); + au_writel( 0x00000001, SYS_OUTPUTCLR ); // set M66EN (PCI 66MHz) to OFF + au_writel( 0x00000008, SYS_OUTPUTSET ); // set PCI CLKRUN# to OFF + au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON + au_writel( 0x00000020, SYS_OUTPUTCLR ); // set eth PHY TX_ER to OFF - /* Enable LED and set it to green */ - au_writel(au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR); - au_writel(0x18000800, GPIO2_OUTPUT); + // enable LED and set it to green + au_writel( au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR ); + au_writel( 0x18000800, GPIO2_OUTPUT ); board_pci_idsel = mtx1_pci_idsel; - printk(KERN_INFO "4G Systems MTX-1 Board\n"); + printk("4G Systems MTX-1 Board\n"); } int @@ -81,18 +82,20 @@ mtx1_pci_idsel(unsigned int devsel, int assert) { #define MTX_IDSEL_ONLY_0_AND_3 0 #if MTX_IDSEL_ONLY_0_AND_3 - if (devsel != 0 && devsel != 3) { - printk(KERN_ERR "*** not 0 or 3\n"); - return 0; - } + if (devsel != 0 && devsel != 3) { + printk("*** not 0 or 3\n"); + return 0; + } #endif - if (assert && devsel != 0) - /* Suppress signal to Cardbus */ - au_writel(0x00000002, SYS_OUTPUTCLR); /* set EXT_IO3 OFF */ - else - au_writel(0x00000002, SYS_OUTPUTSET); /* set EXT_IO3 ON */ - au_sync_udelay(1); - return 1; + if (assert && devsel != 0) { + // suppress signal to cardbus + au_writel( 0x00000002, SYS_OUTPUTCLR ); // set EXT_IO3 OFF + } + else { + au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON + } + au_sync_udelay(1); + return 1; } diff --git a/trunk/arch/mips/au1000/mtx-1/init.c b/trunk/arch/mips/au1000/mtx-1/init.c index 33a4aebe0cba..c015cbce1cca 100644 --- a/trunk/arch/mips/au1000/mtx-1/init.c +++ b/trunk/arch/mips/au1000/mtx-1/init.c @@ -3,8 +3,9 @@ * BRIEF MODULE DESCRIPTION * 4G Systems MTX-1 board setup * - * Copyright 2003, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2003 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * Bruno Randolf * * This program is free software; you can redistribute it and/or modify it @@ -46,8 +47,8 @@ void __init prom_init(void) unsigned long memsize; prom_argc = fw_arg0; - prom_argv = (char **)fw_arg1; - prom_envp = (char **)fw_arg2; + prom_argv = (char **) fw_arg1; + prom_envp = (char **) fw_arg2; prom_init_cmdline(); @@ -55,6 +56,6 @@ void __init prom_init(void) if (!memsize_str) memsize = 0x04000000; else - memsize = strict_strtol(memsize_str, 0, NULL); + memsize = simple_strtol(memsize_str, NULL, 0); add_memory_region(0, memsize, BOOT_MEM_RAM); } diff --git a/trunk/arch/mips/au1000/mtx-1/irqmap.c b/trunk/arch/mips/au1000/mtx-1/irqmap.c index f2bf02951e9c..78d70c42c9db 100644 --- a/trunk/arch/mips/au1000/mtx-1/irqmap.c +++ b/trunk/arch/mips/au1000/mtx-1/irqmap.c @@ -31,18 +31,18 @@ #include char irq_tab_alchemy[][5] __initdata = { - [0] = { -1, INTA, INTA, INTX, INTX }, /* IDSEL 00 - AdapterA-Slot0 (top) */ - [1] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */ - [2] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 02 - AdapterB-Slot0 (top) */ - [3] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */ - [4] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 04 - AdapterC-Slot0 (top) */ - [5] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */ - [6] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 06 - AdapterD-Slot0 (top) */ - [7] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */ + [0] = { -1, INTA, INTA, INTX, INTX}, /* IDSEL 00 - AdapterA-Slot0 (top) */ + [1] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 01 - AdapterA-Slot1 (bottom) */ + [2] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 02 - AdapterB-Slot0 (top) */ + [3] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 03 - AdapterB-Slot1 (bottom) */ + [4] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 04 - AdapterC-Slot0 (top) */ + [5] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 05 - AdapterC-Slot1 (bottom) */ + [6] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 06 - AdapterD-Slot0 (top) */ + [7] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 07 - AdapterD-Slot1 (bottom) */ }; struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { - { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 }, + { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, diff --git a/trunk/arch/mips/au1000/mtx-1/platform.c b/trunk/arch/mips/au1000/mtx-1/platform.c index 9807be37c32f..a7edbf0829ac 100644 --- a/trunk/arch/mips/au1000/mtx-1/platform.c +++ b/trunk/arch/mips/au1000/mtx-1/platform.c @@ -21,10 +21,11 @@ #include #include #include -#include #include #include +#include + static struct gpio_keys_button mtx1_gpio_button[] = { { .gpio = 207, diff --git a/trunk/arch/mips/au1000/pb1000/Makefile b/trunk/arch/mips/au1000/pb1000/Makefile index 99bbec0ca41b..daa1a507e72f 100644 --- a/trunk/arch/mips/au1000/pb1000/Makefile +++ b/trunk/arch/mips/au1000/pb1000/Makefile @@ -1,8 +1,8 @@ # -# Copyright 2000, 2008 MontaVista Software Inc. -# Author: MontaVista Software, Inc. -# -# Makefile for the Alchemy Semiconductor Pb1000 board. +# Copyright 2000 MontaVista Software Inc. +# Author: MontaVista Software, Inc. +# ppopov@mvista.com or source@mvista.com # +# Makefile for the Alchemy Semiconductor PB1000 board. lib-y := init.o board_setup.o irqmap.o diff --git a/trunk/arch/mips/au1000/pb1000/board_setup.c b/trunk/arch/mips/au1000/pb1000/board_setup.c index 25df167a95b3..33f15acc1b17 100644 --- a/trunk/arch/mips/au1000/pb1000/board_setup.c +++ b/trunk/arch/mips/au1000/pb1000/board_setup.c @@ -1,6 +1,7 @@ /* - * Copyright 2000, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2000 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -39,126 +40,128 @@ void __init board_setup(void) u32 sys_freqctrl, sys_clksrc; u32 prid = read_c0_prid(); - /* Set AUX clock to 12 MHz * 8 = 96 MHz */ + // set AUX clock to 12MHz * 8 = 96 MHz au_writel(8, SYS_AUXPLL); au_writel(0, SYS_PINSTATERD); udelay(100); #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) - /* Zero and disable FREQ2 */ + /* zero and disable FREQ2 */ sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl &= ~0xFFF00000; au_writel(sys_freqctrl, SYS_FREQCTRL0); - /* Zero and disable USBH/USBD clocks */ + /* zero and disable USBH/USBD clocks */ sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK | - SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK); + sys_clksrc &= ~0x00007FE0; au_writel(sys_clksrc, SYS_CLKSRC); sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl &= ~0xFFF00000; sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK | - SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK); + sys_clksrc &= ~0x00007FE0; - switch (prid & 0x000000FF) { + switch (prid & 0x000000FF) + { case 0x00: /* DA */ case 0x01: /* HA */ case 0x02: /* HB */ - /* CPU core freq to 48 MHz to slow it way down... */ - au_writel(4, SYS_CPUPLL); + /* CPU core freq to 48MHz to slow it way down... */ + au_writel(4, SYS_CPUPLL); - /* - * Setup 48 MHz FREQ2 from CPUPLL for USB Host - * FRDIV2 = 3 -> div by 8 of 384 MHz -> 48 MHz - */ - sys_freqctrl |= (3 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2; - au_writel(sys_freqctrl, SYS_FREQCTRL0); + /* + * Setup 48MHz FREQ2 from CPUPLL for USB Host + */ + /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */ + sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20)); + au_writel(sys_freqctrl, SYS_FREQCTRL0); - /* CPU core freq to 384 MHz */ - au_writel(0x20, SYS_CPUPLL); + /* CPU core freq to 384MHz */ + au_writel(0x20, SYS_CPUPLL); - printk(KERN_INFO "Au1000: 48 MHz OHCI workaround enabled\n"); + printk("Au1000: 48MHz OHCI workaround enabled\n"); break; - default: /* HC and newer */ - /* FREQ2 = aux / 2 = 48 MHz */ - sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | - SYS_FC_FE2 | SYS_FC_FS2; - au_writel(sys_freqctrl, SYS_FREQCTRL0); + default: /* HC and newer */ + // FREQ2 = aux/2 = 48 MHz + sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); + au_writel(sys_freqctrl, SYS_FREQCTRL0); break; } /* - * Route 48 MHz FREQ2 into USB Host and/or Device + * Route 48MHz FREQ2 into USB Host and/or Device */ - sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT; +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + sys_clksrc |= ((4<<12) | (0<<11) | (0<<10)); +#endif au_writel(sys_clksrc, SYS_CLKSRC); - /* Configure pins GPIO[14:9] as GPIO */ - pin_func = au_readl(SYS_PINFUNC) & ~(SYS_PF_UR3 | SYS_PF_USB); + // configure pins GPIO[14:9] as GPIO + pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8080); - /* 2nd USB port is USB host */ - pin_func |= SYS_PF_USB; + // 2nd USB port is USB host + pin_func |= 0x8000; au_writel(pin_func, SYS_PINFUNC); au_writel(0x2800, SYS_TRIOUTCLR); au_writel(0x0030, SYS_OUTPUTCLR); #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ - /* Make GPIO 15 an input (for interrupt line) */ - pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_IRF; - /* We don't need I2S, so make it available for GPIO[31:29] */ - pin_func |= SYS_PF_I2S; + // make gpio 15 an input (for interrupt line) + pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x100); + // we don't need I2S, so make it available for GPIO[31:29] + pin_func |= (1<<5); au_writel(pin_func, SYS_PINFUNC); au_writel(0x8000, SYS_TRIOUTCLR); - static_cfg0 = au_readl(MEM_STCFG0) & ~0xc00; + static_cfg0 = au_readl(MEM_STCFG0) & (u32)(~0xc00); au_writel(static_cfg0, MEM_STCFG0); - /* configure RCE2* for LCD */ + // configure RCE2* for LCD au_writel(0x00000004, MEM_STCFG2); - /* MEM_STTIME2 */ + // MEM_STTIME2 au_writel(0x09000000, MEM_STTIME2); - /* Set 32-bit base address decoding for RCE2* */ + // Set 32-bit base address decoding for RCE2* au_writel(0x10003ff0, MEM_STADDR2); - /* - * PCI CPLD setup - * Expand CE0 to cover PCI - */ + // PCI CPLD setup + // expand CE0 to cover PCI au_writel(0x11803e40, MEM_STADDR1); - /* Burst visibility on */ + // burst visibility on au_writel(au_readl(MEM_STCFG0) | 0x1000, MEM_STCFG0); - au_writel(0x83, MEM_STCFG1); /* ewait enabled, flash timing */ - au_writel(0x33030a10, MEM_STTIME1); /* slower timing for FPGA */ + au_writel(0x83, MEM_STCFG1); // ewait enabled, flash timing + au_writel(0x33030a10, MEM_STTIME1); // slower timing for FPGA - /* Setup the static bus controller */ + /* setup the static bus controller */ au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ - /* - * Enable Au1000 BCLK switching - note: sed1356 must not use - * its BCLK (Au1000 LCLK) for any timings - */ - switch (prid & 0x000000FF) { +#ifdef CONFIG_PCI + au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0 + au_writel(0, SDRAM_MBAR); // set mbar to 0 + au_writel(0x2, SDRAM_CMD); // enable memory accesses + au_sync_delay(1); +#endif + + /* Enable Au1000 BCLK switching - note: sed1356 must not use + * its BCLK (Au1000 LCLK) for any timings */ + switch (prid & 0x000000FF) + { case 0x00: /* DA */ case 0x01: /* HA */ case 0x02: /* HB */ break; default: /* HC and newer */ - /* - * Enable sys bus clock divider when IDLE state or no bus - * activity. - */ + /* Enable sys bus clock divider when IDLE state or no bus + activity. */ au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); break; } diff --git a/trunk/arch/mips/au1000/pb1000/init.c b/trunk/arch/mips/au1000/pb1000/init.c index 3837365d613d..549447df71d6 100644 --- a/trunk/arch/mips/au1000/pb1000/init.c +++ b/trunk/arch/mips/au1000/pb1000/init.c @@ -1,9 +1,10 @@ /* * BRIEF MODULE DESCRIPTION - * Pb1000 board setup + * PB1000 board setup * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -43,15 +44,16 @@ void __init prom_init(void) unsigned char *memsize_str; unsigned long memsize; - prom_argc = (int)fw_arg0; - prom_argv = (char **)fw_arg1; - prom_envp = (char **)fw_arg2; + prom_argc = (int) fw_arg0; + prom_argv = (char **) fw_arg1; + prom_envp = (char **) fw_arg2; prom_init_cmdline(); memsize_str = prom_getenv("memsize"); - if (!memsize_str) + if (!memsize_str) { memsize = 0x04000000; - else - memsize = strict_strtol(memsize_str, 0, NULL); + } else { + memsize = simple_strtol(memsize_str, NULL, 0); + } add_memory_region(0, memsize, BOOT_MEM_RAM); } diff --git a/trunk/arch/mips/au1000/pb1100/Makefile b/trunk/arch/mips/au1000/pb1100/Makefile index 793e97c49e46..996236df6375 100644 --- a/trunk/arch/mips/au1000/pb1100/Makefile +++ b/trunk/arch/mips/au1000/pb1100/Makefile @@ -1,8 +1,8 @@ # -# Copyright 2000, 2001, 2008 MontaVista Software Inc. -# Author: MontaVista Software, Inc. +# Copyright 2000,2001 MontaVista Software Inc. +# Author: MontaVista Software, Inc. +# ppopov@mvista.com or source@mvista.com # # Makefile for the Alchemy Semiconductor Pb1100 board. -# lib-y := init.o board_setup.o irqmap.o diff --git a/trunk/arch/mips/au1000/pb1100/board_setup.c b/trunk/arch/mips/au1000/pb1100/board_setup.c index c0bfd59a7a36..656164c8e9ca 100644 --- a/trunk/arch/mips/au1000/pb1100/board_setup.c +++ b/trunk/arch/mips/au1000/pb1100/board_setup.c @@ -1,6 +1,7 @@ /* - * Copyright 2002, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2002 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -31,15 +32,15 @@ void board_reset(void) { - /* Hit BCSR.RST_VDDI[SOFT_RESET] */ - au_writel(0x00000000, PB1100_RST_VDDI); + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ + au_writel(0x00000000, 0xAE00001C); } void __init board_setup(void) { - volatile void __iomem *base = (volatile void __iomem *)0xac000000UL; + volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL; - /* Set AUX clock to 12 MHz * 8 = 96 MHz */ + // set AUX clock to 12MHz * 8 = 96 MHz au_writel(8, SYS_AUXPLL); au_writel(0, SYS_PININPUTEN); udelay(100); @@ -48,47 +49,44 @@ void __init board_setup(void) { u32 pin_func, sys_freqctrl, sys_clksrc; - /* Configure pins GPIO[14:9] as GPIO */ - pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3; + // configure pins GPIO[14:9] as GPIO + pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); - /* Zero and disable FREQ2 */ + /* zero and disable FREQ2 */ sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl &= ~0xFFF00000; au_writel(sys_freqctrl, SYS_FREQCTRL0); - /* Zero and disable USBH/USBD/IrDA clock */ + /* zero and disable USBH/USBD/IrDA clock */ sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK); + sys_clksrc &= ~0x0000001F; au_writel(sys_clksrc, SYS_CLKSRC); sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl &= ~0xFFF00000; sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK); + sys_clksrc &= ~0x0000001F; - /* FREQ2 = aux / 2 = 48 MHz */ - sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | - SYS_FC_FE2 | SYS_FC_FS2; + // FREQ2 = aux/2 = 48 MHz + sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); au_writel(sys_freqctrl, SYS_FREQCTRL0); /* - * Route 48 MHz FREQ2 into USBH/USBD/IrDA + * Route 48MHz FREQ2 into USBH/USBD/IrDA */ - sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT; + sys_clksrc |= ((4<<2) | (0<<1) | 0 ); au_writel(sys_clksrc, SYS_CLKSRC); - /* Setup the static bus controller */ + /* setup the static bus controller */ au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ - /* - * Get USB Functionality pin state (device vs host drive pins). - */ - pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB; - /* 2nd USB port is USB host. */ - pin_func |= SYS_PF_USB; + // get USB Functionality pin state (device vs host drive pins) + pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); + // 2nd USB port is USB host + pin_func |= 0x8000; au_writel(pin_func, SYS_PINFUNC); } #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ @@ -96,12 +94,12 @@ void __init board_setup(void) /* Enable sys bus clock divider when IDLE state or no bus activity. */ au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); - /* Enable the RTC if not already enabled. */ + // Enable the RTC if not already enabled if (!(readb(base + 0x28) & 0x20)) { writeb(readb(base + 0x28) | 0x20, base + 0x28); au_sync(); } - /* Put the clock in BCD mode. */ + // Put the clock in BCD mode if (readb(base + 0x2C) & 0x4) { /* reg B */ writeb(readb(base + 0x2c) & ~0x4, base + 0x2c); au_sync(); diff --git a/trunk/arch/mips/au1000/pb1100/init.c b/trunk/arch/mips/au1000/pb1100/init.c index 8355483f3de2..c91344648ed3 100644 --- a/trunk/arch/mips/au1000/pb1100/init.c +++ b/trunk/arch/mips/au1000/pb1100/init.c @@ -3,8 +3,9 @@ * BRIEF MODULE DESCRIPTION * Pb1100 board setup * - * Copyright 2002, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2002 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -45,8 +46,8 @@ void __init prom_init(void) unsigned long memsize; prom_argc = fw_arg0; - prom_argv = (char **)fw_arg1; - prom_envp = (char **)fw_arg3; + prom_argv = (char **) fw_arg1; + prom_envp = (char **) fw_arg3; prom_init_cmdline(); @@ -54,7 +55,7 @@ void __init prom_init(void) if (!memsize_str) memsize = 0x04000000; else - memsize = strict_strtol(memsize_str, 0, NULL); + memsize = simple_strtol(memsize_str, NULL, 0); add_memory_region(0, memsize, BOOT_MEM_RAM); } diff --git a/trunk/arch/mips/au1000/pb1100/irqmap.c b/trunk/arch/mips/au1000/pb1100/irqmap.c index 9b7dd8b41283..b5021e3d477f 100644 --- a/trunk/arch/mips/au1000/pb1100/irqmap.c +++ b/trunk/arch/mips/au1000/pb1100/irqmap.c @@ -1,6 +1,6 @@ /* * BRIEF MODULE DESCRIPTION - * Au1xx0 IRQ map table + * Au1xxx irq map table * * Copyright 2003 Embedded Edge, LLC * dan@embeddededge.com @@ -31,10 +31,10 @@ #include struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { - { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card Fully_Inserted# */ - { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card STSCHG# */ - { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card IRQ# */ - { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, /* DC_IRQ# */ + { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card Fully_Interted# + { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card STSCHG# + { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card IRQ# + { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, // DC_IRQ# }; int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); diff --git a/trunk/arch/mips/au1000/pb1200/Makefile b/trunk/arch/mips/au1000/pb1200/Makefile index d678adf7ce85..4fe02ea65a60 100644 --- a/trunk/arch/mips/au1000/pb1200/Makefile +++ b/trunk/arch/mips/au1000/pb1200/Makefile @@ -1,5 +1,5 @@ # -# Makefile for the Alchemy Semiconductor Pb1200/DBAu1200 boards. +# Makefile for the Alchemy Semiconductor PB1200 board. # lib-y := init.o board_setup.o irqmap.o diff --git a/trunk/arch/mips/au1000/pb1200/board_setup.c b/trunk/arch/mips/au1000/pb1200/board_setup.c index 6cb2115059ad..4493a792cc4c 100644 --- a/trunk/arch/mips/au1000/pb1200/board_setup.c +++ b/trunk/arch/mips/au1000/pb1200/board_setup.c @@ -27,8 +27,16 @@ #include #include +#include #include -#include + +#ifdef CONFIG_MIPS_PB1200 +#include +#endif + +#ifdef CONFIG_MIPS_DB1200 +#include +#endif extern void _board_init_irq(void); extern void (*board_init_irq)(void); @@ -45,57 +53,56 @@ void __init board_setup(void) #if 0 { - u32 pin_func; - - /* - * Enable PSC1 SYNC for AC97. Normaly done in audio driver, - * but it is board specific code, so put it here. - */ - pin_func = au_readl(SYS_PINFUNC); - au_sync(); - pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; - au_writel(pin_func, SYS_PINFUNC); - - au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */ - au_sync(); + u32 pin_func; + + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, + * but it is board specific code, so put it here. + */ + pin_func = au_readl(SYS_PINFUNC); + au_sync(); + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; + au_writel(pin_func, SYS_PINFUNC); + + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */ + au_sync(); } #endif #if defined(CONFIG_I2C_AU1550) { - u32 freq0, clksrc; - u32 pin_func; - - /* Select SMBus in CPLD */ - bcsr->resets &= ~BCSR_RESETS_PCS0MUX; - - pin_func = au_readl(SYS_PINFUNC); - au_sync(); - pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B); - /* Set GPIOs correctly */ - pin_func |= 2 << 17; - au_writel(pin_func, SYS_PINFUNC); - au_sync(); - - /* The I2C driver depends on 50 MHz clock */ - freq0 = au_readl(SYS_FREQCTRL0); - au_sync(); - freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); - freq0 |= 3 << SYS_FC_FRDIV1_BIT; - /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */ - au_writel(freq0, SYS_FREQCTRL0); - au_sync(); - freq0 |= SYS_FC_FE1; - au_writel(freq0, SYS_FREQCTRL0); - au_sync(); - - clksrc = au_readl(SYS_CLKSRC); - au_sync(); - clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK); - /* Bit 22 is EXTCLK0 for PSC0 */ - clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT; - au_writel(clksrc, SYS_CLKSRC); - au_sync(); + u32 freq0, clksrc; + u32 pin_func; + + /* Select SMBUS in CPLD */ + bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); + + pin_func = au_readl(SYS_PINFUNC); + au_sync(); + pin_func &= ~(3<<17 | 1<<4); + /* Set GPIOs correctly */ + pin_func |= 2<<17; + au_writel(pin_func, SYS_PINFUNC); + au_sync(); + + /* The i2c driver depends on 50Mhz clock */ + freq0 = au_readl(SYS_FREQCTRL0); + au_sync(); + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); + freq0 |= (3<resets bit 12: 0=SMB 1=SPI - */ + /* The Pb1200 development board uses external MUX for PSC0 to + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI + */ #ifdef CONFIG_I2C_AU1550 - bcsr->resets &= ~BCSR_RESETS_PCS0MUX; + bcsr->resets &= (~BCSR_RESETS_PCS0MUX); #endif au_sync(); #ifdef CONFIG_MIPS_PB1200 - printk(KERN_INFO "AMD Alchemy Pb1200 Board\n"); + printk("AMD Alchemy Pb1200 Board\n"); #endif #ifdef CONFIG_MIPS_DB1200 - printk(KERN_INFO "AMD Alchemy Db1200 Board\n"); + printk("AMD Alchemy Db1200 Board\n"); #endif /* Setup Pb1200 External Interrupt Controller */ board_init_irq = _board_init_irq; } -int board_au1200fb_panel(void) +int +board_au1200fb_panel(void) { BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; int p; @@ -140,23 +147,23 @@ int board_au1200fb_panel(void) return p; } -int board_au1200fb_panel_init(void) +int +board_au1200fb_panel_init(void) { /* Apply power */ - BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; - - bcsr->board |= BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL; - /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */ + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; + bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); + /*printk("board_au1200fb_panel_init()\n"); */ return 0; } -int board_au1200fb_panel_shutdown(void) +int +board_au1200fb_panel_shutdown(void) { /* Remove power */ - BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; - - bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | - BCSR_BOARD_LCDBL); - /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */ + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; + bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); + /*printk("board_au1200fb_panel_shutdown()\n"); */ return 0; } + diff --git a/trunk/arch/mips/au1000/pb1200/init.c b/trunk/arch/mips/au1000/pb1200/init.c index 09fd63b86062..72af5500660b 100644 --- a/trunk/arch/mips/au1000/pb1200/init.c +++ b/trunk/arch/mips/au1000/pb1200/init.c @@ -3,8 +3,9 @@ * BRIEF MODULE DESCRIPTION * PB1200 board setup * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -44,15 +45,16 @@ void __init prom_init(void) unsigned char *memsize_str; unsigned long memsize; - prom_argc = (int)fw_arg0; - prom_argv = (char **)fw_arg1; - prom_envp = (char **)fw_arg2; + prom_argc = (int) fw_arg0; + prom_argv = (char **) fw_arg1; + prom_envp = (char **) fw_arg2; prom_init_cmdline(); memsize_str = prom_getenv("memsize"); - if (!memsize_str) + if (!memsize_str) { memsize = 0x08000000; - else - memsize = strict_strtol(memsize_str, 0, NULL); + } else { + memsize = simple_strtol(memsize_str, NULL, 0); + } add_memory_region(0, memsize, BOOT_MEM_RAM); } diff --git a/trunk/arch/mips/au1000/pb1200/irqmap.c b/trunk/arch/mips/au1000/pb1200/irqmap.c index 2a505ad8715b..e61eb8e0b76b 100644 --- a/trunk/arch/mips/au1000/pb1200/irqmap.c +++ b/trunk/arch/mips/au1000/pb1200/irqmap.c @@ -39,25 +39,25 @@ #endif struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { - /* This is external interrupt cascade */ - { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, + { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade }; int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); /* - * Support for External interrupts on the Pb1200 Development platform. + * Support for External interrupts on the PbAu1200 Development platform. */ -static volatile int pb1200_cascade_en; +static volatile int pb1200_cascade_en=0; -irqreturn_t pb1200_cascade_handler(int irq, void *dev_id) +irqreturn_t pb1200_cascade_handler( int irq, void *dev_id) { unsigned short bisr = bcsr->int_status; int extirq_nr = 0; - /* Clear all the edge interrupts. This has no effect on level. */ + /* Clear all the edge interrupts. This has no effect on level */ bcsr->int_status = bisr; - for ( ; bisr; bisr &= bisr - 1) { + for( ; bisr; bisr &= (bisr-1) ) + { extirq_nr = PB1200_INT_BEGIN + __ffs(bisr); /* Ack and dispatch IRQ */ do_IRQ(extirq_nr); @@ -68,20 +68,26 @@ irqreturn_t pb1200_cascade_handler(int irq, void *dev_id) inline void pb1200_enable_irq(unsigned int irq_nr) { - bcsr->intset_mask = 1 << (irq_nr - PB1200_INT_BEGIN); - bcsr->intset = 1 << (irq_nr - PB1200_INT_BEGIN); + bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN); + bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN); } inline void pb1200_disable_irq(unsigned int irq_nr) { - bcsr->intclr_mask = 1 << (irq_nr - PB1200_INT_BEGIN); - bcsr->intclr = 1 << (irq_nr - PB1200_INT_BEGIN); + bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN); + bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN); } static unsigned int pb1200_setup_cascade(void) { - return request_irq(AU1000_GPIO_7, &pb1200_cascade_handler, - 0, "Pb1200 Cascade", &pb1200_cascade_handler); + int err; + + err = request_irq(AU1000_GPIO_7, &pb1200_cascade_handler, + 0, "Pb1200 Cascade", &pb1200_cascade_handler); + if (err) + return err; + + return 0; } static unsigned int pb1200_startup_irq(unsigned int irq) @@ -126,23 +132,23 @@ void _board_init_irq(void) unsigned int irq; #ifdef CONFIG_MIPS_PB1200 - /* We have a problem with CPLD rev 3. */ + /* We have a problem with CPLD rev3. Enable a workaround */ if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) { - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n"); - printk(KERN_ERR "updated to latest revision. This software will\n"); - printk(KERN_ERR "not work on anything less than CPLD rev 4.\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); - printk(KERN_ERR "WARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n"); + printk("updated to latest revision. This software will not\n"); + printk("work on anything less than CPLD rev4\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); + printk("\nWARNING!!!\n"); panic("Game over. Your score is 0."); } #endif @@ -155,6 +161,6 @@ void _board_init_irq(void) /* * GPIO_7 can not be hooked here, so it is hooked upon first - * request of any source attached to the cascade. + * request of any source attached to the cascade */ } diff --git a/trunk/arch/mips/au1000/pb1500/Makefile b/trunk/arch/mips/au1000/pb1500/Makefile index 602f38df20bb..97a730813cd3 100644 --- a/trunk/arch/mips/au1000/pb1500/Makefile +++ b/trunk/arch/mips/au1000/pb1500/Makefile @@ -1,8 +1,8 @@ # -# Copyright 2000, 2001, 2008 MontaVista Software Inc. -# Author: MontaVista Software, Inc. +# Copyright 2000,2001 MontaVista Software Inc. +# Author: MontaVista Software, Inc. +# ppopov@mvista.com or source@mvista.com # # Makefile for the Alchemy Semiconductor Pb1500 board. -# lib-y := init.o board_setup.o irqmap.o diff --git a/trunk/arch/mips/au1000/pb1500/board_setup.c b/trunk/arch/mips/au1000/pb1500/board_setup.c index 035771c6e5b8..24c652e8ec4b 100644 --- a/trunk/arch/mips/au1000/pb1500/board_setup.c +++ b/trunk/arch/mips/au1000/pb1500/board_setup.c @@ -1,6 +1,7 @@ /* - * Copyright 2000, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2000 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -31,8 +32,8 @@ void board_reset(void) { - /* Hit BCSR.RST_VDDI[SOFT_RESET] */ - au_writel(0x00000000, PB1500_RST_VDDI); + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ + au_writel(0x00000000, 0xAE00001C); } void __init board_setup(void) @@ -41,7 +42,7 @@ void __init board_setup(void) u32 sys_freqctrl, sys_clksrc; sys_clksrc = sys_freqctrl = pin_func = 0; - /* Set AUX clock to 12 MHz * 8 = 96 MHz */ + // set AUX clock to 12MHz * 8 = 96 MHz au_writel(8, SYS_AUXPLL); au_writel(0, SYS_PINSTATERD); udelay(100); @@ -50,48 +51,51 @@ void __init board_setup(void) /* GPIO201 is input for PCMCIA card detect */ /* GPIO203 is input for PCMCIA interrupt request */ - au_writel(au_readl(GPIO2_DIR) & ~((1 << 1) | (1 << 3)), GPIO2_DIR); + au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR); - /* Zero and disable FREQ2 */ + /* zero and disable FREQ2 */ sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl &= ~0xFFF00000; au_writel(sys_freqctrl, SYS_FREQCTRL0); /* zero and disable USBH/USBD clocks */ sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK | - SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK); + sys_clksrc &= ~0x00007FE0; au_writel(sys_clksrc, SYS_CLKSRC); sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl &= ~0xFFF00000; sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK | - SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK); + sys_clksrc &= ~0x00007FE0; - /* FREQ2 = aux/2 = 48 MHz */ - sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2; + // FREQ2 = aux/2 = 48 MHz + sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); au_writel(sys_freqctrl, SYS_FREQCTRL0); /* * Route 48MHz FREQ2 into USB Host and/or Device */ - sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT; +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + sys_clksrc |= ((4<<12) | (0<<11) | (0<<10)); +#endif au_writel(sys_clksrc, SYS_CLKSRC); - pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB; - /* 2nd USB port is USB host */ - pin_func |= SYS_PF_USB; + + pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); + // 2nd USB port is USB host + pin_func |= 0x8000; au_writel(pin_func, SYS_PINFUNC); #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ + + #ifdef CONFIG_PCI - /* Setup PCI bus controller */ + // Setup PCI bus controller au_writel(0, Au1500_PCI_CMEM); au_writel(0x00003fff, Au1500_CFG_BASE); #if defined(__MIPSEB__) - au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG); + au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); #else au_writel(0xf, Au1500_PCI_CFG); #endif @@ -108,11 +112,11 @@ void __init board_setup(void) /* Enable the RTC if not already enabled */ if (!(au_readl(0xac000028) & 0x20)) { - printk(KERN_INFO "enabling clock ...\n"); + printk("enabling clock ...\n"); au_writel((au_readl(0xac000028) | 0x20), 0xac000028); } /* Put the clock in BCD mode */ - if (au_readl(0xac00002c) & 0x4) { /* reg B */ + if (au_readl(0xac00002C) & 0x4) { /* reg B */ au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); au_sync(); } diff --git a/trunk/arch/mips/au1000/pb1500/init.c b/trunk/arch/mips/au1000/pb1500/init.c index 49f51e165863..488507c07db9 100644 --- a/trunk/arch/mips/au1000/pb1500/init.c +++ b/trunk/arch/mips/au1000/pb1500/init.c @@ -1,10 +1,11 @@ /* * * BRIEF MODULE DESCRIPTION - * Pb1500 board setup + * PB1500 board setup * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -44,15 +45,16 @@ void __init prom_init(void) unsigned char *memsize_str; unsigned long memsize; - prom_argc = (int)fw_arg0; - prom_argv = (char **)fw_arg1; - prom_envp = (char **)fw_arg2; + prom_argc = (int) fw_arg0; + prom_argv = (char **) fw_arg1; + prom_envp = (char **) fw_arg2; prom_init_cmdline(); memsize_str = prom_getenv("memsize"); - if (!memsize_str) + if (!memsize_str) { memsize = 0x04000000; - else - memsize = strict_strtol(memsize_str, 0, NULL); + } else { + memsize = simple_strtol(memsize_str, NULL, 0); + } add_memory_region(0, memsize, BOOT_MEM_RAM); } diff --git a/trunk/arch/mips/au1000/pb1500/irqmap.c b/trunk/arch/mips/au1000/pb1500/irqmap.c index 39c4682766a8..4817ab44d07f 100644 --- a/trunk/arch/mips/au1000/pb1500/irqmap.c +++ b/trunk/arch/mips/au1000/pb1500/irqmap.c @@ -31,12 +31,12 @@ #include char irq_tab_alchemy[][5] __initdata = { - [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT370 */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ + [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT370 */ + [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ }; struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { - { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 }, + { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, diff --git a/trunk/arch/mips/au1000/pb1550/Makefile b/trunk/arch/mips/au1000/pb1550/Makefile index 7d8beca87fa5..aa35bc6cb8cf 100644 --- a/trunk/arch/mips/au1000/pb1550/Makefile +++ b/trunk/arch/mips/au1000/pb1550/Makefile @@ -1,8 +1,9 @@ # -# Copyright 2000, 2008 MontaVista Software Inc. -# Author: MontaVista Software, Inc. +# Copyright 2000 MontaVista Software Inc. +# Author: MontaVista Software, Inc. +# ppopov@mvista.com or source@mvista.com # -# Makefile for the Alchemy Semiconductor Pb1550 board. +# Makefile for the Alchemy Semiconductor PB1000 board. # lib-y := init.o board_setup.o irqmap.o diff --git a/trunk/arch/mips/au1000/pb1550/board_setup.c b/trunk/arch/mips/au1000/pb1550/board_setup.c index 0ed76b64b6ab..45d60872b565 100644 --- a/trunk/arch/mips/au1000/pb1550/board_setup.c +++ b/trunk/arch/mips/au1000/pb1550/board_setup.c @@ -3,8 +3,9 @@ * BRIEF MODULE DESCRIPTION * Alchemy Pb1550 board setup. * - * Copyright 2000, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2000 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -34,16 +35,15 @@ void board_reset(void) { - /* Hit BCSR.SYSTEM[RESET] */ - au_writew(au_readw(0xAF00001C) & ~BCSR_SYSTEM_RESET, 0xAF00001C); + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ + au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C); } void __init board_setup(void) { u32 pin_func; - /* - * Enable PSC1 SYNC for AC'97. Normaly done in audio driver, + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, * but it is board specific code, so put it here. */ pin_func = au_readl(SYS_PINFUNC); @@ -51,8 +51,8 @@ void __init board_setup(void) pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; au_writel(pin_func, SYS_PINFUNC); - au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */ + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */ au_sync(); - printk(KERN_INFO "AMD Alchemy Pb1550 Board\n"); + printk("AMD Alchemy Pb1550 Board\n"); } diff --git a/trunk/arch/mips/au1000/pb1550/init.c b/trunk/arch/mips/au1000/pb1550/init.c index 1b5f58434bb7..f6b2fc587980 100644 --- a/trunk/arch/mips/au1000/pb1550/init.c +++ b/trunk/arch/mips/au1000/pb1550/init.c @@ -1,10 +1,11 @@ /* * * BRIEF MODULE DESCRIPTION - * Pb1550 board setup + * PB1550 board setup * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -44,15 +45,16 @@ void __init prom_init(void) unsigned char *memsize_str; unsigned long memsize; - prom_argc = (int)fw_arg0; - prom_argv = (char **)fw_arg1; - prom_envp = (char **)fw_arg2; + prom_argc = (int) fw_arg0; + prom_argv = (char **) fw_arg1; + prom_envp = (char **) fw_arg2; prom_init_cmdline(); memsize_str = prom_getenv("memsize"); - if (!memsize_str) + if (!memsize_str) { memsize = 0x08000000; - else - memsize = strict_strtol(memsize_str, 0, NULL); + } else { + memsize = simple_strtol(memsize_str, NULL, 0); + } add_memory_region(0, memsize, BOOT_MEM_RAM); } diff --git a/trunk/arch/mips/au1000/pb1550/irqmap.c b/trunk/arch/mips/au1000/pb1550/irqmap.c index a02a4d1fa899..e1dac37af08a 100644 --- a/trunk/arch/mips/au1000/pb1550/irqmap.c +++ b/trunk/arch/mips/au1000/pb1550/irqmap.c @@ -1,6 +1,6 @@ /* * BRIEF MODULE DESCRIPTION - * Au1xx0 IRQ map table + * Au1xxx irq map table * * Copyright 2003 Embedded Edge, LLC * dan@embeddededge.com @@ -31,8 +31,8 @@ #include char irq_tab_alchemy[][5] __initdata = { - [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */ + [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */ + [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */ }; struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { diff --git a/trunk/arch/mips/au1000/xxs1500/Makefile b/trunk/arch/mips/au1000/xxs1500/Makefile index db3c526f64d8..44d7f7056ae7 100644 --- a/trunk/arch/mips/au1000/xxs1500/Makefile +++ b/trunk/arch/mips/au1000/xxs1500/Makefile @@ -1,6 +1,7 @@ # # Copyright 2003 MontaVista Software Inc. -# Author: MontaVista Software, Inc. +# Author: MontaVista Software, Inc. +# ppopov@mvista.com or source@mvista.com # # Makefile for MyCable XXS1500 board. # diff --git a/trunk/arch/mips/au1000/xxs1500/board_setup.c b/trunk/arch/mips/au1000/xxs1500/board_setup.c index 4c587acac5c3..79d1798621bf 100644 --- a/trunk/arch/mips/au1000/xxs1500/board_setup.c +++ b/trunk/arch/mips/au1000/xxs1500/board_setup.c @@ -1,6 +1,7 @@ /* - * Copyright 2000-2003, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2000-2003 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -38,40 +39,40 @@ void __init board_setup(void) { u32 pin_func; - /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */ - pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3; + // set multiple use pins (UART3/GPIO) to UART (it's used as UART too) + pin_func = au_readl(SYS_PINFUNC) & (u32)(~SYS_PF_UR3); pin_func |= SYS_PF_UR3; au_writel(pin_func, SYS_PINFUNC); - /* Enable UART */ - au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */ + // enable UART + au_writel(0x01, UART3_ADDR+UART_MOD_CNTRL); // clock enable (CE) mdelay(10); - au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */ + au_writel(0x03, UART3_ADDR+UART_MOD_CNTRL); // CE and "enable" mdelay(10); - /* Enable DTR = USB power up */ - au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */ + // enable DTR = USB power up + au_writel(0x01, UART3_ADDR+UART_MCR); //? UART_MCR_DTR is 0x01??? #ifdef CONFIG_PCMCIA_XXS1500 - /* Setup PCMCIA signals */ + /* setup pcmcia signals */ au_writel(0, SYS_PININPUTEN); - /* GPIO 0, 1, and 4 are inputs */ - au_writel(1 | (1 << 1) | (1 << 4), SYS_TRIOUTCLR); + /* gpio 0, 1, and 4 are inputs */ + au_writel(1 | (1<<1) | (1<<4), SYS_TRIOUTCLR); - /* Enable GPIO2 if not already enabled */ + /* enable GPIO2 if not already enabled */ au_writel(1, GPIO2_ENABLE); - /* GPIO2 208/9/10/11 are inputs */ - au_writel((1 << 8) | (1 << 9) | (1 << 10) | (1 << 11), GPIO2_DIR); + /* gpio2 208/9/10/11 are inputs */ + au_writel((1<<8) | (1<<9) | (1<<10) | (1<<11), GPIO2_DIR); - /* Turn off power */ - au_writel((au_readl(GPIO2_PINSTATE) & ~(1 << 14)) | (1 << 30), - GPIO2_OUTPUT); + /* turn off power */ + au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<14))|(1<<30), GPIO2_OUTPUT); #endif + #ifdef CONFIG_PCI #if defined(__MIPSEB__) - au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG); + au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); #else au_writel(0xf, Au1500_PCI_CFG); #endif diff --git a/trunk/arch/mips/au1000/xxs1500/init.c b/trunk/arch/mips/au1000/xxs1500/init.c index b849bf501c04..24fc6e132dc0 100644 --- a/trunk/arch/mips/au1000/xxs1500/init.c +++ b/trunk/arch/mips/au1000/xxs1500/init.c @@ -2,8 +2,9 @@ * BRIEF MODULE DESCRIPTION * XXS1500 board setup * - * Copyright 2003, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2003 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -44,8 +45,8 @@ void __init prom_init(void) unsigned long memsize; prom_argc = fw_arg0; - prom_argv = (char **)fw_arg1; - prom_envp = (char **)fw_arg2; + prom_argv = (char **) fw_arg1; + prom_envp = (char **) fw_arg2; prom_init_cmdline(); @@ -53,6 +54,6 @@ void __init prom_init(void) if (!memsize_str) memsize = 0x04000000; else - memsize = strict_strtol(memsize_str, 0, NULL); + memsize = simple_strtol(memsize_str, NULL, 0); add_memory_region(0, memsize, BOOT_MEM_RAM); } diff --git a/trunk/arch/mips/au1000/xxs1500/irqmap.c b/trunk/arch/mips/au1000/xxs1500/irqmap.c index edf06ed11870..dd6e3d1eb4d4 100644 --- a/trunk/arch/mips/au1000/xxs1500/irqmap.c +++ b/trunk/arch/mips/au1000/xxs1500/irqmap.c @@ -31,7 +31,7 @@ #include struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { - { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 }, + { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, diff --git a/trunk/arch/mips/emma2rh/markeins/setup.c b/trunk/arch/mips/emma2rh/markeins/setup.c index 62bfb455d1b1..82f9e9013e70 100644 --- a/trunk/arch/mips/emma2rh/markeins/setup.c +++ b/trunk/arch/mips/emma2rh/markeins/setup.c @@ -76,9 +76,7 @@ static void markeins_machine_power_off(void) while (1) ; } -static unsigned long __initdata emma2rh_clock[4] = { - 166500000, 187312500, 199800000, 210600000 -}; +static unsigned long clock[4] = { 166500000, 187312500, 199800000, 210600000 }; static unsigned int __init detect_bus_frequency(unsigned long rtc_base) { @@ -87,8 +85,7 @@ static unsigned int __init detect_bus_frequency(unsigned long rtc_base) /* detect from boot strap */ reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0); reg = (reg >> 4) & 0x3; - - return emma2rh_clock[reg]; + return clock[reg]; } void __init plat_time_init(void) diff --git a/trunk/arch/mips/kernel/Makefile b/trunk/arch/mips/kernel/Makefile index cc0244036aec..45545be3eb86 100644 --- a/trunk/arch/mips/kernel/Makefile +++ b/trunk/arch/mips/kernel/Makefile @@ -56,9 +56,9 @@ obj-$(CONFIG_MIPS_MT_SMP) += smp-mt.o obj-$(CONFIG_MIPS_CMP) += smp-cmp.o obj-$(CONFIG_CPU_MIPSR2) += spram.o +obj-$(CONFIG_MIPS_APSP_KSPD) += kspd.o obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o obj-$(CONFIG_MIPS_VPE_APSP_API) += rtlx.o -obj-$(CONFIG_MIPS_APSP_KSPD) += kspd.o obj-$(CONFIG_I8259) += i8259.o obj-$(CONFIG_IRQ_CPU) += irq_cpu.o diff --git a/trunk/arch/mips/kernel/cpu-bugs64.c b/trunk/arch/mips/kernel/cpu-bugs64.c index 02b7713cf71c..a1b48af0992f 100644 --- a/trunk/arch/mips/kernel/cpu-bugs64.c +++ b/trunk/arch/mips/kernel/cpu-bugs64.c @@ -38,7 +38,7 @@ static inline void align_mod(const int align, const int mod) ".endr\n\t" ".set pop" : - : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod)); + : GCC_IMM_ASM(align), GCC_IMM_ASM(mod)); } static inline void mult_sh_align_mod(long *v1, long *v2, long *w, diff --git a/trunk/arch/mips/kernel/irixelf.c b/trunk/arch/mips/kernel/irixelf.c index 469c7237e5ba..290d8e3a664d 100644 --- a/trunk/arch/mips/kernel/irixelf.c +++ b/trunk/arch/mips/kernel/irixelf.c @@ -578,7 +578,7 @@ static inline int map_interpreter(struct elf_phdr *epp, struct elfhdr *ihp, * process and the system, here we map the page and fill the * structure */ -static int irix_map_prda_page(void) +static void irix_map_prda_page(void) { unsigned long v; struct prda *pp; @@ -587,8 +587,8 @@ static int irix_map_prda_page(void) v = do_brk(PRDA_ADDRESS, PAGE_SIZE); up_write(¤t->mm->mmap_sem); - if (v != PRDA_ADDRESS) - return v; /* v must be an error code */ + if (v < 0) + return; pp = (struct prda *) v; pp->prda_sys.t_pid = task_pid_vnr(current); @@ -596,8 +596,6 @@ static int irix_map_prda_page(void) pp->prda_sys.t_rpid = task_pid_vnr(current); /* We leave the rest set to zero */ - - return 0; } @@ -783,8 +781,7 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs) * IRIX maps a page at 0x200000 which holds some system * information. Programs depend on this. */ - if (irix_map_prda_page()) - goto out_free_dentry; + irix_map_prda_page(); padzero(elf_bss); diff --git a/trunk/arch/mips/kernel/kspd.c b/trunk/arch/mips/kernel/kspd.c index b0591ae0ce56..ceb62dce1c9c 100644 --- a/trunk/arch/mips/kernel/kspd.c +++ b/trunk/arch/mips/kernel/kspd.c @@ -257,7 +257,7 @@ void sp_work_handle_request(void) vcwd = vpe_getcwd(tclimit); - /* change to cwd of the process that loaded the SP program */ + /* change to the cwd of the process that loaded the SP program */ old_fs = get_fs(); set_fs(KERNEL_DS); sys_chdir(vcwd); @@ -323,9 +323,6 @@ static void sp_cleanup(void) set >>= 1; } } - - /* Put daemon cwd back to root to avoid umount problems */ - sys_chdir("/"); } static int channel_open = 0; diff --git a/trunk/arch/mips/kernel/rtlx.c b/trunk/arch/mips/kernel/rtlx.c index b88f1c18ff4d..0233798f7155 100644 --- a/trunk/arch/mips/kernel/rtlx.c +++ b/trunk/arch/mips/kernel/rtlx.c @@ -72,15 +72,6 @@ static void rtlx_dispatch(void) static irqreturn_t rtlx_interrupt(int irq, void *dev_id) { int i; - unsigned int flags, vpeflags; - - /* Ought not to be strictly necessary for SMTC builds */ - local_irq_save(flags); - vpeflags = dvpe(); - set_c0_status(0x100 << MIPS_CPU_RTLX_IRQ); - irq_enable_hazard(); - evpe(vpeflags); - local_irq_restore(flags); for (i = 0; i < RTLX_CHANNELS; i++) { wake_up(&channel_wqs[i].lx_queue); @@ -117,8 +108,7 @@ static void __used dump_rtlx(void) static int rtlx_init(struct rtlx_info *rtlxi) { if (rtlxi->id != RTLX_ID) { - printk(KERN_ERR "no valid RTLX id at 0x%p 0x%lx\n", - rtlxi, rtlxi->id); + printk(KERN_ERR "no valid RTLX id at 0x%p 0x%lx\n", rtlxi, rtlxi->id); return -ENOEXEC; } @@ -172,17 +162,18 @@ int rtlx_open(int index, int can_sleep) if (rtlx == NULL) { if( (p = vpe_get_shared(tclimit)) == NULL) { - if (can_sleep) { - __wait_event_interruptible(channel_wqs[index].lx_queue, - (p = vpe_get_shared(tclimit)), ret); - if (ret) - goto out_fail; - } else { - printk(KERN_DEBUG "No SP program loaded, and device " + if (can_sleep) { + __wait_event_interruptible(channel_wqs[index].lx_queue, + (p = vpe_get_shared(tclimit)), + ret); + if (ret) + goto out_fail; + } else { + printk(KERN_DEBUG "No SP program loaded, and device " "opened with O_NONBLOCK\n"); - ret = -ENOSYS; - goto out_fail; - } + ret = -ENOSYS; + goto out_fail; + } } smp_rmb(); @@ -191,9 +182,7 @@ int rtlx_open(int index, int can_sleep) DEFINE_WAIT(wait); for (;;) { - prepare_to_wait( - &channel_wqs[index].lx_queue, - &wait, TASK_INTERRUPTIBLE); + prepare_to_wait(&channel_wqs[index].lx_queue, &wait, TASK_INTERRUPTIBLE); smp_rmb(); if (*p != NULL) break; @@ -206,7 +195,7 @@ int rtlx_open(int index, int can_sleep) } finish_wait(&channel_wqs[index].lx_queue, &wait); } else { - pr_err(" *vpe_get_shared is NULL. " + printk(" *vpe_get_shared is NULL. " "Has an SP program been loaded?\n"); ret = -ENOSYS; goto out_fail; @@ -214,9 +203,8 @@ int rtlx_open(int index, int can_sleep) } if ((unsigned int)*p < KSEG0) { - printk(KERN_WARNING "vpe_get_shared returned an " - "invalid pointer maybe an error code %d\n", - (int)*p); + printk(KERN_WARNING "vpe_get_shared returned an invalid pointer " + "maybe an error code %d\n", (int)*p); ret = -ENOSYS; goto out_fail; } @@ -244,10 +232,6 @@ int rtlx_open(int index, int can_sleep) int rtlx_release(int index) { - if (rtlx == NULL) { - pr_err("rtlx_release() with null rtlx\n"); - return 0; - } rtlx->channel[index].lx_state = RTLX_STATE_UNUSED; return 0; } @@ -267,8 +251,8 @@ unsigned int rtlx_read_poll(int index, int can_sleep) int ret = 0; __wait_event_interruptible(channel_wqs[index].lx_queue, - (chan->lx_read != chan->lx_write) || - sp_stopping, ret); + chan->lx_read != chan->lx_write || sp_stopping, + ret); if (ret) return ret; @@ -298,9 +282,7 @@ static inline int write_spacefree(int read, int write, int size) unsigned int rtlx_write_poll(int index) { struct rtlx_channel *chan = &rtlx->channel[index]; - - return write_spacefree(chan->rt_read, chan->rt_write, - chan->buffer_size); + return write_spacefree(chan->rt_read, chan->rt_write, chan->buffer_size); } ssize_t rtlx_read(int index, void __user *buff, size_t count) @@ -362,8 +344,8 @@ ssize_t rtlx_write(int index, const void __user *buffer, size_t count) rt_read = rt->rt_read; /* total number of bytes to copy */ - count = min(count, (size_t)write_spacefree(rt_read, rt->rt_write, - rt->buffer_size)); + count = min(count, + (size_t)write_spacefree(rt_read, rt->rt_write, rt->buffer_size)); /* first bit from write pointer to the end of the buffer, or count */ fl = min(count, (size_t) rt->buffer_size - rt->rt_write); @@ -532,11 +514,6 @@ static int __init rtlx_module_init(void) if (cpu_has_vint) set_vi_handler(MIPS_CPU_RTLX_IRQ, rtlx_dispatch); - else { - pr_err("APRP RTLX init on non-vectored-interrupt processor\n"); - err = -ENODEV; - goto out_chrdev; - } rtlx_irq.dev_id = rtlx; setup_irq(rtlx_irq_num, &rtlx_irq); diff --git a/trunk/arch/mips/kernel/setup.c b/trunk/arch/mips/kernel/setup.c index c6a063b2a0d9..39f3dfe134fb 100644 --- a/trunk/arch/mips/kernel/setup.c +++ b/trunk/arch/mips/kernel/setup.c @@ -331,7 +331,6 @@ static void __init bootmem_init(void) /* * Determine low and high memory ranges */ - max_pfn = max_low_pfn; if (max_low_pfn > PFN_DOWN(HIGHMEM_START)) { #ifdef CONFIG_HIGHMEM highstart_pfn = PFN_DOWN(HIGHMEM_START); diff --git a/trunk/arch/mips/kernel/smp.c b/trunk/arch/mips/kernel/smp.c index 63370cdd3c90..33780cc61ce9 100644 --- a/trunk/arch/mips/kernel/smp.c +++ b/trunk/arch/mips/kernel/smp.c @@ -87,8 +87,8 @@ struct plat_smp_ops *mp_ops; __cpuinit void register_smp_ops(struct plat_smp_ops *ops) { - if (mp_ops) - printk(KERN_WARNING "Overriding previously set SMP ops\n"); + if (ops) + printk(KERN_WARNING "Overriding previous set SMP ops\n"); mp_ops = ops; } diff --git a/trunk/arch/mips/kernel/vpe.c b/trunk/arch/mips/kernel/vpe.c index 2794501ff302..39804c584edd 100644 --- a/trunk/arch/mips/kernel/vpe.c +++ b/trunk/arch/mips/kernel/vpe.c @@ -269,7 +269,7 @@ static void *alloc_progmem(unsigned long len) * This means you must tell Linux to use less memory than you * physically have, for example by passing a mem= boot argument. */ - addr = pfn_to_kaddr(max_low_pfn); + addr = pfn_to_kaddr(max_pfn); memset(addr, 0, len); #else /* simple grab some mem for now */ @@ -781,15 +781,10 @@ static int vpe_run(struct vpe * v) /* take system out of configuration state */ clear_c0_mvpcontrol(MVPCONTROL_VPC); - /* - * SMTC/SMVP kernels manage VPE enable independently, - * but uniprocessor kernels need to turn it on, even - * if that wasn't the pre-dvpe() state. - */ #ifdef CONFIG_SMP - evpe(vpeflags); -#else evpe(EVPE_ENABLE); +#else + evpe(vpeflags); #endif emt(dmt_flag); local_irq_restore(flags); @@ -845,7 +840,7 @@ static int vpe_elfload(struct vpe * v) /* Sanity checks against insmoding binaries or wrong arch, weird elf version */ - if (memcmp(hdr->e_ident, ELFMAG, SELFMAG) != 0 + if (memcmp(hdr->e_ident, ELFMAG, 4) != 0 || (hdr->e_type != ET_REL && hdr->e_type != ET_EXEC) || !elf_check_arch(hdr) || hdr->e_shentsize != sizeof(*sechdrs)) { @@ -952,14 +947,12 @@ static int vpe_elfload(struct vpe * v) struct elf_phdr *phdr = (struct elf_phdr *) ((char *)hdr + hdr->e_phoff); for (i = 0; i < hdr->e_phnum; i++) { - if (phdr->p_type == PT_LOAD) { - memcpy((void *)phdr->p_paddr, - (char *)hdr + phdr->p_offset, - phdr->p_filesz); - memset((void *)phdr->p_paddr + phdr->p_filesz, - 0, phdr->p_memsz - phdr->p_filesz); - } - phdr++; + if (phdr->p_type != PT_LOAD) + continue; + + memcpy((void *)phdr->p_paddr, (char *)hdr + phdr->p_offset, phdr->p_filesz); + memset((void *)phdr->p_paddr + phdr->p_filesz, 0, phdr->p_memsz - phdr->p_filesz); + phdr++; } for (i = 0; i < hdr->e_shnum; i++) { @@ -1114,7 +1107,7 @@ static int vpe_release(struct inode *inode, struct file *filp) return -ENODEV; hdr = (Elf_Ehdr *) v->pbuffer; - if (memcmp(hdr->e_ident, ELFMAG, SELFMAG) == 0) { + if (memcmp(hdr->e_ident, ELFMAG, 4) == 0) { if (vpe_elfload(v) >= 0) { vpe_run(v); } else { diff --git a/trunk/arch/mips/mm/highmem.c b/trunk/arch/mips/mm/highmem.c index 8f2cd8eda741..10dd2af2343b 100644 --- a/trunk/arch/mips/mm/highmem.c +++ b/trunk/arch/mips/mm/highmem.c @@ -116,3 +116,4 @@ EXPORT_SYMBOL(__kmap); EXPORT_SYMBOL(__kunmap); EXPORT_SYMBOL(__kmap_atomic); EXPORT_SYMBOL(__kunmap_atomic); +EXPORT_SYMBOL(__kmap_atomic_to_page); diff --git a/trunk/arch/mips/oprofile/op_model_mipsxx.c b/trunk/arch/mips/oprofile/op_model_mipsxx.c index b40df7d2cf44..da8cbb6899dc 100644 --- a/trunk/arch/mips/oprofile/op_model_mipsxx.c +++ b/trunk/arch/mips/oprofile/op_model_mipsxx.c @@ -281,7 +281,7 @@ static inline int n_counters(void) static void reset_counters(void *arg) { - int counters = (int)(long)arg; + int counters = (int)arg; switch (counters) { case 4: w_c0_perfctrl3(0); @@ -313,7 +313,7 @@ static int __init mipsxx_init(void) if (!cpu_has_mipsmt_pertccounters) counters = counters_total_to_per_cpu(counters); #endif - on_each_cpu(reset_counters, (void *)(long)counters, 0, 1); + on_each_cpu(reset_counters, (void *)counters, 0, 1); op_model_mipsxx_ops.num_counters = counters; switch (current_cpu_type()) { @@ -382,7 +382,7 @@ static void mipsxx_exit(void) int counters = op_model_mipsxx_ops.num_counters; counters = counters_per_cpu_to_total(counters); - on_each_cpu(reset_counters, (void *)(long)counters, 0, 1); + on_each_cpu(reset_counters, (void *)counters, 0, 1); perf_irq = save_perf_irq; } diff --git a/trunk/arch/mips/pci/fixup-au1000.c b/trunk/arch/mips/pci/fixup-au1000.c index e2ddfc49237c..00c36c9dbe0e 100644 --- a/trunk/arch/mips/pci/fixup-au1000.c +++ b/trunk/arch/mips/pci/fixup-au1000.c @@ -1,9 +1,10 @@ /* * BRIEF MODULE DESCRIPTION - * Board specific PCI fixups. + * Board specific pci fixups. * - * Copyright 2001-2003, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001-2003 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/trunk/arch/mips/pci/ops-au1000.c b/trunk/arch/mips/pci/ops-au1000.c index 9a57c5ab91dd..1314bd58f036 100644 --- a/trunk/arch/mips/pci/ops-au1000.c +++ b/trunk/arch/mips/pci/ops-au1000.c @@ -1,9 +1,10 @@ /* * BRIEF MODULE DESCRIPTION - * Alchemy/AMD Au1xx0 PCI support. + * Alchemy/AMD Au1x00 PCI support. * - * Copyright 2001-2003, 2007-2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001-2003, 2007 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * Support for all devices (greater than 16) added by David Gathright. * @@ -27,7 +28,6 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ - #include #include #include @@ -36,9 +36,9 @@ #include -#undef DEBUG -#ifdef DEBUG -#define DBG(x...) printk(KERN_DEBUG x) +#undef DEBUG +#ifdef DEBUG +#define DBG(x...) printk(x) #else #define DBG(x...) #endif @@ -46,6 +46,7 @@ #define PCI_ACCESS_READ 0 #define PCI_ACCESS_WRITE 1 + int (*board_pci_idsel)(unsigned int devsel, int assert); void mod_wired_entry(int entry, unsigned long entrylo0, @@ -91,9 +92,10 @@ void __init au1x_pci_cfg_init(void) } static int config_access(unsigned char access_type, struct pci_bus *bus, - unsigned int dev_fn, unsigned char where, u32 *data) + unsigned int dev_fn, unsigned char where, + u32 * data) { -#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) +#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 ) unsigned int device = PCI_SLOT(dev_fn); unsigned int function = PCI_FUNC(dev_fn); unsigned long offset, status; @@ -112,36 +114,38 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, Au1500_PCI_STATCMD); au_sync_udelay(1); - /* - * Allow board vendors to implement their own off-chip IDSEL. + /* Allow board vendors to implement their own off-chip idsel. * If it doesn't succeed, may as well bail out at this point. */ - if (board_pci_idsel && board_pci_idsel(device, 1) == 0) { - *data = 0xffffffff; - local_irq_restore(flags); - return -1; + if (board_pci_idsel) { + if (board_pci_idsel(device, 1) == 0) { + *data = 0xffffffff; + local_irq_restore(flags); + return -1; + } } - /* Setup the config window */ - if (bus->number == 0) - cfg_base = (1 << device) << 11; - else - cfg_base = 0x80000000 | (bus->number << 16) | (device << 11); + /* setup the config window */ + if (bus->number == 0) { + cfg_base = ((1<number<<16) | (device<<11); + } - /* Setup the lower bits of the 36-bit address */ - offset = (function << 8) | (where & ~0x3); - /* Pick up any address that falls below the page mask */ + /* setup the lower bits of the 36 bit address */ + offset = (function << 8) | (where & ~0x3); + /* pick up any address that falls below the page mask */ offset |= cfg_base & ~PAGE_MASK; - /* Page boundary */ + /* page boundary */ cfg_base = cfg_base & PAGE_MASK; /* * To improve performance, if the current device is the same as * the last device accessed, we don't touch the TLB. */ - entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; - entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; + entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; + entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) { mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1, (unsigned long)pci_cfg_vm->addr, PM_4K); @@ -149,37 +153,38 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, last_entryLo1 = entryLo1; } - if (access_type == PCI_ACCESS_WRITE) + if (access_type == PCI_ACCESS_WRITE) { au_writel(*data, (int)(pci_cfg_vm->addr + offset)); - else + } else { *data = au_readl((int)(pci_cfg_vm->addr + offset)); - + } au_sync_udelay(2); - DBG("cfg_access %d bus->number %u dev %u at %x *data %x conf %lx\n", - access_type, bus->number, device, where, *data, offset); + DBG("cfg_access %d bus->number %d dev %d at %x *data %x conf %x\n", + access_type, bus->number, device, where, *data, offset); - /* Check master abort */ + /* check master abort */ status = au_readl(Au1500_PCI_STATCMD); - if (status & (1 << 29)) { + if (status & (1<<29)) { *data = 0xffffffff; error = -1; DBG("Au1x Master Abort\n"); } else if ((status >> 28) & 0xf) { - DBG("PCI ERR detected: device %u, status %lx\n", - device, (status >> 28) & 0xf); + DBG("PCI ERR detected: device %d, status %x\n", device, ((status >> 28) & 0xf)); - /* Clear errors */ + /* clear errors */ au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD); *data = 0xffffffff; error = -1; } - /* Take away the IDSEL. */ - if (board_pci_idsel) + /* Take away the idsel. + */ + if (board_pci_idsel) { (void)board_pci_idsel(device, 0); + } local_irq_restore(flags); return error; @@ -187,7 +192,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, } static int read_config_byte(struct pci_bus *bus, unsigned int devfn, - int where, u8 *val) + int where, u8 * val) { u32 data; int ret; @@ -201,8 +206,9 @@ static int read_config_byte(struct pci_bus *bus, unsigned int devfn, return ret; } + static int read_config_word(struct pci_bus *bus, unsigned int devfn, - int where, u16 *val) + int where, u16 * val) { u32 data; int ret; @@ -215,7 +221,7 @@ static int read_config_word(struct pci_bus *bus, unsigned int devfn, } static int read_config_dword(struct pci_bus *bus, unsigned int devfn, - int where, u32 *val) + int where, u32 * val) { int ret; @@ -223,8 +229,9 @@ static int read_config_dword(struct pci_bus *bus, unsigned int devfn, return ret; } -static int write_config_byte(struct pci_bus *bus, unsigned int devfn, - int where, u8 val) +static int +write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, + u8 val) { u32 data = 0; @@ -232,7 +239,7 @@ static int write_config_byte(struct pci_bus *bus, unsigned int devfn, return -1; data = (data & ~(0xff << ((where & 3) << 3))) | - (val << ((where & 3) << 3)); + (val << ((where & 3) << 3)); if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) return -1; @@ -240,8 +247,9 @@ static int write_config_byte(struct pci_bus *bus, unsigned int devfn, return PCIBIOS_SUCCESSFUL; } -static int write_config_word(struct pci_bus *bus, unsigned int devfn, - int where, u16 val) +static int +write_config_word(struct pci_bus *bus, unsigned int devfn, int where, + u16 val) { u32 data = 0; @@ -249,16 +257,18 @@ static int write_config_word(struct pci_bus *bus, unsigned int devfn, return -1; data = (data & ~(0xffff << ((where & 3) << 3))) | - (val << ((where & 3) << 3)); + (val << ((where & 3) << 3)); if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) return -1; + return PCIBIOS_SUCCESSFUL; } -static int write_config_dword(struct pci_bus *bus, unsigned int devfn, - int where, u32 val) +static int +write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, + u32 val) { if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val)) return -1; @@ -267,20 +277,18 @@ static int write_config_dword(struct pci_bus *bus, unsigned int devfn, } static int config_read(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *val) + int where, int size, u32 * val) { switch (size) { case 1: { u8 _val; int rc = read_config_byte(bus, devfn, where, &_val); - *val = _val; return rc; } - case 2: { + case 2: { u16 _val; int rc = read_config_word(bus, devfn, where, &_val); - *val = _val; return rc; } @@ -302,6 +310,7 @@ static int config_write(struct pci_bus *bus, unsigned int devfn, } } + struct pci_ops au1x_pci_ops = { config_read, config_write diff --git a/trunk/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c b/trunk/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c index 11769b55438c..ab96a2d7f4c4 100644 --- a/trunk/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c +++ b/trunk/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c @@ -126,6 +126,9 @@ static irqreturn_t hwbutton_handler(int irq, void *data) struct hwbutton_interrupt *hirq = data; unsigned long cic_ext = *CIC_EXT_CFG_REG; + if (irq != hirq->irq) + return IRQ_NONE; + if (CIC_EXT_IS_ACTIVE_HI(cic_ext, hirq->eirq)) { /* Interrupt: pin is now HI */ CIC_EXT_SET_ACTIVE_LO(cic_ext, hirq->eirq); @@ -161,7 +164,7 @@ static int msp_hwbutton_register(struct hwbutton_interrupt *hirq) *CIC_EXT_CFG_REG = cic_ext; return request_irq(hirq->irq, hwbutton_handler, IRQF_DISABLED, - hirq->name, hirq); + hirq->name, (void *)hirq); } static int __init msp_hwbutton_setup(void) diff --git a/trunk/arch/mips/sgi-ip27/ip27-timer.c b/trunk/arch/mips/sgi-ip27/ip27-timer.c index 9cebc9e7da63..25d3baf0ebc4 100644 --- a/trunk/arch/mips/sgi-ip27/ip27-timer.c +++ b/trunk/arch/mips/sgi-ip27/ip27-timer.c @@ -158,7 +158,7 @@ static void rt_set_mode(enum clock_event_mode mode, } } -int rt_timer_irq; +unsigned int rt_timer_irq; static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id) { @@ -219,7 +219,7 @@ static void __cpuinit hub_rt_clock_event_init(void) static void __init hub_rt_clock_event_global_init(void) { - int irq; + unsigned int irq; do { smp_wmb(); diff --git a/trunk/arch/mn10300/boot/install.sh b/trunk/arch/mn10300/boot/install.sh index abba30971191..072951c83976 100644 --- a/trunk/arch/mn10300/boot/install.sh +++ b/trunk/arch/mn10300/boot/install.sh @@ -26,42 +26,42 @@ rm -fr $4/../usr/include/linux $4/../usr/include/asm install -c -m 0755 $2 $4/vmlinuz install -c -m 0755 $5 $4/boot.rom install -c -m 0755 -d $4/../usr/include/linux -cd ${srctree}/include/linux +cd $TOPDIR/include/linux for i in `find . -maxdepth 1 -name '*.h' -print`; do install -c -m 0644 $i $4/../usr/include/linux done install -c -m 0755 -d $4/../usr/include/linux/byteorder -cd ${srctree}/include/linux/byteorder +cd $TOPDIR/include/linux/byteorder for i in `find . -name '*.h' -print`; do install -c -m 0644 $i $4/../usr/include/linux/byteorder done install -c -m 0755 -d $4/../usr/include/linux/lockd -cd ${srctree}/include/linux/lockd +cd $TOPDIR/include/linux/lockd for i in `find . -name '*.h' -print`; do install -c -m 0644 $i $4/../usr/include/linux/lockd done install -c -m 0755 -d $4/../usr/include/linux/netfilter_ipv4 -cd ${srctree}/include/linux/netfilter_ipv4 +cd $TOPDIR/include/linux/netfilter_ipv4 for i in `find . -name '*.h' -print`; do install -c -m 0644 $i $4/../usr/include/linux/netfilter_ipv4 done install -c -m 0755 -d $4/../usr/include/linux/nfsd -cd ${srctree}/include/linux/nfsd +cd $TOPDIR/include/linux/nfsd for i in `find . -name '*.h' -print`; do install -c -m 0644 $i $4/../usr/include/linux/nfsd/$i done install -c -m 0755 -d $4/../usr/include/linux/raid -cd ${srctree}/include/linux/raid +cd $TOPDIR/include/linux/raid for i in `find . -name '*.h' -print`; do install -c -m 0644 $i $4/../usr/include/linux/raid done install -c -m 0755 -d $4/../usr/include/linux/sunrpc -cd ${srctree}/include/linux/sunrpc +cd $TOPDIR/include/linux/sunrpc for i in `find . -name '*.h' -print`; do install -c -m 0644 $i $4/../usr/include/linux/sunrpc done install -c -m 0755 -d $4/../usr/include/asm -cd ${srctree}/include/asm +cd $TOPDIR/include/asm for i in `find . -name '*.h' -print`; do install -c -m 0644 $i $4/../usr/include/asm done diff --git a/trunk/arch/parisc/mm/init.c b/trunk/arch/parisc/mm/init.c index b0ed709d5743..1f012843150f 100644 --- a/trunk/arch/parisc/mm/init.c +++ b/trunk/arch/parisc/mm/init.c @@ -606,7 +606,7 @@ void show_mem(void) int i, j; for (i = 0; i < npmem_ranges; i++) { - zl = node_zonelist(i, 0); + zl = node_zonelist(i); for (j = 0; j < MAX_NR_ZONES; j++) { struct zoneref *z; struct zone *zone; diff --git a/trunk/arch/powerpc/kernel/Makefile b/trunk/arch/powerpc/kernel/Makefile index 2346d271fbfd..d14cebf62bb0 100644 --- a/trunk/arch/powerpc/kernel/Makefile +++ b/trunk/arch/powerpc/kernel/Makefile @@ -105,9 +105,6 @@ PHONY += systbl_chk systbl_chk: $(src)/systbl_chk.sh $(obj)/systbl_chk.i $(call cmd,systbl_chk) - -ifeq ($(CONFIG_PPC_MERGE),y) - $(obj)/built-in.o: prom_init_check quiet_cmd_prom_init_check = CALL $< @@ -117,7 +114,4 @@ PHONY += prom_init_check prom_init_check: $(src)/prom_init_check.sh $(obj)/prom_init.o $(call cmd,prom_init_check) -endif - - clean-files := vmlinux.lds diff --git a/trunk/arch/powerpc/kernel/cputable.c b/trunk/arch/powerpc/kernel/cputable.c index e44d5530f0a6..81738a4b3c3a 100644 --- a/trunk/arch/powerpc/kernel/cputable.c +++ b/trunk/arch/powerpc/kernel/cputable.c @@ -1484,7 +1484,6 @@ static struct cpu_spec __initdata cpu_specs[] = { .dcache_bsize = 32, .machine_check = machine_check_e200, .platform = "ppc5554", - } #endif /* CONFIG_E200 */ #ifdef CONFIG_E500 { /* e500 */ @@ -1534,7 +1533,6 @@ static struct cpu_spec __initdata cpu_specs[] = { .dcache_bsize = 32, .machine_check = machine_check_e500, .platform = "powerpc", - } #endif /* CONFIG_E500 */ #endif /* CONFIG_PPC32 */ }; diff --git a/trunk/arch/powerpc/lib/Makefile b/trunk/arch/powerpc/lib/Makefile index c71d37dc6a88..f1d2cdc5331b 100644 --- a/trunk/arch/powerpc/lib/Makefile +++ b/trunk/arch/powerpc/lib/Makefile @@ -10,7 +10,6 @@ ifeq ($(CONFIG_PPC_MERGE),y) obj-y := string.o alloc.o \ checksum_$(CONFIG_WORD_SIZE).o obj-$(CONFIG_PPC32) += div64.o copy_32.o -obj-$(CONFIG_HAS_IOMEM) += devres.o endif obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \ @@ -24,3 +23,4 @@ obj-$(CONFIG_SMP) += locks.o endif obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o +obj-$(CONFIG_HAS_IOMEM) += devres.o diff --git a/trunk/arch/ppc/Makefile b/trunk/arch/ppc/Makefile index 2352d139b262..8df7f0e4c3a6 100644 --- a/trunk/arch/ppc/Makefile +++ b/trunk/arch/ppc/Makefile @@ -43,7 +43,7 @@ KBUILD_AFLAGS += $(cpu-as-y) KBUILD_CFLAGS += $(cpu-as-y) # Default to the common case. -KBUILD_DEFCONFIG := ebony_defconfig +KBUILD_DEFCONFIG := common_defconfig head-y := arch/ppc/kernel/head.o head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o diff --git a/trunk/arch/ppc/kernel/ppc_ksyms.c b/trunk/arch/ppc/kernel/ppc_ksyms.c index 602c268fc8a2..16ac11ca7ba0 100644 --- a/trunk/arch/ppc/kernel/ppc_ksyms.c +++ b/trunk/arch/ppc/kernel/ppc_ksyms.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include diff --git a/trunk/arch/ppc/kernel/setup.c b/trunk/arch/ppc/kernel/setup.c index 51e8094f52d6..bfddfdee0b65 100644 --- a/trunk/arch/ppc/kernel/setup.c +++ b/trunk/arch/ppc/kernel/setup.c @@ -36,7 +36,6 @@ #include #include #include -#include #define USES_PPC_SYS (defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \ defined(CONFIG_PPC_MPC52xx)) diff --git a/trunk/arch/ppc/platforms/residual.c b/trunk/arch/ppc/platforms/residual.c index d687b0f8763b..18495e754e30 100644 --- a/trunk/arch/ppc/platforms/residual.c +++ b/trunk/arch/ppc/platforms/residual.c @@ -38,7 +38,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/sparc/kernel/rtrap.S b/trunk/arch/sparc/kernel/rtrap.S index ab818cdc4cc0..b27b5b56f77a 100644 --- a/trunk/arch/sparc/kernel/rtrap.S +++ b/trunk/arch/sparc/kernel/rtrap.S @@ -139,7 +139,7 @@ ret_trap_userwins_ok: LOAD_PT_PRIV(sp, t_psr, t_pc, t_npc) or %t_pc, %t_npc, %g2 andcc %g2, 0x3, %g0 - sethi %hi(PSR_SYSCALL), %g2 + sethi %hi(PSR_SYCALL), %g2 be 1f andn %t_psr, %g2, %t_psr diff --git a/trunk/arch/sparc64/mm/init.c b/trunk/arch/sparc64/mm/init.c index a9828d748e2c..ec3e2c72302a 100644 --- a/trunk/arch/sparc64/mm/init.c +++ b/trunk/arch/sparc64/mm/init.c @@ -610,6 +610,8 @@ static void __init remap_kernel(void) static void __init inherit_prom_mappings(void) { + read_obp_translations(); + /* Now fixup OBP's idea about where we really are mapped. */ printk("Remapping the kernel... "); remap_kernel(); @@ -1745,17 +1747,7 @@ void __init paging_init(void) lmb_init(); - /* Find available physical memory... - * - * Read it twice in order to work around a bug in openfirmware. - * The call to grab this table itself can cause openfirmware to - * allocate memory, which in turn can take away some space from - * the list of available memory. Reading it twice makes sure - * we really do get the final value. - */ - read_obp_translations(); - read_obp_memory("reg", &pall[0], &pall_ents); - read_obp_memory("available", &pavail[0], &pavail_ents); + /* Find available physical memory... */ read_obp_memory("available", &pavail[0], &pavail_ents); phys_base = 0xffffffffffffffffUL; @@ -1796,6 +1788,8 @@ void __init paging_init(void) inherit_prom_mappings(); + read_obp_memory("reg", &pall[0], &pall_ents); + init_kpte_bitmap(); /* Ok, we can use our TLB miss and window trap handlers safely. */ diff --git a/trunk/arch/um/Kconfig.char b/trunk/arch/um/Kconfig.char index 1b238ebae6b3..3a4b396d7979 100644 --- a/trunk/arch/um/Kconfig.char +++ b/trunk/arch/um/Kconfig.char @@ -145,14 +145,14 @@ config LEGACY_PTYS systems, it is safe to say N. config RAW_DRIVER - tristate "RAW driver (/dev/raw/rawN)" - depends on BLOCK + tristate "RAW driver (/dev/raw/rawN) (OBSOLETE)" help The raw driver permits block devices to be bound to /dev/raw/rawN. Once bound, I/O against /dev/raw/rawN uses efficient zero-copy I/O. See the raw(8) manpage for more details. - Applications should preferably open the device (eg /dev/hda1) + The raw driver is deprecated and will be removed soon. + Applications should simply open the device (eg /dev/hda1) with the O_DIRECT flag. config MAX_RAW_DEVS diff --git a/trunk/arch/um/drivers/chan_user.c b/trunk/arch/um/drivers/chan_user.c index cfeb3f4a44af..025764089ac8 100644 --- a/trunk/arch/um/drivers/chan_user.c +++ b/trunk/arch/um/drivers/chan_user.c @@ -11,7 +11,6 @@ #include #include #include "chan_user.h" -#include "kern_constants.h" #include "os.h" #include "um_malloc.h" #include "user.h" diff --git a/trunk/arch/um/drivers/cow_sys.h b/trunk/arch/um/drivers/cow_sys.h index f5701fd2ef90..ca8c9e11a39b 100644 --- a/trunk/arch/um/drivers/cow_sys.h +++ b/trunk/arch/um/drivers/cow_sys.h @@ -8,7 +8,7 @@ static inline void *cow_malloc(int size) { - return uml_kmalloc(size, UM_GFP_KERNEL); + return kmalloc(size, UM_GFP_KERNEL); } static inline void cow_free(void *ptr) diff --git a/trunk/arch/um/drivers/daemon_user.c b/trunk/arch/um/drivers/daemon_user.c index f8e85e0bdace..f23c109a055c 100644 --- a/trunk/arch/um/drivers/daemon_user.c +++ b/trunk/arch/um/drivers/daemon_user.c @@ -34,7 +34,7 @@ static struct sockaddr_un *new_addr(void *name, int len) { struct sockaddr_un *sun; - sun = uml_kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL); + sun = kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL); if (sun == NULL) { printk(UM_KERN_ERR "new_addr: allocation of sockaddr_un " "failed\n"); @@ -83,7 +83,7 @@ static int connect_to_switch(struct daemon_data *pri) goto out_close; } - sun = uml_kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL); + sun = kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL); if (sun == NULL) { printk(UM_KERN_ERR "new_addr: allocation of sockaddr_un " "failed\n"); diff --git a/trunk/arch/um/drivers/fd.c b/trunk/arch/um/drivers/fd.c index f5a981a16240..0a2bb5b64b82 100644 --- a/trunk/arch/um/drivers/fd.c +++ b/trunk/arch/um/drivers/fd.c @@ -40,7 +40,7 @@ static void *fd_init(char *str, int device, const struct chan_opts *opts) return NULL; } - data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL); + data = kmalloc(sizeof(*data), UM_GFP_KERNEL); if (data == NULL) return NULL; diff --git a/trunk/arch/um/drivers/hostaudio_kern.c b/trunk/arch/um/drivers/hostaudio_kern.c index 368219cc2366..ff1b22b69e9c 100644 --- a/trunk/arch/um/drivers/hostaudio_kern.c +++ b/trunk/arch/um/drivers/hostaudio_kern.c @@ -154,7 +154,7 @@ static int hostaudio_ioctl(struct inode *inode, struct file *file, case SNDCTL_DSP_SUBDIVIDE: case SNDCTL_DSP_SETFRAGMENT: if (get_user(data, (int __user *) arg)) - return -EFAULT; + return EFAULT; break; default: break; diff --git a/trunk/arch/um/drivers/mcast_user.c b/trunk/arch/um/drivers/mcast_user.c index ee19e91568a2..5f647d7a7292 100644 --- a/trunk/arch/um/drivers/mcast_user.c +++ b/trunk/arch/um/drivers/mcast_user.c @@ -15,7 +15,6 @@ #include #include #include -#include "kern_constants.h" #include "mcast.h" #include "net_user.h" #include "um_malloc.h" @@ -25,7 +24,7 @@ static struct sockaddr_in *new_addr(char *addr, unsigned short port) { struct sockaddr_in *sin; - sin = uml_kmalloc(sizeof(struct sockaddr_in), UM_GFP_KERNEL); + sin = kmalloc(sizeof(struct sockaddr_in), UM_GFP_KERNEL); if (sin == NULL) { printk(UM_KERN_ERR "new_addr: allocation of sockaddr_in " "failed\n"); diff --git a/trunk/arch/um/drivers/net_user.c b/trunk/arch/um/drivers/net_user.c index 9415dd9e63ef..abf2653f5517 100644 --- a/trunk/arch/um/drivers/net_user.c +++ b/trunk/arch/um/drivers/net_user.c @@ -222,7 +222,7 @@ static void change(char *dev, char *what, unsigned char *addr, netmask[2], netmask[3]); output_len = UM_KERN_PAGE_SIZE; - output = uml_kmalloc(output_len, UM_GFP_KERNEL); + output = kmalloc(output_len, UM_GFP_KERNEL); if (output == NULL) printk(UM_KERN_ERR "change : failed to allocate output " "buffer\n"); diff --git a/trunk/arch/um/drivers/port_user.c b/trunk/arch/um/drivers/port_user.c index b49bf56a56aa..d269ca387f10 100644 --- a/trunk/arch/um/drivers/port_user.c +++ b/trunk/arch/um/drivers/port_user.c @@ -47,7 +47,7 @@ static void *port_init(char *str, int device, const struct chan_opts *opts) if (kern_data == NULL) return NULL; - data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL); + data = kmalloc(sizeof(*data), UM_GFP_KERNEL); if (data == NULL) goto err; diff --git a/trunk/arch/um/drivers/pty.c b/trunk/arch/um/drivers/pty.c index 1113911dcb2b..49c79dda6046 100644 --- a/trunk/arch/um/drivers/pty.c +++ b/trunk/arch/um/drivers/pty.c @@ -29,7 +29,7 @@ static void *pty_chan_init(char *str, int device, const struct chan_opts *opts) { struct pty_chan *data; - data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL); + data = kmalloc(sizeof(*data), UM_GFP_KERNEL); if (data == NULL) return NULL; diff --git a/trunk/arch/um/drivers/random.c b/trunk/arch/um/drivers/random.c index 4949044773ba..71f0959c1535 100644 --- a/trunk/arch/um/drivers/random.c +++ b/trunk/arch/um/drivers/random.c @@ -1,5 +1,4 @@ -/* Copyright (C) 2005 - 2008 Jeff Dike */ - +/* Copyright (C) 2005 Jeff Dike */ /* Much of this ripped from drivers/char/hw_random.c, see there for other * copyright. * @@ -9,18 +8,16 @@ #include #include #include -#include #include #include #include -#include "irq_kern.h" #include "os.h" /* * core module and version information */ #define RNG_VERSION "1.0.0" -#define RNG_MODULE_NAME "hw_random" +#define RNG_MODULE_NAME "random" #define RNG_MISCDEV_MINOR 183 /* official */ @@ -29,67 +26,47 @@ * protects against a module being loaded twice at the same time. */ static int random_fd = -1; -static DECLARE_WAIT_QUEUE_HEAD(host_read_wait); static int rng_dev_open (struct inode *inode, struct file *filp) { /* enforce read-only access to this chrdev */ if ((filp->f_mode & FMODE_READ) == 0) return -EINVAL; - if ((filp->f_mode & FMODE_WRITE) != 0) + if (filp->f_mode & FMODE_WRITE) return -EINVAL; return 0; } -static atomic_t host_sleep_count = ATOMIC_INIT(0); - static ssize_t rng_dev_read (struct file *filp, char __user *buf, size_t size, - loff_t *offp) + loff_t * offp) { - u32 data; - int n, ret = 0, have_data; - - while (size) { - n = os_read_file(random_fd, &data, sizeof(data)); - if (n > 0) { - have_data = n; - while (have_data && size) { - if (put_user((u8) data, buf++)) { - ret = ret ? : -EFAULT; - break; - } - size--; - ret++; - have_data--; - data >>= 8; - } - } - else if (n == -EAGAIN) { - DECLARE_WAITQUEUE(wait, current); - - if (filp->f_flags & O_NONBLOCK) - return ret ? : -EAGAIN; - - atomic_inc(&host_sleep_count); - reactivate_fd(random_fd, RANDOM_IRQ); - add_sigio_fd(random_fd); - - add_wait_queue(&host_read_wait, &wait); - set_task_state(current, TASK_INTERRUPTIBLE); - - schedule(); - set_task_state(current, TASK_RUNNING); - remove_wait_queue(&host_read_wait, &wait); - - if (atomic_dec_and_test(&host_sleep_count)) { - ignore_sigio_fd(random_fd); - deactivate_fd(random_fd, RANDOM_IRQ); - } - } - else - return n; - + u32 data; + int n, ret = 0, have_data; + + while(size){ + n = os_read_file(random_fd, &data, sizeof(data)); + if(n > 0){ + have_data = n; + while (have_data && size) { + if (put_user((u8)data, buf++)) { + ret = ret ? : -EFAULT; + break; + } + size--; + ret++; + have_data--; + data>>=8; + } + } + else if(n == -EAGAIN){ + if (filp->f_flags & O_NONBLOCK) + return ret ? : -EAGAIN; + + if(need_resched()) + schedule_timeout_interruptible(1); + } + else return n; if (signal_pending (current)) return ret ? : -ERESTARTSYS; } @@ -109,13 +86,6 @@ static struct miscdevice rng_miscdev = { &rng_chrdev_ops, }; -static irqreturn_t random_interrupt(int irq, void *data) -{ - wake_up(&host_read_wait); - - return IRQ_HANDLED; -} - /* * rng_init - initialize RNG module */ @@ -123,33 +93,28 @@ static int __init rng_init (void) { int err; - err = os_open_file("/dev/random", of_read(OPENFLAGS()), 0); - if (err < 0) - goto out; + err = os_open_file("/dev/random", of_read(OPENFLAGS()), 0); + if(err < 0) + goto out; - random_fd = err; + random_fd = err; - err = um_request_irq(RANDOM_IRQ, random_fd, IRQ_READ, random_interrupt, - IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "random", - NULL); - if (err) + err = os_set_fd_block(random_fd, 0); + if(err) goto err_out_cleanup_hw; - sigio_broken(random_fd, 1); - err = misc_register (&rng_miscdev); if (err) { - printk (KERN_ERR RNG_MODULE_NAME ": misc device register " - "failed\n"); + printk (KERN_ERR RNG_MODULE_NAME ": misc device register failed\n"); goto err_out_cleanup_hw; } -out: - return err; -err_out_cleanup_hw: - os_close_file(random_fd); - random_fd = -1; - goto out; + out: + return err; + + err_out_cleanup_hw: + random_fd = -1; + goto out; } /* @@ -157,7 +122,6 @@ static int __init rng_init (void) */ static void __exit rng_cleanup (void) { - os_close_file(random_fd); misc_deregister (&rng_miscdev); } diff --git a/trunk/arch/um/drivers/slip_user.c b/trunk/arch/um/drivers/slip_user.c index a1c2d2c98a94..8b80505a3fb0 100644 --- a/trunk/arch/um/drivers/slip_user.c +++ b/trunk/arch/um/drivers/slip_user.c @@ -96,7 +96,7 @@ static int slip_tramp(char **argv, int fd) pid = err; output_len = UM_KERN_PAGE_SIZE; - output = uml_kmalloc(output_len, UM_GFP_KERNEL); + output = kmalloc(output_len, UM_GFP_KERNEL); if (output == NULL) { printk(UM_KERN_ERR "slip_tramp : failed to allocate output " "buffer\n"); diff --git a/trunk/arch/um/drivers/tty.c b/trunk/arch/um/drivers/tty.c index 495858a090e4..c930fedc5172 100644 --- a/trunk/arch/um/drivers/tty.c +++ b/trunk/arch/um/drivers/tty.c @@ -29,7 +29,7 @@ static void *tty_chan_init(char *str, int device, const struct chan_opts *opts) } str++; - data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL); + data = kmalloc(sizeof(*data), UM_GFP_KERNEL); if (data == NULL) return NULL; *data = ((struct tty_chan) { .dev = str, diff --git a/trunk/arch/um/drivers/ubd_kern.c b/trunk/arch/um/drivers/ubd_kern.c index 44ad1607be2d..5e45e39a8a8d 100644 --- a/trunk/arch/um/drivers/ubd_kern.c +++ b/trunk/arch/um/drivers/ubd_kern.c @@ -1178,8 +1178,8 @@ static void cowify_bitmap(__u64 io_offset, int length, unsigned long *cow_mask, * by one word. Thanks to Lynn Kerby for the fix and James McMechan * for the original diagnosis. */ - if (*cow_offset == (DIV_ROUND_UP(bitmap_len, - sizeof(unsigned long)) - 1)) + if(*cow_offset == ((bitmap_len + sizeof(unsigned long) - 1) / + sizeof(unsigned long) - 1)) (*cow_offset)--; bitmap_words[0] = bitmap[*cow_offset]; diff --git a/trunk/arch/um/drivers/xterm.c b/trunk/arch/um/drivers/xterm.c index da2caa5a21ef..8a1c18a9b240 100644 --- a/trunk/arch/um/drivers/xterm.c +++ b/trunk/arch/um/drivers/xterm.c @@ -30,7 +30,7 @@ static void *xterm_init(char *str, int device, const struct chan_opts *opts) { struct xterm_chan *data; - data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL); + data = kmalloc(sizeof(*data), UM_GFP_KERNEL); if (data == NULL) return NULL; *data = ((struct xterm_chan) { .pid = -1, diff --git a/trunk/arch/um/include/as-layout.h b/trunk/arch/um/include/as-layout.h index 58e852dfb0ce..cac542d8ff70 100644 --- a/trunk/arch/um/include/as-layout.h +++ b/trunk/arch/um/include/as-layout.h @@ -23,16 +23,16 @@ */ #ifdef __ASSEMBLY__ -#define _UML_AC(X, Y) (Y) +#define _AC(X, Y) (Y) #else -#define __UML_AC(X, Y) (X(Y)) -#define _UML_AC(X, Y) __UML_AC(X, Y) +#define __AC(X, Y) (X (Y)) +#define _AC(X, Y) __AC(X, Y) #endif -#define STUB_START _UML_AC(, 0x100000) -#define STUB_CODE _UML_AC((unsigned long), STUB_START) -#define STUB_DATA _UML_AC((unsigned long), STUB_CODE + UM_KERN_PAGE_SIZE) -#define STUB_END _UML_AC((unsigned long), STUB_DATA + UM_KERN_PAGE_SIZE) +#define STUB_START _AC(, 0x100000) +#define STUB_CODE _AC((unsigned long), STUB_START) +#define STUB_DATA _AC((unsigned long), STUB_CODE + UM_KERN_PAGE_SIZE) +#define STUB_END _AC((unsigned long), STUB_DATA + UM_KERN_PAGE_SIZE) #ifndef __ASSEMBLY__ diff --git a/trunk/arch/um/include/line.h b/trunk/arch/um/include/line.h index 311a0d3d93af..979b73e6352d 100644 --- a/trunk/arch/um/include/line.h +++ b/trunk/arch/um/include/line.h @@ -58,11 +58,11 @@ struct line { }; #define LINE_INIT(str, d) \ - { .count_lock = __SPIN_LOCK_UNLOCKED((str).count_lock), \ + { .count_lock = SPIN_LOCK_UNLOCKED, \ .init_str = str, \ .init_pri = INIT_STATIC, \ .valid = 1, \ - .lock = __SPIN_LOCK_UNLOCKED((str).lock), \ + .lock = SPIN_LOCK_UNLOCKED, \ .driver = d } extern void line_close(struct tty_struct *tty, struct file * filp); diff --git a/trunk/arch/um/include/os.h b/trunk/arch/um/include/os.h index e2716ac8889a..32c799e3a495 100644 --- a/trunk/arch/um/include/os.h +++ b/trunk/arch/um/include/os.h @@ -290,7 +290,6 @@ extern void os_set_ioignore(void); extern int add_sigio_fd(int fd); extern int ignore_sigio_fd(int fd); extern void maybe_sigio_broken(int fd, int read); -extern void sigio_broken(int fd, int read); /* sys-x86_64/prctl.c */ extern int os_arch_prctl(int pid, int code, unsigned long *addr); diff --git a/trunk/arch/um/include/process.h b/trunk/arch/um/include/process.h index bb873a51262e..5af9157ff54f 100644 --- a/trunk/arch/um/include/process.h +++ b/trunk/arch/um/include/process.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2000 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com) + * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com) * Licensed under the GPL */ @@ -8,10 +8,18 @@ #include -/* Copied from linux/compiler-gcc.h since we can't include it directly */ -#define barrier() __asm__ __volatile__("": : :"memory") - -extern void sig_handler(int sig, struct sigcontext *sc); -extern void alarm_handler(int sig, struct sigcontext *sc); +extern void sig_handler(int sig, struct sigcontext sc); +extern void alarm_handler(int sig, struct sigcontext sc); #endif + +/* + * Overrides for Emacs so that we follow Linus's tabbing style. + * Emacs will notice this stuff at the end of the file and automatically + * adjust the settings for this buffer only. This must remain at the end + * of the file. + * --------------------------------------------------------------------------- + * Local variables: + * c-file-style: "linux" + * End: + */ diff --git a/trunk/arch/um/include/skas_ptrace.h b/trunk/arch/um/include/skas_ptrace.h index 3d31bbacd016..cd2327d09c8d 100644 --- a/trunk/arch/um/include/skas_ptrace.h +++ b/trunk/arch/um/include/skas_ptrace.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) + * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com) * Licensed under the GPL */ @@ -12,3 +12,14 @@ #include "sysdep/skas_ptrace.h" #endif + +/* + * Overrides for Emacs so that we follow Linus's tabbing style. + * Emacs will notice this stuff at the end of the file and automatically + * adjust the settings for this buffer only. This must remain at the end + * of the file. + * --------------------------------------------------------------------------- + * Local variables: + * c-file-style: "linux" + * End: + */ diff --git a/trunk/arch/um/include/sysdep-i386/ptrace_user.h b/trunk/arch/um/include/sysdep-i386/ptrace_user.h index ef56247e4143..75650723c38f 100644 --- a/trunk/arch/um/include/sysdep-i386/ptrace_user.h +++ b/trunk/arch/um/include/sysdep-i386/ptrace_user.h @@ -41,10 +41,38 @@ #define PT_SP_OFFSET PT_OFFSET(UESP) #define PT_SP(regs) ((regs)[UESP]) -#define FP_SIZE ((HOST_FPX_SIZE > HOST_FP_SIZE) ? HOST_FPX_SIZE : HOST_FP_SIZE) +#define FP_SIZE ((HOST_XFP_SIZE > HOST_FP_SIZE) ? HOST_XFP_SIZE : HOST_FP_SIZE) #ifndef FRAME_SIZE #define FRAME_SIZE (17) #endif +#define FRAME_SIZE_OFFSET (FRAME_SIZE * sizeof(unsigned long)) + +#define FP_FRAME_SIZE (27) +#define FPX_FRAME_SIZE (128) + +#ifdef PTRACE_GETREGS +#define UM_HAVE_GETREGS +#endif + +#ifdef PTRACE_SETREGS +#define UM_HAVE_SETREGS +#endif + +#ifdef PTRACE_GETFPREGS +#define UM_HAVE_GETFPREGS +#endif + +#ifdef PTRACE_SETFPREGS +#define UM_HAVE_SETFPREGS +#endif + +#ifdef PTRACE_GETFPXREGS +#define UM_HAVE_GETFPXREGS +#endif + +#ifdef PTRACE_SETFPXREGS +#define UM_HAVE_SETFPXREGS +#endif #endif diff --git a/trunk/arch/um/include/sysdep-i386/sigcontext.h b/trunk/arch/um/include/sysdep-i386/sigcontext.h index f583c87111a0..67e77122aa45 100644 --- a/trunk/arch/um/include/sysdep-i386/sigcontext.h +++ b/trunk/arch/um/include/sysdep-i386/sigcontext.h @@ -10,7 +10,7 @@ #define IP_RESTART_SYSCALL(ip) ((ip) -= 2) -#define GET_FAULTINFO_FROM_SC(fi, sc) \ +#define GET_FAULTINFO_FROM_SC(fi,sc) \ { \ (fi).cr2 = SC_CR2(sc); \ (fi).error_code = SC_ERR(sc); \ diff --git a/trunk/arch/um/include/sysdep-x86_64/ptrace_user.h b/trunk/arch/um/include/sysdep-x86_64/ptrace_user.h index 4dbccdb58f48..45c0bd881cb3 100644 --- a/trunk/arch/um/include/sysdep-x86_64/ptrace_user.h +++ b/trunk/arch/um/include/sysdep-x86_64/ptrace_user.h @@ -48,8 +48,7 @@ #define PT_ORIG_RAX_OFFSET (ORIG_RAX) #define PT_ORIG_RAX(regs) ((regs)[PT_INDEX(ORIG_RAX)]) -/* - * x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though +/* x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though * it's defined in the kernel's include/linux/ptrace.h. Additionally, use the * 2.4 name and value for 2.4 host compatibility. */ @@ -57,8 +56,7 @@ #define PTRACE_OLDSETOPTIONS 21 #endif -/* - * These are before the system call, so the system call number is RAX +/* These are before the system call, so the system call number is RAX * rather than ORIG_RAX, and arg4 is R10 rather than RCX */ #define REGS_SYSCALL_NR PT_INDEX(RAX) @@ -75,3 +73,14 @@ #define FP_SIZE (HOST_FP_SIZE) #endif + +/* + * Overrides for Emacs so that we follow Linus's tabbing style. + * Emacs will notice this stuff at the end of the file and automatically + * adjust the settings for this buffer only. This must remain at the end + * of the file. + * --------------------------------------------------------------------------- + * Local variables: + * c-file-style: "linux" + * End: + */ diff --git a/trunk/arch/um/include/um_malloc.h b/trunk/arch/um/include/um_malloc.h index c554d706d106..0ad17cb83d96 100644 --- a/trunk/arch/um/include/um_malloc.h +++ b/trunk/arch/um/include/um_malloc.h @@ -8,12 +8,15 @@ #include "kern_constants.h" -extern void *uml_kmalloc(int size, int flags); +extern void *__kmalloc(int size, int flags); +static inline void *kmalloc(int size, int flags) +{ + return __kmalloc(size, flags); +} + extern void kfree(const void *ptr); extern void *vmalloc(unsigned long size); extern void vfree(void *ptr); #endif /* __UM_MALLOC_H__ */ - - diff --git a/trunk/arch/um/kernel/dyn.lds.S b/trunk/arch/um/kernel/dyn.lds.S index 9975e1ab44fb..26090b7f323e 100644 --- a/trunk/arch/um/kernel/dyn.lds.S +++ b/trunk/arch/um/kernel/dyn.lds.S @@ -1,5 +1,4 @@ #include -#include OUTPUT_FORMAT(ELF_FORMAT) OUTPUT_ARCH(ELF_ARCH) @@ -22,7 +21,7 @@ SECTIONS _einittext = .; } - . = ALIGN(PAGE_SIZE); + . = ALIGN(4096); /* Read-only sections, merged into text segment: */ .hash : { *(.hash) } @@ -69,9 +68,9 @@ SECTIONS /* .gnu.warning sections are handled specially by elf32.em. */ *(.gnu.warning) - . = ALIGN(PAGE_SIZE); + . = ALIGN(4096); } =0x90909090 - . = ALIGN(PAGE_SIZE); + . = ALIGN(4096); .syscall_stub : { __syscall_stub_start = .; *(.__syscall_stub*) diff --git a/trunk/arch/um/kernel/mem.c b/trunk/arch/um/kernel/mem.c index b0ee64622ff7..2eea1ff235e6 100644 --- a/trunk/arch/um/kernel/mem.c +++ b/trunk/arch/um/kernel/mem.c @@ -375,8 +375,3 @@ pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) return pmd; } #endif - -void *uml_kmalloc(int size, int flags) -{ - return kmalloc(size, flags); -} diff --git a/trunk/arch/um/kernel/time.c b/trunk/arch/um/kernel/time.c index c3e2f369c33c..0d0cea2ac98d 100644 --- a/trunk/arch/um/kernel/time.c +++ b/trunk/arch/um/kernel/time.c @@ -75,7 +75,7 @@ static irqreturn_t um_timer(int irq, void *dev) static cycle_t itimer_read(void) { - return os_nsecs() / 1000; + return os_nsecs(); } static struct clocksource itimer_clocksource = { @@ -83,7 +83,7 @@ static struct clocksource itimer_clocksource = { .rating = 300, .read = itimer_read, .mask = CLOCKSOURCE_MASK(64), - .mult = 1000, + .mult = 1, .shift = 0, .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; diff --git a/trunk/arch/um/kernel/um_arch.c b/trunk/arch/um/kernel/um_arch.c index 9db85b2ce698..56deed623446 100644 --- a/trunk/arch/um/kernel/um_arch.c +++ b/trunk/arch/um/kernel/um_arch.c @@ -150,7 +150,7 @@ __uml_setup("root=", uml_root_setup, static int __init no_skas_debug_setup(char *line, int *add) { printf("'debug' is not necessary to gdb UML in skas mode - run \n"); - printf("'gdb linux'\n"); + printf("'gdb linux'"); return 0; } @@ -258,7 +258,6 @@ int __init linux_main(int argc, char **argv) { unsigned long avail, diff; unsigned long virtmem_size, max_physmem; - unsigned long stack; unsigned int i; int add; char * mode; @@ -349,9 +348,7 @@ int __init linux_main(int argc, char **argv) } virtmem_size = physmem_size; - stack = (unsigned long) argv; - stack &= ~(1024 * 1024 - 1); - avail = stack - start_vm; + avail = TASK_SIZE - start_vm; if (physmem_size > avail) virtmem_size = avail; end_vm = start_vm + virtmem_size; diff --git a/trunk/arch/um/kernel/uml.lds.S b/trunk/arch/um/kernel/uml.lds.S index 11b835248b86..5828c1d54505 100644 --- a/trunk/arch/um/kernel/uml.lds.S +++ b/trunk/arch/um/kernel/uml.lds.S @@ -1,5 +1,4 @@ #include -#include OUTPUT_FORMAT(ELF_FORMAT) OUTPUT_ARCH(ELF_ARCH) @@ -27,7 +26,7 @@ SECTIONS INIT_TEXT _einittext = .; } - . = ALIGN(PAGE_SIZE); + . = ALIGN(4096); .text : { @@ -40,7 +39,7 @@ SECTIONS *(.gnu.linkonce.t*) } - . = ALIGN(PAGE_SIZE); + . = ALIGN(4096); .syscall_stub : { __syscall_stub_start = .; *(.__syscall_stub*) @@ -80,7 +79,7 @@ SECTIONS .sdata : { *(.sdata) } _edata = .; PROVIDE (edata = .); - . = ALIGN(PAGE_SIZE); + . = ALIGN(0x1000); .sbss : { __bss_start = .; diff --git a/trunk/arch/um/os-Linux/drivers/ethertap_user.c b/trunk/arch/um/os-Linux/drivers/ethertap_user.c index cc72cb2c1af6..6fb0b174f538 100644 --- a/trunk/arch/um/os-Linux/drivers/ethertap_user.c +++ b/trunk/arch/um/os-Linux/drivers/ethertap_user.c @@ -52,7 +52,7 @@ static void etap_change(int op, unsigned char *addr, unsigned char *netmask, return; } - output = uml_kmalloc(UM_KERN_PAGE_SIZE, UM_GFP_KERNEL); + output = kmalloc(UM_KERN_PAGE_SIZE, UM_GFP_KERNEL); if (output == NULL) printk(UM_KERN_ERR "etap_change : Failed to allocate output " "buffer\n"); @@ -165,7 +165,7 @@ static int etap_open(void *data) err = etap_tramp(pri->dev_name, pri->gate_addr, control_fds[0], control_fds[1], data_fds[0], data_fds[1]); output_len = UM_KERN_PAGE_SIZE; - output = uml_kmalloc(output_len, UM_GFP_KERNEL); + output = kmalloc(output_len, UM_GFP_KERNEL); read_output(control_fds[0], output, output_len); if (output == NULL) diff --git a/trunk/arch/um/os-Linux/helper.c b/trunk/arch/um/os-Linux/helper.c index 74ca7aabf4e1..f25c29a12d00 100644 --- a/trunk/arch/um/os-Linux/helper.c +++ b/trunk/arch/um/os-Linux/helper.c @@ -71,8 +71,8 @@ int run_helper(void (*pre_exec)(void *), void *pre_data, char **argv) data.pre_data = pre_data; data.argv = argv; data.fd = fds[1]; - data.buf = __cant_sleep() ? uml_kmalloc(PATH_MAX, UM_GFP_ATOMIC) : - uml_kmalloc(PATH_MAX, UM_GFP_KERNEL); + data.buf = __cant_sleep() ? kmalloc(PATH_MAX, UM_GFP_ATOMIC) : + kmalloc(PATH_MAX, UM_GFP_KERNEL); pid = clone(helper_child, (void *) sp, CLONE_VM, &data); if (pid < 0) { ret = -errno; diff --git a/trunk/arch/um/os-Linux/main.c b/trunk/arch/um/os-Linux/main.c index eee69b9f52c9..abb9b0ffd960 100644 --- a/trunk/arch/um/os-Linux/main.c +++ b/trunk/arch/um/os-Linux/main.c @@ -199,7 +199,7 @@ void *__wrap_malloc(int size) return __real_malloc(size); else if (size <= UM_KERN_PAGE_SIZE) /* finding contiguous pages can be hard*/ - ret = uml_kmalloc(size, UM_GFP_KERNEL); + ret = kmalloc(size, UM_GFP_KERNEL); else ret = vmalloc(size); /* diff --git a/trunk/arch/um/os-Linux/sigio.c b/trunk/arch/um/os-Linux/sigio.c index eb8f2e4be192..abf47a7c4abd 100644 --- a/trunk/arch/um/os-Linux/sigio.c +++ b/trunk/arch/um/os-Linux/sigio.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2002 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com) + * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) * Licensed under the GPL */ @@ -15,7 +15,6 @@ #include "kern_util.h" #include "init.h" #include "os.h" -#include "process.h" #include "sigio.h" #include "um_malloc.h" #include "user.h" @@ -110,7 +109,7 @@ static int need_poll(struct pollfds *polls, int n) if (n <= polls->size) return 0; - new = uml_kmalloc(n * sizeof(struct pollfd), UM_GFP_ATOMIC); + new = kmalloc(n * sizeof(struct pollfd), UM_GFP_ATOMIC); if (new == NULL) { printk(UM_KERN_ERR "need_poll : failed to allocate new " "pollfds\n"); @@ -244,7 +243,7 @@ static struct pollfd *setup_initial_poll(int fd) { struct pollfd *p; - p = uml_kmalloc(sizeof(struct pollfd), UM_GFP_KERNEL); + p = kmalloc(sizeof(struct pollfd), UM_GFP_KERNEL); if (p == NULL) { printk(UM_KERN_ERR "setup_initial_poll : failed to allocate " "poll\n"); @@ -339,10 +338,20 @@ static void write_sigio_workaround(void) close(l_write_sigio_fds[1]); } -void sigio_broken(int fd, int read) +/* Changed during early boot */ +static int pty_output_sigio = 0; +static int pty_close_sigio = 0; + +void maybe_sigio_broken(int fd, int read) { int err; + if (!isatty(fd)) + return; + + if ((read || pty_output_sigio) && (!read || pty_close_sigio)) + return; + write_sigio_workaround(); sigio_lock(); @@ -361,21 +370,6 @@ void sigio_broken(int fd, int read) sigio_unlock(); } -/* Changed during early boot */ -static int pty_output_sigio; -static int pty_close_sigio; - -void maybe_sigio_broken(int fd, int read) -{ - if (!isatty(fd)) - return; - - if ((read || pty_output_sigio) && (!read || pty_close_sigio)) - return; - - sigio_broken(fd, read); -} - static void sigio_cleanup(void) { if (write_sigio_pid == -1) @@ -389,7 +383,7 @@ static void sigio_cleanup(void) __uml_exitcall(sigio_cleanup); /* Used as a flag during SIGIO testing early in boot */ -static int got_sigio; +static volatile int got_sigio = 0; static void __init handler(int sig) { @@ -504,8 +498,7 @@ static void tty_output(int master, int slave) if (errno != EAGAIN) printk(UM_KERN_ERR "tty_output : write failed, errno = %d\n", errno); - while (((n = read(slave, buf, sizeof(buf))) > 0) && - !({ barrier(); got_sigio; })) + while (((n = read(slave, buf, sizeof(buf))) > 0) && !got_sigio) ; if (got_sigio) { diff --git a/trunk/arch/um/os-Linux/signal.c b/trunk/arch/um/os-Linux/signal.c index 5aade6027e40..3f1694b134cb 100644 --- a/trunk/arch/um/os-Linux/signal.c +++ b/trunk/arch/um/os-Linux/signal.c @@ -12,7 +12,6 @@ #include "as-layout.h" #include "kern_util.h" #include "os.h" -#include "process.h" #include "sysdep/barrier.h" #include "sysdep/sigcontext.h" #include "user.h" diff --git a/trunk/arch/um/os-Linux/skas/process.c b/trunk/arch/um/os-Linux/skas/process.c index 6be028ca1817..1e8cba6550a9 100644 --- a/trunk/arch/um/os-Linux/skas/process.c +++ b/trunk/arch/um/os-Linux/skas/process.c @@ -442,7 +442,7 @@ void userspace(struct uml_pt_regs *regs) unblock_signals(); break; default: - printk(UM_KERN_ERR "userspace - child stopped " + printk(UM_KERN_ERR "userspace - child stopped " "with signal %d\n", sig); fatal_sigsegv(); } diff --git a/trunk/arch/um/os-Linux/start_up.c b/trunk/arch/um/os-Linux/start_up.c index b4b36e0f2e89..997d01944f91 100644 --- a/trunk/arch/um/os-Linux/start_up.c +++ b/trunk/arch/um/os-Linux/start_up.c @@ -23,7 +23,6 @@ #include "mem_user.h" #include "ptrace_user.h" #include "registers.h" -#include "skas.h" #include "skas_ptrace.h" static void ptrace_child(void) @@ -141,27 +140,14 @@ static int stop_ptraced_child(int pid, int exitcode, int mustexit) } /* Changed only during early boot */ -int ptrace_faultinfo; -static int disable_ptrace_faultinfo; - -int ptrace_ldt; -static int disable_ptrace_ldt; - -int proc_mm; -static int disable_proc_mm; - -int have_switch_mm; -static int disable_switch_mm; - -int skas_needs_stub; +int ptrace_faultinfo = 1; +int ptrace_ldt = 1; +int proc_mm = 1; +int skas_needs_stub = 0; static int __init skas0_cmd_param(char *str, int* add) { - disable_ptrace_faultinfo = 1; - disable_ptrace_ldt = 1; - disable_proc_mm = 1; - disable_switch_mm = 1; - + ptrace_faultinfo = proc_mm = 0; return 0; } @@ -171,12 +157,15 @@ static int __init mode_skas0_cmd_param(char *str, int* add) __attribute__((alias("skas0_cmd_param"))); __uml_setup("skas0", skas0_cmd_param, -"skas0\n" -" Disables SKAS3 and SKAS4 usage, so that SKAS0 is used\n\n"); + "skas0\n" + " Disables SKAS3 usage, so that SKAS0 is used, unless \n" + " you specify mode=tt.\n\n"); __uml_setup("mode=skas0", mode_skas0_cmd_param, -"mode=skas0\n" -" Disables SKAS3 and SKAS4 usage, so that SKAS0 is used.\n\n"); + "mode=skas0\n" + " Disables SKAS3 usage, so that SKAS0 is used, unless you \n" + " specify mode=tt. Note that this was recently added - on \n" + " older kernels you must use simply \"skas0\".\n\n"); /* Changed only during early boot */ static int force_sysemu_disabled = 0; @@ -371,7 +360,7 @@ void __init os_early_checks(void) static int __init noprocmm_cmd_param(char *str, int* add) { - disable_proc_mm = 1; + proc_mm = 0; return 0; } @@ -383,7 +372,7 @@ __uml_setup("noprocmm", noprocmm_cmd_param, static int __init noptracefaultinfo_cmd_param(char *str, int* add) { - disable_ptrace_faultinfo = 1; + ptrace_faultinfo = 0; return 0; } @@ -395,7 +384,7 @@ __uml_setup("noptracefaultinfo", noptracefaultinfo_cmd_param, static int __init noptraceldt_cmd_param(char *str, int* add) { - disable_ptrace_ldt = 1; + ptrace_ldt = 0; return 0; } @@ -415,15 +404,17 @@ static inline void check_skas3_ptrace_faultinfo(void) n = ptrace(PTRACE_FAULTINFO, pid, 0, &fi); if (n < 0) { + ptrace_faultinfo = 0; if (errno == EIO) non_fatal("not found\n"); else perror("not found"); - } else if (disable_ptrace_faultinfo) - non_fatal("found but disabled on command line\n"); + } else { - ptrace_faultinfo = 1; - non_fatal("found\n"); + if (!ptrace_faultinfo) + non_fatal("found but disabled on command line\n"); + else + non_fatal("found\n"); } stop_ptraced_child(pid, 1, 1); @@ -446,30 +437,38 @@ static inline void check_skas3_ptrace_ldt(void) if (n < 0) { if (errno == EIO) non_fatal("not found\n"); - else + else { perror("not found"); - } else if (disable_ptrace_ldt) - non_fatal("found, but use is disabled\n"); + } + ptrace_ldt = 0; + } else { - ptrace_ldt = 1; - non_fatal("found\n"); + if (ptrace_ldt) + non_fatal("found\n"); + else + non_fatal("found, but use is disabled\n"); } stop_ptraced_child(pid, 1, 1); +#else + /* PTRACE_LDT might be disabled via cmdline option. + * We want to override this, else we might use the stub + * without real need + */ + ptrace_ldt = 1; #endif } static inline void check_skas3_proc_mm(void) { non_fatal(" - /proc/mm..."); - if (access("/proc/mm", W_OK) < 0) + if (access("/proc/mm", W_OK) < 0) { + proc_mm = 0; perror("not found"); - else if (disable_proc_mm) - non_fatal("found but disabled on command line\n"); - else { - proc_mm = 1; - non_fatal("found\n"); } + else if (!proc_mm) + non_fatal("found but disabled on command line\n"); + else non_fatal("found\n"); } void can_do_skas(void) diff --git a/trunk/arch/um/os-Linux/sys-i386/registers.c b/trunk/arch/um/os-Linux/sys-i386/registers.c index c6183e7aec3d..b613473b3ec1 100644 --- a/trunk/arch/um/os-Linux/sys-i386/registers.c +++ b/trunk/arch/um/os-Linux/sys-i386/registers.c @@ -5,7 +5,6 @@ */ #include -#include #include "kern_constants.h" #include "longjmp.h" #include "user.h" @@ -75,10 +74,10 @@ int put_fp_registers(int pid, unsigned long *regs) void arch_init_registers(int pid) { - struct user_fxsr_struct fpx_regs; + unsigned long fpx_regs[HOST_XFP_SIZE]; int err; - err = ptrace(PTRACE_GETFPXREGS, pid, 0, &fpx_regs); + err = ptrace(PTRACE_GETFPXREGS, pid, 0, fpx_regs); if (!err) return; diff --git a/trunk/arch/um/os-Linux/time.c b/trunk/arch/um/os-Linux/time.c index bee98f466d66..e49280599465 100644 --- a/trunk/arch/um/os-Linux/time.c +++ b/trunk/arch/um/os-Linux/time.c @@ -9,9 +9,7 @@ #include #include #include "kern_constants.h" -#include "kern_util.h" #include "os.h" -#include "process.h" #include "user.h" int set_interval(void) @@ -60,17 +58,12 @@ static inline long long timeval_to_ns(const struct timeval *tv) long long disable_timer(void) { struct itimerval time = ((struct itimerval) { { 0, 0 }, { 0, 0 } }); - int remain, max = UM_NSEC_PER_SEC / UM_HZ; if (setitimer(ITIMER_VIRTUAL, &time, &time) < 0) printk(UM_KERN_ERR "disable_timer - setitimer failed, " "errno = %d\n", errno); - remain = timeval_to_ns(&time.it_value); - if (remain > max) - remain = max; - - return remain; + return timeval_to_ns(&time.it_value); } long long os_nsecs(void) @@ -86,44 +79,7 @@ static int after_sleep_interval(struct timespec *ts) { return 0; } - -static void deliver_alarm(void) -{ - alarm_handler(SIGVTALRM, NULL); -} - -static unsigned long long sleep_time(unsigned long long nsecs) -{ - return nsecs; -} - #else -unsigned long long last_tick; -unsigned long long skew; - -static void deliver_alarm(void) -{ - unsigned long long this_tick = os_nsecs(); - int one_tick = UM_NSEC_PER_SEC / UM_HZ; - - if (last_tick == 0) - last_tick = this_tick - one_tick; - - skew += this_tick - last_tick; - - while (skew >= one_tick) { - alarm_handler(SIGVTALRM, NULL); - skew -= one_tick; - } - - last_tick = this_tick; -} - -static unsigned long long sleep_time(unsigned long long nsecs) -{ - return nsecs > skew ? nsecs - skew : 0; -} - static inline long long timespec_to_us(const struct timespec *ts) { return ((long long) ts->tv_sec * UM_USEC_PER_SEC) + @@ -146,8 +102,6 @@ static int after_sleep_interval(struct timespec *ts) */ if (start_usecs > usec) start_usecs = usec; - - start_usecs -= skew / UM_NSEC_PER_USEC; tv = ((struct timeval) { .tv_sec = start_usecs / UM_USEC_PER_SEC, .tv_usec = start_usecs % UM_USEC_PER_SEC }); interval = ((struct itimerval) { { 0, usec }, tv }); @@ -159,6 +113,8 @@ static int after_sleep_interval(struct timespec *ts) } #endif +extern void alarm_handler(int sig, struct sigcontext *sc); + void idle_sleep(unsigned long long nsecs) { struct timespec ts; @@ -170,12 +126,10 @@ void idle_sleep(unsigned long long nsecs) */ if (nsecs == 0) nsecs = UM_NSEC_PER_SEC / UM_HZ; - - nsecs = sleep_time(nsecs); ts = ((struct timespec) { .tv_sec = nsecs / UM_NSEC_PER_SEC, .tv_nsec = nsecs % UM_NSEC_PER_SEC }); if (nanosleep(&ts, &ts) == 0) - deliver_alarm(); + alarm_handler(SIGVTALRM, NULL); after_sleep_interval(&ts); } diff --git a/trunk/arch/um/sys-i386/ptrace.c b/trunk/arch/um/sys-i386/ptrace.c index c9b176534d65..6b4499906a6c 100644 --- a/trunk/arch/um/sys-i386/ptrace.c +++ b/trunk/arch/um/sys-i386/ptrace.c @@ -148,13 +148,14 @@ int peek_user(struct task_struct *child, long addr, long data) int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child) { int err, n, cpu = ((struct thread_info *) child->stack)->cpu; - struct user_i387_struct fpregs; + long fpregs[HOST_FP_SIZE]; - err = save_fp_registers(userspace_pid[cpu], (unsigned long *) &fpregs); + BUG_ON(sizeof(*buf) != sizeof(fpregs)); + err = save_fp_registers(userspace_pid[cpu], fpregs); if (err) return err; - n = copy_to_user(buf, &fpregs, sizeof(fpregs)); + n = copy_to_user(buf, fpregs, sizeof(fpregs)); if(n > 0) return -EFAULT; @@ -164,26 +165,27 @@ int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child) int set_fpregs(struct user_i387_struct __user *buf, struct task_struct *child) { int n, cpu = ((struct thread_info *) child->stack)->cpu; - struct user_i387_struct fpregs; + long fpregs[HOST_FP_SIZE]; - n = copy_from_user(&fpregs, buf, sizeof(fpregs)); + BUG_ON(sizeof(*buf) != sizeof(fpregs)); + n = copy_from_user(fpregs, buf, sizeof(fpregs)); if (n > 0) return -EFAULT; - return restore_fp_registers(userspace_pid[cpu], - (unsigned long *) &fpregs); + return restore_fp_registers(userspace_pid[cpu], fpregs); } int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child) { int err, n, cpu = ((struct thread_info *) child->stack)->cpu; - struct user_fxsr_struct fpregs; + long fpregs[HOST_XFP_SIZE]; - err = save_fpx_registers(userspace_pid[cpu], (unsigned long *) &fpregs); + BUG_ON(sizeof(*buf) != sizeof(fpregs)); + err = save_fpx_registers(userspace_pid[cpu], fpregs); if (err) return err; - n = copy_to_user(buf, &fpregs, sizeof(fpregs)); + n = copy_to_user(buf, fpregs, sizeof(fpregs)); if(n > 0) return -EFAULT; @@ -193,14 +195,14 @@ int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child) int set_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child) { int n, cpu = ((struct thread_info *) child->stack)->cpu; - struct user_fxsr_struct fpregs; + long fpregs[HOST_XFP_SIZE]; - n = copy_from_user(&fpregs, buf, sizeof(fpregs)); + BUG_ON(sizeof(*buf) != sizeof(fpregs)); + n = copy_from_user(fpregs, buf, sizeof(fpregs)); if (n > 0) return -EFAULT; - return restore_fpx_registers(userspace_pid[cpu], - (unsigned long *) &fpregs); + return restore_fpx_registers(userspace_pid[cpu], fpregs); } long subarch_ptrace(struct task_struct *child, long request, long addr, diff --git a/trunk/arch/um/sys-i386/user-offsets.c b/trunk/arch/um/sys-i386/user-offsets.c index 5f883bfe773f..39bd32bf84f0 100644 --- a/trunk/arch/um/sys-i386/user-offsets.c +++ b/trunk/arch/um/sys-i386/user-offsets.c @@ -22,7 +22,7 @@ void foo(void) OFFSET(HOST_SC_CR2, sigcontext, cr2); DEFINE_LONGS(HOST_FP_SIZE, sizeof(struct user_fpregs_struct)); - DEFINE_LONGS(HOST_FPX_SIZE, sizeof(struct user_fpxregs_struct)); + DEFINE_LONGS(HOST_XFP_SIZE, sizeof(struct user_fpxregs_struct)); DEFINE(HOST_IP, EIP); DEFINE(HOST_SP, UESP); diff --git a/trunk/arch/um/sys-x86_64/user-offsets.c b/trunk/arch/um/sys-x86_64/user-offsets.c index 973585414a66..2f3443c6e859 100644 --- a/trunk/arch/um/sys-x86_64/user-offsets.c +++ b/trunk/arch/um/sys-x86_64/user-offsets.c @@ -24,6 +24,7 @@ void foo(void) OFFSET(HOST_SC_TRAPNO, sigcontext, trapno); DEFINE(HOST_FP_SIZE, sizeof(struct _fpstate) / sizeof(unsigned long)); + DEFINE(HOST_XFP_SIZE, 0); DEFINE_LONGS(HOST_RBX, RBX); DEFINE_LONGS(HOST_RCX, RCX); DEFINE_LONGS(HOST_RDI, RDI); diff --git a/trunk/arch/x86/pci/i386.c b/trunk/arch/x86/pci/i386.c index 10fb308fded8..8af0f0bae2af 100644 --- a/trunk/arch/x86/pci/i386.c +++ b/trunk/arch/x86/pci/i386.c @@ -301,13 +301,15 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, prot = pgprot_val(vma->vm_page_prot); if (pat_wc_enabled && write_combine) prot |= _PAGE_CACHE_WC; - else if (pat_wc_enabled || boot_cpu_data.x86 > 3) + else if (pat_wc_enabled) /* * ioremap() and ioremap_nocache() defaults to UC MINUS for now. * To avoid attribute conflicts, request UC MINUS here * aswell. */ prot |= _PAGE_CACHE_UC_MINUS; + else if (boot_cpu_data.x86 > 3) + prot |= _PAGE_CACHE_UC; vma->vm_page_prot = __pgprot(prot); diff --git a/trunk/block/blktrace.c b/trunk/block/blktrace.c index b2cbb4e5d767..568588cd16b2 100644 --- a/trunk/block/blktrace.c +++ b/trunk/block/blktrace.c @@ -476,7 +476,7 @@ int blk_trace_ioctl(struct block_device *bdev, unsigned cmd, char __user *arg) switch (cmd) { case BLKTRACESETUP: - bdevname(bdev, b); + strcpy(b, bdevname(bdev, b)); ret = blk_trace_setup(q, b, bdev->bd_dev, arg); break; case BLKTRACESTART: diff --git a/trunk/block/compat_ioctl.c b/trunk/block/compat_ioctl.c index c23177e4623f..c70d0b6f666f 100644 --- a/trunk/block/compat_ioctl.c +++ b/trunk/block/compat_ioctl.c @@ -555,7 +555,7 @@ static int compat_blk_trace_setup(struct block_device *bdev, char __user *arg) if (copy_from_user(&cbuts, arg, sizeof(cbuts))) return -EFAULT; - bdevname(bdev, b); + strcpy(b, bdevname(bdev, b)); buts = (struct blk_user_trace_setup) { .act_mask = cbuts.act_mask, diff --git a/trunk/drivers/char/synclink_gt.c b/trunk/drivers/char/synclink_gt.c index 55c1653be00c..2001b0e52dc6 100644 --- a/trunk/drivers/char/synclink_gt.c +++ b/trunk/drivers/char/synclink_gt.c @@ -916,7 +916,7 @@ static int put_char(struct tty_struct *tty, unsigned char ch) { struct slgt_info *info = tty->driver_data; unsigned long flags; - int ret = 0; + int ret; if (sanity_check(info, tty->name, "put_char")) return 0; diff --git a/trunk/drivers/i2c/busses/i2c-au1550.c b/trunk/drivers/i2c/busses/i2c-au1550.c index cae9dc89d88c..491718fe46b7 100644 --- a/trunk/drivers/i2c/busses/i2c-au1550.c +++ b/trunk/drivers/i2c/busses/i2c-au1550.c @@ -335,7 +335,7 @@ i2c_au1550_probe(struct platform_device *pdev) goto out_mem; } - priv->psc_base = CKSEG1ADDR(r->start); + priv->psc_base = r->start; priv->xfer_timeout = 200; priv->ack_timeout = 200; diff --git a/trunk/drivers/md/raid5.c b/trunk/drivers/md/raid5.c index ee0ea9183080..087eee0cb809 100644 --- a/trunk/drivers/md/raid5.c +++ b/trunk/drivers/md/raid5.c @@ -2369,8 +2369,8 @@ static void handle_parity_checks5(raid5_conf_t *conf, struct stripe_head *sh, /* complete a check operation */ if (test_and_clear_bit(STRIPE_OP_CHECK, &sh->ops.complete)) { - clear_bit(STRIPE_OP_CHECK, &sh->ops.ack); - clear_bit(STRIPE_OP_CHECK, &sh->ops.pending); + clear_bit(STRIPE_OP_CHECK, &sh->ops.ack); + clear_bit(STRIPE_OP_CHECK, &sh->ops.pending); if (s->failed == 0) { if (sh->ops.zero_sum_result == 0) /* parity is correct (on disc, @@ -2400,6 +2400,16 @@ static void handle_parity_checks5(raid5_conf_t *conf, struct stripe_head *sh, canceled_check = 1; /* STRIPE_INSYNC is not set */ } + /* check if we can clear a parity disk reconstruct */ + if (test_bit(STRIPE_OP_COMPUTE_BLK, &sh->ops.complete) && + test_bit(STRIPE_OP_MOD_REPAIR_PD, &sh->ops.pending)) { + + clear_bit(STRIPE_OP_MOD_REPAIR_PD, &sh->ops.pending); + clear_bit(STRIPE_OP_COMPUTE_BLK, &sh->ops.complete); + clear_bit(STRIPE_OP_COMPUTE_BLK, &sh->ops.ack); + clear_bit(STRIPE_OP_COMPUTE_BLK, &sh->ops.pending); + } + /* start a new check operation if there are no failures, the stripe is * not insync, and a repair is not in flight */ @@ -2414,17 +2424,6 @@ static void handle_parity_checks5(raid5_conf_t *conf, struct stripe_head *sh, } } - /* check if we can clear a parity disk reconstruct */ - if (test_bit(STRIPE_OP_COMPUTE_BLK, &sh->ops.complete) && - test_bit(STRIPE_OP_MOD_REPAIR_PD, &sh->ops.pending)) { - - clear_bit(STRIPE_OP_MOD_REPAIR_PD, &sh->ops.pending); - clear_bit(STRIPE_OP_COMPUTE_BLK, &sh->ops.complete); - clear_bit(STRIPE_OP_COMPUTE_BLK, &sh->ops.ack); - clear_bit(STRIPE_OP_COMPUTE_BLK, &sh->ops.pending); - } - - /* Wait for check parity and compute block operations to complete * before write-back. If a failure occurred while the check operation * was in flight we need to cycle this stripe through handle_stripe diff --git a/trunk/drivers/misc/sgi-xp/xp.h b/trunk/drivers/misc/sgi-xp/xp.h index 03a87a307e32..5515234be86a 100644 --- a/trunk/drivers/misc/sgi-xp/xp.h +++ b/trunk/drivers/misc/sgi-xp/xp.h @@ -157,136 +157,215 @@ struct xpc_msg { /* * Define the return values and values passed to user's callout functions. * (It is important to add new value codes at the end just preceding - * xpUnknownReason, which must have the highest numerical value.) + * xpcUnknownReason, which must have the highest numerical value.) */ -enum xp_retval { - xpSuccess = 0, +enum xpc_retval { + xpcSuccess = 0, - xpNotConnected, /* 1: channel is not connected */ - xpConnected, /* 2: channel connected (opened) */ - xpRETIRED1, /* 3: (formerly xpDisconnected) */ + xpcNotConnected, /* 1: channel is not connected */ + xpcConnected, /* 2: channel connected (opened) */ + xpcRETIRED1, /* 3: (formerly xpcDisconnected) */ - xpMsgReceived, /* 4: message received */ - xpMsgDelivered, /* 5: message delivered and acknowledged */ + xpcMsgReceived, /* 4: message received */ + xpcMsgDelivered, /* 5: message delivered and acknowledged */ - xpRETIRED2, /* 6: (formerly xpTransferFailed) */ + xpcRETIRED2, /* 6: (formerly xpcTransferFailed) */ - xpNoWait, /* 7: operation would require wait */ - xpRetry, /* 8: retry operation */ - xpTimeout, /* 9: timeout in xpc_allocate_msg_wait() */ - xpInterrupted, /* 10: interrupted wait */ + xpcNoWait, /* 7: operation would require wait */ + xpcRetry, /* 8: retry operation */ + xpcTimeout, /* 9: timeout in xpc_allocate_msg_wait() */ + xpcInterrupted, /* 10: interrupted wait */ - xpUnequalMsgSizes, /* 11: message size disparity between sides */ - xpInvalidAddress, /* 12: invalid address */ + xpcUnequalMsgSizes, /* 11: message size disparity between sides */ + xpcInvalidAddress, /* 12: invalid address */ - xpNoMemory, /* 13: no memory available for XPC structures */ - xpLackOfResources, /* 14: insufficient resources for operation */ - xpUnregistered, /* 15: channel is not registered */ - xpAlreadyRegistered, /* 16: channel is already registered */ + xpcNoMemory, /* 13: no memory available for XPC structures */ + xpcLackOfResources, /* 14: insufficient resources for operation */ + xpcUnregistered, /* 15: channel is not registered */ + xpcAlreadyRegistered, /* 16: channel is already registered */ - xpPartitionDown, /* 17: remote partition is down */ - xpNotLoaded, /* 18: XPC module is not loaded */ - xpUnloading, /* 19: this side is unloading XPC module */ + xpcPartitionDown, /* 17: remote partition is down */ + xpcNotLoaded, /* 18: XPC module is not loaded */ + xpcUnloading, /* 19: this side is unloading XPC module */ - xpBadMagic, /* 20: XPC MAGIC string not found */ + xpcBadMagic, /* 20: XPC MAGIC string not found */ - xpReactivating, /* 21: remote partition was reactivated */ + xpcReactivating, /* 21: remote partition was reactivated */ - xpUnregistering, /* 22: this side is unregistering channel */ - xpOtherUnregistering, /* 23: other side is unregistering channel */ + xpcUnregistering, /* 22: this side is unregistering channel */ + xpcOtherUnregistering, /* 23: other side is unregistering channel */ - xpCloneKThread, /* 24: cloning kernel thread */ - xpCloneKThreadFailed, /* 25: cloning kernel thread failed */ + xpcCloneKThread, /* 24: cloning kernel thread */ + xpcCloneKThreadFailed, /* 25: cloning kernel thread failed */ - xpNoHeartbeat, /* 26: remote partition has no heartbeat */ + xpcNoHeartbeat, /* 26: remote partition has no heartbeat */ - xpPioReadError, /* 27: PIO read error */ - xpPhysAddrRegFailed, /* 28: registration of phys addr range failed */ + xpcPioReadError, /* 27: PIO read error */ + xpcPhysAddrRegFailed, /* 28: registration of phys addr range failed */ - xpRETIRED3, /* 29: (formerly xpBteDirectoryError) */ - xpRETIRED4, /* 30: (formerly xpBtePoisonError) */ - xpRETIRED5, /* 31: (formerly xpBteWriteError) */ - xpRETIRED6, /* 32: (formerly xpBteAccessError) */ - xpRETIRED7, /* 33: (formerly xpBtePWriteError) */ - xpRETIRED8, /* 34: (formerly xpBtePReadError) */ - xpRETIRED9, /* 35: (formerly xpBteTimeOutError) */ - xpRETIRED10, /* 36: (formerly xpBteXtalkError) */ - xpRETIRED11, /* 37: (formerly xpBteNotAvailable) */ - xpRETIRED12, /* 38: (formerly xpBteUnmappedError) */ + xpcBteDirectoryError, /* 29: maps to BTEFAIL_DIR */ + xpcBtePoisonError, /* 30: maps to BTEFAIL_POISON */ + xpcBteWriteError, /* 31: maps to BTEFAIL_WERR */ + xpcBteAccessError, /* 32: maps to BTEFAIL_ACCESS */ + xpcBtePWriteError, /* 33: maps to BTEFAIL_PWERR */ + xpcBtePReadError, /* 34: maps to BTEFAIL_PRERR */ + xpcBteTimeOutError, /* 35: maps to BTEFAIL_TOUT */ + xpcBteXtalkError, /* 36: maps to BTEFAIL_XTERR */ + xpcBteNotAvailable, /* 37: maps to BTEFAIL_NOTAVAIL */ + xpcBteUnmappedError, /* 38: unmapped BTEFAIL_ error */ - xpBadVersion, /* 39: bad version number */ - xpVarsNotSet, /* 40: the XPC variables are not set up */ - xpNoRsvdPageAddr, /* 41: unable to get rsvd page's phys addr */ - xpInvalidPartid, /* 42: invalid partition ID */ - xpLocalPartid, /* 43: local partition ID */ + xpcBadVersion, /* 39: bad version number */ + xpcVarsNotSet, /* 40: the XPC variables are not set up */ + xpcNoRsvdPageAddr, /* 41: unable to get rsvd page's phys addr */ + xpcInvalidPartid, /* 42: invalid partition ID */ + xpcLocalPartid, /* 43: local partition ID */ - xpOtherGoingDown, /* 44: other side going down, reason unknown */ - xpSystemGoingDown, /* 45: system is going down, reason unknown */ - xpSystemHalt, /* 46: system is being halted */ - xpSystemReboot, /* 47: system is being rebooted */ - xpSystemPoweroff, /* 48: system is being powered off */ + xpcOtherGoingDown, /* 44: other side going down, reason unknown */ + xpcSystemGoingDown, /* 45: system is going down, reason unknown */ + xpcSystemHalt, /* 46: system is being halted */ + xpcSystemReboot, /* 47: system is being rebooted */ + xpcSystemPoweroff, /* 48: system is being powered off */ - xpDisconnecting, /* 49: channel disconnecting (closing) */ + xpcDisconnecting, /* 49: channel disconnecting (closing) */ - xpOpenCloseError, /* 50: channel open/close protocol error */ + xpcOpenCloseError, /* 50: channel open/close protocol error */ - xpDisconnected, /* 51: channel disconnected (closed) */ + xpcDisconnected, /* 51: channel disconnected (closed) */ - xpBteCopyError, /* 52: bte_copy() returned error */ + xpcBteSh2Start, /* 52: BTE CRB timeout */ - xpUnknownReason /* 53: unknown reason - must be last in enum */ + /* 53: 0x1 BTE Error Response Short */ + xpcBteSh2RspShort = xpcBteSh2Start + BTEFAIL_SH2_RESP_SHORT, + + /* 54: 0x2 BTE Error Response Long */ + xpcBteSh2RspLong = xpcBteSh2Start + BTEFAIL_SH2_RESP_LONG, + + /* 56: 0x4 BTE Error Response DSB */ + xpcBteSh2RspDSB = xpcBteSh2Start + BTEFAIL_SH2_RESP_DSP, + + /* 60: 0x8 BTE Error Response Access */ + xpcBteSh2RspAccess = xpcBteSh2Start + BTEFAIL_SH2_RESP_ACCESS, + + /* 68: 0x10 BTE Error CRB timeout */ + xpcBteSh2CRBTO = xpcBteSh2Start + BTEFAIL_SH2_CRB_TO, + + /* 84: 0x20 BTE Error NACK limit */ + xpcBteSh2NACKLimit = xpcBteSh2Start + BTEFAIL_SH2_NACK_LIMIT, + + /* 115: BTE end */ + xpcBteSh2End = xpcBteSh2Start + BTEFAIL_SH2_ALL, + + xpcUnknownReason /* 116: unknown reason - must be last in enum */ }; /* - * Define the callout function type used by XPC to update the user on - * connection activity and state changes via the user function registered - * by xpc_connect(). + * Define the callout function types used by XPC to update the user on + * connection activity and state changes (via the user function registered by + * xpc_connect()) and to notify them of messages received and delivered (via + * the user function registered by xpc_send_notify()). + * + * The two function types are xpc_channel_func and xpc_notify_func and + * both share the following arguments, with the exception of "data", which + * only xpc_channel_func has. * * Arguments: * - * reason - reason code. + * reason - reason code. (See following table.) * partid - partition ID associated with condition. * ch_number - channel # associated with condition. - * data - pointer to optional data. + * data - pointer to optional data. (See following table.) * key - pointer to optional user-defined value provided as the "key" - * argument to xpc_connect(). + * argument to xpc_connect() or xpc_send_notify(). * - * A reason code of xpConnected indicates that a connection has been - * established to the specified partition on the specified channel. The data - * argument indicates the max number of entries allowed in the message queue. + * In the following table the "Optional Data" column applies to callouts made + * to functions registered by xpc_connect(). A "NA" in that column indicates + * that this reason code can be passed to functions registered by + * xpc_send_notify() (i.e. they don't have data arguments). * - * A reason code of xpMsgReceived indicates that a XPC message arrived from - * the specified partition on the specified channel. The data argument - * specifies the address of the message's payload. The user must call - * xpc_received() when finished with the payload. + * Also, the first three reason codes in the following table indicate + * success, whereas the others indicate failure. When a failure reason code + * is received, one can assume that the channel is not connected. * - * All other reason codes indicate failure. The data argmument is NULL. - * When a failure reason code is received, one can assume that the channel - * is not connected. + * + * Reason Code | Cause | Optional Data + * =====================+================================+===================== + * xpcConnected | connection has been established| max #of entries + * | to the specified partition on | allowed in message + * | the specified channel | queue + * ---------------------+--------------------------------+--------------------- + * xpcMsgReceived | an XPC message arrived from | address of payload + * | the specified partition on the | + * | specified channel | [the user must call + * | | xpc_received() when + * | | finished with the + * | | payload] + * ---------------------+--------------------------------+--------------------- + * xpcMsgDelivered | notification that the message | NA + * | was delivered to the intended | + * | recipient and that they have | + * | acknowledged its receipt by | + * | calling xpc_received() | + * =====================+================================+===================== + * xpcUnequalMsgSizes | can't connect to the specified | NULL + * | partition on the specified | + * | channel because of mismatched | + * | message sizes | + * ---------------------+--------------------------------+--------------------- + * xpcNoMemory | insufficient memory avaiable | NULL + * | to allocate message queue | + * ---------------------+--------------------------------+--------------------- + * xpcLackOfResources | lack of resources to create | NULL + * | the necessary kthreads to | + * | support the channel | + * ---------------------+--------------------------------+--------------------- + * xpcUnregistering | this side's user has | NULL or NA + * | unregistered by calling | + * | xpc_disconnect() | + * ---------------------+--------------------------------+--------------------- + * xpcOtherUnregistering| the other side's user has | NULL or NA + * | unregistered by calling | + * | xpc_disconnect() | + * ---------------------+--------------------------------+--------------------- + * xpcNoHeartbeat | the other side's XPC is no | NULL or NA + * | longer heartbeating | + * | | + * ---------------------+--------------------------------+--------------------- + * xpcUnloading | this side's XPC module is | NULL or NA + * | being unloaded | + * | | + * ---------------------+--------------------------------+--------------------- + * xpcOtherUnloading | the other side's XPC module is | NULL or NA + * | is being unloaded | + * | | + * ---------------------+--------------------------------+--------------------- + * xpcPioReadError | xp_nofault_PIOR() returned an | NULL or NA + * | error while sending an IPI | + * | | + * ---------------------+--------------------------------+--------------------- + * xpcInvalidAddress | the address either received or | NULL or NA + * | sent by the specified partition| + * | is invalid | + * ---------------------+--------------------------------+--------------------- + * xpcBteNotAvailable | attempt to pull data from the | NULL or NA + * xpcBtePoisonError | specified partition over the | + * xpcBteWriteError | specified channel via a | + * xpcBteAccessError | bte_copy() failed | + * xpcBteTimeOutError | | + * xpcBteXtalkError | | + * xpcBteDirectoryError | | + * xpcBteGenericError | | + * xpcBteUnmappedError | | + * ---------------------+--------------------------------+--------------------- + * xpcUnknownReason | the specified channel to the | NULL or NA + * | specified partition was | + * | unavailable for unknown reasons| + * =====================+================================+===================== */ -typedef void (*xpc_channel_func) (enum xp_retval reason, short partid, + +typedef void (*xpc_channel_func) (enum xpc_retval reason, partid_t partid, int ch_number, void *data, void *key); -/* - * Define the callout function type used by XPC to notify the user of - * messages received and delivered via the user function registered by - * xpc_send_notify(). - * - * Arguments: - * - * reason - reason code. - * partid - partition ID associated with condition. - * ch_number - channel # associated with condition. - * key - pointer to optional user-defined value provided as the "key" - * argument to xpc_send_notify(). - * - * A reason code of xpMsgDelivered indicates that the message was delivered - * to the intended recipient and that they have acknowledged its receipt by - * calling xpc_received(). - * - * All other reason codes indicate failure. - */ -typedef void (*xpc_notify_func) (enum xp_retval reason, short partid, +typedef void (*xpc_notify_func) (enum xpc_retval reason, partid_t partid, int ch_number, void *key); /* @@ -322,57 +401,57 @@ struct xpc_registration { struct xpc_interface { void (*connect) (int); void (*disconnect) (int); - enum xp_retval (*allocate) (short, int, u32, void **); - enum xp_retval (*send) (short, int, void *); - enum xp_retval (*send_notify) (short, int, void *, + enum xpc_retval (*allocate) (partid_t, int, u32, void **); + enum xpc_retval (*send) (partid_t, int, void *); + enum xpc_retval (*send_notify) (partid_t, int, void *, xpc_notify_func, void *); - void (*received) (short, int, void *); - enum xp_retval (*partid_to_nasids) (short, void *); + void (*received) (partid_t, int, void *); + enum xpc_retval (*partid_to_nasids) (partid_t, void *); }; extern struct xpc_interface xpc_interface; extern void xpc_set_interface(void (*)(int), void (*)(int), - enum xp_retval (*)(short, int, u32, void **), - enum xp_retval (*)(short, int, void *), - enum xp_retval (*)(short, int, void *, + enum xpc_retval (*)(partid_t, int, u32, void **), + enum xpc_retval (*)(partid_t, int, void *), + enum xpc_retval (*)(partid_t, int, void *, xpc_notify_func, void *), - void (*)(short, int, void *), - enum xp_retval (*)(short, void *)); + void (*)(partid_t, int, void *), + enum xpc_retval (*)(partid_t, void *)); extern void xpc_clear_interface(void); -extern enum xp_retval xpc_connect(int, xpc_channel_func, void *, u16, +extern enum xpc_retval xpc_connect(int, xpc_channel_func, void *, u16, u16, u32, u32); extern void xpc_disconnect(int); -static inline enum xp_retval -xpc_allocate(short partid, int ch_number, u32 flags, void **payload) +static inline enum xpc_retval +xpc_allocate(partid_t partid, int ch_number, u32 flags, void **payload) { return xpc_interface.allocate(partid, ch_number, flags, payload); } -static inline enum xp_retval -xpc_send(short partid, int ch_number, void *payload) +static inline enum xpc_retval +xpc_send(partid_t partid, int ch_number, void *payload) { return xpc_interface.send(partid, ch_number, payload); } -static inline enum xp_retval -xpc_send_notify(short partid, int ch_number, void *payload, +static inline enum xpc_retval +xpc_send_notify(partid_t partid, int ch_number, void *payload, xpc_notify_func func, void *key) { return xpc_interface.send_notify(partid, ch_number, payload, func, key); } static inline void -xpc_received(short partid, int ch_number, void *payload) +xpc_received(partid_t partid, int ch_number, void *payload) { return xpc_interface.received(partid, ch_number, payload); } -static inline enum xp_retval -xpc_partid_to_nasids(short partid, void *nasids) +static inline enum xpc_retval +xpc_partid_to_nasids(partid_t partid, void *nasids) { return xpc_interface.partid_to_nasids(partid, nasids); } diff --git a/trunk/drivers/misc/sgi-xp/xp_main.c b/trunk/drivers/misc/sgi-xp/xp_main.c index 196480b691a1..1fbf99bae963 100644 --- a/trunk/drivers/misc/sgi-xp/xp_main.c +++ b/trunk/drivers/misc/sgi-xp/xp_main.c @@ -42,21 +42,21 @@ EXPORT_SYMBOL_GPL(xpc_registrations); /* * Initialize the XPC interface to indicate that XPC isn't loaded. */ -static enum xp_retval +static enum xpc_retval xpc_notloaded(void) { - return xpNotLoaded; + return xpcNotLoaded; } struct xpc_interface xpc_interface = { (void (*)(int))xpc_notloaded, (void (*)(int))xpc_notloaded, - (enum xp_retval(*)(short, int, u32, void **))xpc_notloaded, - (enum xp_retval(*)(short, int, void *))xpc_notloaded, - (enum xp_retval(*)(short, int, void *, xpc_notify_func, void *)) + (enum xpc_retval(*)(partid_t, int, u32, void **))xpc_notloaded, + (enum xpc_retval(*)(partid_t, int, void *))xpc_notloaded, + (enum xpc_retval(*)(partid_t, int, void *, xpc_notify_func, void *)) xpc_notloaded, - (void (*)(short, int, void *))xpc_notloaded, - (enum xp_retval(*)(short, void *))xpc_notloaded + (void (*)(partid_t, int, void *))xpc_notloaded, + (enum xpc_retval(*)(partid_t, void *))xpc_notloaded }; EXPORT_SYMBOL_GPL(xpc_interface); @@ -66,12 +66,12 @@ EXPORT_SYMBOL_GPL(xpc_interface); void xpc_set_interface(void (*connect) (int), void (*disconnect) (int), - enum xp_retval (*allocate) (short, int, u32, void **), - enum xp_retval (*send) (short, int, void *), - enum xp_retval (*send_notify) (short, int, void *, + enum xpc_retval (*allocate) (partid_t, int, u32, void **), + enum xpc_retval (*send) (partid_t, int, void *), + enum xpc_retval (*send_notify) (partid_t, int, void *, xpc_notify_func, void *), - void (*received) (short, int, void *), - enum xp_retval (*partid_to_nasids) (short, void *)) + void (*received) (partid_t, int, void *), + enum xpc_retval (*partid_to_nasids) (partid_t, void *)) { xpc_interface.connect = connect; xpc_interface.disconnect = disconnect; @@ -91,16 +91,16 @@ xpc_clear_interface(void) { xpc_interface.connect = (void (*)(int))xpc_notloaded; xpc_interface.disconnect = (void (*)(int))xpc_notloaded; - xpc_interface.allocate = (enum xp_retval(*)(short, int, u32, + xpc_interface.allocate = (enum xpc_retval(*)(partid_t, int, u32, void **))xpc_notloaded; - xpc_interface.send = (enum xp_retval(*)(short, int, void *)) + xpc_interface.send = (enum xpc_retval(*)(partid_t, int, void *)) xpc_notloaded; - xpc_interface.send_notify = (enum xp_retval(*)(short, int, void *, + xpc_interface.send_notify = (enum xpc_retval(*)(partid_t, int, void *, xpc_notify_func, void *))xpc_notloaded; - xpc_interface.received = (void (*)(short, int, void *)) + xpc_interface.received = (void (*)(partid_t, int, void *)) xpc_notloaded; - xpc_interface.partid_to_nasids = (enum xp_retval(*)(short, void *)) + xpc_interface.partid_to_nasids = (enum xpc_retval(*)(partid_t, void *)) xpc_notloaded; } EXPORT_SYMBOL_GPL(xpc_clear_interface); @@ -123,13 +123,13 @@ EXPORT_SYMBOL_GPL(xpc_clear_interface); * nentries - max #of XPC message entries a message queue can contain. * The actual number, which is determined when a connection * is established and may be less then requested, will be - * passed to the user via the xpConnected callout. + * passed to the user via the xpcConnected callout. * assigned_limit - max number of kthreads allowed to be processing * messages (per connection) at any given instant. * idle_limit - max number of kthreads allowed to be idle at any given * instant. */ -enum xp_retval +enum xpc_retval xpc_connect(int ch_number, xpc_channel_func func, void *key, u16 payload_size, u16 nentries, u32 assigned_limit, u32 idle_limit) { @@ -143,12 +143,12 @@ xpc_connect(int ch_number, xpc_channel_func func, void *key, u16 payload_size, registration = &xpc_registrations[ch_number]; if (mutex_lock_interruptible(®istration->mutex) != 0) - return xpInterrupted; + return xpcInterrupted; /* if XPC_CHANNEL_REGISTERED(ch_number) */ if (registration->func != NULL) { mutex_unlock(®istration->mutex); - return xpAlreadyRegistered; + return xpcAlreadyRegistered; } /* register the channel for connection */ @@ -163,7 +163,7 @@ xpc_connect(int ch_number, xpc_channel_func func, void *key, u16 payload_size, xpc_interface.connect(ch_number); - return xpSuccess; + return xpcSuccess; } EXPORT_SYMBOL_GPL(xpc_connect); diff --git a/trunk/drivers/misc/sgi-xp/xpc.h b/trunk/drivers/misc/sgi-xp/xpc.h index 11ac267ed68f..9eb6d4a3269c 100644 --- a/trunk/drivers/misc/sgi-xp/xpc.h +++ b/trunk/drivers/misc/sgi-xp/xpc.h @@ -172,13 +172,13 @@ struct xpc_vars { (_version >= _XPC_VERSION(3, 1)) static inline int -xpc_hb_allowed(short partid, struct xpc_vars *vars) +xpc_hb_allowed(partid_t partid, struct xpc_vars *vars) { return ((vars->heartbeating_to_mask & (1UL << partid)) != 0); } static inline void -xpc_allow_hb(short partid, struct xpc_vars *vars) +xpc_allow_hb(partid_t partid, struct xpc_vars *vars) { u64 old_mask, new_mask; @@ -190,7 +190,7 @@ xpc_allow_hb(short partid, struct xpc_vars *vars) } static inline void -xpc_disallow_hb(short partid, struct xpc_vars *vars) +xpc_disallow_hb(partid_t partid, struct xpc_vars *vars) { u64 old_mask, new_mask; @@ -408,11 +408,11 @@ struct xpc_notify { * messages. */ struct xpc_channel { - short partid; /* ID of remote partition connected */ + partid_t partid; /* ID of remote partition connected */ spinlock_t lock; /* lock for updating this structure */ u32 flags; /* general flags */ - enum xp_retval reason; /* reason why channel is disconnect'g */ + enum xpc_retval reason; /* reason why channel is disconnect'g */ int reason_line; /* line# disconnect initiated from */ u16 number; /* channel # */ @@ -522,7 +522,7 @@ struct xpc_partition { spinlock_t act_lock; /* protect updating of act_state */ u8 act_state; /* from XPC HB viewpoint */ u8 remote_vars_version; /* version# of partition's vars */ - enum xp_retval reason; /* reason partition is deactivating */ + enum xpc_retval reason; /* reason partition is deactivating */ int reason_line; /* line# deactivation initiated from */ int reactivate_nasid; /* nasid in partition to reactivate */ @@ -615,7 +615,7 @@ struct xpc_partition { /* interval in seconds to print 'waiting disengagement' messages */ #define XPC_DISENGAGE_PRINTMSG_INTERVAL 10 -#define XPC_PARTID(_p) ((short)((_p) - &xpc_partitions[0])) +#define XPC_PARTID(_p) ((partid_t) ((_p) - &xpc_partitions[0])) /* found in xp_main.c */ extern struct xpc_registration xpc_registrations[]; @@ -646,31 +646,31 @@ extern void xpc_allow_IPI_ops(void); extern void xpc_restrict_IPI_ops(void); extern int xpc_identify_act_IRQ_sender(void); extern int xpc_partition_disengaged(struct xpc_partition *); -extern enum xp_retval xpc_mark_partition_active(struct xpc_partition *); +extern enum xpc_retval xpc_mark_partition_active(struct xpc_partition *); extern void xpc_mark_partition_inactive(struct xpc_partition *); extern void xpc_discovery(void); extern void xpc_check_remote_hb(void); extern void xpc_deactivate_partition(const int, struct xpc_partition *, - enum xp_retval); -extern enum xp_retval xpc_initiate_partid_to_nasids(short, void *); + enum xpc_retval); +extern enum xpc_retval xpc_initiate_partid_to_nasids(partid_t, void *); /* found in xpc_channel.c */ extern void xpc_initiate_connect(int); extern void xpc_initiate_disconnect(int); -extern enum xp_retval xpc_initiate_allocate(short, int, u32, void **); -extern enum xp_retval xpc_initiate_send(short, int, void *); -extern enum xp_retval xpc_initiate_send_notify(short, int, void *, - xpc_notify_func, void *); -extern void xpc_initiate_received(short, int, void *); -extern enum xp_retval xpc_setup_infrastructure(struct xpc_partition *); -extern enum xp_retval xpc_pull_remote_vars_part(struct xpc_partition *); +extern enum xpc_retval xpc_initiate_allocate(partid_t, int, u32, void **); +extern enum xpc_retval xpc_initiate_send(partid_t, int, void *); +extern enum xpc_retval xpc_initiate_send_notify(partid_t, int, void *, + xpc_notify_func, void *); +extern void xpc_initiate_received(partid_t, int, void *); +extern enum xpc_retval xpc_setup_infrastructure(struct xpc_partition *); +extern enum xpc_retval xpc_pull_remote_vars_part(struct xpc_partition *); extern void xpc_process_channel_activity(struct xpc_partition *); extern void xpc_connected_callout(struct xpc_channel *); extern void xpc_deliver_msg(struct xpc_channel *); extern void xpc_disconnect_channel(const int, struct xpc_channel *, - enum xp_retval, unsigned long *); -extern void xpc_disconnect_callout(struct xpc_channel *, enum xp_retval); -extern void xpc_partition_going_down(struct xpc_partition *, enum xp_retval); + enum xpc_retval, unsigned long *); +extern void xpc_disconnect_callout(struct xpc_channel *, enum xpc_retval); +extern void xpc_partition_going_down(struct xpc_partition *, enum xpc_retval); extern void xpc_teardown_infrastructure(struct xpc_partition *); static inline void @@ -901,7 +901,7 @@ xpc_IPI_receive(AMO_t *amo) return FETCHOP_LOAD_OP(TO_AMO((u64)&amo->variable), FETCHOP_CLEAR); } -static inline enum xp_retval +static inline enum xpc_retval xpc_IPI_send(AMO_t *amo, u64 flag, int nasid, int phys_cpuid, int vector) { int ret = 0; @@ -923,7 +923,7 @@ xpc_IPI_send(AMO_t *amo, u64 flag, int nasid, int phys_cpuid, int vector) local_irq_restore(irq_flags); - return ((ret == 0) ? xpSuccess : xpPioReadError); + return ((ret == 0) ? xpcSuccess : xpcPioReadError); } /* @@ -992,7 +992,7 @@ xpc_notify_IRQ_send(struct xpc_channel *ch, u8 ipi_flag, char *ipi_flag_string, unsigned long *irq_flags) { struct xpc_partition *part = &xpc_partitions[ch->partid]; - enum xp_retval ret; + enum xpc_retval ret; if (likely(part->act_state != XPC_P_DEACTIVATING)) { ret = xpc_IPI_send(part->remote_IPI_amo_va, @@ -1001,7 +1001,7 @@ xpc_notify_IRQ_send(struct xpc_channel *ch, u8 ipi_flag, char *ipi_flag_string, part->remote_IPI_phys_cpuid, SGI_XPC_NOTIFY); dev_dbg(xpc_chan, "%s sent to partid=%d, channel=%d, ret=%d\n", ipi_flag_string, ch->partid, ch->number, ret); - if (unlikely(ret != xpSuccess)) { + if (unlikely(ret != xpcSuccess)) { if (irq_flags != NULL) spin_unlock_irqrestore(&ch->lock, *irq_flags); XPC_DEACTIVATE_PARTITION(part, ret); @@ -1123,10 +1123,41 @@ xpc_IPI_init(int index) return amo; } -static inline enum xp_retval +static inline enum xpc_retval xpc_map_bte_errors(bte_result_t error) { - return ((error == BTE_SUCCESS) ? xpSuccess : xpBteCopyError); + if (error == BTE_SUCCESS) + return xpcSuccess; + + if (is_shub2()) { + if (BTE_VALID_SH2_ERROR(error)) + return xpcBteSh2Start + error; + return xpcBteUnmappedError; + } + switch (error) { + case BTE_SUCCESS: + return xpcSuccess; + case BTEFAIL_DIR: + return xpcBteDirectoryError; + case BTEFAIL_POISON: + return xpcBtePoisonError; + case BTEFAIL_WERR: + return xpcBteWriteError; + case BTEFAIL_ACCESS: + return xpcBteAccessError; + case BTEFAIL_PWERR: + return xpcBtePWriteError; + case BTEFAIL_PRERR: + return xpcBtePReadError; + case BTEFAIL_TOUT: + return xpcBteTimeOutError; + case BTEFAIL_XTERR: + return xpcBteXtalkError; + case BTEFAIL_NOTAVAIL: + return xpcBteNotAvailable; + default: + return xpcBteUnmappedError; + } } /* diff --git a/trunk/drivers/misc/sgi-xp/xpc_channel.c b/trunk/drivers/misc/sgi-xp/xpc_channel.c index 9c90c2d55c08..bfcb9ea968e9 100644 --- a/trunk/drivers/misc/sgi-xp/xpc_channel.c +++ b/trunk/drivers/misc/sgi-xp/xpc_channel.c @@ -53,7 +53,7 @@ xpc_kzalloc_cacheline_aligned(size_t size, gfp_t flags, void **base) * Set up the initial values for the XPartition Communication channels. */ static void -xpc_initialize_channels(struct xpc_partition *part, short partid) +xpc_initialize_channels(struct xpc_partition *part, partid_t partid) { int ch_number; struct xpc_channel *ch; @@ -90,12 +90,12 @@ xpc_initialize_channels(struct xpc_partition *part, short partid) * Setup the infrastructure necessary to support XPartition Communication * between the specified remote partition and the local one. */ -enum xp_retval +enum xpc_retval xpc_setup_infrastructure(struct xpc_partition *part) { int ret, cpuid; struct timer_list *timer; - short partid = XPC_PARTID(part); + partid_t partid = XPC_PARTID(part); /* * Zero out MOST of the entry for this partition. Only the fields @@ -114,7 +114,7 @@ xpc_setup_infrastructure(struct xpc_partition *part) GFP_KERNEL); if (part->channels == NULL) { dev_err(xpc_chan, "can't get memory for channels\n"); - return xpNoMemory; + return xpcNoMemory; } part->nchannels = XPC_NCHANNELS; @@ -129,7 +129,7 @@ xpc_setup_infrastructure(struct xpc_partition *part) part->channels = NULL; dev_err(xpc_chan, "can't get memory for local get/put " "values\n"); - return xpNoMemory; + return xpcNoMemory; } part->remote_GPs = xpc_kzalloc_cacheline_aligned(XPC_GP_SIZE, @@ -143,7 +143,7 @@ xpc_setup_infrastructure(struct xpc_partition *part) part->local_GPs = NULL; kfree(part->channels); part->channels = NULL; - return xpNoMemory; + return xpcNoMemory; } /* allocate all the required open and close args */ @@ -159,7 +159,7 @@ xpc_setup_infrastructure(struct xpc_partition *part) part->local_GPs = NULL; kfree(part->channels); part->channels = NULL; - return xpNoMemory; + return xpcNoMemory; } part->remote_openclose_args = @@ -175,7 +175,7 @@ xpc_setup_infrastructure(struct xpc_partition *part) part->local_GPs = NULL; kfree(part->channels); part->channels = NULL; - return xpNoMemory; + return xpcNoMemory; } xpc_initialize_channels(part, partid); @@ -209,7 +209,7 @@ xpc_setup_infrastructure(struct xpc_partition *part) part->local_GPs = NULL; kfree(part->channels); part->channels = NULL; - return xpLackOfResources; + return xpcLackOfResources; } /* Setup a timer to check for dropped IPIs */ @@ -243,7 +243,7 @@ xpc_setup_infrastructure(struct xpc_partition *part) xpc_vars_part[partid].nchannels = part->nchannels; xpc_vars_part[partid].magic = XPC_VP_MAGIC1; - return xpSuccess; + return xpcSuccess; } /* @@ -254,7 +254,7 @@ xpc_setup_infrastructure(struct xpc_partition *part) * dst must be a cacheline aligned virtual address on this partition. * cnt must be an cacheline sized */ -static enum xp_retval +static enum xpc_retval xpc_pull_remote_cachelines(struct xpc_partition *part, void *dst, const void *src, size_t cnt) { @@ -270,7 +270,7 @@ xpc_pull_remote_cachelines(struct xpc_partition *part, void *dst, bte_ret = xp_bte_copy((u64)src, (u64)dst, (u64)cnt, (BTE_NORMAL | BTE_WACQUIRE), NULL); if (bte_ret == BTE_SUCCESS) - return xpSuccess; + return xpcSuccess; dev_dbg(xpc_chan, "xp_bte_copy() from partition %d failed, ret=%d\n", XPC_PARTID(part), bte_ret); @@ -282,7 +282,7 @@ xpc_pull_remote_cachelines(struct xpc_partition *part, void *dst, * Pull the remote per partition specific variables from the specified * partition. */ -enum xp_retval +enum xpc_retval xpc_pull_remote_vars_part(struct xpc_partition *part) { u8 buffer[L1_CACHE_BYTES * 2]; @@ -290,8 +290,8 @@ xpc_pull_remote_vars_part(struct xpc_partition *part) (struct xpc_vars_part *)L1_CACHE_ALIGN((u64)buffer); struct xpc_vars_part *pulled_entry; u64 remote_entry_cacheline_pa, remote_entry_pa; - short partid = XPC_PARTID(part); - enum xp_retval ret; + partid_t partid = XPC_PARTID(part); + enum xpc_retval ret; /* pull the cacheline that contains the variables we're interested in */ @@ -311,7 +311,7 @@ xpc_pull_remote_vars_part(struct xpc_partition *part) ret = xpc_pull_remote_cachelines(part, pulled_entry_cacheline, (void *)remote_entry_cacheline_pa, L1_CACHE_BYTES); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { dev_dbg(xpc_chan, "failed to pull XPC vars_part from " "partition %d, ret=%d\n", partid, ret); return ret; @@ -326,11 +326,11 @@ xpc_pull_remote_vars_part(struct xpc_partition *part) dev_dbg(xpc_chan, "partition %d's XPC vars_part for " "partition %d has bad magic value (=0x%lx)\n", partid, sn_partition_id, pulled_entry->magic); - return xpBadMagic; + return xpcBadMagic; } /* they've not been initialized yet */ - return xpRetry; + return xpcRetry; } if (xpc_vars_part[partid].magic == XPC_VP_MAGIC1) { @@ -344,7 +344,7 @@ xpc_pull_remote_vars_part(struct xpc_partition *part) dev_err(xpc_chan, "partition %d's XPC vars_part for " "partition %d are not valid\n", partid, sn_partition_id); - return xpInvalidAddress; + return xpcInvalidAddress; } /* the variables we imported look to be valid */ @@ -366,9 +366,9 @@ xpc_pull_remote_vars_part(struct xpc_partition *part) } if (pulled_entry->magic == XPC_VP_MAGIC1) - return xpRetry; + return xpcRetry; - return xpSuccess; + return xpcSuccess; } /* @@ -379,7 +379,7 @@ xpc_get_IPI_flags(struct xpc_partition *part) { unsigned long irq_flags; u64 IPI_amo; - enum xp_retval ret; + enum xpc_retval ret; /* * See if there are any IPI flags to be handled. @@ -398,7 +398,7 @@ xpc_get_IPI_flags(struct xpc_partition *part) (void *)part-> remote_openclose_args_pa, XPC_OPENCLOSE_ARGS_SIZE); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { XPC_DEACTIVATE_PARTITION(part, ret); dev_dbg(xpc_chan, "failed to pull openclose args from " @@ -414,7 +414,7 @@ xpc_get_IPI_flags(struct xpc_partition *part) ret = xpc_pull_remote_cachelines(part, part->remote_GPs, (void *)part->remote_GPs_pa, XPC_GP_SIZE); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { XPC_DEACTIVATE_PARTITION(part, ret); dev_dbg(xpc_chan, "failed to pull GPs from partition " @@ -431,7 +431,7 @@ xpc_get_IPI_flags(struct xpc_partition *part) /* * Allocate the local message queue and the notify queue. */ -static enum xp_retval +static enum xpc_retval xpc_allocate_local_msgqueue(struct xpc_channel *ch) { unsigned long irq_flags; @@ -464,18 +464,18 @@ xpc_allocate_local_msgqueue(struct xpc_channel *ch) ch->local_nentries = nentries; } spin_unlock_irqrestore(&ch->lock, irq_flags); - return xpSuccess; + return xpcSuccess; } dev_dbg(xpc_chan, "can't get memory for local message queue and notify " "queue, partid=%d, channel=%d\n", ch->partid, ch->number); - return xpNoMemory; + return xpcNoMemory; } /* * Allocate the cached remote message queue. */ -static enum xp_retval +static enum xpc_retval xpc_allocate_remote_msgqueue(struct xpc_channel *ch) { unsigned long irq_flags; @@ -502,12 +502,12 @@ xpc_allocate_remote_msgqueue(struct xpc_channel *ch) ch->remote_nentries = nentries; } spin_unlock_irqrestore(&ch->lock, irq_flags); - return xpSuccess; + return xpcSuccess; } dev_dbg(xpc_chan, "can't get memory for cached remote message queue, " "partid=%d, channel=%d\n", ch->partid, ch->number); - return xpNoMemory; + return xpcNoMemory; } /* @@ -515,20 +515,20 @@ xpc_allocate_remote_msgqueue(struct xpc_channel *ch) * * Note: Assumes all of the channel sizes are filled in. */ -static enum xp_retval +static enum xpc_retval xpc_allocate_msgqueues(struct xpc_channel *ch) { unsigned long irq_flags; - enum xp_retval ret; + enum xpc_retval ret; DBUG_ON(ch->flags & XPC_C_SETUP); ret = xpc_allocate_local_msgqueue(ch); - if (ret != xpSuccess) + if (ret != xpcSuccess) return ret; ret = xpc_allocate_remote_msgqueue(ch); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { kfree(ch->local_msgqueue_base); ch->local_msgqueue = NULL; kfree(ch->notify_queue); @@ -540,7 +540,7 @@ xpc_allocate_msgqueues(struct xpc_channel *ch) ch->flags |= XPC_C_SETUP; spin_unlock_irqrestore(&ch->lock, irq_flags); - return xpSuccess; + return xpcSuccess; } /* @@ -552,7 +552,7 @@ xpc_allocate_msgqueues(struct xpc_channel *ch) static void xpc_process_connect(struct xpc_channel *ch, unsigned long *irq_flags) { - enum xp_retval ret; + enum xpc_retval ret; DBUG_ON(!spin_is_locked(&ch->lock)); @@ -568,7 +568,7 @@ xpc_process_connect(struct xpc_channel *ch, unsigned long *irq_flags) ret = xpc_allocate_msgqueues(ch); spin_lock_irqsave(&ch->lock, *irq_flags); - if (ret != xpSuccess) + if (ret != xpcSuccess) XPC_DISCONNECT_CHANNEL(ch, ret, irq_flags); if (ch->flags & (XPC_C_CONNECTED | XPC_C_DISCONNECTING)) @@ -603,7 +603,7 @@ xpc_process_connect(struct xpc_channel *ch, unsigned long *irq_flags) * Notify those who wanted to be notified upon delivery of their message. */ static void -xpc_notify_senders(struct xpc_channel *ch, enum xp_retval reason, s64 put) +xpc_notify_senders(struct xpc_channel *ch, enum xpc_retval reason, s64 put) { struct xpc_notify *notify; u8 notify_type; @@ -748,7 +748,7 @@ xpc_process_disconnect(struct xpc_channel *ch, unsigned long *irq_flags) if (ch->flags & XPC_C_DISCONNECTINGCALLOUT_MADE) { spin_unlock_irqrestore(&ch->lock, *irq_flags); - xpc_disconnect_callout(ch, xpDisconnected); + xpc_disconnect_callout(ch, xpcDisconnected); spin_lock_irqsave(&ch->lock, *irq_flags); } @@ -791,7 +791,7 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number, struct xpc_openclose_args *args = &part->remote_openclose_args[ch_number]; struct xpc_channel *ch = &part->channels[ch_number]; - enum xp_retval reason; + enum xpc_retval reason; spin_lock_irqsave(&ch->lock, irq_flags); @@ -871,10 +871,10 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number, if (!(ch->flags & XPC_C_DISCONNECTING)) { reason = args->reason; - if (reason <= xpSuccess || reason > xpUnknownReason) - reason = xpUnknownReason; - else if (reason == xpUnregistering) - reason = xpOtherUnregistering; + if (reason <= xpcSuccess || reason > xpcUnknownReason) + reason = xpcUnknownReason; + else if (reason == xpcUnregistering) + reason = xpcOtherUnregistering; XPC_DISCONNECT_CHANNEL(ch, reason, &irq_flags); @@ -961,7 +961,7 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number, if (ch->flags & XPC_C_OPENREQUEST) { if (args->msg_size != ch->msg_size) { - XPC_DISCONNECT_CHANNEL(ch, xpUnequalMsgSizes, + XPC_DISCONNECT_CHANNEL(ch, xpcUnequalMsgSizes, &irq_flags); spin_unlock_irqrestore(&ch->lock, irq_flags); return; @@ -991,7 +991,7 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number, return; } if (!(ch->flags & XPC_C_OPENREQUEST)) { - XPC_DISCONNECT_CHANNEL(ch, xpOpenCloseError, + XPC_DISCONNECT_CHANNEL(ch, xpcOpenCloseError, &irq_flags); spin_unlock_irqrestore(&ch->lock, irq_flags); return; @@ -1042,18 +1042,18 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number, /* * Attempt to establish a channel connection to a remote partition. */ -static enum xp_retval +static enum xpc_retval xpc_connect_channel(struct xpc_channel *ch) { unsigned long irq_flags; struct xpc_registration *registration = &xpc_registrations[ch->number]; if (mutex_trylock(®istration->mutex) == 0) - return xpRetry; + return xpcRetry; if (!XPC_CHANNEL_REGISTERED(ch->number)) { mutex_unlock(®istration->mutex); - return xpUnregistered; + return xpcUnregistered; } spin_lock_irqsave(&ch->lock, irq_flags); @@ -1095,10 +1095,10 @@ xpc_connect_channel(struct xpc_channel *ch) * the channel lock as needed. */ mutex_unlock(®istration->mutex); - XPC_DISCONNECT_CHANNEL(ch, xpUnequalMsgSizes, + XPC_DISCONNECT_CHANNEL(ch, xpcUnequalMsgSizes, &irq_flags); spin_unlock_irqrestore(&ch->lock, irq_flags); - return xpUnequalMsgSizes; + return xpcUnequalMsgSizes; } } else { ch->msg_size = registration->msg_size; @@ -1120,7 +1120,7 @@ xpc_connect_channel(struct xpc_channel *ch) spin_unlock_irqrestore(&ch->lock, irq_flags); - return xpSuccess; + return xpcSuccess; } /* @@ -1203,7 +1203,7 @@ xpc_process_msg_IPI(struct xpc_partition *part, int ch_number) * Notify senders that messages sent have been * received and delivered by the other side. */ - xpc_notify_senders(ch, xpMsgDelivered, + xpc_notify_senders(ch, xpcMsgDelivered, ch->remote_GP.get); } @@ -1335,7 +1335,7 @@ xpc_process_channel_activity(struct xpc_partition *part) * at the same time. */ void -xpc_partition_going_down(struct xpc_partition *part, enum xp_retval reason) +xpc_partition_going_down(struct xpc_partition *part, enum xpc_retval reason) { unsigned long irq_flags; int ch_number; @@ -1375,7 +1375,7 @@ xpc_partition_going_down(struct xpc_partition *part, enum xp_retval reason) void xpc_teardown_infrastructure(struct xpc_partition *part) { - short partid = XPC_PARTID(part); + partid_t partid = XPC_PARTID(part); /* * We start off by making this partition inaccessible to local @@ -1428,7 +1428,7 @@ xpc_teardown_infrastructure(struct xpc_partition *part) void xpc_initiate_connect(int ch_number) { - short partid; + partid_t partid; struct xpc_partition *part; struct xpc_channel *ch; @@ -1456,13 +1456,13 @@ xpc_connected_callout(struct xpc_channel *ch) /* let the registerer know that a connection has been established */ if (ch->func != NULL) { - dev_dbg(xpc_chan, "ch->func() called, reason=xpConnected, " + dev_dbg(xpc_chan, "ch->func() called, reason=xpcConnected, " "partid=%d, channel=%d\n", ch->partid, ch->number); - ch->func(xpConnected, ch->partid, ch->number, + ch->func(xpcConnected, ch->partid, ch->number, (void *)(u64)ch->local_nentries, ch->key); - dev_dbg(xpc_chan, "ch->func() returned, reason=xpConnected, " + dev_dbg(xpc_chan, "ch->func() returned, reason=xpcConnected, " "partid=%d, channel=%d\n", ch->partid, ch->number); } } @@ -1484,7 +1484,7 @@ void xpc_initiate_disconnect(int ch_number) { unsigned long irq_flags; - short partid; + partid_t partid; struct xpc_partition *part; struct xpc_channel *ch; @@ -1503,7 +1503,7 @@ xpc_initiate_disconnect(int ch_number) if (!(ch->flags & XPC_C_DISCONNECTED)) { ch->flags |= XPC_C_WDISCONNECT; - XPC_DISCONNECT_CHANNEL(ch, xpUnregistering, + XPC_DISCONNECT_CHANNEL(ch, xpcUnregistering, &irq_flags); } @@ -1528,7 +1528,7 @@ xpc_initiate_disconnect(int ch_number) */ void xpc_disconnect_channel(const int line, struct xpc_channel *ch, - enum xp_retval reason, unsigned long *irq_flags) + enum xpc_retval reason, unsigned long *irq_flags) { u32 channel_was_connected = (ch->flags & XPC_C_CONNECTED); @@ -1563,7 +1563,7 @@ xpc_disconnect_channel(const int line, struct xpc_channel *ch, } else if ((ch->flags & XPC_C_CONNECTEDCALLOUT_MADE) && !(ch->flags & XPC_C_DISCONNECTINGCALLOUT)) { - /* start a kthread that will do the xpDisconnecting callout */ + /* start a kthread that will do the xpcDisconnecting callout */ xpc_create_kthreads(ch, 1, 1); } @@ -1575,7 +1575,7 @@ xpc_disconnect_channel(const int line, struct xpc_channel *ch, } void -xpc_disconnect_callout(struct xpc_channel *ch, enum xp_retval reason) +xpc_disconnect_callout(struct xpc_channel *ch, enum xpc_retval reason) { /* * Let the channel's registerer know that the channel is being @@ -1598,13 +1598,13 @@ xpc_disconnect_callout(struct xpc_channel *ch, enum xp_retval reason) * Wait for a message entry to become available for the specified channel, * but don't wait any longer than 1 jiffy. */ -static enum xp_retval +static enum xpc_retval xpc_allocate_msg_wait(struct xpc_channel *ch) { - enum xp_retval ret; + enum xpc_retval ret; if (ch->flags & XPC_C_DISCONNECTING) { - DBUG_ON(ch->reason == xpInterrupted); + DBUG_ON(ch->reason == xpcInterrupted); return ch->reason; } @@ -1614,11 +1614,11 @@ xpc_allocate_msg_wait(struct xpc_channel *ch) if (ch->flags & XPC_C_DISCONNECTING) { ret = ch->reason; - DBUG_ON(ch->reason == xpInterrupted); + DBUG_ON(ch->reason == xpcInterrupted); } else if (ret == 0) { - ret = xpTimeout; + ret = xpcTimeout; } else { - ret = xpInterrupted; + ret = xpcInterrupted; } return ret; @@ -1628,12 +1628,12 @@ xpc_allocate_msg_wait(struct xpc_channel *ch) * Allocate an entry for a message from the message queue associated with the * specified channel. */ -static enum xp_retval +static enum xpc_retval xpc_allocate_msg(struct xpc_channel *ch, u32 flags, struct xpc_msg **address_of_msg) { struct xpc_msg *msg; - enum xp_retval ret; + enum xpc_retval ret; s64 put; /* this reference will be dropped in xpc_send_msg() */ @@ -1645,7 +1645,7 @@ xpc_allocate_msg(struct xpc_channel *ch, u32 flags, } if (!(ch->flags & XPC_C_CONNECTED)) { xpc_msgqueue_deref(ch); - return xpNotConnected; + return xpcNotConnected; } /* @@ -1653,7 +1653,7 @@ xpc_allocate_msg(struct xpc_channel *ch, u32 flags, * If none are available, we'll make sure that we grab the latest * GP values. */ - ret = xpTimeout; + ret = xpcTimeout; while (1) { @@ -1683,16 +1683,16 @@ xpc_allocate_msg(struct xpc_channel *ch, u32 flags, * that will cause the IPI handler to fetch the latest * GP values as if an IPI was sent by the other side. */ - if (ret == xpTimeout) + if (ret == xpcTimeout) xpc_IPI_send_local_msgrequest(ch); if (flags & XPC_NOWAIT) { xpc_msgqueue_deref(ch); - return xpNoWait; + return xpcNoWait; } ret = xpc_allocate_msg_wait(ch); - if (ret != xpInterrupted && ret != xpTimeout) { + if (ret != xpcInterrupted && ret != xpcTimeout) { xpc_msgqueue_deref(ch); return ret; } @@ -1711,7 +1711,7 @@ xpc_allocate_msg(struct xpc_channel *ch, u32 flags, *address_of_msg = msg; - return xpSuccess; + return xpcSuccess; } /* @@ -1727,11 +1727,11 @@ xpc_allocate_msg(struct xpc_channel *ch, u32 flags, * payload - address of the allocated payload area pointer (filled in on * return) in which the user-defined message is constructed. */ -enum xp_retval -xpc_initiate_allocate(short partid, int ch_number, u32 flags, void **payload) +enum xpc_retval +xpc_initiate_allocate(partid_t partid, int ch_number, u32 flags, void **payload) { struct xpc_partition *part = &xpc_partitions[partid]; - enum xp_retval ret = xpUnknownReason; + enum xpc_retval ret = xpcUnknownReason; struct xpc_msg *msg = NULL; DBUG_ON(partid <= 0 || partid >= XP_MAX_PARTITIONS); @@ -1814,11 +1814,11 @@ xpc_send_msgs(struct xpc_channel *ch, s64 initial_put) * local message queue's Put value and sends an IPI to the partition the * message is being sent to. */ -static enum xp_retval +static enum xpc_retval xpc_send_msg(struct xpc_channel *ch, struct xpc_msg *msg, u8 notify_type, xpc_notify_func func, void *key) { - enum xp_retval ret = xpSuccess; + enum xpc_retval ret = xpcSuccess; struct xpc_notify *notify = notify; s64 put, msg_number = msg->number; @@ -1908,12 +1908,12 @@ xpc_send_msg(struct xpc_channel *ch, struct xpc_msg *msg, u8 notify_type, * payload - pointer to the payload area allocated via * xpc_initiate_allocate(). */ -enum xp_retval -xpc_initiate_send(short partid, int ch_number, void *payload) +enum xpc_retval +xpc_initiate_send(partid_t partid, int ch_number, void *payload) { struct xpc_partition *part = &xpc_partitions[partid]; struct xpc_msg *msg = XPC_MSG_ADDRESS(payload); - enum xp_retval ret; + enum xpc_retval ret; dev_dbg(xpc_chan, "msg=0x%p, partid=%d, channel=%d\n", (void *)msg, partid, ch_number); @@ -1957,13 +1957,13 @@ xpc_initiate_send(short partid, int ch_number, void *payload) * receipt. THIS FUNCTION MUST BE NON-BLOCKING. * key - user-defined key to be passed to the function when it's called. */ -enum xp_retval -xpc_initiate_send_notify(short partid, int ch_number, void *payload, +enum xpc_retval +xpc_initiate_send_notify(partid_t partid, int ch_number, void *payload, xpc_notify_func func, void *key) { struct xpc_partition *part = &xpc_partitions[partid]; struct xpc_msg *msg = XPC_MSG_ADDRESS(payload); - enum xp_retval ret; + enum xpc_retval ret; dev_dbg(xpc_chan, "msg=0x%p, partid=%d, channel=%d\n", (void *)msg, partid, ch_number); @@ -1985,7 +1985,7 @@ xpc_pull_remote_msg(struct xpc_channel *ch, s64 get) struct xpc_msg *remote_msg, *msg; u32 msg_index, nmsgs; u64 msg_offset; - enum xp_retval ret; + enum xpc_retval ret; if (mutex_lock_interruptible(&ch->msg_to_pull_mutex) != 0) { /* we were interrupted by a signal */ @@ -2012,7 +2012,7 @@ xpc_pull_remote_msg(struct xpc_channel *ch, s64 get) ret = xpc_pull_remote_cachelines(part, msg, remote_msg, nmsgs * ch->msg_size); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { dev_dbg(xpc_chan, "failed to pull %d msgs starting with" " msg %ld from partition %d, channel=%d, " @@ -2112,7 +2112,7 @@ xpc_deliver_msg(struct xpc_channel *ch) ch->number); /* deliver the message to its intended recipient */ - ch->func(xpMsgReceived, ch->partid, ch->number, + ch->func(xpcMsgReceived, ch->partid, ch->number, &msg->payload, ch->key); dev_dbg(xpc_chan, "ch->func() returned, msg=0x%p, " @@ -2203,7 +2203,7 @@ xpc_acknowledge_msgs(struct xpc_channel *ch, s64 initial_get, u8 msg_flags) * xpc_initiate_allocate(). */ void -xpc_initiate_received(short partid, int ch_number, void *payload) +xpc_initiate_received(partid_t partid, int ch_number, void *payload) { struct xpc_partition *part = &xpc_partitions[partid]; struct xpc_channel *ch; diff --git a/trunk/drivers/misc/sgi-xp/xpc_main.c b/trunk/drivers/misc/sgi-xp/xpc_main.c index 08256ed0d9a6..f673ba90eb0e 100644 --- a/trunk/drivers/misc/sgi-xp/xpc_main.c +++ b/trunk/drivers/misc/sgi-xp/xpc_main.c @@ -315,13 +315,13 @@ xpc_initiate_discovery(void *ignore) * the XPC per partition variables from the remote partition and waiting for * the remote partition to pull ours. */ -static enum xp_retval +static enum xpc_retval xpc_make_first_contact(struct xpc_partition *part) { - enum xp_retval ret; + enum xpc_retval ret; - while ((ret = xpc_pull_remote_vars_part(part)) != xpSuccess) { - if (ret != xpRetry) { + while ((ret = xpc_pull_remote_vars_part(part)) != xpcSuccess) { + if (ret != xpcRetry) { XPC_DEACTIVATE_PARTITION(part, ret); return ret; } @@ -406,7 +406,7 @@ xpc_partition_up(struct xpc_partition *part) dev_dbg(xpc_chan, "activating partition %d\n", XPC_PARTID(part)); - if (xpc_setup_infrastructure(part) != xpSuccess) + if (xpc_setup_infrastructure(part) != xpcSuccess) return; /* @@ -418,7 +418,7 @@ xpc_partition_up(struct xpc_partition *part) (void)xpc_part_ref(part); /* this will always succeed */ - if (xpc_make_first_contact(part) == xpSuccess) + if (xpc_make_first_contact(part) == xpcSuccess) xpc_channel_mgr(part); xpc_part_deref(part); @@ -429,7 +429,7 @@ xpc_partition_up(struct xpc_partition *part) static int xpc_activating(void *__partid) { - short partid = (u64)__partid; + partid_t partid = (u64)__partid; struct xpc_partition *part = &xpc_partitions[partid]; unsigned long irq_flags; @@ -470,7 +470,7 @@ xpc_activating(void *__partid) spin_lock_irqsave(&part->act_lock, irq_flags); part->act_state = XPC_P_INACTIVE; - XPC_SET_REASON(part, xpPhysAddrRegFailed, __LINE__); + XPC_SET_REASON(part, xpcPhysAddrRegFailed, __LINE__); spin_unlock_irqrestore(&part->act_lock, irq_flags); part->remote_rp_pa = 0; return 0; @@ -488,7 +488,7 @@ xpc_activating(void *__partid) xpc_disallow_hb(partid, xpc_vars); xpc_mark_partition_inactive(part); - if (part->reason == xpReactivating) { + if (part->reason == xpcReactivating) { /* interrupting ourselves results in activating partition */ xpc_IPI_send_reactivate(part); } @@ -499,7 +499,7 @@ xpc_activating(void *__partid) void xpc_activate_partition(struct xpc_partition *part) { - short partid = XPC_PARTID(part); + partid_t partid = XPC_PARTID(part); unsigned long irq_flags; struct task_struct *kthread; @@ -508,7 +508,7 @@ xpc_activate_partition(struct xpc_partition *part) DBUG_ON(part->act_state != XPC_P_INACTIVE); part->act_state = XPC_P_ACTIVATION_REQ; - XPC_SET_REASON(part, xpCloneKThread, __LINE__); + XPC_SET_REASON(part, xpcCloneKThread, __LINE__); spin_unlock_irqrestore(&part->act_lock, irq_flags); @@ -517,7 +517,7 @@ xpc_activate_partition(struct xpc_partition *part) if (IS_ERR(kthread)) { spin_lock_irqsave(&part->act_lock, irq_flags); part->act_state = XPC_P_INACTIVE; - XPC_SET_REASON(part, xpCloneKThreadFailed, __LINE__); + XPC_SET_REASON(part, xpcCloneKThreadFailed, __LINE__); spin_unlock_irqrestore(&part->act_lock, irq_flags); } } @@ -541,7 +541,7 @@ xpc_activate_partition(struct xpc_partition *part) irqreturn_t xpc_notify_IRQ_handler(int irq, void *dev_id) { - short partid = (short)(u64)dev_id; + partid_t partid = (partid_t) (u64)dev_id; struct xpc_partition *part = &xpc_partitions[partid]; DBUG_ON(partid <= 0 || partid >= XP_MAX_PARTITIONS); @@ -643,7 +643,7 @@ xpc_kthread_waitmsgs(struct xpc_partition *part, struct xpc_channel *ch) static int xpc_kthread_start(void *args) { - short partid = XPC_UNPACK_ARG1(args); + partid_t partid = XPC_UNPACK_ARG1(args); u16 ch_number = XPC_UNPACK_ARG2(args); struct xpc_partition *part = &xpc_partitions[partid]; struct xpc_channel *ch; @@ -696,7 +696,7 @@ xpc_kthread_start(void *args) ch->flags |= XPC_C_DISCONNECTINGCALLOUT; spin_unlock_irqrestore(&ch->lock, irq_flags); - xpc_disconnect_callout(ch, xpDisconnecting); + xpc_disconnect_callout(ch, xpcDisconnecting); spin_lock_irqsave(&ch->lock, irq_flags); ch->flags |= XPC_C_DISCONNECTINGCALLOUT_MADE; @@ -776,7 +776,7 @@ xpc_create_kthreads(struct xpc_channel *ch, int needed, * then we'll deadlock if all other kthreads assigned * to this channel are blocked in the channel's * registerer, because the only thing that will unblock - * them is the xpDisconnecting callout that this + * them is the xpcDisconnecting callout that this * failed kthread_run() would have made. */ @@ -796,7 +796,7 @@ xpc_create_kthreads(struct xpc_channel *ch, int needed, * to function. */ spin_lock_irqsave(&ch->lock, irq_flags); - XPC_DISCONNECT_CHANNEL(ch, xpLackOfResources, + XPC_DISCONNECT_CHANNEL(ch, xpcLackOfResources, &irq_flags); spin_unlock_irqrestore(&ch->lock, irq_flags); } @@ -809,7 +809,7 @@ void xpc_disconnect_wait(int ch_number) { unsigned long irq_flags; - short partid; + partid_t partid; struct xpc_partition *part; struct xpc_channel *ch; int wakeup_channel_mgr; @@ -857,9 +857,9 @@ xpc_disconnect_wait(int ch_number) } static void -xpc_do_exit(enum xp_retval reason) +xpc_do_exit(enum xpc_retval reason) { - short partid; + partid_t partid; int active_part_count, printed_waiting_msg = 0; struct xpc_partition *part; unsigned long printmsg_time, disengage_request_timeout = 0; @@ -955,7 +955,7 @@ xpc_do_exit(enum xp_retval reason) del_timer_sync(&xpc_hb_timer); DBUG_ON(xpc_vars->heartbeating_to_mask != 0); - if (reason == xpUnloading) { + if (reason == xpcUnloading) { /* take ourselves off of the reboot_notifier_list */ (void)unregister_reboot_notifier(&xpc_reboot_notifier); @@ -981,20 +981,20 @@ xpc_do_exit(enum xp_retval reason) static int xpc_system_reboot(struct notifier_block *nb, unsigned long event, void *unused) { - enum xp_retval reason; + enum xpc_retval reason; switch (event) { case SYS_RESTART: - reason = xpSystemReboot; + reason = xpcSystemReboot; break; case SYS_HALT: - reason = xpSystemHalt; + reason = xpcSystemHalt; break; case SYS_POWER_OFF: - reason = xpSystemPoweroff; + reason = xpcSystemPoweroff; break; default: - reason = xpSystemGoingDown; + reason = xpcSystemGoingDown; } xpc_do_exit(reason); @@ -1008,7 +1008,7 @@ static void xpc_die_disengage(void) { struct xpc_partition *part; - short partid; + partid_t partid; unsigned long engaged; long time, printmsg_time, disengage_request_timeout; @@ -1124,7 +1124,7 @@ int __init xpc_init(void) { int ret; - short partid; + partid_t partid; struct xpc_partition *part; struct task_struct *kthread; size_t buf_size; @@ -1279,7 +1279,7 @@ xpc_init(void) /* mark this new thread as a non-starter */ complete(&xpc_discovery_exited); - xpc_do_exit(xpUnloading); + xpc_do_exit(xpcUnloading); return -EBUSY; } @@ -1297,7 +1297,7 @@ module_init(xpc_init); void __exit xpc_exit(void) { - xpc_do_exit(xpUnloading); + xpc_do_exit(xpcUnloading); } module_exit(xpc_exit); diff --git a/trunk/drivers/misc/sgi-xp/xpc_partition.c b/trunk/drivers/misc/sgi-xp/xpc_partition.c index 7dd4b5812c42..acd3fd4285d7 100644 --- a/trunk/drivers/misc/sgi-xp/xpc_partition.c +++ b/trunk/drivers/misc/sgi-xp/xpc_partition.c @@ -403,7 +403,7 @@ xpc_check_remote_hb(void) { struct xpc_vars *remote_vars; struct xpc_partition *part; - short partid; + partid_t partid; bte_result_t bres; remote_vars = (struct xpc_vars *)xpc_remote_copy_buffer; @@ -444,7 +444,7 @@ xpc_check_remote_hb(void) (remote_vars->heartbeat_offline == 0)) || !xpc_hb_allowed(sn_partition_id, remote_vars)) { - XPC_DEACTIVATE_PARTITION(part, xpNoHeartbeat); + XPC_DEACTIVATE_PARTITION(part, xpcNoHeartbeat); continue; } @@ -459,7 +459,7 @@ xpc_check_remote_hb(void) * is large enough to contain a copy of their reserved page header and * part_nasids mask. */ -static enum xp_retval +static enum xpc_retval xpc_get_remote_rp(int nasid, u64 *discovered_nasids, struct xpc_rsvd_page *remote_rp, u64 *remote_rp_pa) { @@ -469,7 +469,7 @@ xpc_get_remote_rp(int nasid, u64 *discovered_nasids, *remote_rp_pa = xpc_get_rsvd_page_pa(nasid); if (*remote_rp_pa == 0) - return xpNoRsvdPageAddr; + return xpcNoRsvdPageAddr; /* pull over the reserved page header and part_nasids mask */ bres = xp_bte_copy(*remote_rp_pa, (u64)remote_rp, @@ -489,18 +489,18 @@ xpc_get_remote_rp(int nasid, u64 *discovered_nasids, if (remote_rp->partid < 1 || remote_rp->partid > (XP_MAX_PARTITIONS - 1)) { - return xpInvalidPartid; + return xpcInvalidPartid; } if (remote_rp->partid == sn_partition_id) - return xpLocalPartid; + return xpcLocalPartid; if (XPC_VERSION_MAJOR(remote_rp->version) != XPC_VERSION_MAJOR(XPC_RP_VERSION)) { - return xpBadVersion; + return xpcBadVersion; } - return xpSuccess; + return xpcSuccess; } /* @@ -509,13 +509,13 @@ xpc_get_remote_rp(int nasid, u64 *discovered_nasids, * remote_vars points to a buffer that is cacheline aligned for BTE copies and * assumed to be of size XPC_RP_VARS_SIZE. */ -static enum xp_retval +static enum xpc_retval xpc_get_remote_vars(u64 remote_vars_pa, struct xpc_vars *remote_vars) { int bres; if (remote_vars_pa == 0) - return xpVarsNotSet; + return xpcVarsNotSet; /* pull over the cross partition variables */ bres = xp_bte_copy(remote_vars_pa, (u64)remote_vars, XPC_RP_VARS_SIZE, @@ -525,10 +525,10 @@ xpc_get_remote_vars(u64 remote_vars_pa, struct xpc_vars *remote_vars) if (XPC_VERSION_MAJOR(remote_vars->version) != XPC_VERSION_MAJOR(XPC_V_VERSION)) { - return xpBadVersion; + return xpcBadVersion; } - return xpSuccess; + return xpcSuccess; } /* @@ -604,16 +604,16 @@ xpc_identify_act_IRQ_req(int nasid) int reactivate = 0; int stamp_diff; struct timespec remote_rp_stamp = { 0, 0 }; - short partid; + partid_t partid; struct xpc_partition *part; - enum xp_retval ret; + enum xpc_retval ret; /* pull over the reserved page structure */ remote_rp = (struct xpc_rsvd_page *)xpc_remote_copy_buffer; ret = xpc_get_remote_rp(nasid, NULL, remote_rp, &remote_rp_pa); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { dev_warn(xpc_part, "unable to get reserved page from nasid %d, " "which sent interrupt, reason=%d\n", nasid, ret); return; @@ -632,7 +632,7 @@ xpc_identify_act_IRQ_req(int nasid) remote_vars = (struct xpc_vars *)xpc_remote_copy_buffer; ret = xpc_get_remote_vars(remote_vars_pa, remote_vars); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { dev_warn(xpc_part, "unable to get XPC variables from nasid %d, " "which sent interrupt, reason=%d\n", nasid, ret); @@ -699,7 +699,7 @@ xpc_identify_act_IRQ_req(int nasid) &remote_rp_stamp, remote_rp_pa, remote_vars_pa, remote_vars); part->reactivate_nasid = nasid; - XPC_DEACTIVATE_PARTITION(part, xpReactivating); + XPC_DEACTIVATE_PARTITION(part, xpcReactivating); return; } @@ -754,11 +754,11 @@ xpc_identify_act_IRQ_req(int nasid) if (reactivate) { part->reactivate_nasid = nasid; - XPC_DEACTIVATE_PARTITION(part, xpReactivating); + XPC_DEACTIVATE_PARTITION(part, xpcReactivating); } else if (XPC_SUPPORTS_DISENGAGE_REQUEST(part->remote_vars_version) && xpc_partition_disengage_requested(1UL << partid)) { - XPC_DEACTIVATE_PARTITION(part, xpOtherGoingDown); + XPC_DEACTIVATE_PARTITION(part, xpcOtherGoingDown); } } @@ -825,7 +825,7 @@ xpc_identify_act_IRQ_sender(void) int xpc_partition_disengaged(struct xpc_partition *part) { - short partid = XPC_PARTID(part); + partid_t partid = XPC_PARTID(part); int disengaged; disengaged = (xpc_partition_engaged(1UL << partid) == 0); @@ -870,20 +870,20 @@ xpc_partition_disengaged(struct xpc_partition *part) /* * Mark specified partition as active. */ -enum xp_retval +enum xpc_retval xpc_mark_partition_active(struct xpc_partition *part) { unsigned long irq_flags; - enum xp_retval ret; + enum xpc_retval ret; dev_dbg(xpc_part, "setting partition %d to ACTIVE\n", XPC_PARTID(part)); spin_lock_irqsave(&part->act_lock, irq_flags); if (part->act_state == XPC_P_ACTIVATING) { part->act_state = XPC_P_ACTIVE; - ret = xpSuccess; + ret = xpcSuccess; } else { - DBUG_ON(part->reason == xpSuccess); + DBUG_ON(part->reason == xpcSuccess); ret = part->reason; } spin_unlock_irqrestore(&part->act_lock, irq_flags); @@ -896,7 +896,7 @@ xpc_mark_partition_active(struct xpc_partition *part) */ void xpc_deactivate_partition(const int line, struct xpc_partition *part, - enum xp_retval reason) + enum xpc_retval reason) { unsigned long irq_flags; @@ -905,15 +905,15 @@ xpc_deactivate_partition(const int line, struct xpc_partition *part, if (part->act_state == XPC_P_INACTIVE) { XPC_SET_REASON(part, reason, line); spin_unlock_irqrestore(&part->act_lock, irq_flags); - if (reason == xpReactivating) { + if (reason == xpcReactivating) { /* we interrupt ourselves to reactivate partition */ xpc_IPI_send_reactivate(part); } return; } if (part->act_state == XPC_P_DEACTIVATING) { - if ((part->reason == xpUnloading && reason != xpUnloading) || - reason == xpReactivating) { + if ((part->reason == xpcUnloading && reason != xpcUnloading) || + reason == xpcReactivating) { XPC_SET_REASON(part, reason, line); } spin_unlock_irqrestore(&part->act_lock, irq_flags); @@ -982,10 +982,10 @@ xpc_discovery(void) int max_regions; int nasid; struct xpc_rsvd_page *rp; - short partid; + partid_t partid; struct xpc_partition *part; u64 *discovered_nasids; - enum xp_retval ret; + enum xpc_retval ret; remote_rp = xpc_kmalloc_cacheline_aligned(XPC_RP_HEADER_SIZE + xp_nasid_mask_bytes, @@ -1063,12 +1063,12 @@ xpc_discovery(void) ret = xpc_get_remote_rp(nasid, discovered_nasids, remote_rp, &remote_rp_pa); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { dev_dbg(xpc_part, "unable to get reserved page " "from nasid %d, reason=%d\n", nasid, ret); - if (ret == xpLocalPartid) + if (ret == xpcLocalPartid) break; continue; @@ -1082,7 +1082,7 @@ xpc_discovery(void) /* pull over the cross partition variables */ ret = xpc_get_remote_vars(remote_vars_pa, remote_vars); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { dev_dbg(xpc_part, "unable to get XPC variables " "from nasid %d, reason=%d\n", nasid, ret); @@ -1116,7 +1116,7 @@ xpc_discovery(void) "register xp_addr region 0x%016lx\n", partid, remote_vars->amos_page_pa); - XPC_SET_REASON(part, xpPhysAddrRegFailed, + XPC_SET_REASON(part, xpcPhysAddrRegFailed, __LINE__); break; } @@ -1151,8 +1151,8 @@ xpc_discovery(void) * Given a partid, get the nasids owned by that partition from the * remote partition's reserved page. */ -enum xp_retval -xpc_initiate_partid_to_nasids(short partid, void *nasid_mask) +enum xpc_retval +xpc_initiate_partid_to_nasids(partid_t partid, void *nasid_mask) { struct xpc_partition *part; u64 part_nasid_pa; @@ -1160,7 +1160,7 @@ xpc_initiate_partid_to_nasids(short partid, void *nasid_mask) part = &xpc_partitions[partid]; if (part->remote_rp_pa == 0) - return xpPartitionDown; + return xpcPartitionDown; memset(nasid_mask, 0, XP_NASID_MASK_BYTES); diff --git a/trunk/drivers/misc/sgi-xp/xpnet.c b/trunk/drivers/misc/sgi-xp/xpnet.c index 822dc8e8d7f0..a9543c65814d 100644 --- a/trunk/drivers/misc/sgi-xp/xpnet.c +++ b/trunk/drivers/misc/sgi-xp/xpnet.c @@ -166,7 +166,7 @@ struct device *xpnet = &xpnet_dbg_subname; * Packet was recevied by XPC and forwarded to us. */ static void -xpnet_receive(short partid, int channel, struct xpnet_message *msg) +xpnet_receive(partid_t partid, int channel, struct xpnet_message *msg) { struct sk_buff *skb; bte_result_t bret; @@ -282,7 +282,7 @@ xpnet_receive(short partid, int channel, struct xpnet_message *msg) * state or message reception on a connection. */ static void -xpnet_connection_activity(enum xp_retval reason, short partid, int channel, +xpnet_connection_activity(enum xpc_retval reason, partid_t partid, int channel, void *data, void *key) { long bp; @@ -291,13 +291,13 @@ xpnet_connection_activity(enum xp_retval reason, short partid, int channel, DBUG_ON(channel != XPC_NET_CHANNEL); switch (reason) { - case xpMsgReceived: /* message received */ + case xpcMsgReceived: /* message received */ DBUG_ON(data == NULL); xpnet_receive(partid, channel, (struct xpnet_message *)data); break; - case xpConnected: /* connection completed to a partition */ + case xpcConnected: /* connection completed to a partition */ spin_lock_bh(&xpnet_broadcast_lock); xpnet_broadcast_partitions |= 1UL << (partid - 1); bp = xpnet_broadcast_partitions; @@ -330,7 +330,7 @@ xpnet_connection_activity(enum xp_retval reason, short partid, int channel, static int xpnet_dev_open(struct net_device *dev) { - enum xp_retval ret; + enum xpc_retval ret; dev_dbg(xpnet, "calling xpc_connect(%d, 0x%p, NULL, %ld, %ld, %ld, " "%ld)\n", XPC_NET_CHANNEL, xpnet_connection_activity, @@ -340,7 +340,7 @@ xpnet_dev_open(struct net_device *dev) ret = xpc_connect(XPC_NET_CHANNEL, xpnet_connection_activity, NULL, XPNET_MSG_SIZE, XPNET_MSG_NENTRIES, XPNET_MAX_KTHREADS, XPNET_MAX_IDLE_KTHREADS); - if (ret != xpSuccess) { + if (ret != xpcSuccess) { dev_err(xpnet, "ifconfig up of %s failed on XPC connect, " "ret=%d\n", dev->name, ret); @@ -407,7 +407,7 @@ xpnet_dev_get_stats(struct net_device *dev) * release the skb and then release our pending message structure. */ static void -xpnet_send_completed(enum xp_retval reason, short partid, int channel, +xpnet_send_completed(enum xpc_retval reason, partid_t partid, int channel, void *__qm) { struct xpnet_pending_msg *queued_msg = (struct xpnet_pending_msg *)__qm; @@ -439,12 +439,12 @@ static int xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) { struct xpnet_pending_msg *queued_msg; - enum xp_retval ret; + enum xpc_retval ret; struct xpnet_message *msg; u64 start_addr, end_addr; long dp; u8 second_mac_octet; - short dest_partid; + partid_t dest_partid; struct xpnet_dev_private *priv; u16 embedded_bytes; @@ -528,7 +528,7 @@ xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) ret = xpc_allocate(dest_partid, XPC_NET_CHANNEL, XPC_NOWAIT, (void **)&msg); - if (unlikely(ret != xpSuccess)) + if (unlikely(ret != xpcSuccess)) continue; msg->embedded_bytes = embedded_bytes; @@ -557,7 +557,7 @@ xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) ret = xpc_send_notify(dest_partid, XPC_NET_CHANNEL, msg, xpnet_send_completed, queued_msg); - if (unlikely(ret != xpSuccess)) { + if (unlikely(ret != xpcSuccess)) { atomic_dec(&queued_msg->use_count); continue; } diff --git a/trunk/drivers/mmc/host/sdhci.h b/trunk/drivers/mmc/host/sdhci.h index 299118de8933..7fb02e177a3d 100644 --- a/trunk/drivers/mmc/host/sdhci.h +++ b/trunk/drivers/mmc/host/sdhci.h @@ -187,7 +187,7 @@ struct sdhci_host { struct mmc_request *mrq; /* Current request */ struct mmc_command *cmd; /* Current command */ struct mmc_data *data; /* Current data request */ - unsigned int data_early:1; /* Data finished before cmd */ + int data_early:1; /* Data finished before cmd */ struct scatterlist *cur_sg; /* We're working on this */ int num_sg; /* Entries left */ diff --git a/trunk/drivers/net/wireless/strip.c b/trunk/drivers/net/wireless/strip.c index 883af891ebfb..5dd23c93497d 100644 --- a/trunk/drivers/net/wireless/strip.c +++ b/trunk/drivers/net/wireless/strip.c @@ -2611,7 +2611,7 @@ static int strip_open(struct tty_struct *tty) * We need a write method. */ - if (tty->ops->write == NULL || tty->ops->set_termios == NULL) + if (tty->ops->write == NULL) return -EOPNOTSUPP; /* diff --git a/trunk/drivers/pci/intel-iommu.c b/trunk/drivers/pci/intel-iommu.c index 66c0fd21894b..1fd8bb765702 100644 --- a/trunk/drivers/pci/intel-iommu.c +++ b/trunk/drivers/pci/intel-iommu.c @@ -49,7 +49,7 @@ #define DEFAULT_DOMAIN_ADDRESS_WIDTH 48 -#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) /* 10sec */ +#define DMAR_OPERATION_TIMEOUT (HZ*60) /* 1m */ #define DOMAIN_MAX_ADDR(gaw) ((((u64)1) << gaw) - 1) @@ -490,12 +490,12 @@ static int iommu_alloc_root_entry(struct intel_iommu *iommu) #define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \ {\ - cycles_t start_time = get_cycles();\ + unsigned long start_time = jiffies;\ while (1) {\ sts = op (iommu->reg + offset);\ if (cond)\ break;\ - if (DMAR_OPERATION_TIMEOUT < (get_cycles() - start_time))\ + if (time_after(jiffies, start_time + DMAR_OPERATION_TIMEOUT))\ panic("DMAR hardware is malfunctioning\n");\ cpu_relax();\ }\ diff --git a/trunk/drivers/pci/pci-acpi.c b/trunk/drivers/pci/pci-acpi.c index 9d6fc8e6285d..72f7476930c8 100644 --- a/trunk/drivers/pci/pci-acpi.c +++ b/trunk/drivers/pci/pci-acpi.c @@ -19,31 +19,8 @@ #include #include "pci.h" -struct acpi_osc_data { - acpi_handle handle; - u32 ctrlset_buf[3]; - u32 global_ctrlsets; - struct list_head sibiling; -}; -static LIST_HEAD(acpi_osc_data_list); - -static struct acpi_osc_data *acpi_get_osc_data(acpi_handle handle) -{ - struct acpi_osc_data *data; - - list_for_each_entry(data, &acpi_osc_data_list, sibiling) { - if (data->handle == handle) - return data; - } - data = kzalloc(sizeof(*data), GFP_KERNEL); - if (!data) - return NULL; - INIT_LIST_HEAD(&data->sibiling); - data->handle = handle; - list_add_tail(&data->sibiling, &acpi_osc_data_list); - return data; -} - +static u32 ctrlset_buf[3] = {0, 0, 0}; +static u32 global_ctrlsets = 0; static u8 OSC_UUID[16] = {0x5B, 0x4D, 0xDB, 0x33, 0xF7, 0x1F, 0x1C, 0x40, 0x96, 0x57, 0x74, 0x41, 0xC0, 0x3D, 0xD7, 0x66}; static acpi_status @@ -60,27 +37,8 @@ acpi_query_osc ( union acpi_object *out_obj; u32 osc_dw0; acpi_status *ret_status = (acpi_status *)retval; - struct acpi_osc_data *osc_data; - u32 flags = (unsigned long)context, temp; - acpi_handle tmp; - - status = acpi_get_handle(handle, "_OSC", &tmp); - if (ACPI_FAILURE(status)) - return status; - - osc_data = acpi_get_osc_data(handle); - if (!osc_data) { - printk(KERN_ERR "acpi osc data array is full\n"); - return AE_ERROR; - } - - osc_data->ctrlset_buf[OSC_SUPPORT_TYPE] |= (flags & OSC_SUPPORT_MASKS); - - /* do _OSC query for all possible controls */ - temp = osc_data->ctrlset_buf[OSC_CONTROL_TYPE]; - osc_data->ctrlset_buf[OSC_QUERY_TYPE] = OSC_QUERY_ENABLE; - osc_data->ctrlset_buf[OSC_CONTROL_TYPE] = OSC_CONTROL_MASKS; + /* Setting up input parameters */ input.count = 4; input.pointer = in_params; @@ -93,11 +51,13 @@ acpi_query_osc ( in_params[2].integer.value = 3; in_params[3].type = ACPI_TYPE_BUFFER; in_params[3].buffer.length = 12; - in_params[3].buffer.pointer = (u8 *)osc_data->ctrlset_buf; + in_params[3].buffer.pointer = (u8 *)context; status = acpi_evaluate_object(handle, "_OSC", &input, &output); - if (ACPI_FAILURE(status)) - goto out_nofree; + if (ACPI_FAILURE (status)) { + *ret_status = status; + return status; + } out_obj = output.pointer; if (out_obj->type != ACPI_TYPE_BUFFER) { @@ -116,8 +76,7 @@ acpi_query_osc ( printk(KERN_DEBUG "_OSC invalid revision\n"); if (osc_dw0 & OSC_CAPABILITIES_MASK_ERROR) { /* Update Global Control Set */ - osc_data->global_ctrlsets = - *((u32 *)(out_obj->buffer.pointer + 8)); + global_ctrlsets = *((u32 *)(out_obj->buffer.pointer+8)); status = AE_OK; goto query_osc_out; } @@ -126,21 +85,12 @@ acpi_query_osc ( } /* Update Global Control Set */ - osc_data->global_ctrlsets = *((u32 *)(out_obj->buffer.pointer + 8)); + global_ctrlsets = *((u32 *)(out_obj->buffer.pointer + 8)); status = AE_OK; query_osc_out: kfree(output.pointer); -out_nofree: *ret_status = status; - - osc_data->ctrlset_buf[OSC_QUERY_TYPE] = !OSC_QUERY_ENABLE; - osc_data->ctrlset_buf[OSC_CONTROL_TYPE] = temp; - if (ACPI_FAILURE(status)) { - /* no osc support at all */ - osc_data->ctrlset_buf[OSC_SUPPORT_TYPE] = 0; - } - return status; } @@ -215,15 +165,28 @@ acpi_run_osc ( **/ acpi_status __pci_osc_support_set(u32 flags, const char *hid) { - acpi_status retval = AE_NOT_FOUND; + u32 temp; + acpi_status retval; if (!(flags & OSC_SUPPORT_MASKS)) { return AE_TYPE; } + ctrlset_buf[OSC_SUPPORT_TYPE] |= (flags & OSC_SUPPORT_MASKS); + + /* do _OSC query for all possible controls */ + temp = ctrlset_buf[OSC_CONTROL_TYPE]; + ctrlset_buf[OSC_QUERY_TYPE] = OSC_QUERY_ENABLE; + ctrlset_buf[OSC_CONTROL_TYPE] = OSC_CONTROL_MASKS; acpi_get_devices(hid, acpi_query_osc, - (void *)(unsigned long)flags, + ctrlset_buf, (void **) &retval ); + ctrlset_buf[OSC_QUERY_TYPE] = !OSC_QUERY_ENABLE; + ctrlset_buf[OSC_CONTROL_TYPE] = temp; + if (ACPI_FAILURE(retval)) { + /* no osc support at all */ + ctrlset_buf[OSC_SUPPORT_TYPE] = 0; + } return AE_OK; } @@ -238,31 +201,19 @@ acpi_status pci_osc_control_set(acpi_handle handle, u32 flags) { acpi_status status; u32 ctrlset; - acpi_handle tmp; - struct acpi_osc_data *osc_data; - - status = acpi_get_handle(handle, "_OSC", &tmp); - if (ACPI_FAILURE(status)) - return status; - - osc_data = acpi_get_osc_data(handle); - if (!osc_data) { - printk(KERN_ERR "acpi osc data array is full\n"); - return AE_ERROR; - } ctrlset = (flags & OSC_CONTROL_MASKS); if (!ctrlset) { return AE_TYPE; } - if (osc_data->ctrlset_buf[OSC_SUPPORT_TYPE] && - ((osc_data->global_ctrlsets & ctrlset) != ctrlset)) { + if (ctrlset_buf[OSC_SUPPORT_TYPE] && + ((global_ctrlsets & ctrlset) != ctrlset)) { return AE_SUPPORT; } - osc_data->ctrlset_buf[OSC_CONTROL_TYPE] |= ctrlset; - status = acpi_run_osc(handle, osc_data->ctrlset_buf); + ctrlset_buf[OSC_CONTROL_TYPE] |= ctrlset; + status = acpi_run_osc(handle, ctrlset_buf); if (ACPI_FAILURE (status)) { - osc_data->ctrlset_buf[OSC_CONTROL_TYPE] &= ~ctrlset; + ctrlset_buf[OSC_CONTROL_TYPE] &= ~ctrlset; } return status; diff --git a/trunk/drivers/pci/quirks.c b/trunk/drivers/pci/quirks.c index f2d9c770f51a..afd914ebe215 100644 --- a/trunk/drivers/pci/quirks.c +++ b/trunk/drivers/pci/quirks.c @@ -1826,7 +1826,6 @@ static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) } } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk); static void __devinit quirk_msi_intx_disable_bug(struct pci_dev *dev) { diff --git a/trunk/drivers/pnp/interface.c b/trunk/drivers/pnp/interface.c index 5695a79f3a52..5d9301de1778 100644 --- a/trunk/drivers/pnp/interface.c +++ b/trunk/drivers/pnp/interface.c @@ -424,7 +424,7 @@ pnp_set_current_resources(struct device *dmdev, struct device_attribute *attr, start = simple_strtoul(buf, &buf, 0); pnp_res = pnp_add_irq_resource(dev, start, 0); if (pnp_res) - pnp_res->index = nirq++; + nirq++; continue; } if (!strnicmp(buf, "dma", 3)) { diff --git a/trunk/drivers/rtc/rtc-lib.c b/trunk/drivers/rtc/rtc-lib.c index 9f996ec881ce..ba795a4db1e9 100644 --- a/trunk/drivers/rtc/rtc-lib.c +++ b/trunk/drivers/rtc/rtc-lib.c @@ -51,7 +51,7 @@ EXPORT_SYMBOL(rtc_year_days); */ void rtc_time_to_tm(unsigned long time, struct rtc_time *tm) { - unsigned int days, month, year; + register int days, month, year; days = time / 86400; time -= days * 86400; diff --git a/trunk/drivers/rtc/rtc-m41t80.c b/trunk/drivers/rtc/rtc-m41t80.c index a3e0880b38fb..316bfaa80872 100644 --- a/trunk/drivers/rtc/rtc-m41t80.c +++ b/trunk/drivers/rtc/rtc-m41t80.c @@ -15,7 +15,6 @@ #include #include -#include #include #include #include @@ -804,7 +803,6 @@ static int m41t80_probe(struct i2c_client *client, #ifdef CONFIG_RTC_DRV_M41T80_WDT if (clientdata->features & M41T80_FEATURE_HT) { - save_client = client; rc = misc_register(&wdt_dev); if (rc) goto exit; @@ -813,6 +811,7 @@ static int m41t80_probe(struct i2c_client *client, misc_deregister(&wdt_dev); goto exit; } + save_client = client; } #endif return 0; diff --git a/trunk/drivers/scsi/aha152x.c b/trunk/drivers/scsi/aha152x.c index 1dca1775f4b1..f5215fd4b73d 100644 --- a/trunk/drivers/scsi/aha152x.c +++ b/trunk/drivers/scsi/aha152x.c @@ -3830,7 +3830,7 @@ static int __init aha152x_init(void) iounmap(p); } if (!ok && setup_count == 0) - return -ENODEV; + return 0; printk(KERN_INFO "aha152x: BIOS test: passed, "); #else @@ -3909,14 +3909,14 @@ static int __init aha152x_init(void) #endif } - return 0; + return 1; } static void __exit aha152x_exit(void) { - struct aha152x_hostdata *hd, *tmp; + struct aha152x_hostdata *hd; - list_for_each_entry_safe(hd, tmp, &aha152x_host_list, host_list) { + list_for_each_entry(hd, &aha152x_host_list, host_list) { struct Scsi_Host *shost = container_of((void *)hd, struct Scsi_Host, hostdata); aha152x_release(shost); diff --git a/trunk/drivers/scsi/gdth.c b/trunk/drivers/scsi/gdth.c index 46771d4c81bd..8e2e964af668 100644 --- a/trunk/drivers/scsi/gdth.c +++ b/trunk/drivers/scsi/gdth.c @@ -550,6 +550,7 @@ static int __init gdth_search_isa(ulong32 bios_adr) #endif /* CONFIG_ISA */ #ifdef CONFIG_PCI +static bool gdth_pci_registered; static bool gdth_search_vortex(ushort device) { @@ -3723,8 +3724,6 @@ static void gdth_log_event(gdth_evt_data *dvr, char *buffer) } #ifdef GDTH_STATISTICS -static unchar gdth_timer_running; - static void gdth_timeout(ulong data) { ulong32 i; @@ -3732,10 +3731,7 @@ static void gdth_timeout(ulong data) gdth_ha_str *ha; ulong flags; - if(unlikely(list_empty(&gdth_instances))) { - gdth_timer_running = 0; - return; - } + BUG_ON(list_empty(&gdth_instances)); ha = list_first_entry(&gdth_instances, gdth_ha_str, list); spin_lock_irqsave(&ha->smp_lock, flags); @@ -3755,22 +3751,6 @@ static void gdth_timeout(ulong data) add_timer(&gdth_timer); spin_unlock_irqrestore(&ha->smp_lock, flags); } - -static void gdth_timer_init(void) -{ - if (gdth_timer_running) - return; - gdth_timer_running = 1; - TRACE2(("gdth_detect(): Initializing timer !\n")); - gdth_timer.expires = jiffies + HZ; - gdth_timer.data = 0L; - gdth_timer.function = gdth_timeout; - add_timer(&gdth_timer); -} -#else -static inline void gdth_timer_init(void) -{ -} #endif static void __init internal_setup(char *str,int *ints) @@ -4755,7 +4735,6 @@ static int __init gdth_isa_probe_one(ulong32 isa_bios) if (error) goto out_free_coal_stat; list_add_tail(&ha->list, &gdth_instances); - gdth_timer_init(); scsi_scan_host(shp); @@ -4886,7 +4865,6 @@ static int __init gdth_eisa_probe_one(ushort eisa_slot) if (error) goto out_free_coal_stat; list_add_tail(&ha->list, &gdth_instances); - gdth_timer_init(); scsi_scan_host(shp); @@ -5033,7 +5011,6 @@ static int gdth_pci_probe_one(gdth_pci_str *pcistr, list_add_tail(&ha->list, &gdth_instances); pci_set_drvdata(ha->pdev, ha); - gdth_timer_init(); scsi_scan_host(shp); @@ -5133,7 +5110,6 @@ static int __init gdth_init(void) /* initializations */ gdth_polling = TRUE; gdth_clear_events(); - init_timer(&gdth_timer); /* As default we do not probe for EISA or ISA controllers */ if (probe_eisa_isa) { @@ -5156,17 +5132,23 @@ static int __init gdth_init(void) #ifdef CONFIG_PCI /* scanning for PCI controllers */ - if (pci_register_driver(&gdth_pci_driver)) { - gdth_ha_str *ha; - - list_for_each_entry(ha, &gdth_instances, list) - gdth_remove_one(ha); - return -ENODEV; - } + if (pci_register_driver(&gdth_pci_driver) == 0) + gdth_pci_registered = true; #endif /* CONFIG_PCI */ TRACE2(("gdth_detect() %d controller detected\n", gdth_ctr_count)); + if (list_empty(&gdth_instances)) + return -ENODEV; + +#ifdef GDTH_STATISTICS + TRACE2(("gdth_detect(): Initializing timer !\n")); + init_timer(&gdth_timer); + gdth_timer.expires = jiffies + HZ; + gdth_timer.data = 0L; + gdth_timer.function = gdth_timeout; + add_timer(&gdth_timer); +#endif major = register_chrdev(0,"gdth", &gdth_fops); register_reboot_notifier(&gdth_notifier); gdth_polling = FALSE; @@ -5185,7 +5167,8 @@ static void __exit gdth_exit(void) #endif #ifdef CONFIG_PCI - pci_unregister_driver(&gdth_pci_driver); + if (gdth_pci_registered) + pci_unregister_driver(&gdth_pci_driver); #endif list_for_each_entry(ha, &gdth_instances, list) diff --git a/trunk/drivers/scsi/libiscsi.c b/trunk/drivers/scsi/libiscsi.c index b43bf1d60dac..010c1b9b178c 100644 --- a/trunk/drivers/scsi/libiscsi.c +++ b/trunk/drivers/scsi/libiscsi.c @@ -730,9 +730,7 @@ static int __iscsi_complete_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr, if (iscsi_recv_pdu(conn->cls_conn, hdr, data, datalen)) rc = ISCSI_ERR_CONN_FAILED; - } else - mod_timer(&conn->transport_timer, - jiffies + conn->recv_timeout); + } iscsi_free_mgmt_task(conn, mtask); break; default: @@ -1455,20 +1453,19 @@ static void iscsi_check_transport_timeouts(unsigned long data) { struct iscsi_conn *conn = (struct iscsi_conn *)data; struct iscsi_session *session = conn->session; - unsigned long recv_timeout, next_timeout = 0, last_recv; + unsigned long timeout, next_timeout = 0, last_recv; spin_lock(&session->lock); if (session->state != ISCSI_STATE_LOGGED_IN) goto done; - recv_timeout = conn->recv_timeout; - if (!recv_timeout) + timeout = conn->recv_timeout; + if (!timeout) goto done; - recv_timeout *= HZ; + timeout *= HZ; last_recv = conn->last_recv; - if (conn->ping_mtask && - time_before_eq(conn->last_ping + (conn->ping_timeout * HZ), + if (time_before_eq(last_recv + timeout + (conn->ping_timeout * HZ), jiffies)) { iscsi_conn_printk(KERN_ERR, conn, "ping timeout of %d secs " "expired, last rx %lu, last ping %lu, " @@ -1479,13 +1476,15 @@ static void iscsi_check_transport_timeouts(unsigned long data) return; } - if (time_before_eq(last_recv + recv_timeout, jiffies)) { - /* send a ping to try to provoke some traffic */ - debug_scsi("Sending nopout as ping on conn %p\n", conn); - iscsi_send_nopout(conn, NULL); - next_timeout = conn->last_ping + (conn->ping_timeout * HZ); + if (time_before_eq(last_recv + timeout, jiffies)) { + if (time_before_eq(conn->last_ping, last_recv)) { + /* send a ping to try to provoke some traffic */ + debug_scsi("Sending nopout as ping on conn %p\n", conn); + iscsi_send_nopout(conn, NULL); + } + next_timeout = last_recv + timeout + (conn->ping_timeout * HZ); } else - next_timeout = last_recv + recv_timeout; + next_timeout = last_recv + timeout; debug_scsi("Setting next tmo %lu\n", next_timeout); mod_timer(&conn->transport_timer, next_timeout); diff --git a/trunk/drivers/scsi/qla1280.c b/trunk/drivers/scsi/qla1280.c index 51e2f299dbbb..fa060932d2b4 100644 --- a/trunk/drivers/scsi/qla1280.c +++ b/trunk/drivers/scsi/qla1280.c @@ -2007,7 +2007,7 @@ qla1280_set_defaults(struct scsi_qla_host *ha) nv->bus[bus].config_2.req_ack_active_negation = 1; nv->bus[bus].config_2.data_line_active_negation = 1; nv->bus[bus].selection_timeout = 250; - nv->bus[bus].max_queue_depth = 32; + nv->bus[bus].max_queue_depth = 256; if (IS_ISP1040(ha)) { nv->bus[bus].bus_reset_delay = 3; @@ -2051,7 +2051,7 @@ qla1280_config_target(struct scsi_qla_host *ha, int bus, int target) status = qla1280_mailbox_command(ha, 0x0f, mb); /* Save Tag queuing enable flag. */ - flag = (BIT_0 << target); + flag = (BIT_0 << target) & mb[0]; if (nv->bus[bus].target[target].parameter.tag_queuing) ha->bus_settings[bus].qtag_enables |= flag; diff --git a/trunk/drivers/serial/crisv10.c b/trunk/drivers/serial/crisv10.c index 3e0366eab412..f9fa237aa949 100644 --- a/trunk/drivers/serial/crisv10.c +++ b/trunk/drivers/serial/crisv10.c @@ -3808,7 +3808,7 @@ rs_close(struct tty_struct *tty, struct file * filp) shutdown(info); rs_flush_buffer(tty); - tty_ldisc_flush(tty); + tty_ldisc_flush_buffer(tty); tty->closing = 0; info->event = 0; info->tty = 0; diff --git a/trunk/drivers/spi/Kconfig b/trunk/drivers/spi/Kconfig index 66ec5d8808de..fae9e8f3d092 100644 --- a/trunk/drivers/spi/Kconfig +++ b/trunk/drivers/spi/Kconfig @@ -126,6 +126,7 @@ config SPI_MPC52xx_PSC config SPI_MPC83xx tristate "Freescale MPC83xx/QUICC Engine SPI controller" depends on SPI_MASTER && (PPC_83xx || QUICC_ENGINE) && EXPERIMENTAL + select SPI_BITBANG help This enables using the Freescale MPC83xx and QUICC Engine SPI controllers in master mode. diff --git a/trunk/drivers/spi/pxa2xx_spi.c b/trunk/drivers/spi/pxa2xx_spi.c index 0c452c46ab07..654bb58be630 100644 --- a/trunk/drivers/spi/pxa2xx_spi.c +++ b/trunk/drivers/spi/pxa2xx_spi.c @@ -1567,7 +1567,7 @@ static int pxa2xx_spi_resume(struct platform_device *pdev) int status = 0; /* Enable the SSP clock */ - clk_enable(ssp->clk); + clk_disable(ssp->clk); /* Start the queue running */ status = start_queue(drv_data); diff --git a/trunk/drivers/spi/spi_mpc83xx.c b/trunk/drivers/spi/spi_mpc83xx.c index 6832da6f7109..189f706b9e4b 100644 --- a/trunk/drivers/spi/spi_mpc83xx.c +++ b/trunk/drivers/spi/spi_mpc83xx.c @@ -49,7 +49,6 @@ struct mpc83xx_spi_reg { #define SPMODE_LEN(x) ((x) << 20) #define SPMODE_PM(x) ((x) << 16) #define SPMODE_OP (1 << 14) -#define SPMODE_CG(x) ((x) << 7) /* * Default for SPI Mode: @@ -68,6 +67,10 @@ struct mpc83xx_spi_reg { /* SPI Controller driver's private data. */ struct mpc83xx_spi { + /* bitbang has to be first */ + struct spi_bitbang bitbang; + struct completion done; + struct mpc83xx_spi_reg __iomem *base; /* rx & tx bufs from the spi_transfer */ @@ -79,7 +82,7 @@ struct mpc83xx_spi { u32(*get_tx) (struct mpc83xx_spi *); unsigned int count; - int irq; + u32 irq; unsigned nsecs; /* (clock cycle time)/2 */ @@ -91,25 +94,6 @@ struct mpc83xx_spi { void (*activate_cs) (u8 cs, u8 polarity); void (*deactivate_cs) (u8 cs, u8 polarity); - - u8 busy; - - struct workqueue_struct *workqueue; - struct work_struct work; - - struct list_head queue; - spinlock_t lock; - - struct completion done; -}; - -struct spi_mpc83xx_cs { - /* functions to deal with different sized buffers */ - void (*get_rx) (u32 rx_data, struct mpc83xx_spi *); - u32 (*get_tx) (struct mpc83xx_spi *); - u32 rx_shift; /* RX data reg shift when in qe mode */ - u32 tx_shift; /* TX data reg shift when in qe mode */ - u32 hw_mode; /* Holds HW mode register settings */ }; static inline void mpc83xx_spi_write_reg(__be32 __iomem * reg, u32 val) @@ -153,7 +137,6 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value) { struct mpc83xx_spi *mpc83xx_spi; u8 pol = spi->mode & SPI_CS_HIGH ? 1 : 0; - struct spi_mpc83xx_cs *cs = spi->controller_state; mpc83xx_spi = spi_master_get_devdata(spi->master); @@ -164,26 +147,50 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value) if (value == BITBANG_CS_ACTIVE) { u32 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); + u32 len = spi->bits_per_word; + u8 pm; - mpc83xx_spi->rx_shift = cs->rx_shift; - mpc83xx_spi->tx_shift = cs->tx_shift; - mpc83xx_spi->get_rx = cs->get_rx; - mpc83xx_spi->get_tx = cs->get_tx; - - if (cs->hw_mode != regval) { - unsigned long flags; - void *tmp_ptr = &mpc83xx_spi->base->mode; - - regval = cs->hw_mode; - /* Turn off IRQs locally to minimize time that - * SPI is disabled - */ - local_irq_save(flags); - /* Turn off SPI unit prior changing mode */ - mpc83xx_spi_write_reg(tmp_ptr, regval & ~SPMODE_ENABLE); - mpc83xx_spi_write_reg(tmp_ptr, regval); - local_irq_restore(flags); + if (len == 32) + len = 0; + else + len = len - 1; + + /* mask out bits we are going to set */ + regval &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH + | SPMODE_LEN(0xF) | SPMODE_DIV16 + | SPMODE_PM(0xF) | SPMODE_REV | SPMODE_LOOP); + + if (spi->mode & SPI_CPHA) + regval |= SPMODE_CP_BEGIN_EDGECLK; + if (spi->mode & SPI_CPOL) + regval |= SPMODE_CI_INACTIVEHIGH; + if (!(spi->mode & SPI_LSB_FIRST)) + regval |= SPMODE_REV; + if (spi->mode & SPI_LOOP) + regval |= SPMODE_LOOP; + + regval |= SPMODE_LEN(len); + + if ((mpc83xx_spi->spibrg / spi->max_speed_hz) >= 64) { + pm = mpc83xx_spi->spibrg / (spi->max_speed_hz * 64) - 1; + if (pm > 0x0f) { + dev_err(&spi->dev, "Requested speed is too " + "low: %d Hz. Will use %d Hz instead.\n", + spi->max_speed_hz, + mpc83xx_spi->spibrg / 1024); + pm = 0x0f; + } + regval |= SPMODE_PM(pm) | SPMODE_DIV16; + } else { + pm = mpc83xx_spi->spibrg / (spi->max_speed_hz * 4); + if (pm) + pm--; + regval |= SPMODE_PM(pm); } + + /* Turn off SPI unit prior changing mode */ + mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0); + mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); if (mpc83xx_spi->activate_cs) mpc83xx_spi->activate_cs(spi->chip_select, pol); } @@ -194,9 +201,8 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) { struct mpc83xx_spi *mpc83xx_spi; u32 regval; - u8 bits_per_word, pm; + u8 bits_per_word; u32 hz; - struct spi_mpc83xx_cs *cs = spi->controller_state; mpc83xx_spi = spi_master_get_devdata(spi->master); @@ -217,191 +223,61 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) || ((bits_per_word > 16) && (bits_per_word != 32))) return -EINVAL; - if (!hz) - hz = spi->max_speed_hz; - - cs->rx_shift = 0; - cs->tx_shift = 0; + mpc83xx_spi->rx_shift = 0; + mpc83xx_spi->tx_shift = 0; if (bits_per_word <= 8) { - cs->get_rx = mpc83xx_spi_rx_buf_u8; - cs->get_tx = mpc83xx_spi_tx_buf_u8; + mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8; + mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8; if (mpc83xx_spi->qe_mode) { - cs->rx_shift = 16; - cs->tx_shift = 24; + mpc83xx_spi->rx_shift = 16; + mpc83xx_spi->tx_shift = 24; } } else if (bits_per_word <= 16) { - cs->get_rx = mpc83xx_spi_rx_buf_u16; - cs->get_tx = mpc83xx_spi_tx_buf_u16; + mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u16; + mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u16; if (mpc83xx_spi->qe_mode) { - cs->rx_shift = 16; - cs->tx_shift = 16; + mpc83xx_spi->rx_shift = 16; + mpc83xx_spi->tx_shift = 16; } } else if (bits_per_word <= 32) { - cs->get_rx = mpc83xx_spi_rx_buf_u32; - cs->get_tx = mpc83xx_spi_tx_buf_u32; + mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u32; + mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u32; } else return -EINVAL; if (mpc83xx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) { - cs->tx_shift = 0; + mpc83xx_spi->tx_shift = 0; if (bits_per_word <= 8) - cs->rx_shift = 8; + mpc83xx_spi->rx_shift = 8; else - cs->rx_shift = 0; + mpc83xx_spi->rx_shift = 0; } - mpc83xx_spi->rx_shift = cs->rx_shift; - mpc83xx_spi->tx_shift = cs->tx_shift; - mpc83xx_spi->get_rx = cs->get_rx; - mpc83xx_spi->get_tx = cs->get_tx; + /* nsecs = (clock period)/2 */ + if (!hz) + hz = spi->max_speed_hz; + mpc83xx_spi->nsecs = (1000000000 / 2) / hz; + if (mpc83xx_spi->nsecs > MAX_UDELAY_MS * 1000) + return -EINVAL; if (bits_per_word == 32) bits_per_word = 0; else bits_per_word = bits_per_word - 1; - /* mask out bits we are going to set */ - cs->hw_mode &= ~(SPMODE_LEN(0xF) | SPMODE_DIV16 - | SPMODE_PM(0xF)); - - cs->hw_mode |= SPMODE_LEN(bits_per_word); - - if ((mpc83xx_spi->spibrg / hz) >= 64) { - pm = mpc83xx_spi->spibrg / (hz * 64) - 1; - if (pm > 0x0f) { - dev_err(&spi->dev, "Requested speed is too " - "low: %d Hz. Will use %d Hz instead.\n", - hz, mpc83xx_spi->spibrg / 1024); - pm = 0x0f; - } - cs->hw_mode |= SPMODE_PM(pm) | SPMODE_DIV16; - } else { - pm = mpc83xx_spi->spibrg / (hz * 4); - if (pm) - pm--; - cs->hw_mode |= SPMODE_PM(pm); - } - regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); - if (cs->hw_mode != regval) { - unsigned long flags; - void *tmp_ptr = &mpc83xx_spi->base->mode; - - regval = cs->hw_mode; - /* Turn off IRQs locally to minimize time - * that SPI is disabled - */ - local_irq_save(flags); - /* Turn off SPI unit prior changing mode */ - mpc83xx_spi_write_reg(tmp_ptr, regval & ~SPMODE_ENABLE); - mpc83xx_spi_write_reg(tmp_ptr, regval); - local_irq_restore(flags); - } - return 0; -} - -static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t) -{ - struct mpc83xx_spi *mpc83xx_spi; - u32 word, len, bits_per_word; - - mpc83xx_spi = spi_master_get_devdata(spi->master); - - mpc83xx_spi->tx = t->tx_buf; - mpc83xx_spi->rx = t->rx_buf; - bits_per_word = spi->bits_per_word; - if (t->bits_per_word) - bits_per_word = t->bits_per_word; - len = t->len; - if (bits_per_word > 8) - len /= 2; - if (bits_per_word > 16) - len /= 2; - mpc83xx_spi->count = len; - INIT_COMPLETION(mpc83xx_spi->done); - - /* enable rx ints */ - mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, SPIM_NE); - - /* transmit word */ - word = mpc83xx_spi->get_tx(mpc83xx_spi); - mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word); - - wait_for_completion(&mpc83xx_spi->done); - - /* disable rx ints */ - mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0); - - return mpc83xx_spi->count; -} - -static void mpc83xx_spi_work(struct work_struct *work) -{ - struct mpc83xx_spi *mpc83xx_spi = - container_of(work, struct mpc83xx_spi, work); - - spin_lock_irq(&mpc83xx_spi->lock); - mpc83xx_spi->busy = 1; - while (!list_empty(&mpc83xx_spi->queue)) { - struct spi_message *m; - struct spi_device *spi; - struct spi_transfer *t = NULL; - unsigned cs_change; - int status, nsecs = 50; - - m = container_of(mpc83xx_spi->queue.next, - struct spi_message, queue); - list_del_init(&m->queue); - spin_unlock_irq(&mpc83xx_spi->lock); - - spi = m->spi; - cs_change = 1; - status = 0; - list_for_each_entry(t, &m->transfers, transfer_list) { - if (t->bits_per_word || t->speed_hz) { - /* Don't allow changes if CS is active */ - status = -EINVAL; - - if (cs_change) - status = mpc83xx_spi_setup_transfer(spi, t); - if (status < 0) - break; - } - - if (cs_change) - mpc83xx_spi_chipselect(spi, BITBANG_CS_ACTIVE); - cs_change = t->cs_change; - if (t->len) - status = mpc83xx_spi_bufs(spi, t); - if (status) { - status = -EMSGSIZE; - break; - } - m->actual_length += t->len; + regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); - if (t->delay_usecs) - udelay(t->delay_usecs); - - if (cs_change) { - ndelay(nsecs); - mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE); - ndelay(nsecs); - } - } - - m->status = status; - m->complete(m->context); - - if (status || !cs_change) { - ndelay(nsecs); - mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE); - } + /* mask out bits we are going to set */ + regval &= ~(SPMODE_LEN(0xF) | SPMODE_REV); + regval |= SPMODE_LEN(bits_per_word); + if (!(spi->mode & SPI_LSB_FIRST)) + regval |= SPMODE_REV; - mpc83xx_spi_setup_transfer(spi, NULL); + /* Turn off SPI unit prior changing mode */ + mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0); + mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); - spin_lock_irq(&mpc83xx_spi->lock); - } - mpc83xx_spi->busy = 0; - spin_unlock_irq(&mpc83xx_spi->lock); + return 0; } /* the spi->mode bits understood by this driver: */ @@ -410,10 +286,9 @@ static void mpc83xx_spi_work(struct work_struct *work) static int mpc83xx_spi_setup(struct spi_device *spi) { + struct spi_bitbang *bitbang; struct mpc83xx_spi *mpc83xx_spi; int retval; - u32 hw_mode; - struct spi_mpc83xx_cs *cs = spi->controller_state; if (spi->mode & ~MODEBITS) { dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n", @@ -424,56 +299,63 @@ static int mpc83xx_spi_setup(struct spi_device *spi) if (!spi->max_speed_hz) return -EINVAL; - if (!cs) { - cs = kzalloc(sizeof *cs, GFP_KERNEL); - if (!cs) - return -ENOMEM; - spi->controller_state = cs; - } + bitbang = spi_master_get_devdata(spi->master); mpc83xx_spi = spi_master_get_devdata(spi->master); if (!spi->bits_per_word) spi->bits_per_word = 8; - hw_mode = cs->hw_mode; /* Save orginal settings */ - cs->hw_mode = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); - /* mask out bits we are going to set */ - cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH - | SPMODE_REV | SPMODE_LOOP); - - if (spi->mode & SPI_CPHA) - cs->hw_mode |= SPMODE_CP_BEGIN_EDGECLK; - if (spi->mode & SPI_CPOL) - cs->hw_mode |= SPMODE_CI_INACTIVEHIGH; - if (!(spi->mode & SPI_LSB_FIRST)) - cs->hw_mode |= SPMODE_REV; - if (spi->mode & SPI_LOOP) - cs->hw_mode |= SPMODE_LOOP; - retval = mpc83xx_spi_setup_transfer(spi, NULL); - if (retval < 0) { - cs->hw_mode = hw_mode; /* Restore settings */ + if (retval < 0) return retval; - } - dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u Hz\n", + dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec\n", __func__, spi->mode & (SPI_CPOL | SPI_CPHA), - spi->bits_per_word, spi->max_speed_hz); -#if 0 /* Don't think this is needed */ + spi->bits_per_word, 2 * mpc83xx_spi->nsecs); + /* NOTE we _need_ to call chipselect() early, ideally with adapter * setup, unless the hardware defaults cooperate to avoid confusion * between normal (active low) and inverted chipselects. */ /* deselect chip (low or high) */ - spin_lock(&mpc83xx_spi->lock); - if (!mpc83xx_spi->busy) - mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE); - spin_unlock(&mpc83xx_spi->lock); -#endif + spin_lock(&bitbang->lock); + if (!bitbang->busy) { + bitbang->chipselect(spi, BITBANG_CS_INACTIVE); + ndelay(mpc83xx_spi->nsecs); + } + spin_unlock(&bitbang->lock); + return 0; } +static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t) +{ + struct mpc83xx_spi *mpc83xx_spi; + u32 word; + + mpc83xx_spi = spi_master_get_devdata(spi->master); + + mpc83xx_spi->tx = t->tx_buf; + mpc83xx_spi->rx = t->rx_buf; + mpc83xx_spi->count = t->len; + INIT_COMPLETION(mpc83xx_spi->done); + + /* enable rx ints */ + mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, SPIM_NE); + + /* transmit word */ + word = mpc83xx_spi->get_tx(mpc83xx_spi); + mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word); + + wait_for_completion(&mpc83xx_spi->done); + + /* disable rx ints */ + mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0); + + return t->len - mpc83xx_spi->count; +} + irqreturn_t mpc83xx_spi_irq(s32 irq, void *context_data) { struct mpc83xx_spi *mpc83xx_spi = context_data; @@ -513,28 +395,6 @@ irqreturn_t mpc83xx_spi_irq(s32 irq, void *context_data) return ret; } -static int mpc83xx_spi_transfer(struct spi_device *spi, - struct spi_message *m) -{ - struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master); - unsigned long flags; - - m->actual_length = 0; - m->status = -EINPROGRESS; - - spin_lock_irqsave(&mpc83xx_spi->lock, flags); - list_add_tail(&m->queue, &mpc83xx_spi->queue); - queue_work(mpc83xx_spi->workqueue, &mpc83xx_spi->work); - spin_unlock_irqrestore(&mpc83xx_spi->lock, flags); - - return 0; -} - - -static void mpc83xx_spi_cleanup(struct spi_device *spi) -{ - kfree(spi->controller_state); -} static int __init mpc83xx_spi_probe(struct platform_device *dev) { @@ -566,11 +426,11 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev) ret = -ENODEV; goto free_master; } - master->setup = mpc83xx_spi_setup; - master->transfer = mpc83xx_spi_transfer; - master->cleanup = mpc83xx_spi_cleanup; - mpc83xx_spi = spi_master_get_devdata(master); + mpc83xx_spi->bitbang.master = spi_master_get(master); + mpc83xx_spi->bitbang.chipselect = mpc83xx_spi_chipselect; + mpc83xx_spi->bitbang.setup_transfer = mpc83xx_spi_setup_transfer; + mpc83xx_spi->bitbang.txrx_bufs = mpc83xx_spi_bufs; mpc83xx_spi->activate_cs = pdata->activate_cs; mpc83xx_spi->deactivate_cs = pdata->deactivate_cs; mpc83xx_spi->qe_mode = pdata->qe_mode; @@ -585,6 +445,7 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev) mpc83xx_spi->tx_shift = 24; } + mpc83xx_spi->bitbang.master->setup = mpc83xx_spi_setup; init_completion(&mpc83xx_spi->done); mpc83xx_spi->base = ioremap(r->start, r->end - r->start + 1); @@ -622,21 +483,11 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev) regval |= SPMODE_OP; mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); - spin_lock_init(&mpc83xx_spi->lock); - init_completion(&mpc83xx_spi->done); - INIT_WORK(&mpc83xx_spi->work, mpc83xx_spi_work); - INIT_LIST_HEAD(&mpc83xx_spi->queue); - mpc83xx_spi->workqueue = create_singlethread_workqueue( - master->dev.parent->bus_id); - if (mpc83xx_spi->workqueue == NULL) { - ret = -EBUSY; - goto free_irq; - } + ret = spi_bitbang_start(&mpc83xx_spi->bitbang); - ret = spi_register_master(master); - if (ret < 0) - goto unreg_master; + if (ret != 0) + goto free_irq; printk(KERN_INFO "%s: MPC83xx SPI Controller driver at 0x%p (irq = %d)\n", @@ -644,8 +495,6 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev) return ret; -unreg_master: - destroy_workqueue(mpc83xx_spi->workqueue); free_irq: free_irq(mpc83xx_spi->irq, mpc83xx_spi); unmap_io: @@ -666,12 +515,10 @@ static int __exit mpc83xx_spi_remove(struct platform_device *dev) master = platform_get_drvdata(dev); mpc83xx_spi = spi_master_get_devdata(master); - flush_workqueue(mpc83xx_spi->workqueue); - destroy_workqueue(mpc83xx_spi->workqueue); - spi_unregister_master(master); - + spi_bitbang_stop(&mpc83xx_spi->bitbang); free_irq(mpc83xx_spi->irq, mpc83xx_spi); iounmap(mpc83xx_spi->base); + spi_master_put(mpc83xx_spi->bitbang.master); return 0; } diff --git a/trunk/drivers/usb/c67x00/c67x00-ll-hpi.c b/trunk/drivers/usb/c67x00/c67x00-ll-hpi.c index 5100fbbf6cb0..f3430b372f09 100644 --- a/trunk/drivers/usb/c67x00/c67x00-ll-hpi.c +++ b/trunk/drivers/usb/c67x00/c67x00-ll-hpi.c @@ -23,7 +23,6 @@ #include #include -#include #include #include "c67x00.h" diff --git a/trunk/drivers/video/Kconfig b/trunk/drivers/video/Kconfig index 2cdaf1ff8315..bb1dadaa4a23 100644 --- a/trunk/drivers/video/Kconfig +++ b/trunk/drivers/video/Kconfig @@ -171,6 +171,7 @@ config FB_SYS_FOPS config FB_DEFERRED_IO bool depends on FB + default y config FB_METRONOME tristate diff --git a/trunk/drivers/video/atmel_lcdfb.c b/trunk/drivers/video/atmel_lcdfb.c index b004036d4087..8ffdf3578768 100644 --- a/trunk/drivers/video/atmel_lcdfb.c +++ b/trunk/drivers/video/atmel_lcdfb.c @@ -441,15 +441,14 @@ static int atmel_lcdfb_set_par(struct fb_info *info) value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); - if (value < 2) { + value = (value / 2) - 1; + dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value); + + if (value <= 0) { dev_notice(info->device, "Bypassing pixel clock divider\n"); lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); } else { - value = (value / 2) - 1; - dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", - value); - lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, - value << ATMEL_LCDC_CLKVAL_OFFSET); + lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET); info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1))); dev_dbg(info->device, " updated pixclk: %lu KHz\n", PICOS2KHZ(info->var.pixclock)); diff --git a/trunk/drivers/video/console/fbcon.c b/trunk/drivers/video/console/fbcon.c index 5fa8b76673cb..ad31983b43eb 100644 --- a/trunk/drivers/video/console/fbcon.c +++ b/trunk/drivers/video/console/fbcon.c @@ -1853,8 +1853,6 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, struct fb_info *info = registered_fb[con2fb_map[vc->vc_num]]; struct display *p = &fb_display[vc->vc_num]; int scroll_partial = info->flags & FBINFO_PARTIAL_PAN_OK; - unsigned short saved_ec; - int ret; if (fbcon_is_inactive(vc, info)) return -EINVAL; @@ -1867,11 +1865,6 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, * whole screen (prevents flicker). */ - saved_ec = vc->vc_video_erase_char; - vc->vc_video_erase_char = vc->vc_scrl_erase_char; - - ret = 0; - switch (dir) { case SM_UP: if (count > vc->vc_rows) /* Maximum realistic size */ @@ -1890,7 +1883,7 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, (b - count)), vc->vc_scrl_erase_char, vc->vc_size_row * count); - ret = 1; + return 1; break; case SCROLL_WRAP_MOVE: @@ -1962,8 +1955,7 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, (b - count)), vc->vc_scrl_erase_char, vc->vc_size_row * count); - ret = 1; - break; + return 1; } break; @@ -1982,7 +1974,7 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, t), vc->vc_scrl_erase_char, vc->vc_size_row * count); - ret = 1; + return 1; break; case SCROLL_WRAP_MOVE: @@ -2052,13 +2044,10 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, t), vc->vc_scrl_erase_char, vc->vc_size_row * count); - ret = 1; - break; + return 1; } - break; } - vc->vc_video_erase_char = saved_ec; - return ret; + return 0; } @@ -2518,9 +2507,6 @@ static int fbcon_do_set_font(struct vc_data *vc, int w, int h, c = vc->vc_video_erase_char; vc->vc_video_erase_char = ((c & 0xfe00) >> 1) | (c & 0xff); - c = vc->vc_def_color; - vc->vc_scrl_erase_char = - ((c & 0xFE00) >> 1) | (c & 0xFF); vc->vc_attr >>= 1; } } else if (!vc->vc_hi_font_mask && cnt == 512) { @@ -2551,14 +2537,9 @@ static int fbcon_do_set_font(struct vc_data *vc, int w, int h, if (vc->vc_can_do_color) { vc->vc_video_erase_char = ((c & 0xff00) << 1) | (c & 0xff); - c = vc->vc_def_color; - vc->vc_scrl_erase_char = - ((c & 0xFF00) << 1) | (c & 0xFF); vc->vc_attr <<= 1; - } else { + } else vc->vc_video_erase_char = c & ~0x100; - vc->vc_scrl_erase_char = c & ~0x100; - } } } diff --git a/trunk/drivers/video/pnx4008/pnxrgbfb.c b/trunk/drivers/video/pnx4008/pnxrgbfb.c index 4db6b48a8715..685761a0732c 100644 --- a/trunk/drivers/video/pnx4008/pnxrgbfb.c +++ b/trunk/drivers/video/pnx4008/pnxrgbfb.c @@ -100,6 +100,7 @@ static int rgbfb_remove(struct platform_device *pdev) fb_dealloc_cmap(&info->cmap); framebuffer_release(info); platform_set_drvdata(pdev, NULL); + kfree(info); } pnx4008_free_dum_channel(channel_owned, pdev->id); @@ -167,21 +168,23 @@ static int __devinit rgbfb_probe(struct platform_device *pdev) ret = fb_alloc_cmap(&info->cmap, 256, 0); if (ret < 0) - goto err1; + goto err2; ret = register_framebuffer(info); if (ret < 0) - goto err2; + goto err3; platform_set_drvdata(pdev, info); return 0; -err2: +err3: fb_dealloc_cmap(&info->cmap); +err2: + framebuffer_release(info); err1: pnx4008_free_dum_channel(channel_owned, pdev->id); err0: - framebuffer_release(info); + kfree(info); err: return ret; } diff --git a/trunk/drivers/video/tridentfb.c b/trunk/drivers/video/tridentfb.c index beefab2992c0..bd54cd0de39a 100644 --- a/trunk/drivers/video/tridentfb.c +++ b/trunk/drivers/video/tridentfb.c @@ -27,6 +27,7 @@ #define VERSION "0.7.8-NEWAPI" struct tridentfb_par { + int vclk; /* in MHz */ void __iomem *io_virt; /* iospace virtual memory address */ }; @@ -668,26 +669,27 @@ static void set_screen_start(int base) (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17)); } +/* Use 20.12 fixed-point for NTSC value and frequency calculation */ +#define calc_freq(n, m, k) ( ((unsigned long)0xE517 * (n + 8) / ((m + 2) * (1 << k))) >> 12 ) + /* Set dotclock frequency */ -static void set_vclk(unsigned long freq) +static void set_vclk(int freq) { int m, n, k; - unsigned long f, fi, d, di; + int f, fi, d, di; unsigned char lo = 0, hi = 0; - d = 20000; + d = 20; for (k = 2; k >= 0; k--) for (m = 0; m < 63; m++) for (n = 0; n < 128; n++) { - fi = ((14318l * (n + 8)) / (m + 2)) >> k; + fi = calc_freq(n, m, k); if ((di = abs(fi - freq)) < d) { d = di; f = fi; lo = n; hi = (k << 6) | m; } - if (fi > freq) - break; } if (chip3D) { write3C4(ClockHigh, hi); @@ -886,8 +888,6 @@ static int tridentfb_set_par(struct fb_info *info) struct fb_var_screeninfo *var = &info->var; int bpp = var->bits_per_pixel; unsigned char tmp; - unsigned long vclk; - debug("enter\n"); hdispend = var->xres / 8 - 1; hsyncstart = (var->xres + var->right_margin) / 8; @@ -905,6 +905,7 @@ static int tridentfb_set_par(struct fb_info *info) vblankstart = var->yres; vblankend = vtotal + 2; + enable_mmio(); crtc_unlock(); write3CE(CyberControl, 8); @@ -1014,11 +1015,11 @@ static int tridentfb_set_par(struct fb_info *info) write3X4(Performance, 0x92); write3X4(PCIReg, 0x07); /* MMIO & PCI read and write burst enable */ - /* convert from picoseconds to kHz */ - vclk = PICOS2KHZ(info->var.pixclock); + /* convert from picoseconds to MHz */ + par->vclk = 1000000 / info->var.pixclock; if (bpp == 32) - vclk *= 2; - set_vclk(vclk); + par->vclk *= 2; + set_vclk(par->vclk); write3C4(0, 3); write3C4(1, 1); /* set char clock 8 dots wide */ diff --git a/trunk/fs/cifs/cifspdu.h b/trunk/fs/cifs/cifspdu.h index c43bf4b7a556..a0d26b540d4e 100644 --- a/trunk/fs/cifs/cifspdu.h +++ b/trunk/fs/cifs/cifspdu.h @@ -340,7 +340,6 @@ #define OPEN_NO_RECALL 0x00400000 #define OPEN_FREE_SPACE_QUERY 0x00800000 /* should be zero */ #define CREATE_OPTIONS_MASK 0x007FFFFF -#define CREATE_OPTION_READONLY 0x10000000 #define CREATE_OPTION_SPECIAL 0x20000000 /* system. NB not sent over wire */ /* ImpersonationLevel flags */ diff --git a/trunk/fs/cifs/cifssmb.c b/trunk/fs/cifs/cifssmb.c index 95fbba4ea7d4..cfd9750852b3 100644 --- a/trunk/fs/cifs/cifssmb.c +++ b/trunk/fs/cifs/cifssmb.c @@ -1224,8 +1224,11 @@ SMBLegacyOpen(const int xid, struct cifsTconInfo *tcon, else /* BB FIXME BB */ pSMB->FileAttributes = cpu_to_le16(0/*ATTR_NORMAL*/); - if (create_options & CREATE_OPTION_READONLY) - pSMB->FileAttributes |= cpu_to_le16(ATTR_READONLY); + /* if ((omode & S_IWUGO) == 0) + pSMB->FileAttributes |= cpu_to_le32(ATTR_READONLY);*/ + /* Above line causes problems due to vfs splitting create into two + pieces - need to set mode after file created not while it is + being created */ /* BB FIXME BB */ /* pSMB->CreateOptions = cpu_to_le32(create_options & @@ -1328,16 +1331,17 @@ CIFSSMBOpen(const int xid, struct cifsTconInfo *tcon, pSMB->FileAttributes = cpu_to_le32(ATTR_SYSTEM); else pSMB->FileAttributes = cpu_to_le32(ATTR_NORMAL); - /* XP does not handle ATTR_POSIX_SEMANTICS */ /* but it helps speed up case sensitive checks for other servers such as Samba */ if (tcon->ses->capabilities & CAP_UNIX) pSMB->FileAttributes |= cpu_to_le32(ATTR_POSIX_SEMANTICS); - if (create_options & CREATE_OPTION_READONLY) - pSMB->FileAttributes |= cpu_to_le32(ATTR_READONLY); - + /* if ((omode & S_IWUGO) == 0) + pSMB->FileAttributes |= cpu_to_le32(ATTR_READONLY);*/ + /* Above line causes problems due to vfs splitting create into two + pieces - need to set mode after file created not while it is + being created */ pSMB->ShareAccess = cpu_to_le32(FILE_SHARE_ALL); pSMB->CreateDisposition = cpu_to_le32(openDisposition); pSMB->CreateOptions = cpu_to_le32(create_options & CREATE_OPTIONS_MASK); diff --git a/trunk/fs/cifs/connect.c b/trunk/fs/cifs/connect.c index f428bf3bf1a9..791ca5c1a116 100644 --- a/trunk/fs/cifs/connect.c +++ b/trunk/fs/cifs/connect.c @@ -348,6 +348,7 @@ cifs_demultiplex_thread(struct TCP_Server_Info *server) int reconnect; current->flags |= PF_MEMALLOC; + server->tsk = current; /* save process info to wake at shutdown */ cFYI(1, ("Demultiplex PID: %d", task_pid_nr(current))); write_lock(&GlobalSMBSeslock); atomic_inc(&tcpSesAllocCount); @@ -650,20 +651,10 @@ cifs_demultiplex_thread(struct TCP_Server_Info *server) spin_lock(&GlobalMid_Lock); server->tcpStatus = CifsExiting; - spin_unlock(&GlobalMid_Lock); - - /* don't exit until kthread_stop is called */ - set_current_state(TASK_UNINTERRUPTIBLE); - while (!kthread_should_stop()) { - schedule(); - set_current_state(TASK_UNINTERRUPTIBLE); - } - set_current_state(TASK_RUNNING); - + server->tsk = NULL; /* check if we have blocked requests that need to free */ /* Note that cifs_max_pending is normally 50, but can be set at module install time to as little as two */ - spin_lock(&GlobalMid_Lock); if (atomic_read(&server->inFlight) >= cifs_max_pending) atomic_set(&server->inFlight, cifs_max_pending - 1); /* We do not want to set the max_pending too low or we @@ -1327,43 +1318,42 @@ cifs_parse_mount_options(char *options, const char *devname, static struct cifsSesInfo * cifs_find_tcp_session(struct in_addr *target_ip_addr, - struct in6_addr *target_ip6_addr, - char *userName, struct TCP_Server_Info **psrvTcp) + struct in6_addr *target_ip6_addr, + char *userName, struct TCP_Server_Info **psrvTcp) { struct list_head *tmp; struct cifsSesInfo *ses; - *psrvTcp = NULL; - read_lock(&GlobalSMBSeslock); + list_for_each(tmp, &GlobalSMBSessionList) { ses = list_entry(tmp, struct cifsSesInfo, cifsSessionList); - if (!ses->server) - continue; - - if (target_ip_addr && - ses->server->addr.sockAddr.sin_addr.s_addr != target_ip_addr->s_addr) - continue; - else if (target_ip6_addr && - memcmp(&ses->server->addr.sockAddr6.sin6_addr, - target_ip6_addr, sizeof(*target_ip6_addr))) - continue; - /* BB lock server and tcp session; increment use count here?? */ - - /* found a match on the TCP session */ - *psrvTcp = ses->server; - - /* BB check if reconnection needed */ - if (strncmp(ses->userName, userName, MAX_USERNAME_SIZE) == 0) { - read_unlock(&GlobalSMBSeslock); - /* Found exact match on both TCP and - SMB sessions */ - return ses; + if (ses->server) { + if ((target_ip_addr && + (ses->server->addr.sockAddr.sin_addr.s_addr + == target_ip_addr->s_addr)) || (target_ip6_addr + && memcmp(&ses->server->addr.sockAddr6.sin6_addr, + target_ip6_addr, sizeof(*target_ip6_addr)))) { + /* BB lock server and tcp session and increment + use count here?? */ + + /* found a match on the TCP session */ + *psrvTcp = ses->server; + + /* BB check if reconnection needed */ + if (strncmp + (ses->userName, userName, + MAX_USERNAME_SIZE) == 0){ + read_unlock(&GlobalSMBSeslock); + /* Found exact match on both TCP and + SMB sessions */ + return ses; + } + } } /* else tcp and smb sessions need reconnection */ } read_unlock(&GlobalSMBSeslock); - return NULL; } @@ -2196,12 +2186,15 @@ cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb, srvTcp->tcpStatus = CifsExiting; spin_unlock(&GlobalMid_Lock); if (srvTcp->tsk) { + struct task_struct *tsk; /* If we could verify that kthread_stop would always wake up processes blocked in tcp in recv_mesg then we could remove the send_sig call */ force_sig(SIGKILL, srvTcp->tsk); - kthread_stop(srvTcp->tsk); + tsk = srvTcp->tsk; + if (tsk) + kthread_stop(tsk); } } /* If find_unc succeeded then rc == 0 so we can not end */ @@ -2217,17 +2210,23 @@ cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb, if ((temp_rc == -ESHUTDOWN) && (pSesInfo->server) && (pSesInfo->server->tsk)) { + struct task_struct *tsk; force_sig(SIGKILL, pSesInfo->server->tsk); - kthread_stop(pSesInfo->server->tsk); + tsk = pSesInfo->server->tsk; + if (tsk) + kthread_stop(tsk); } } else { cFYI(1, ("No session or bad tcon")); if ((pSesInfo->server) && (pSesInfo->server->tsk)) { + struct task_struct *tsk; force_sig(SIGKILL, pSesInfo->server->tsk); - kthread_stop(pSesInfo->server->tsk); + tsk = pSesInfo->server->tsk; + if (tsk) + kthread_stop(tsk); } } sesInfoFree(pSesInfo); diff --git a/trunk/fs/cifs/dir.c b/trunk/fs/cifs/dir.c index e4e0078a0526..6ed775986be9 100644 --- a/trunk/fs/cifs/dir.c +++ b/trunk/fs/cifs/dir.c @@ -119,7 +119,6 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode, { int rc = -ENOENT; int xid; - int create_options = CREATE_NOT_DIR; int oplock = 0; int desiredAccess = GENERIC_READ | GENERIC_WRITE; __u16 fileHandle; @@ -177,19 +176,9 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode, FreeXid(xid); return -ENOMEM; } - - mode &= ~current->fs->umask; - - /* - * if we're not using unix extensions, see if we need to set - * ATTR_READONLY on the create call - */ - if (!pTcon->unix_ext && (mode & S_IWUGO) == 0) - create_options |= CREATE_OPTION_READONLY; - if (cifs_sb->tcon->ses->capabilities & CAP_NT_SMBS) rc = CIFSSMBOpen(xid, pTcon, full_path, disposition, - desiredAccess, create_options, + desiredAccess, CREATE_NOT_DIR, &fileHandle, &oplock, buf, cifs_sb->local_nls, cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); else @@ -198,7 +187,7 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode, if (rc == -EIO) { /* old server, retry the open legacy style */ rc = SMBLegacyOpen(xid, pTcon, full_path, disposition, - desiredAccess, create_options, + desiredAccess, CREATE_NOT_DIR, &fileHandle, &oplock, buf, cifs_sb->local_nls, cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); } @@ -208,6 +197,7 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode, /* If Open reported that we actually created a file then we now have to set the mode if possible */ if ((pTcon->unix_ext) && (oplock & CIFS_CREATE_ACTION)) { + mode &= ~current->fs->umask; if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SET_UID) { CIFSSMBUnixSetPerms(xid, pTcon, full_path, mode, (__u64)current->fsuid, diff --git a/trunk/fs/cifs/inode.c b/trunk/fs/cifs/inode.c index fcbdbb6ad7bf..0d9d2e6d7af6 100644 --- a/trunk/fs/cifs/inode.c +++ b/trunk/fs/cifs/inode.c @@ -974,8 +974,8 @@ int cifs_mkdir(struct inode *inode, struct dentry *direntry, int mode) * failed to get it from the server or was set bogus */ if ((direntry->d_inode) && (direntry->d_inode->i_nlink < 2)) direntry->d_inode->i_nlink = 2; - mode &= ~current->fs->umask; if (pTcon->unix_ext) { + mode &= ~current->fs->umask; if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SET_UID) { CIFSSMBUnixSetPerms(xid, pTcon, full_path, mode, @@ -994,16 +994,9 @@ int cifs_mkdir(struct inode *inode, struct dentry *direntry, int mode) CIFS_MOUNT_MAP_SPECIAL_CHR); } } else { - if (!(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL) && - (mode & S_IWUGO) == 0) { - FILE_BASIC_INFO pInfo; - memset(&pInfo, 0, sizeof(pInfo)); - pInfo.Attributes = cpu_to_le32(ATTR_READONLY); - CIFSSMBSetTimes(xid, pTcon, full_path, - &pInfo, cifs_sb->local_nls, - cifs_sb->mnt_cifs_flags & - CIFS_MOUNT_MAP_SPECIAL_CHR); - } + /* BB to be implemented via Windows secrty descriptors + eg CIFSSMBWinSetPerms(xid, pTcon, full_path, mode, + -1, -1, local_nls); */ if (direntry->d_inode) { direntry->d_inode->i_mode = mode; direntry->d_inode->i_mode |= S_IFDIR; @@ -1415,19 +1408,18 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs) __u64 uid = 0xFFFFFFFFFFFFFFFFULL; __u64 gid = 0xFFFFFFFFFFFFFFFFULL; struct cifsInodeInfo *cifsInode; - struct inode *inode = direntry->d_inode; xid = GetXid(); cFYI(1, ("setattr on file %s attrs->iavalid 0x%x", direntry->d_name.name, attrs->ia_valid)); - cifs_sb = CIFS_SB(inode->i_sb); + cifs_sb = CIFS_SB(direntry->d_inode->i_sb); pTcon = cifs_sb->tcon; if ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_PERM) == 0) { /* check if we have permission to change attrs */ - rc = inode_change_ok(inode, attrs); + rc = inode_change_ok(direntry->d_inode, attrs); if (rc < 0) { FreeXid(xid); return rc; @@ -1440,7 +1432,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs) FreeXid(xid); return -ENOMEM; } - cifsInode = CIFS_I(inode); + cifsInode = CIFS_I(direntry->d_inode); if ((attrs->ia_valid & ATTR_MTIME) || (attrs->ia_valid & ATTR_SIZE)) { /* @@ -1451,9 +1443,9 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs) will be truncated anyway? Also, should we error out here if the flush returns error? */ - rc = filemap_write_and_wait(inode->i_mapping); + rc = filemap_write_and_wait(direntry->d_inode->i_mapping); if (rc != 0) { - cifsInode->write_behind_rc = rc; + CIFS_I(direntry->d_inode)->write_behind_rc = rc; rc = 0; } } @@ -1529,8 +1521,9 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs) */ if (rc == 0) { - rc = cifs_vmtruncate(inode, attrs->ia_size); - cifs_truncate_page(inode->i_mapping, inode->i_size); + rc = cifs_vmtruncate(direntry->d_inode, attrs->ia_size); + cifs_truncate_page(direntry->d_inode->i_mapping, + direntry->d_inode->i_size); } else goto cifs_setattr_exit; } @@ -1564,7 +1557,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs) rc = 0; #ifdef CONFIG_CIFS_EXPERIMENTAL if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL) - rc = mode_to_acl(inode, full_path, mode); + rc = mode_to_acl(direntry->d_inode, full_path, mode); else if ((mode & S_IWUGO) == 0) { #else if ((mode & S_IWUGO) == 0) { @@ -1672,7 +1665,7 @@ int cifs_setattr(struct dentry *direntry, struct iattr *attrs) /* do not need local check to inode_check_ok since the server does that */ if (!rc) - rc = inode_setattr(inode, attrs); + rc = inode_setattr(direntry->d_inode, attrs); cifs_setattr_exit: kfree(full_path); FreeXid(xid); diff --git a/trunk/fs/dquot.c b/trunk/fs/dquot.c index 5ac77da19959..dfba1623cccb 100644 --- a/trunk/fs/dquot.c +++ b/trunk/fs/dquot.c @@ -1491,16 +1491,6 @@ int vfs_quota_off(struct super_block *sb, int type, int remount) /* We need to serialize quota_off() for device */ mutex_lock(&dqopt->dqonoff_mutex); - - /* - * Skip everything if there's nothing to do. We have to do this because - * sometimes we are called when fill_super() failed and calling - * sync_fs() in such cases does no good. - */ - if (!sb_any_quota_enabled(sb) && !sb_any_quota_suspended(sb)) { - mutex_unlock(&dqopt->dqonoff_mutex); - return 0; - } for (cnt = 0; cnt < MAXQUOTAS; cnt++) { toputinode[cnt] = NULL; if (type != -1 && cnt != type) diff --git a/trunk/fs/ecryptfs/inode.c b/trunk/fs/ecryptfs/inode.c index c92cc1c00aae..0a1397335a8e 100644 --- a/trunk/fs/ecryptfs/inode.c +++ b/trunk/fs/ecryptfs/inode.c @@ -37,11 +37,17 @@ static struct dentry *lock_parent(struct dentry *dentry) { struct dentry *dir; - dir = dget_parent(dentry); + dir = dget(dentry->d_parent); mutex_lock_nested(&(dir->d_inode->i_mutex), I_MUTEX_PARENT); return dir; } +static void unlock_parent(struct dentry *dentry) +{ + mutex_unlock(&(dentry->d_parent->d_inode->i_mutex)); + dput(dentry->d_parent); +} + static void unlock_dir(struct dentry *dir) { mutex_unlock(&dir->d_inode->i_mutex); @@ -420,9 +426,8 @@ static int ecryptfs_unlink(struct inode *dir, struct dentry *dentry) int rc = 0; struct dentry *lower_dentry = ecryptfs_dentry_to_lower(dentry); struct inode *lower_dir_inode = ecryptfs_inode_to_lower(dir); - struct dentry *lower_dir_dentry; - lower_dir_dentry = lock_parent(lower_dentry); + lock_parent(lower_dentry); rc = vfs_unlink(lower_dir_inode, lower_dentry); if (rc) { printk(KERN_ERR "Error in vfs_unlink; rc = [%d]\n", rc); @@ -434,7 +439,7 @@ static int ecryptfs_unlink(struct inode *dir, struct dentry *dentry) dentry->d_inode->i_ctime = dir->i_ctime; d_drop(dentry); out_unlock: - unlock_dir(lower_dir_dentry); + unlock_parent(lower_dentry); return rc; } diff --git a/trunk/fs/ecryptfs/miscdev.c b/trunk/fs/ecryptfs/miscdev.c index 6560da1a58ce..788995efd1d3 100644 --- a/trunk/fs/ecryptfs/miscdev.c +++ b/trunk/fs/ecryptfs/miscdev.c @@ -257,14 +257,12 @@ ecryptfs_miscdev_read(struct file *file, char __user *buf, size_t count, mutex_lock(&daemon->mux); if (daemon->flags & ECRYPTFS_DAEMON_ZOMBIE) { rc = 0; - mutex_unlock(&ecryptfs_daemon_hash_mux); printk(KERN_WARNING "%s: Attempt to read from zombified " "daemon\n", __func__); goto out_unlock_daemon; } if (daemon->flags & ECRYPTFS_DAEMON_IN_READ) { rc = 0; - mutex_unlock(&ecryptfs_daemon_hash_mux); goto out_unlock_daemon; } /* This daemon will not go away so long as this flag is set */ diff --git a/trunk/fs/exec.c b/trunk/fs/exec.c index 1f8a24aa1f8b..aeaa9791d8be 100644 --- a/trunk/fs/exec.c +++ b/trunk/fs/exec.c @@ -736,7 +736,7 @@ static int exec_mmap(struct mm_struct *mm) tsk->active_mm = mm; activate_mm(active_mm, mm); task_unlock(tsk); - mm_update_next_owner(old_mm); + mm_update_next_owner(mm); arch_pick_mmap_layout(mm); if (old_mm) { up_read(&old_mm->mmap_sem); diff --git a/trunk/fs/ext4/mballoc.c b/trunk/fs/ext4/mballoc.c index b128bdc0f55c..fbec2ef93797 100644 --- a/trunk/fs/ext4/mballoc.c +++ b/trunk/fs/ext4/mballoc.c @@ -2639,7 +2639,8 @@ static int ext4_mb_init_per_dev_proc(struct super_block *sb) struct proc_dir_entry *proc; char devname[64]; - bdevname(sb->s_bdev, devname); + snprintf(devname, sizeof(devname) - 1, "%s", + bdevname(sb->s_bdev, devname)); sbi->s_mb_proc = proc_mkdir(devname, proc_root_ext4); MB_PROC_HANDLER(EXT4_MB_STATS_NAME, stats); @@ -2673,7 +2674,8 @@ static int ext4_mb_destroy_per_dev_proc(struct super_block *sb) if (sbi->s_mb_proc == NULL) return -EINVAL; - bdevname(sb->s_bdev, devname); + snprintf(devname, sizeof(devname) - 1, "%s", + bdevname(sb->s_bdev, devname)); remove_proc_entry(EXT4_MB_GROUP_PREALLOC, sbi->s_mb_proc); remove_proc_entry(EXT4_MB_STREAM_REQ, sbi->s_mb_proc); remove_proc_entry(EXT4_MB_ORDER2_REQ, sbi->s_mb_proc); diff --git a/trunk/fs/fuse/file.c b/trunk/fs/fuse/file.c index 8092f0d9fd1f..f28cf8b46f80 100644 --- a/trunk/fs/fuse/file.c +++ b/trunk/fs/fuse/file.c @@ -804,8 +804,6 @@ static ssize_t fuse_fill_write_pages(struct fuse_req *req, if (offset == PAGE_CACHE_SIZE) offset = 0; - if (!fc->big_writes) - break; } while (iov_iter_count(ii) && count < fc->max_write && req->num_pages < FUSE_MAX_PAGES_PER_REQ && offset == 0); diff --git a/trunk/fs/fuse/fuse_i.h b/trunk/fs/fuse/fuse_i.h index bae948657c4f..dadffa21a206 100644 --- a/trunk/fs/fuse/fuse_i.h +++ b/trunk/fs/fuse/fuse_i.h @@ -404,9 +404,6 @@ struct fuse_conn { /** Is bmap not implemented by fs? */ unsigned no_bmap : 1; - /** Do multi-page cached writes */ - unsigned big_writes : 1; - /** The number of requests waiting for completion */ atomic_t num_waiting; diff --git a/trunk/fs/fuse/inode.c b/trunk/fs/fuse/inode.c index fb77e0962132..79b615873838 100644 --- a/trunk/fs/fuse/inode.c +++ b/trunk/fs/fuse/inode.c @@ -576,8 +576,6 @@ static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req) fc->no_lock = 1; if (arg->flags & FUSE_ATOMIC_O_TRUNC) fc->atomic_o_trunc = 1; - if (arg->flags & FUSE_BIG_WRITES) - fc->big_writes = 1; } else { ra_pages = fc->max_read / PAGE_CACHE_SIZE; fc->no_lock = 1; @@ -601,8 +599,7 @@ static void fuse_send_init(struct fuse_conn *fc, struct fuse_req *req) arg->major = FUSE_KERNEL_VERSION; arg->minor = FUSE_KERNEL_MINOR_VERSION; arg->max_readahead = fc->bdi.ra_pages * PAGE_CACHE_SIZE; - arg->flags |= FUSE_ASYNC_READ | FUSE_POSIX_LOCKS | FUSE_ATOMIC_O_TRUNC | - FUSE_BIG_WRITES; + arg->flags |= FUSE_ASYNC_READ | FUSE_POSIX_LOCKS | FUSE_ATOMIC_O_TRUNC; req->in.h.opcode = FUSE_INIT; req->in.numargs = 1; req->in.args[0].size = sizeof(*arg); diff --git a/trunk/fs/hfsplus/inode.c b/trunk/fs/hfsplus/inode.c index 67e1c8b467c4..d53b2af91c25 100644 --- a/trunk/fs/hfsplus/inode.c +++ b/trunk/fs/hfsplus/inode.c @@ -65,8 +65,6 @@ static int hfsplus_releasepage(struct page *page, gfp_t mask) BUG(); return 0; } - if (!tree) - return 0; if (tree->node_size >= PAGE_CACHE_SIZE) { nidx = page->index >> (tree->node_size_shift - PAGE_CACHE_SHIFT); spin_lock(&tree->hash_lock); diff --git a/trunk/fs/hppfs/Makefile b/trunk/fs/hppfs/Makefile index 8a1f50344368..6890433f7595 100644 --- a/trunk/fs/hppfs/Makefile +++ b/trunk/fs/hppfs/Makefile @@ -1,9 +1,9 @@ # -# Copyright (C) 2002 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com) +# Copyright (C) 2002, 2003 Jeff Dike (jdike@karaya.com) # Licensed under the GPL # -hppfs-objs := hppfs.o +hppfs-objs := hppfs_kern.o obj-y = -obj-$(CONFIG_HPPFS) += $(hppfs-objs) +obj-$(CONFIG_HPPFS) += hppfs.o diff --git a/trunk/fs/hppfs/hppfs.c b/trunk/fs/hppfs/hppfs_kern.c similarity index 92% rename from trunk/fs/hppfs/hppfs.c rename to trunk/fs/hppfs/hppfs_kern.c index 65077aa90f0a..8601d8ef3b55 100644 --- a/trunk/fs/hppfs/hppfs.c +++ b/trunk/fs/hppfs/hppfs_kern.c @@ -33,7 +33,7 @@ struct hppfs_private { }; struct hppfs_inode_info { - struct dentry *proc_dentry; + struct dentry *proc_dentry; struct inode vfs_inode; }; @@ -52,7 +52,7 @@ static int is_pid(struct dentry *dentry) int i; sb = dentry->d_sb; - if (dentry->d_parent != sb->s_root) + if ((sb->s_op != &hppfs_sbops) || (dentry->d_parent != sb->s_root)) return 0; for (i = 0; i < dentry->d_name.len; i++) { @@ -136,7 +136,7 @@ static int file_removed(struct dentry *dentry, const char *file) } static struct dentry *hppfs_lookup(struct inode *ino, struct dentry *dentry, - struct nameidata *nd) + struct nameidata *nd) { struct dentry *proc_dentry, *new, *parent; struct inode *inode; @@ -254,8 +254,6 @@ static ssize_t hppfs_read(struct file *file, char __user *buf, size_t count, int err; if (hppfs->contents != NULL) { - int rem; - if (*ppos >= hppfs->len) return 0; @@ -269,10 +267,8 @@ static ssize_t hppfs_read(struct file *file, char __user *buf, size_t count, if (off + count > hppfs->len) count = hppfs->len - off; - rem = copy_to_user(buf, &data->contents[off], count); - *ppos += count - rem; - if (rem > 0) - return -EFAULT; + copy_to_user(buf, &data->contents[off], count); + *ppos += count; } else if (hppfs->host_fd != -1) { err = os_seek_file(hppfs->host_fd, *ppos); if (err) { @@ -289,15 +285,21 @@ static ssize_t hppfs_read(struct file *file, char __user *buf, size_t count, return count; } -static ssize_t hppfs_write(struct file *file, const char __user *buf, - size_t len, loff_t *ppos) +static ssize_t hppfs_write(struct file *file, const char __user *buf, size_t len, + loff_t *ppos) { struct hppfs_private *data = file->private_data; struct file *proc_file = data->proc_file; ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *); + int err; write = proc_file->f_path.dentry->d_inode->i_fop->write; - return (*write)(proc_file, buf, len, ppos); + + proc_file->f_pos = file->f_pos; + err = (*write)(proc_file, buf, len, &proc_file->f_pos); + file->f_pos = proc_file->f_pos; + + return err; } static int open_host_sock(char *host_file, int *filter_out) @@ -355,7 +357,7 @@ static struct hppfs_data *hppfs_get_data(int fd, int filter, if (filter) { while ((n = read_proc(proc_file, data->contents, - sizeof(data->contents), NULL, 0)) > 0) + sizeof(data->contents), NULL, 0)) > 0) os_write_file(fd, data->contents, n); err = os_shutdown_socket(fd, 0, 1); if (err) { @@ -427,8 +429,8 @@ static int file_mode(int fmode) static int hppfs_open(struct inode *inode, struct file *file) { struct hppfs_private *data; - struct vfsmount *proc_mnt; struct dentry *proc_dentry; + struct vfsmount *proc_mnt; char *host_file; int err, fd, type, filter; @@ -490,8 +492,8 @@ static int hppfs_open(struct inode *inode, struct file *file) static int hppfs_dir_open(struct inode *inode, struct file *file) { struct hppfs_private *data; - struct vfsmount *proc_mnt; struct dentry *proc_dentry; + struct vfsmount *proc_mnt; int err; err = -ENOMEM; @@ -618,9 +620,6 @@ static struct inode *hppfs_alloc_inode(struct super_block *sb) void hppfs_delete_inode(struct inode *ino) { - dput(HPPFS_I(ino)->proc_dentry); - mntput(ino->i_sb->s_fs_info); - clear_inode(ino); } @@ -629,46 +628,69 @@ static void hppfs_destroy_inode(struct inode *inode) kfree(HPPFS_I(inode)); } +static void hppfs_put_super(struct super_block *sb) +{ + mntput(sb->s_fs_info); +} + static const struct super_operations hppfs_sbops = { .alloc_inode = hppfs_alloc_inode, .destroy_inode = hppfs_destroy_inode, .delete_inode = hppfs_delete_inode, .statfs = hppfs_statfs, + .put_super = hppfs_put_super, }; static int hppfs_readlink(struct dentry *dentry, char __user *buffer, int buflen) { + struct file *proc_file; struct dentry *proc_dentry; + struct vfsmount *proc_mnt; + int ret; proc_dentry = HPPFS_I(dentry->d_inode)->proc_dentry; - return proc_dentry->d_inode->i_op->readlink(proc_dentry, buffer, - buflen); + proc_mnt = dentry->d_sb->s_fs_info; + + proc_file = dentry_open(dget(proc_dentry), mntget(proc_mnt), O_RDONLY); + if (IS_ERR(proc_file)) + return PTR_ERR(proc_file); + + ret = proc_dentry->d_inode->i_op->readlink(proc_dentry, buffer, buflen); + + fput(proc_file); + + return ret; } -static void *hppfs_follow_link(struct dentry *dentry, struct nameidata *nd) +static void* hppfs_follow_link(struct dentry *dentry, struct nameidata *nd) { + struct file *proc_file; struct dentry *proc_dentry; + struct vfsmount *proc_mnt; + void *ret; proc_dentry = HPPFS_I(dentry->d_inode)->proc_dentry; + proc_mnt = dentry->d_sb->s_fs_info; - return proc_dentry->d_inode->i_op->follow_link(proc_dentry, nd); -} + proc_file = dentry_open(dget(proc_dentry), mntget(proc_mnt), O_RDONLY); + if (IS_ERR(proc_file)) + return proc_file; -int hppfs_permission(struct inode *inode, int mask, struct nameidata *nd) -{ - return generic_permission(inode, mask, NULL); + ret = proc_dentry->d_inode->i_op->follow_link(proc_dentry, nd); + + fput(proc_file); + + return ret; } static const struct inode_operations hppfs_dir_iops = { .lookup = hppfs_lookup, - .permission = hppfs_permission, }; static const struct inode_operations hppfs_link_iops = { .readlink = hppfs_readlink, .follow_link = hppfs_follow_link, - .permission = hppfs_permission, }; static struct inode *get_inode(struct super_block *sb, struct dentry *dentry) @@ -690,7 +712,7 @@ static struct inode *get_inode(struct super_block *sb, struct dentry *dentry) inode->i_fop = &hppfs_file_fops; } - HPPFS_I(inode)->proc_dentry = dget(dentry); + HPPFS_I(inode)->proc_dentry = dentry; inode->i_uid = proc_ino->i_uid; inode->i_gid = proc_ino->i_gid; @@ -703,7 +725,7 @@ static struct inode *get_inode(struct super_block *sb, struct dentry *dentry) inode->i_size = proc_ino->i_size; inode->i_blocks = proc_ino->i_blocks; - return inode; + return 0; } static int hppfs_fill_super(struct super_block *sb, void *d, int silent) diff --git a/trunk/fs/jbd2/journal.c b/trunk/fs/jbd2/journal.c index 2e24567c4a79..53632e3e8457 100644 --- a/trunk/fs/jbd2/journal.c +++ b/trunk/fs/jbd2/journal.c @@ -901,7 +901,7 @@ static void jbd2_stats_proc_init(journal_t *journal) { char name[BDEVNAME_SIZE]; - bdevname(journal->j_dev, name); + snprintf(name, sizeof(name) - 1, "%s", bdevname(journal->j_dev, name)); journal->j_proc_entry = proc_mkdir(name, proc_jbd2_stats); if (journal->j_proc_entry) { proc_create_data("history", S_IRUGO, journal->j_proc_entry, @@ -915,7 +915,7 @@ static void jbd2_stats_proc_exit(journal_t *journal) { char name[BDEVNAME_SIZE]; - bdevname(journal->j_dev, name); + snprintf(name, sizeof(name) - 1, "%s", bdevname(journal->j_dev, name)); remove_proc_entry("info", journal->j_proc_entry); remove_proc_entry("history", journal->j_proc_entry); remove_proc_entry(name, proc_jbd2_stats); diff --git a/trunk/fs/proc/array.c b/trunk/fs/proc/array.c index 9e3b8c33c24b..dca997a93bff 100644 --- a/trunk/fs/proc/array.c +++ b/trunk/fs/proc/array.c @@ -298,7 +298,6 @@ static inline void task_cap(struct seq_file *m, struct task_struct *p) render_cap_t(m, "CapInh:\t", &p->cap_inheritable); render_cap_t(m, "CapPrm:\t", &p->cap_permitted); render_cap_t(m, "CapEff:\t", &p->cap_effective); - render_cap_t(m, "CapBnd:\t", &p->cap_bset); } static inline void task_context_switch_counts(struct seq_file *m, diff --git a/trunk/fs/ufs/ufs.h b/trunk/fs/ufs/ufs.h index 11c035168ea6..244a1aaa940e 100644 --- a/trunk/fs/ufs/ufs.h +++ b/trunk/fs/ufs/ufs.h @@ -107,6 +107,7 @@ extern struct inode * ufs_new_inode (struct inode *, int); /* inode.c */ extern struct inode *ufs_iget(struct super_block *, unsigned long); +extern void ufs_put_inode (struct inode *); extern int ufs_write_inode (struct inode *, int); extern int ufs_sync_inode (struct inode *); extern void ufs_delete_inode (struct inode *); diff --git a/trunk/include/asm-mips/bitops.h b/trunk/include/asm-mips/bitops.h index 642724734eba..c2bd126c3b4e 100644 --- a/trunk/include/asm-mips/bitops.h +++ b/trunk/include/asm-mips/bitops.h @@ -558,13 +558,11 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long * __clear_bit(nr, addr); } -#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) - /* * Return the bit position (0..63) of the most significant 1 bit in a word * Returns -1 if no 1 bit exists */ -static inline unsigned long __fls(unsigned long x) +static inline int __ilog2(unsigned long x) { int lz; @@ -593,6 +591,13 @@ static inline unsigned long __fls(unsigned long x) return 63 - lz; } +static inline unsigned long __fls(unsigned long x) +{ + return __ilog2(x); +} + +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) + /* * __ffs - find first bit in word. * @word: The word to search @@ -602,7 +607,7 @@ static inline unsigned long __fls(unsigned long x) */ static inline unsigned long __ffs(unsigned long word) { - return __fls(word & -word); + return __ilog2(word & -word); } /* @@ -649,7 +654,6 @@ static inline int ffs(int word) #else #include -#include #include #include #include diff --git a/trunk/include/asm-mips/compiler.h b/trunk/include/asm-mips/compiler.h index 71f5c5cfc58a..aa6b876bbd78 100644 --- a/trunk/include/asm-mips/compiler.h +++ b/trunk/include/asm-mips/compiler.h @@ -9,10 +9,10 @@ #define _ASM_COMPILER_H #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) -#define GCC_IMM_ASM() "n" +#define GCC_IMM_ASM "n" #define GCC_REG_ACCUM "$0" #else -#define GCC_IMM_ASM() "rn" +#define GCC_IMM_ASM "rn" #define GCC_REG_ACCUM "accum" #endif diff --git a/trunk/include/asm-mips/mach-au1x00/au1000.h b/trunk/include/asm-mips/mach-au1x00/au1000.h index 363a14ee0ae5..a05555165d05 100644 --- a/trunk/include/asm-mips/mach-au1x00/au1000.h +++ b/trunk/include/asm-mips/mach-au1x00/au1000.h @@ -40,8 +40,8 @@ #include #include -#include -#include +#include +#include /* cpu pipeline flush */ void static inline au_sync(void) @@ -63,32 +63,32 @@ void static inline au_sync_delay(int ms) void static inline au_writeb(u8 val, unsigned long reg) { - *(volatile u8 *)reg = val; + *(volatile u8 *)(reg) = val; } void static inline au_writew(u16 val, unsigned long reg) { - *(volatile u16 *)reg = val; + *(volatile u16 *)(reg) = val; } void static inline au_writel(u32 val, unsigned long reg) { - *(volatile u32 *)reg = val; + *(volatile u32 *)(reg) = val; } static inline u8 au_readb(unsigned long reg) { - return *(volatile u8 *)reg; + return (*(volatile u8 *)reg); } static inline u16 au_readw(unsigned long reg) { - return *(volatile u16 *)reg; + return (*(volatile u16 *)reg); } static inline u32 au_readl(unsigned long reg) { - return *(volatile u32 *)reg; + return (*(volatile u32 *)reg); } @@ -117,77 +117,76 @@ extern struct au1xxx_irqmap au1xxx_irq_map[]; #endif /* !defined (_LANGUAGE_ASSEMBLY) */ /* - * SDRAM register offsets + * SDRAM Register Offsets */ -#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || \ - defined(CONFIG_SOC_AU1100) -#define MEM_SDMODE0 0x0000 -#define MEM_SDMODE1 0x0004 -#define MEM_SDMODE2 0x0008 -#define MEM_SDADDR0 0x000C -#define MEM_SDADDR1 0x0010 -#define MEM_SDADDR2 0x0014 -#define MEM_SDREFCFG 0x0018 -#define MEM_SDPRECMD 0x001C -#define MEM_SDAUTOREF 0x0020 -#define MEM_SDWRMD0 0x0024 -#define MEM_SDWRMD1 0x0028 -#define MEM_SDWRMD2 0x002C -#define MEM_SDSLEEP 0x0030 -#define MEM_SDSMCKE 0x0034 +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100) +#define MEM_SDMODE0 (0x0000) +#define MEM_SDMODE1 (0x0004) +#define MEM_SDMODE2 (0x0008) +#define MEM_SDADDR0 (0x000C) +#define MEM_SDADDR1 (0x0010) +#define MEM_SDADDR2 (0x0014) +#define MEM_SDREFCFG (0x0018) +#define MEM_SDPRECMD (0x001C) +#define MEM_SDAUTOREF (0x0020) +#define MEM_SDWRMD0 (0x0024) +#define MEM_SDWRMD1 (0x0028) +#define MEM_SDWRMD2 (0x002C) +#define MEM_SDSLEEP (0x0030) +#define MEM_SDSMCKE (0x0034) /* * MEM_SDMODE register content definitions */ -#define MEM_SDMODE_F (1 << 22) -#define MEM_SDMODE_SR (1 << 21) -#define MEM_SDMODE_BS (1 << 20) -#define MEM_SDMODE_RS (3 << 18) -#define MEM_SDMODE_CS (7 << 15) -#define MEM_SDMODE_TRAS (15 << 11) -#define MEM_SDMODE_TMRD (3 << 9) -#define MEM_SDMODE_TWR (3 << 7) -#define MEM_SDMODE_TRP (3 << 5) -#define MEM_SDMODE_TRCD (3 << 3) -#define MEM_SDMODE_TCL (7 << 0) - -#define MEM_SDMODE_BS_2Bank (0 << 20) -#define MEM_SDMODE_BS_4Bank (1 << 20) -#define MEM_SDMODE_RS_11Row (0 << 18) -#define MEM_SDMODE_RS_12Row (1 << 18) -#define MEM_SDMODE_RS_13Row (2 << 18) -#define MEM_SDMODE_RS_N(N) ((N) << 18) -#define MEM_SDMODE_CS_7Col (0 << 15) -#define MEM_SDMODE_CS_8Col (1 << 15) -#define MEM_SDMODE_CS_9Col (2 << 15) -#define MEM_SDMODE_CS_10Col (3 << 15) -#define MEM_SDMODE_CS_11Col (4 << 15) -#define MEM_SDMODE_CS_N(N) ((N) << 15) -#define MEM_SDMODE_TRAS_N(N) ((N) << 11) -#define MEM_SDMODE_TMRD_N(N) ((N) << 9) -#define MEM_SDMODE_TWR_N(N) ((N) << 7) -#define MEM_SDMODE_TRP_N(N) ((N) << 5) -#define MEM_SDMODE_TRCD_N(N) ((N) << 3) -#define MEM_SDMODE_TCL_N(N) ((N) << 0) +#define MEM_SDMODE_F (1<<22) +#define MEM_SDMODE_SR (1<<21) +#define MEM_SDMODE_BS (1<<20) +#define MEM_SDMODE_RS (3<<18) +#define MEM_SDMODE_CS (7<<15) +#define MEM_SDMODE_TRAS (15<<11) +#define MEM_SDMODE_TMRD (3<<9) +#define MEM_SDMODE_TWR (3<<7) +#define MEM_SDMODE_TRP (3<<5) +#define MEM_SDMODE_TRCD (3<<3) +#define MEM_SDMODE_TCL (7<<0) + +#define MEM_SDMODE_BS_2Bank (0<<20) +#define MEM_SDMODE_BS_4Bank (1<<20) +#define MEM_SDMODE_RS_11Row (0<<18) +#define MEM_SDMODE_RS_12Row (1<<18) +#define MEM_SDMODE_RS_13Row (2<<18) +#define MEM_SDMODE_RS_N(N) ((N)<<18) +#define MEM_SDMODE_CS_7Col (0<<15) +#define MEM_SDMODE_CS_8Col (1<<15) +#define MEM_SDMODE_CS_9Col (2<<15) +#define MEM_SDMODE_CS_10Col (3<<15) +#define MEM_SDMODE_CS_11Col (4<<15) +#define MEM_SDMODE_CS_N(N) ((N)<<15) +#define MEM_SDMODE_TRAS_N(N) ((N)<<11) +#define MEM_SDMODE_TMRD_N(N) ((N)<<9) +#define MEM_SDMODE_TWR_N(N) ((N)<<7) +#define MEM_SDMODE_TRP_N(N) ((N)<<5) +#define MEM_SDMODE_TRCD_N(N) ((N)<<3) +#define MEM_SDMODE_TCL_N(N) ((N)<<0) /* * MEM_SDADDR register contents definitions */ -#define MEM_SDADDR_E (1 << 20) -#define MEM_SDADDR_CSBA (0x03FF << 10) -#define MEM_SDADDR_CSMASK (0x03FF << 0) -#define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12) -#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF << 22) >> 22) +#define MEM_SDADDR_E (1<<20) +#define MEM_SDADDR_CSBA (0x03FF<<10) +#define MEM_SDADDR_CSMASK (0x03FF<<0) +#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12) +#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22) /* * MEM_SDREFCFG register content definitions */ -#define MEM_SDREFCFG_TRC (15 << 28) -#define MEM_SDREFCFG_TRPM (3 << 26) -#define MEM_SDREFCFG_E (1 << 25) -#define MEM_SDREFCFG_RE (0x1ffffff << 0) -#define MEM_SDREFCFG_TRC_N(N) ((N) << MEM_SDREFCFG_TRC) -#define MEM_SDREFCFG_TRPM_N(N) ((N) << MEM_SDREFCFG_TRPM) +#define MEM_SDREFCFG_TRC (15<<28) +#define MEM_SDREFCFG_TRPM (3<<26) +#define MEM_SDREFCFG_E (1<<25) +#define MEM_SDREFCFG_RE (0x1ffffff<<0) +#define MEM_SDREFCFG_TRC_N(N) ((N)<> 2) & 0x3) -#define MAC_TX_BUFF0_LEN 0x8 -#define MAC_TX_BUFF1_STATUS 0x10 -#define MAC_TX_BUFF1_ADDR 0x14 -#define MAC_TX_BUFF1_LEN 0x18 -#define MAC_TX_BUFF2_STATUS 0x20 -#define MAC_TX_BUFF2_ADDR 0x24 -#define MAC_TX_BUFF2_LEN 0x28 -#define MAC_TX_BUFF3_STATUS 0x30 -#define MAC_TX_BUFF3_ADDR 0x34 -#define MAC_TX_BUFF3_LEN 0x38 - -#define MAC0_RX_DMA_ADDR 0xB4004100 -#define MAC1_RX_DMA_ADDR 0xB4004300 +#define MAC_TX_BUFF0_STATUS 0x0 +# define TX_FRAME_ABORTED (1<<0) +# define TX_JAB_TIMEOUT (1<<1) +# define TX_NO_CARRIER (1<<2) +# define TX_LOSS_CARRIER (1<<3) +# define TX_EXC_DEF (1<<4) +# define TX_LATE_COLL_ABORT (1<<5) +# define TX_EXC_COLL (1<<6) +# define TX_UNDERRUN (1<<7) +# define TX_DEFERRED (1<<8) +# define TX_LATE_COLL (1<<9) +# define TX_COLL_CNT_MASK (0xF<<10) +# define TX_PKT_RETRY (1<<31) +#define MAC_TX_BUFF0_ADDR 0x4 +# define TX_DMA_ENABLE (1<<0) +# define TX_T_DONE (1<<1) +# define TX_GET_DMA_BUFFER(X) (((X)>>2)&0x3) +#define MAC_TX_BUFF0_LEN 0x8 +#define MAC_TX_BUFF1_STATUS 0x10 +#define MAC_TX_BUFF1_ADDR 0x14 +#define MAC_TX_BUFF1_LEN 0x18 +#define MAC_TX_BUFF2_STATUS 0x20 +#define MAC_TX_BUFF2_ADDR 0x24 +#define MAC_TX_BUFF2_LEN 0x28 +#define MAC_TX_BUFF3_STATUS 0x30 +#define MAC_TX_BUFF3_ADDR 0x34 +#define MAC_TX_BUFF3_LEN 0x38 + +#define MAC0_RX_DMA_ADDR 0xB4004100 +#define MAC1_RX_DMA_ADDR 0xB4004300 /* offsets from MAC_RX_RING_ADDR */ -#define MAC_RX_BUFF0_STATUS 0x0 -# define RX_FRAME_LEN_MASK 0x3fff -# define RX_WDOG_TIMER (1 << 14) -# define RX_RUNT (1 << 15) -# define RX_OVERLEN (1 << 16) -# define RX_COLL (1 << 17) -# define RX_ETHER (1 << 18) -# define RX_MII_ERROR (1 << 19) -# define RX_DRIBBLING (1 << 20) -# define RX_CRC_ERROR (1 << 21) -# define RX_VLAN1 (1 << 22) -# define RX_VLAN2 (1 << 23) -# define RX_LEN_ERROR (1 << 24) -# define RX_CNTRL_FRAME (1 << 25) -# define RX_U_CNTRL_FRAME (1 << 26) -# define RX_MCAST_FRAME (1 << 27) -# define RX_BCAST_FRAME (1 << 28) -# define RX_FILTER_FAIL (1 << 29) -# define RX_PACKET_FILTER (1 << 30) -# define RX_MISSED_FRAME (1 << 31) +#define MAC_RX_BUFF0_STATUS 0x0 +# define RX_FRAME_LEN_MASK 0x3fff +# define RX_WDOG_TIMER (1<<14) +# define RX_RUNT (1<<15) +# define RX_OVERLEN (1<<16) +# define RX_COLL (1<<17) +# define RX_ETHER (1<<18) +# define RX_MII_ERROR (1<<19) +# define RX_DRIBBLING (1<<20) +# define RX_CRC_ERROR (1<<21) +# define RX_VLAN1 (1<<22) +# define RX_VLAN2 (1<<23) +# define RX_LEN_ERROR (1<<24) +# define RX_CNTRL_FRAME (1<<25) +# define RX_U_CNTRL_FRAME (1<<26) +# define RX_MCAST_FRAME (1<<27) +# define RX_BCAST_FRAME (1<<28) +# define RX_FILTER_FAIL (1<<29) +# define RX_PACKET_FILTER (1<<30) +# define RX_MISSED_FRAME (1<<31) # define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN | \ - RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \ - RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME) -#define MAC_RX_BUFF0_ADDR 0x4 -# define RX_DMA_ENABLE (1 << 0) -# define RX_T_DONE (1 << 1) -# define RX_GET_DMA_BUFFER(X) (((X) >> 2) & 0x3) -# define RX_SET_BUFF_ADDR(X) ((X) & 0xffffffc0) -#define MAC_RX_BUFF1_STATUS 0x10 -#define MAC_RX_BUFF1_ADDR 0x14 -#define MAC_RX_BUFF2_STATUS 0x20 -#define MAC_RX_BUFF2_ADDR 0x24 -#define MAC_RX_BUFF3_STATUS 0x30 -#define MAC_RX_BUFF3_ADDR 0x34 + RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \ + RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME) +#define MAC_RX_BUFF0_ADDR 0x4 +# define RX_DMA_ENABLE (1<<0) +# define RX_T_DONE (1<<1) +# define RX_GET_DMA_BUFFER(X) (((X)>>2)&0x3) +# define RX_SET_BUFF_ADDR(X) ((X)&0xffffffc0) +#define MAC_RX_BUFF1_STATUS 0x10 +#define MAC_RX_BUFF1_ADDR 0x14 +#define MAC_RX_BUFF2_STATUS 0x20 +#define MAC_RX_BUFF2_ADDR 0x24 +#define MAC_RX_BUFF3_STATUS 0x30 +#define MAC_RX_BUFF3_ADDR 0x34 + /* UARTS 0-3 */ -#define UART_BASE UART0_ADDR +#define UART_BASE UART0_ADDR #ifdef CONFIG_SOC_AU1200 -#define UART_DEBUG_BASE UART1_ADDR +#define UART_DEBUG_BASE UART1_ADDR #else -#define UART_DEBUG_BASE UART3_ADDR +#define UART_DEBUG_BASE UART3_ADDR #endif #define UART_RX 0 /* Receive buffer */ @@ -1293,337 +1294,341 @@ enum soc_au1200_ints { #define UART_MSR_DCTS 0x01 /* Delta CTS */ #define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */ + + /* SSIO */ -#define SSI0_STATUS 0xB1600000 -# define SSI_STATUS_BF (1 << 4) -# define SSI_STATUS_OF (1 << 3) -# define SSI_STATUS_UF (1 << 2) -# define SSI_STATUS_D (1 << 1) -# define SSI_STATUS_B (1 << 0) -#define SSI0_INT 0xB1600004 -# define SSI_INT_OI (1 << 3) -# define SSI_INT_UI (1 << 2) -# define SSI_INT_DI (1 << 1) -#define SSI0_INT_ENABLE 0xB1600008 -# define SSI_INTE_OIE (1 << 3) -# define SSI_INTE_UIE (1 << 2) -# define SSI_INTE_DIE (1 << 1) -#define SSI0_CONFIG 0xB1600020 -# define SSI_CONFIG_AO (1 << 24) -# define SSI_CONFIG_DO (1 << 23) -# define SSI_CONFIG_ALEN_BIT 20 -# define SSI_CONFIG_ALEN_MASK (0x7 << 20) -# define SSI_CONFIG_DLEN_BIT 16 -# define SSI_CONFIG_DLEN_MASK (0x7 << 16) -# define SSI_CONFIG_DD (1 << 11) -# define SSI_CONFIG_AD (1 << 10) -# define SSI_CONFIG_BM_BIT 8 -# define SSI_CONFIG_BM_MASK (0x3 << 8) -# define SSI_CONFIG_CE (1 << 7) -# define SSI_CONFIG_DP (1 << 6) -# define SSI_CONFIG_DL (1 << 5) -# define SSI_CONFIG_EP (1 << 4) -#define SSI0_ADATA 0xB1600024 -# define SSI_AD_D (1 << 24) -# define SSI_AD_ADDR_BIT 16 -# define SSI_AD_ADDR_MASK (0xff << 16) -# define SSI_AD_DATA_BIT 0 -# define SSI_AD_DATA_MASK (0xfff << 0) -#define SSI0_CLKDIV 0xB1600028 -#define SSI0_CONTROL 0xB1600100 -# define SSI_CONTROL_CD (1 << 1) -# define SSI_CONTROL_E (1 << 0) +#define SSI0_STATUS 0xB1600000 +# define SSI_STATUS_BF (1<<4) +# define SSI_STATUS_OF (1<<3) +# define SSI_STATUS_UF (1<<2) +# define SSI_STATUS_D (1<<1) +# define SSI_STATUS_B (1<<0) +#define SSI0_INT 0xB1600004 +# define SSI_INT_OI (1<<3) +# define SSI_INT_UI (1<<2) +# define SSI_INT_DI (1<<1) +#define SSI0_INT_ENABLE 0xB1600008 +# define SSI_INTE_OIE (1<<3) +# define SSI_INTE_UIE (1<<2) +# define SSI_INTE_DIE (1<<1) +#define SSI0_CONFIG 0xB1600020 +# define SSI_CONFIG_AO (1<<24) +# define SSI_CONFIG_DO (1<<23) +# define SSI_CONFIG_ALEN_BIT 20 +# define SSI_CONFIG_ALEN_MASK (0x7<<20) +# define SSI_CONFIG_DLEN_BIT 16 +# define SSI_CONFIG_DLEN_MASK (0x7<<16) +# define SSI_CONFIG_DD (1<<11) +# define SSI_CONFIG_AD (1<<10) +# define SSI_CONFIG_BM_BIT 8 +# define SSI_CONFIG_BM_MASK (0x3<<8) +# define SSI_CONFIG_CE (1<<7) +# define SSI_CONFIG_DP (1<<6) +# define SSI_CONFIG_DL (1<<5) +# define SSI_CONFIG_EP (1<<4) +#define SSI0_ADATA 0xB1600024 +# define SSI_AD_D (1<<24) +# define SSI_AD_ADDR_BIT 16 +# define SSI_AD_ADDR_MASK (0xff<<16) +# define SSI_AD_DATA_BIT 0 +# define SSI_AD_DATA_MASK (0xfff<<0) +#define SSI0_CLKDIV 0xB1600028 +#define SSI0_CONTROL 0xB1600100 +# define SSI_CONTROL_CD (1<<1) +# define SSI_CONTROL_E (1<<0) /* SSI1 */ -#define SSI1_STATUS 0xB1680000 -#define SSI1_INT 0xB1680004 -#define SSI1_INT_ENABLE 0xB1680008 -#define SSI1_CONFIG 0xB1680020 -#define SSI1_ADATA 0xB1680024 -#define SSI1_CLKDIV 0xB1680028 -#define SSI1_ENABLE 0xB1680100 +#define SSI1_STATUS 0xB1680000 +#define SSI1_INT 0xB1680004 +#define SSI1_INT_ENABLE 0xB1680008 +#define SSI1_CONFIG 0xB1680020 +#define SSI1_ADATA 0xB1680024 +#define SSI1_CLKDIV 0xB1680028 +#define SSI1_ENABLE 0xB1680100 /* * Register content definitions */ -#define SSI_STATUS_BF (1 << 4) -#define SSI_STATUS_OF (1 << 3) -#define SSI_STATUS_UF (1 << 2) -#define SSI_STATUS_D (1 << 1) -#define SSI_STATUS_B (1 << 0) +#define SSI_STATUS_BF (1<<4) +#define SSI_STATUS_OF (1<<3) +#define SSI_STATUS_UF (1<<2) +#define SSI_STATUS_D (1<<1) +#define SSI_STATUS_B (1<<0) /* SSI_INT */ -#define SSI_INT_OI (1 << 3) -#define SSI_INT_UI (1 << 2) -#define SSI_INT_DI (1 << 1) +#define SSI_INT_OI (1<<3) +#define SSI_INT_UI (1<<2) +#define SSI_INT_DI (1<<1) /* SSI_INTEN */ -#define SSI_INTEN_OIE (1 << 3) -#define SSI_INTEN_UIE (1 << 2) -#define SSI_INTEN_DIE (1 << 1) - -#define SSI_CONFIG_AO (1 << 24) -#define SSI_CONFIG_DO (1 << 23) -#define SSI_CONFIG_ALEN (7 << 20) -#define SSI_CONFIG_DLEN (15 << 16) -#define SSI_CONFIG_DD (1 << 11) -#define SSI_CONFIG_AD (1 << 10) -#define SSI_CONFIG_BM (3 << 8) -#define SSI_CONFIG_CE (1 << 7) -#define SSI_CONFIG_DP (1 << 6) -#define SSI_CONFIG_DL (1 << 5) -#define SSI_CONFIG_EP (1 << 4) -#define SSI_CONFIG_ALEN_N(N) ((N-1) << 20) -#define SSI_CONFIG_DLEN_N(N) ((N-1) << 16) -#define SSI_CONFIG_BM_HI (0 << 8) -#define SSI_CONFIG_BM_LO (1 << 8) -#define SSI_CONFIG_BM_CY (2 << 8) - -#define SSI_ADATA_D (1 << 24) -#define SSI_ADATA_ADDR (0xFF << 16) -#define SSI_ADATA_DATA 0x0FFF -#define SSI_ADATA_ADDR_N(N) (N << 16) - -#define SSI_ENABLE_CD (1 << 1) -#define SSI_ENABLE_E (1 << 0) +#define SSI_INTEN_OIE (1<<3) +#define SSI_INTEN_UIE (1<<2) +#define SSI_INTEN_DIE (1<<1) + +#define SSI_CONFIG_AO (1<<24) +#define SSI_CONFIG_DO (1<<23) +#define SSI_CONFIG_ALEN (7<<20) +#define SSI_CONFIG_DLEN (15<<16) +#define SSI_CONFIG_DD (1<<11) +#define SSI_CONFIG_AD (1<<10) +#define SSI_CONFIG_BM (3<<8) +#define SSI_CONFIG_CE (1<<7) +#define SSI_CONFIG_DP (1<<6) +#define SSI_CONFIG_DL (1<<5) +#define SSI_CONFIG_EP (1<<4) +#define SSI_CONFIG_ALEN_N(N) ((N-1)<<20) +#define SSI_CONFIG_DLEN_N(N) ((N-1)<<16) +#define SSI_CONFIG_BM_HI (0<<8) +#define SSI_CONFIG_BM_LO (1<<8) +#define SSI_CONFIG_BM_CY (2<<8) + +#define SSI_ADATA_D (1<<24) +#define SSI_ADATA_ADDR (0xFF<<16) +#define SSI_ADATA_DATA (0x0FFF) +#define SSI_ADATA_ADDR_N(N) (N<<16) + +#define SSI_ENABLE_CD (1<<1) +#define SSI_ENABLE_E (1<<0) + /* IrDA Controller */ -#define IRDA_BASE 0xB0300000 -#define IR_RING_PTR_STATUS (IRDA_BASE + 0x00) -#define IR_RING_BASE_ADDR_H (IRDA_BASE + 0x04) -#define IR_RING_BASE_ADDR_L (IRDA_BASE + 0x08) -#define IR_RING_SIZE (IRDA_BASE + 0x0C) -#define IR_RING_PROMPT (IRDA_BASE + 0x10) -#define IR_RING_ADDR_CMPR (IRDA_BASE + 0x14) -#define IR_INT_CLEAR (IRDA_BASE + 0x18) -#define IR_CONFIG_1 (IRDA_BASE + 0x20) -# define IR_RX_INVERT_LED (1 << 0) -# define IR_TX_INVERT_LED (1 << 1) -# define IR_ST (1 << 2) -# define IR_SF (1 << 3) -# define IR_SIR (1 << 4) -# define IR_MIR (1 << 5) -# define IR_FIR (1 << 6) -# define IR_16CRC (1 << 7) -# define IR_TD (1 << 8) -# define IR_RX_ALL (1 << 9) -# define IR_DMA_ENABLE (1 << 10) -# define IR_RX_ENABLE (1 << 11) -# define IR_TX_ENABLE (1 << 12) -# define IR_LOOPBACK (1 << 14) -# define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \ - IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC) -#define IR_SIR_FLAGS (IRDA_BASE + 0x24) -#define IR_ENABLE (IRDA_BASE + 0x28) -# define IR_RX_STATUS (1 << 9) -# define IR_TX_STATUS (1 << 10) -#define IR_READ_PHY_CONFIG (IRDA_BASE + 0x2C) -#define IR_WRITE_PHY_CONFIG (IRDA_BASE + 0x30) -#define IR_MAX_PKT_LEN (IRDA_BASE + 0x34) -#define IR_RX_BYTE_CNT (IRDA_BASE + 0x38) -#define IR_CONFIG_2 (IRDA_BASE + 0x3C) -# define IR_MODE_INV (1 << 0) -# define IR_ONE_PIN (1 << 1) -#define IR_INTERFACE_CONFIG (IRDA_BASE + 0x40) +#define IRDA_BASE 0xB0300000 +#define IR_RING_PTR_STATUS (IRDA_BASE+0x00) +#define IR_RING_BASE_ADDR_H (IRDA_BASE+0x04) +#define IR_RING_BASE_ADDR_L (IRDA_BASE+0x08) +#define IR_RING_SIZE (IRDA_BASE+0x0C) +#define IR_RING_PROMPT (IRDA_BASE+0x10) +#define IR_RING_ADDR_CMPR (IRDA_BASE+0x14) +#define IR_INT_CLEAR (IRDA_BASE+0x18) +#define IR_CONFIG_1 (IRDA_BASE+0x20) +# define IR_RX_INVERT_LED (1<<0) +# define IR_TX_INVERT_LED (1<<1) +# define IR_ST (1<<2) +# define IR_SF (1<<3) +# define IR_SIR (1<<4) +# define IR_MIR (1<<5) +# define IR_FIR (1<<6) +# define IR_16CRC (1<<7) +# define IR_TD (1<<8) +# define IR_RX_ALL (1<<9) +# define IR_DMA_ENABLE (1<<10) +# define IR_RX_ENABLE (1<<11) +# define IR_TX_ENABLE (1<<12) +# define IR_LOOPBACK (1<<14) +# define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \ + IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC) +#define IR_SIR_FLAGS (IRDA_BASE+0x24) +#define IR_ENABLE (IRDA_BASE+0x28) +# define IR_RX_STATUS (1<<9) +# define IR_TX_STATUS (1<<10) +#define IR_READ_PHY_CONFIG (IRDA_BASE+0x2C) +#define IR_WRITE_PHY_CONFIG (IRDA_BASE+0x30) +#define IR_MAX_PKT_LEN (IRDA_BASE+0x34) +#define IR_RX_BYTE_CNT (IRDA_BASE+0x38) +#define IR_CONFIG_2 (IRDA_BASE+0x3C) +# define IR_MODE_INV (1<<0) +# define IR_ONE_PIN (1<<1) +#define IR_INTERFACE_CONFIG (IRDA_BASE+0x40) /* GPIO */ -#define SYS_PINFUNC 0xB190002C -# define SYS_PF_USB (1 << 15) /* 2nd USB device/host */ -# define SYS_PF_U3 (1 << 14) /* GPIO23/U3TXD */ -# define SYS_PF_U2 (1 << 13) /* GPIO22/U2TXD */ -# define SYS_PF_U1 (1 << 12) /* GPIO21/U1TXD */ -# define SYS_PF_SRC (1 << 11) /* GPIO6/SROMCKE */ -# define SYS_PF_CK5 (1 << 10) /* GPIO3/CLK5 */ -# define SYS_PF_CK4 (1 << 9) /* GPIO2/CLK4 */ -# define SYS_PF_IRF (1 << 8) /* GPIO15/IRFIRSEL */ -# define SYS_PF_UR3 (1 << 7) /* GPIO[14:9]/UART3 */ -# define SYS_PF_I2D (1 << 6) /* GPIO8/I2SDI */ -# define SYS_PF_I2S (1 << 5) /* I2S/GPIO[29:31] */ -# define SYS_PF_NI2 (1 << 4) /* NI2/GPIO[24:28] */ -# define SYS_PF_U0 (1 << 3) /* U0TXD/GPIO20 */ -# define SYS_PF_RD (1 << 2) /* IRTXD/GPIO19 */ -# define SYS_PF_A97 (1 << 1) /* AC97/SSL1 */ -# define SYS_PF_S0 (1 << 0) /* SSI_0/GPIO[16:18] */ - -/* Au1100 only */ -# define SYS_PF_PC (1 << 18) /* PCMCIA/GPIO[207:204] */ -# define SYS_PF_LCD (1 << 17) /* extern lcd/GPIO[203:200] */ -# define SYS_PF_CS (1 << 16) /* EXTCLK0/32KHz to gpio2 */ -# define SYS_PF_EX0 (1 << 9) /* GPIO2/clock */ - -/* Au1550 only. Redefines lots of pins */ -# define SYS_PF_PSC2_MASK (7 << 17) -# define SYS_PF_PSC2_AC97 0 -# define SYS_PF_PSC2_SPI 0 -# define SYS_PF_PSC2_I2S (1 << 17) -# define SYS_PF_PSC2_SMBUS (3 << 17) -# define SYS_PF_PSC2_GPIO (7 << 17) -# define SYS_PF_PSC3_MASK (7 << 20) -# define SYS_PF_PSC3_AC97 0 -# define SYS_PF_PSC3_SPI 0 -# define SYS_PF_PSC3_I2S (1 << 20) -# define SYS_PF_PSC3_SMBUS (3 << 20) -# define SYS_PF_PSC3_GPIO (7 << 20) -# define SYS_PF_PSC1_S1 (1 << 1) -# define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) - -/* Au1200 only */ +#define SYS_PINFUNC 0xB190002C +# define SYS_PF_USB (1<<15) /* 2nd USB device/host */ +# define SYS_PF_U3 (1<<14) /* GPIO23/U3TXD */ +# define SYS_PF_U2 (1<<13) /* GPIO22/U2TXD */ +# define SYS_PF_U1 (1<<12) /* GPIO21/U1TXD */ +# define SYS_PF_SRC (1<<11) /* GPIO6/SROMCKE */ +# define SYS_PF_CK5 (1<<10) /* GPIO3/CLK5 */ +# define SYS_PF_CK4 (1<<9) /* GPIO2/CLK4 */ +# define SYS_PF_IRF (1<<8) /* GPIO15/IRFIRSEL */ +# define SYS_PF_UR3 (1<<7) /* GPIO[14:9]/UART3 */ +# define SYS_PF_I2D (1<<6) /* GPIO8/I2SDI */ +# define SYS_PF_I2S (1<<5) /* I2S/GPIO[29:31] */ +# define SYS_PF_NI2 (1<<4) /* NI2/GPIO[24:28] */ +# define SYS_PF_U0 (1<<3) /* U0TXD/GPIO20 */ +# define SYS_PF_RD (1<<2) /* IRTXD/GPIO19 */ +# define SYS_PF_A97 (1<<1) /* AC97/SSL1 */ +# define SYS_PF_S0 (1<<0) /* SSI_0/GPIO[16:18] */ + +/* Au1100 Only */ +# define SYS_PF_PC (1<<18) /* PCMCIA/GPIO[207:204] */ +# define SYS_PF_LCD (1<<17) /* extern lcd/GPIO[203:200] */ +# define SYS_PF_CS (1<<16) /* EXTCLK0/32khz to gpio2 */ +# define SYS_PF_EX0 (1<<9) /* gpio2/clock */ + +/* Au1550 Only. Redefines lots of pins */ +# define SYS_PF_PSC2_MASK (7 << 17) +# define SYS_PF_PSC2_AC97 (0) +# define SYS_PF_PSC2_SPI (0) +# define SYS_PF_PSC2_I2S (1 << 17) +# define SYS_PF_PSC2_SMBUS (3 << 17) +# define SYS_PF_PSC2_GPIO (7 << 17) +# define SYS_PF_PSC3_MASK (7 << 20) +# define SYS_PF_PSC3_AC97 (0) +# define SYS_PF_PSC3_SPI (0) +# define SYS_PF_PSC3_I2S (1 << 20) +# define SYS_PF_PSC3_SMBUS (3 << 20) +# define SYS_PF_PSC3_GPIO (7 << 20) +# define SYS_PF_PSC1_S1 (1 << 1) +# define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) + +/* Au1200 Only */ #ifdef CONFIG_SOC_AU1200 -#define SYS_PINFUNC_DMA (1 << 31) -#define SYS_PINFUNC_S0A (1 << 30) -#define SYS_PINFUNC_S1A (1 << 29) -#define SYS_PINFUNC_LP0 (1 << 28) -#define SYS_PINFUNC_LP1 (1 << 27) -#define SYS_PINFUNC_LD16 (1 << 26) -#define SYS_PINFUNC_LD8 (1 << 25) -#define SYS_PINFUNC_LD1 (1 << 24) -#define SYS_PINFUNC_LD0 (1 << 23) -#define SYS_PINFUNC_P1A (3 << 21) -#define SYS_PINFUNC_P1B (1 << 20) -#define SYS_PINFUNC_FS3 (1 << 19) -#define SYS_PINFUNC_P0A (3 << 17) -#define SYS_PINFUNC_CS (1 << 16) -#define SYS_PINFUNC_CIM (1 << 15) -#define SYS_PINFUNC_P1C (1 << 14) -#define SYS_PINFUNC_U1T (1 << 12) -#define SYS_PINFUNC_U1R (1 << 11) -#define SYS_PINFUNC_EX1 (1 << 10) -#define SYS_PINFUNC_EX0 (1 << 9) -#define SYS_PINFUNC_U0R (1 << 8) -#define SYS_PINFUNC_MC (1 << 7) -#define SYS_PINFUNC_S0B (1 << 6) -#define SYS_PINFUNC_S0C (1 << 5) -#define SYS_PINFUNC_P0B (1 << 4) -#define SYS_PINFUNC_U0T (1 << 3) -#define SYS_PINFUNC_S1B (1 << 2) +#define SYS_PINFUNC_DMA (1<<31) +#define SYS_PINFUNC_S0A (1<<30) +#define SYS_PINFUNC_S1A (1<<29) +#define SYS_PINFUNC_LP0 (1<<28) +#define SYS_PINFUNC_LP1 (1<<27) +#define SYS_PINFUNC_LD16 (1<<26) +#define SYS_PINFUNC_LD8 (1<<25) +#define SYS_PINFUNC_LD1 (1<<24) +#define SYS_PINFUNC_LD0 (1<<23) +#define SYS_PINFUNC_P1A (3<<21) +#define SYS_PINFUNC_P1B (1<<20) +#define SYS_PINFUNC_FS3 (1<<19) +#define SYS_PINFUNC_P0A (3<<17) +#define SYS_PINFUNC_CS (1<<16) +#define SYS_PINFUNC_CIM (1<<15) +#define SYS_PINFUNC_P1C (1<<14) +#define SYS_PINFUNC_U1T (1<<12) +#define SYS_PINFUNC_U1R (1<<11) +#define SYS_PINFUNC_EX1 (1<<10) +#define SYS_PINFUNC_EX0 (1<<9) +#define SYS_PINFUNC_U0R (1<<8) +#define SYS_PINFUNC_MC (1<<7) +#define SYS_PINFUNC_S0B (1<<6) +#define SYS_PINFUNC_S0C (1<<5) +#define SYS_PINFUNC_P0B (1<<4) +#define SYS_PINFUNC_U0T (1<<3) +#define SYS_PINFUNC_S1B (1<<2) #endif -#define SYS_TRIOUTRD 0xB1900100 -#define SYS_TRIOUTCLR 0xB1900100 -#define SYS_OUTPUTRD 0xB1900108 -#define SYS_OUTPUTSET 0xB1900108 -#define SYS_OUTPUTCLR 0xB190010C -#define SYS_PINSTATERD 0xB1900110 -#define SYS_PININPUTEN 0xB1900110 +#define SYS_TRIOUTRD 0xB1900100 +#define SYS_TRIOUTCLR 0xB1900100 +#define SYS_OUTPUTRD 0xB1900108 +#define SYS_OUTPUTSET 0xB1900108 +#define SYS_OUTPUTCLR 0xB190010C +#define SYS_PINSTATERD 0xB1900110 +#define SYS_PININPUTEN 0xB1900110 /* GPIO2, Au1500, Au1550 only */ -#define GPIO2_BASE 0xB1700000 -#define GPIO2_DIR (GPIO2_BASE + 0) -#define GPIO2_OUTPUT (GPIO2_BASE + 8) -#define GPIO2_PINSTATE (GPIO2_BASE + 0xC) -#define GPIO2_INTENABLE (GPIO2_BASE + 0x10) -#define GPIO2_ENABLE (GPIO2_BASE + 0x14) +#define GPIO2_BASE 0xB1700000 +#define GPIO2_DIR (GPIO2_BASE + 0) +#define GPIO2_OUTPUT (GPIO2_BASE + 8) +#define GPIO2_PINSTATE (GPIO2_BASE + 0xC) +#define GPIO2_INTENABLE (GPIO2_BASE + 0x10) +#define GPIO2_ENABLE (GPIO2_BASE + 0x14) /* Power Management */ -#define SYS_SCRATCH0 0xB1900018 -#define SYS_SCRATCH1 0xB190001C -#define SYS_WAKEMSK 0xB1900034 -#define SYS_ENDIAN 0xB1900038 -#define SYS_POWERCTRL 0xB190003C -#define SYS_WAKESRC 0xB190005C -#define SYS_SLPPWR 0xB1900078 -#define SYS_SLEEP 0xB190007C +#define SYS_SCRATCH0 0xB1900018 +#define SYS_SCRATCH1 0xB190001C +#define SYS_WAKEMSK 0xB1900034 +#define SYS_ENDIAN 0xB1900038 +#define SYS_POWERCTRL 0xB190003C +#define SYS_WAKESRC 0xB190005C +#define SYS_SLPPWR 0xB1900078 +#define SYS_SLEEP 0xB190007C /* Clock Controller */ -#define SYS_FREQCTRL0 0xB1900020 -# define SYS_FC_FRDIV2_BIT 22 -# define SYS_FC_FRDIV2_MASK (0xff << SYS_FC_FRDIV2_BIT) -# define SYS_FC_FE2 (1 << 21) -# define SYS_FC_FS2 (1 << 20) -# define SYS_FC_FRDIV1_BIT 12 -# define SYS_FC_FRDIV1_MASK (0xff << SYS_FC_FRDIV1_BIT) -# define SYS_FC_FE1 (1 << 11) -# define SYS_FC_FS1 (1 << 10) -# define SYS_FC_FRDIV0_BIT 2 -# define SYS_FC_FRDIV0_MASK (0xff << SYS_FC_FRDIV0_BIT) -# define SYS_FC_FE0 (1 << 1) -# define SYS_FC_FS0 (1 << 0) -#define SYS_FREQCTRL1 0xB1900024 -# define SYS_FC_FRDIV5_BIT 22 -# define SYS_FC_FRDIV5_MASK (0xff << SYS_FC_FRDIV5_BIT) -# define SYS_FC_FE5 (1 << 21) -# define SYS_FC_FS5 (1 << 20) -# define SYS_FC_FRDIV4_BIT 12 -# define SYS_FC_FRDIV4_MASK (0xff << SYS_FC_FRDIV4_BIT) -# define SYS_FC_FE4 (1 << 11) -# define SYS_FC_FS4 (1 << 10) -# define SYS_FC_FRDIV3_BIT 2 -# define SYS_FC_FRDIV3_MASK (0xff << SYS_FC_FRDIV3_BIT) -# define SYS_FC_FE3 (1 << 1) -# define SYS_FC_FS3 (1 << 0) -#define SYS_CLKSRC 0xB1900028 -# define SYS_CS_ME1_BIT 27 -# define SYS_CS_ME1_MASK (0x7 << SYS_CS_ME1_BIT) -# define SYS_CS_DE1 (1 << 26) -# define SYS_CS_CE1 (1 << 25) -# define SYS_CS_ME0_BIT 22 -# define SYS_CS_ME0_MASK (0x7 << SYS_CS_ME0_BIT) -# define SYS_CS_DE0 (1 << 21) -# define SYS_CS_CE0 (1 << 20) -# define SYS_CS_MI2_BIT 17 -# define SYS_CS_MI2_MASK (0x7 << SYS_CS_MI2_BIT) -# define SYS_CS_DI2 (1 << 16) -# define SYS_CS_CI2 (1 << 15) +#define SYS_FREQCTRL0 0xB1900020 +# define SYS_FC_FRDIV2_BIT 22 +# define SYS_FC_FRDIV2_MASK (0xff << SYS_FC_FRDIV2_BIT) +# define SYS_FC_FE2 (1<<21) +# define SYS_FC_FS2 (1<<20) +# define SYS_FC_FRDIV1_BIT 12 +# define SYS_FC_FRDIV1_MASK (0xff << SYS_FC_FRDIV1_BIT) +# define SYS_FC_FE1 (1<<11) +# define SYS_FC_FS1 (1<<10) +# define SYS_FC_FRDIV0_BIT 2 +# define SYS_FC_FRDIV0_MASK (0xff << SYS_FC_FRDIV0_BIT) +# define SYS_FC_FE0 (1<<1) +# define SYS_FC_FS0 (1<<0) +#define SYS_FREQCTRL1 0xB1900024 +# define SYS_FC_FRDIV5_BIT 22 +# define SYS_FC_FRDIV5_MASK (0xff << SYS_FC_FRDIV5_BIT) +# define SYS_FC_FE5 (1<<21) +# define SYS_FC_FS5 (1<<20) +# define SYS_FC_FRDIV4_BIT 12 +# define SYS_FC_FRDIV4_MASK (0xff << SYS_FC_FRDIV4_BIT) +# define SYS_FC_FE4 (1<<11) +# define SYS_FC_FS4 (1<<10) +# define SYS_FC_FRDIV3_BIT 2 +# define SYS_FC_FRDIV3_MASK (0xff << SYS_FC_FRDIV3_BIT) +# define SYS_FC_FE3 (1<<1) +# define SYS_FC_FS3 (1<<0) +#define SYS_CLKSRC 0xB1900028 +# define SYS_CS_ME1_BIT 27 +# define SYS_CS_ME1_MASK (0x7< + * Copyright 2000 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * stevel@mvista.com or source@mvista.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -30,7 +31,7 @@ #ifndef __ASM_AU1000_DMA_H #define __ASM_AU1000_DMA_H -#include /* need byte IO */ +#include /* need byte IO */ #include /* And spinlocks */ #include #include @@ -49,36 +50,36 @@ #define DMA_DAH_MASK (0x0f << 20) #define DMA_DID_BIT 16 #define DMA_DID_MASK (0x0f << DMA_DID_BIT) -#define DMA_DS (1 << 15) -#define DMA_BE (1 << 13) -#define DMA_DR (1 << 12) -#define DMA_TS8 (1 << 11) +#define DMA_DS (1<<15) +#define DMA_BE (1<<13) +#define DMA_DR (1<<12) +#define DMA_TS8 (1<<11) #define DMA_DW_BIT 9 #define DMA_DW_MASK (0x03 << DMA_DW_BIT) #define DMA_DW8 (0 << DMA_DW_BIT) #define DMA_DW16 (1 << DMA_DW_BIT) #define DMA_DW32 (2 << DMA_DW_BIT) -#define DMA_NC (1 << 8) -#define DMA_IE (1 << 7) -#define DMA_HALT (1 << 6) -#define DMA_GO (1 << 5) -#define DMA_AB (1 << 4) -#define DMA_D1 (1 << 3) -#define DMA_BE1 (1 << 2) -#define DMA_D0 (1 << 1) -#define DMA_BE0 (1 << 0) - -#define DMA_PERIPHERAL_ADDR 0x00000008 -#define DMA_BUFFER0_START 0x0000000C -#define DMA_BUFFER1_START 0x00000014 -#define DMA_BUFFER0_COUNT 0x00000010 -#define DMA_BUFFER1_COUNT 0x00000018 -#define DMA_BAH_BIT 16 -#define DMA_BAH_MASK (0x0f << DMA_BAH_BIT) -#define DMA_COUNT_BIT 0 -#define DMA_COUNT_MASK (0xffff << DMA_COUNT_BIT) - -/* DMA Device IDs follow */ +#define DMA_NC (1<<8) +#define DMA_IE (1<<7) +#define DMA_HALT (1<<6) +#define DMA_GO (1<<5) +#define DMA_AB (1<<4) +#define DMA_D1 (1<<3) +#define DMA_BE1 (1<<2) +#define DMA_D0 (1<<1) +#define DMA_BE0 (1<<0) + +#define DMA_PERIPHERAL_ADDR 0x00000008 +#define DMA_BUFFER0_START 0x0000000C +#define DMA_BUFFER1_START 0x00000014 +#define DMA_BUFFER0_COUNT 0x00000010 +#define DMA_BUFFER1_COUNT 0x00000018 +#define DMA_BAH_BIT 16 +#define DMA_BAH_MASK (0x0f << DMA_BAH_BIT) +#define DMA_COUNT_BIT 0 +#define DMA_COUNT_MASK (0xffff << DMA_COUNT_BIT) + +/* DMA Device ID's follow */ enum { DMA_ID_UART0_TX = 0, DMA_ID_UART0_RX, @@ -109,8 +110,7 @@ enum { }; struct dma_chan { - int dev_id; /* this channel is allocated if >= 0, */ - /* free otherwise */ + int dev_id; // this channel is allocated if >=0, free otherwise unsigned int io; const char *dev_str; int irq; @@ -132,23 +132,23 @@ extern int au1000_dma_read_proc(char *buf, char **start, off_t fpos, extern void dump_au1000_dma_channel(unsigned int dmanr); extern spinlock_t au1000_dma_spin_lock; -static inline struct dma_chan *get_dma_chan(unsigned int dmanr) + +static __inline__ struct dma_chan *get_dma_chan(unsigned int dmanr) { - if (dmanr >= NUM_AU1000_DMA_CHANNELS || - au1000_dma_table[dmanr].dev_id < 0) + if (dmanr >= NUM_AU1000_DMA_CHANNELS + || au1000_dma_table[dmanr].dev_id < 0) return NULL; return &au1000_dma_table[dmanr]; } -static inline unsigned long claim_dma_lock(void) +static __inline__ unsigned long claim_dma_lock(void) { unsigned long flags; - spin_lock_irqsave(&au1000_dma_spin_lock, flags); return flags; } -static inline void release_dma_lock(unsigned long flags) +static __inline__ void release_dma_lock(unsigned long flags) { spin_unlock_irqrestore(&au1000_dma_spin_lock, flags); } @@ -156,53 +156,48 @@ static inline void release_dma_lock(unsigned long flags) /* * Set the DMA buffer enable bits in the mode register. */ -static inline void enable_dma_buffer0(unsigned int dmanr) +static __inline__ void enable_dma_buffer0(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; au_writel(DMA_BE0, chan->io + DMA_MODE_SET); } - -static inline void enable_dma_buffer1(unsigned int dmanr) +static __inline__ void enable_dma_buffer1(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; au_writel(DMA_BE1, chan->io + DMA_MODE_SET); } -static inline void enable_dma_buffers(unsigned int dmanr) +static __inline__ void enable_dma_buffers(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; au_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET); } -static inline void start_dma(unsigned int dmanr) +static __inline__ void start_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; + au_writel(DMA_GO, chan->io + DMA_MODE_SET); } #define DMA_HALT_POLL 0x5000 -static inline void halt_dma(unsigned int dmanr) +static __inline__ void halt_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); int i; - if (!chan) return; - au_writel(DMA_GO, chan->io + DMA_MODE_CLEAR); - /* Poll the halt bit */ + au_writel(DMA_GO, chan->io + DMA_MODE_CLEAR); + // poll the halt bit for (i = 0; i < DMA_HALT_POLL; i++) if (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT) break; @@ -210,57 +205,55 @@ static inline void halt_dma(unsigned int dmanr) printk(KERN_INFO "halt_dma: HALT poll expired!\n"); } -static inline void disable_dma(unsigned int dmanr) + +static __inline__ void disable_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; halt_dma(dmanr); - /* Now we can disable the buffers */ + // now we can disable the buffers au_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR); } -static inline int dma_halted(unsigned int dmanr) +static __inline__ int dma_halted(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return 1; return (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT) ? 1 : 0; } -/* Initialize a DMA channel. */ -static inline void init_dma(unsigned int dmanr) +/* initialize a DMA channel */ +static __inline__ void init_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); u32 mode; - if (!chan) return; disable_dma(dmanr); - /* Set device FIFO address */ - au_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR); + // set device FIFO address + au_writel(CPHYSADDR(chan->fifo_addr), + chan->io + DMA_PERIPHERAL_ADDR); mode = chan->mode | (chan->dev_id << DMA_DID_BIT); if (chan->irq) mode |= DMA_IE; au_writel(~mode, chan->io + DMA_MODE_CLEAR); - au_writel(mode, chan->io + DMA_MODE_SET); + au_writel(mode, chan->io + DMA_MODE_SET); } /* - * Set mode for a specific DMA channel + * set mode for a specific DMA channel */ -static inline void set_dma_mode(unsigned int dmanr, unsigned int mode) +static __inline__ void set_dma_mode(unsigned int dmanr, unsigned int mode) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; /* @@ -273,37 +266,36 @@ static inline void set_dma_mode(unsigned int dmanr, unsigned int mode) chan->mode |= mode; } -static inline unsigned int get_dma_mode(unsigned int dmanr) +static __inline__ unsigned int get_dma_mode(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return 0; return chan->mode; } -static inline int get_dma_active_buffer(unsigned int dmanr) +static __inline__ int get_dma_active_buffer(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return -1; return (au_readl(chan->io + DMA_MODE_READ) & DMA_AB) ? 1 : 0; } + /* - * Set the device FIFO address for a specific DMA channel - only + * set the device FIFO address for a specific DMA channel - only * applicable to GPO4 and GPO5. All the other devices have fixed * FIFO addresses. */ -static inline void set_dma_fifo_addr(unsigned int dmanr, unsigned int a) +static __inline__ void set_dma_fifo_addr(unsigned int dmanr, + unsigned int a) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; - if (chan->mode & DMA_DS) /* second bank of device IDs */ + if (chan->mode & DMA_DS) /* second bank of device ids */ return; if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05) @@ -315,19 +307,16 @@ static inline void set_dma_fifo_addr(unsigned int dmanr, unsigned int a) /* * Clear the DMA buffer done bits in the mode register. */ -static inline void clear_dma_done0(unsigned int dmanr) +static __inline__ void clear_dma_done0(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; au_writel(DMA_D0, chan->io + DMA_MODE_CLEAR); } - -static inline void clear_dma_done1(unsigned int dmanr) +static __inline__ void clear_dma_done1(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; au_writel(DMA_D1, chan->io + DMA_MODE_CLEAR); @@ -336,17 +325,16 @@ static inline void clear_dma_done1(unsigned int dmanr) /* * This does nothing - not applicable to Au1000 DMA. */ -static inline void set_dma_page(unsigned int dmanr, char pagenr) +static __inline__ void set_dma_page(unsigned int dmanr, char pagenr) { } /* * Set Buffer 0 transfer address for specific DMA channel. */ -static inline void set_dma_addr0(unsigned int dmanr, unsigned int a) +static __inline__ void set_dma_addr0(unsigned int dmanr, unsigned int a) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; au_writel(a, chan->io + DMA_BUFFER0_START); @@ -355,10 +343,9 @@ static inline void set_dma_addr0(unsigned int dmanr, unsigned int a) /* * Set Buffer 1 transfer address for specific DMA channel. */ -static inline void set_dma_addr1(unsigned int dmanr, unsigned int a) +static __inline__ void set_dma_addr1(unsigned int dmanr, unsigned int a) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; au_writel(a, chan->io + DMA_BUFFER1_START); @@ -368,10 +355,10 @@ static inline void set_dma_addr1(unsigned int dmanr, unsigned int a) /* * Set Buffer 0 transfer size (max 64k) for a specific DMA channel. */ -static inline void set_dma_count0(unsigned int dmanr, unsigned int count) +static __inline__ void set_dma_count0(unsigned int dmanr, + unsigned int count) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; count &= DMA_COUNT_MASK; @@ -381,10 +368,10 @@ static inline void set_dma_count0(unsigned int dmanr, unsigned int count) /* * Set Buffer 1 transfer size (max 64k) for a specific DMA channel. */ -static inline void set_dma_count1(unsigned int dmanr, unsigned int count) +static __inline__ void set_dma_count1(unsigned int dmanr, + unsigned int count) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; count &= DMA_COUNT_MASK; @@ -394,10 +381,10 @@ static inline void set_dma_count1(unsigned int dmanr, unsigned int count) /* * Set both buffer transfer sizes (max 64k) for a specific DMA channel. */ -static inline void set_dma_count(unsigned int dmanr, unsigned int count) +static __inline__ void set_dma_count(unsigned int dmanr, + unsigned int count) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return; count &= DMA_COUNT_MASK; @@ -409,36 +396,35 @@ static inline void set_dma_count(unsigned int dmanr, unsigned int count) * Returns which buffer has its done bit set in the mode register. * Returns -1 if neither or both done bits set. */ -static inline unsigned int get_dma_buffer_done(unsigned int dmanr) +static __inline__ unsigned int get_dma_buffer_done(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return 0; - return au_readl(chan->io + DMA_MODE_READ) & (DMA_D0 | DMA_D1); + + return au_readl(chan->io + DMA_MODE_READ) & (DMA_D0 | DMA_D1); } /* * Returns the DMA channel's Buffer Done IRQ number. */ -static inline int get_dma_done_irq(unsigned int dmanr) +static __inline__ int get_dma_done_irq(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return -1; + return chan->irq; } /* * Get DMA residue count. Returns the number of _bytes_ left to transfer. */ -static inline int get_dma_residue(unsigned int dmanr) +static __inline__ int get_dma_residue(unsigned int dmanr) { int curBufCntReg, count; struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) return 0; @@ -456,3 +442,4 @@ static inline int get_dma_residue(unsigned int dmanr) } #endif /* __ASM_AU1000_DMA_H */ + diff --git a/trunk/include/asm-mips/mach-au1x00/au1000_gpio.h b/trunk/include/asm-mips/mach-au1x00/au1000_gpio.h index d8c96fda5549..298f92012e8e 100644 --- a/trunk/include/asm-mips/mach-au1x00/au1000_gpio.h +++ b/trunk/include/asm-mips/mach-au1x00/au1000_gpio.h @@ -2,12 +2,12 @@ * FILE NAME au1000_gpio.h * * BRIEF MODULE DESCRIPTION - * API to Alchemy Au1xx0 GPIO device. + * API to Alchemy Au1000 GPIO device. * * Author: MontaVista Software, Inc. - * Steve Longerbeam + * Steve Longerbeam * - * Copyright 2001, 2008 MontaVista Software Inc. + * Copyright 2001 MontaVista Software Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -37,12 +37,12 @@ #define AU1000GPIO_IOC_MAGIC 'A' -#define AU1000GPIO_IN _IOR(AU1000GPIO_IOC_MAGIC, 0, int) -#define AU1000GPIO_SET _IOW(AU1000GPIO_IOC_MAGIC, 1, int) -#define AU1000GPIO_CLEAR _IOW(AU1000GPIO_IOC_MAGIC, 2, int) -#define AU1000GPIO_OUT _IOW(AU1000GPIO_IOC_MAGIC, 3, int) -#define AU1000GPIO_TRISTATE _IOW(AU1000GPIO_IOC_MAGIC, 4, int) -#define AU1000GPIO_AVAIL_MASK _IOR(AU1000GPIO_IOC_MAGIC, 5, int) +#define AU1000GPIO_IN _IOR (AU1000GPIO_IOC_MAGIC, 0, int) +#define AU1000GPIO_SET _IOW (AU1000GPIO_IOC_MAGIC, 1, int) +#define AU1000GPIO_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 2, int) +#define AU1000GPIO_OUT _IOW (AU1000GPIO_IOC_MAGIC, 3, int) +#define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int) +#define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int) #ifdef __KERNEL__ extern u32 get_au1000_avail_gpio_mask(void); diff --git a/trunk/include/asm-mips/mach-au1x00/au1550_spi.h b/trunk/include/asm-mips/mach-au1x00/au1550_spi.h index 40e6c489833a..c2f0466523ec 100644 --- a/trunk/include/asm-mips/mach-au1x00/au1550_spi.h +++ b/trunk/include/asm-mips/mach-au1x00/au1550_spi.h @@ -1,5 +1,5 @@ /* - * au1550_spi.h - Au1550 PSC SPI controller driver - platform data structure + * au1550_spi.h - au1550 psc spi controller driver - platform data struct */ #ifndef _AU1550_SPI_H_ diff --git a/trunk/include/asm-mips/mach-au1x00/au1xxx.h b/trunk/include/asm-mips/mach-au1x00/au1xxx.h index 1b3655090ed3..947135941033 100644 --- a/trunk/include/asm-mips/mach-au1x00/au1xxx.h +++ b/trunk/include/asm-mips/mach-au1x00/au1xxx.h @@ -23,10 +23,10 @@ #ifndef _AU1XXX_H_ #define _AU1XXX_H_ + #include -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \ - defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) +#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) #include #elif defined(CONFIG_MIPS_PB1550) diff --git a/trunk/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/trunk/include/asm-mips/mach-au1x00/au1xxx_dbdma.h index ad17d7ce516a..93d507cea518 100644 --- a/trunk/include/asm-mips/mach-au1x00/au1xxx_dbdma.h +++ b/trunk/include/asm-mips/mach-au1x00/au1xxx_dbdma.h @@ -28,18 +28,17 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -/* - * Specifics for the Au1xxx Descriptor-Based DMA Controller, - * first seen in the AU1550 part. +/* Specifics for the Au1xxx Descriptor-Based DMA Controllers, first + * seen in the AU1550 part. */ #ifndef _AU1000_DBDMA_H_ #define _AU1000_DBDMA_H_ + #ifndef _LANGUAGE_ASSEMBLY -/* - * The DMA base addresses. - * The channels are every 256 bytes (0x0100) from the channel 0 base. +/* The DMA base addresses. + * The Channels are every 256 bytes (0x0100) from the channel 0 base. * Interrupt status/enable is bits 15:0 for channels 15 to zero. */ #define DDMA_GLOBAL_BASE 0xb4003000 @@ -52,14 +51,16 @@ typedef volatile struct dbdma_global { u32 ddma_inten; } dbdma_global_t; -/* General Configuration. */ +/* General Configuration. +*/ #define DDMA_CONFIG_AF (1 << 2) #define DDMA_CONFIG_AH (1 << 1) #define DDMA_CONFIG_AL (1 << 0) #define DDMA_THROTTLE_EN (1 << 31) -/* The structure of a DMA Channel. */ +/* The structure of a DMA Channel. +*/ typedef volatile struct au1xxx_dma_channel { u32 ddma_cfg; /* See below */ u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */ @@ -68,7 +69,8 @@ typedef volatile struct au1xxx_dma_channel { u32 ddma_irq; /* If bit 0 set, interrupt pending */ u32 ddma_stat; /* See below */ u32 ddma_bytecnt; /* Byte count, valid only when chan idle */ - /* Remainder, up to the 256 byte boundary, is reserved. */ + /* Remainder, up to the 256 byte boundary, is reserved. + */ } au1x_dma_chan_t; #define DDMA_CFG_SED (1 << 9) /* source DMA level/edge detect */ @@ -82,8 +84,7 @@ typedef volatile struct au1xxx_dma_channel { #define DDMA_CFG_DBE (1 << 1) /* Destination big endian */ #define DDMA_CFG_EN (1 << 0) /* Channel enable */ -/* - * Always set when descriptor processing done, regardless of +/* Always set when descriptor processing done, regardless of * interrupt enable state. Reflected in global intstat, don't * clear this until global intstat is read/used. */ @@ -93,8 +94,7 @@ typedef volatile struct au1xxx_dma_channel { #define DDMA_STAT_V (1 << 1) /* Descriptor valid */ #define DDMA_STAT_H (1 << 0) /* Channel Halted */ -/* - * "Standard" DDMA Descriptor. +/* "Standard" DDMA Descriptor. * Must be 32-byte aligned. */ typedef volatile struct au1xxx_ddma_desc { @@ -106,9 +106,8 @@ typedef volatile struct au1xxx_ddma_desc { u32 dscr_dest1; /* See below */ u32 dscr_stat; /* completion status */ u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */ - /* - * First 32 bytes are HW specific!!! - * Lets have some SW data following -- make sure it's 32 bytes. + /* First 32bytes are HW specific!!! + Lets have some SW data following.. make sure its 32bytes */ u32 sw_status; u32 sw_context; @@ -131,9 +130,10 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */ #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */ -#define SW_STATUS_INUSE (1 << 0) +#define SW_STATUS_INUSE (1<<0) -/* Command 0 device IDs. */ +/* Command 0 device IDs. +*/ #ifdef CONFIG_SOC_AU1550 #define DSCR_CMD0_UART0_TX 0 #define DSCR_CMD0_UART0_RX 1 @@ -198,15 +198,16 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_CMD0_THROTTLE 30 #define DSCR_CMD0_ALWAYS 31 #define DSCR_NDEV_IDS 32 -/* This macro is used to find/create custom device types */ -#define DSCR_DEV2CUSTOM_ID(x, d) (((((x) & 0xFFFF) << 8) | 0x32000000) | \ - ((d) & 0xFF)) -#define DSCR_CUSTOM2DEV_ID(x) ((x) & 0xFF) +/* THis macro is used to find/create custom device types */ +#define DSCR_DEV2CUSTOM_ID(x, d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF)) +#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF) + #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25) #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20) -/* Source/Destination transfer width. */ +/* Source/Destination transfer width. +*/ #define DSCR_CMD0_BYTE 0 #define DSCR_CMD0_HALFWORD 1 #define DSCR_CMD0_WORD 2 @@ -214,14 +215,16 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_CMD0_SW(x) (((x) & 0x3) << 18) #define DSCR_CMD0_DW(x) (((x) & 0x3) << 16) -/* DDMA Descriptor Type. */ +/* DDMA Descriptor Type. +*/ #define DSCR_CMD0_STANDARD 0 #define DSCR_CMD0_LITERAL 1 #define DSCR_CMD0_CMP_BRANCH 2 #define DSCR_CMD0_DT(x) (((x) & 0x3) << 13) -/* Status Instruction. */ +/* Status Instruction. +*/ #define DSCR_CMD0_ST_NOCHANGE 0 /* Don't change */ #define DSCR_CMD0_ST_CURRENT 1 /* Write current status */ #define DSCR_CMD0_ST_CMD0 2 /* Write cmd0 with V cleared */ @@ -229,20 +232,23 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_CMD0_ST(x) (((x) & 0x3) << 0) -/* Descriptor Command 1. */ +/* Descriptor Command 1 +*/ #define DSCR_CMD1_SUPTR_MASK (0xf << 28) /* upper 4 bits of src addr */ #define DSCR_CMD1_DUPTR_MASK (0xf << 24) /* upper 4 bits of dest addr */ #define DSCR_CMD1_FL_MASK (0x3 << 22) /* Flag bits */ #define DSCR_CMD1_BC_MASK (0x3fffff) /* Byte count */ -/* Flag description. */ +/* Flag description. +*/ #define DSCR_CMD1_FL_MEM_STRIDE0 0 #define DSCR_CMD1_FL_MEM_STRIDE1 1 #define DSCR_CMD1_FL_MEM_STRIDE2 2 #define DSCR_CMD1_FL(x) (((x) & 0x3) << 22) -/* Source1, 1-dimensional stride. */ +/* Source1, 1-dimensional stride. +*/ #define DSCR_SRC1_STS_MASK (3 << 30) /* Src xfer size */ #define DSCR_SRC1_SAM_MASK (3 << 28) /* Src xfer movement */ #define DSCR_SRC1_SB_MASK (0x3fff << 14) /* Block size */ @@ -250,7 +256,8 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_SRC1_SS_MASK (0x3fff << 0) /* Stride */ #define DSCR_SRC1_SS(x) (((x) & 0x3fff) << 0) -/* Dest1, 1-dimensional stride. */ +/* Dest1, 1-dimensional stride. +*/ #define DSCR_DEST1_DTS_MASK (3 << 30) /* Dest xfer size */ #define DSCR_DEST1_DAM_MASK (3 << 28) /* Dest xfer movement */ #define DSCR_DEST1_DB_MASK (0x3fff << 14) /* Block size */ @@ -272,27 +279,29 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_SRC1_SAM(x) (((x) & 3) << 28) #define DSCR_DEST1_DAM(x) (((x) & 3) << 28) -/* The next descriptor pointer. */ +/* The next descriptor pointer. +*/ #define DSCR_NXTPTR_MASK (0x07ffffff) #define DSCR_NXTPTR(x) ((x) >> 5) #define DSCR_GET_NXTPTR(x) ((x) << 5) #define DSCR_NXTPTR_MS (1 << 27) -/* The number of DBDMA channels. */ +/* The number of DBDMA channels. +*/ #define NUM_DBDMA_CHANS 16 /* - * DDMA API definitions + * Ddma API definitions * FIXME: may not fit to this header file */ typedef struct dbdma_device_table { - u32 dev_id; - u32 dev_flags; - u32 dev_tsize; - u32 dev_devwidth; - u32 dev_physaddr; /* If FIFO */ - u32 dev_intlevel; - u32 dev_intpolarity; + u32 dev_id; + u32 dev_flags; + u32 dev_tsize; + u32 dev_devwidth; + u32 dev_physaddr; /* If FIFO */ + u32 dev_intlevel; + u32 dev_intpolarity; } dbdev_tab_t; @@ -307,41 +316,44 @@ typedef struct dbdma_chan_config { au1x_ddma_desc_t *chan_desc_base; au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr; void *chan_callparam; - void (*chan_callback)(int, void *); + void (*chan_callback)(int, void *); } chan_tab_t; #define DEV_FLAGS_INUSE (1 << 0) #define DEV_FLAGS_ANYUSE (1 << 1) #define DEV_FLAGS_OUT (1 << 2) #define DEV_FLAGS_IN (1 << 3) -#define DEV_FLAGS_BURSTABLE (1 << 4) +#define DEV_FLAGS_BURSTABLE (1 << 4) #define DEV_FLAGS_SYNC (1 << 5) -/* end DDMA API definitions */ +/* end Ddma API definitions */ -/* - * External functions for drivers to use. - * Use this to allocate a DBDMA channel. The device IDs are one of - * the DSCR_CMD0 devices IDs, which is usually redefined to a more - * meaningful name. The 'callback' is called during DMA completion +/* External functions for drivers to use. +*/ +/* Use this to allocate a dbdma channel. The device ids are one of the + * DSCR_CMD0 devices IDs, which is usually redefined to a more + * meaningful name. The 'callback' is called during dma completion * interrupt. */ extern u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, - void (*callback)(int, void *), - void *callparam); + void (*callback)(int, void *), void *callparam); #define DBDMA_MEM_CHAN DSCR_CMD0_ALWAYS -/* Set the device width of an in/out FIFO. */ +/* Set the device width of a in/out fifo. +*/ u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits); -/* Allocate a ring of descriptors for DBDMA. */ +/* Allocate a ring of descriptors for dbdma. +*/ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries); -/* Put buffers on source/destination descriptors. */ +/* Put buffers on source/destination descriptors. +*/ u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags); u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags); -/* Get a buffer from the destination descriptor. */ +/* Get a buffer from the destination descriptor. +*/ u32 au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes); void au1xxx_dbdma_stop(u32 chanid); @@ -352,34 +364,29 @@ u32 au1xxx_get_dma_residue(u32 chanid); void au1xxx_dbdma_chan_free(u32 chanid); void au1xxx_dbdma_dump(u32 chanid); -u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr); +u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr ); -u32 au1xxx_ddma_add_device(dbdev_tab_t *dev); -void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp); +u32 au1xxx_ddma_add_device( dbdev_tab_t *dev ); +void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp); /* - * Some compatibilty macros -- needed to make changes to API - * without breaking existing drivers. - */ -#define au1xxx_dbdma_put_source(chanid, buf, nbytes) \ - _au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE) -#define au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) \ - _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags) -#define put_source_flags(chanid, buf, nbytes, flags) \ - au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) - -#define au1xxx_dbdma_put_dest(chanid, buf, nbytes) \ - _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE) -#define au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) \ - _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags) -#define put_dest_flags(chanid, buf, nbytes, flags) \ - au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) + Some compatibilty macros -- + Needed to make changes to API without breaking existing drivers +*/ +#define au1xxx_dbdma_put_source(chanid, buf, nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE) +#define au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags) +#define put_source_flags(chanid, buf, nbytes, flags) au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) + + +#define au1xxx_dbdma_put_dest(chanid, buf, nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE) +#define au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags) +#define put_dest_flags(chanid, buf, nbytes, flags) au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) /* * Flags for the put_source/put_dest functions. */ -#define DDMA_FLAGS_IE (1 << 0) -#define DDMA_FLAGS_NOIE (1 << 1) +#define DDMA_FLAGS_IE (1<<0) +#define DDMA_FLAGS_NOIE (1<<1) #endif /* _LANGUAGE_ASSEMBLY */ #endif /* _AU1000_DBDMA_H_ */ diff --git a/trunk/include/asm-mips/mach-au1x00/au1xxx_ide.h b/trunk/include/asm-mips/mach-au1x00/au1xxx_ide.h index 60638b8969ba..b493a5e46c63 100644 --- a/trunk/include/asm-mips/mach-au1x00/au1xxx_ide.h +++ b/trunk/include/asm-mips/mach-au1x00/au1xxx_ide.h @@ -31,164 +31,167 @@ */ #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA -#define DMA_WAIT_TIMEOUT 100 -#define NUM_DESCRIPTORS PRD_ENTRIES + #define DMA_WAIT_TIMEOUT 100 + #define NUM_DESCRIPTORS PRD_ENTRIES #else /* CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA */ -#define NUM_DESCRIPTORS 2 + #define NUM_DESCRIPTORS 2 #endif #ifndef AU1XXX_ATA_RQSIZE -#define AU1XXX_ATA_RQSIZE 128 + #define AU1XXX_ATA_RQSIZE 128 #endif /* Disable Burstable-Support for DBDMA */ #ifndef CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON -#define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0 + #define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0 #endif #ifdef CONFIG_PM /* - * This will enable the device to be powered up when write() or read() - * is called. If this is not defined, the driver will return -EBUSY. - */ +* This will enable the device to be powered up when write() or read() +* is called. If this is not defined, the driver will return -EBUSY. +*/ #define WAKE_ON_ACCESS 1 -typedef struct { - spinlock_t lock; /* Used to block on state transitions */ - au1xxx_power_dev_t *dev; /* Power Managers device structure */ - unsigned stopped; /* Used to signal device is stopped */ +typedef struct +{ + spinlock_t lock; /* Used to block on state transitions */ + au1xxx_power_dev_t *dev; /* Power Managers device structure */ + unsigned stopped; /* USed to signaling device is stopped */ } pm_state; #endif -typedef struct { - u32 tx_dev_id, rx_dev_id, target_dev_id; - u32 tx_chan, rx_chan; - void *tx_desc_head, *rx_desc_head; - ide_hwif_t *hwif; + +typedef struct +{ + u32 tx_dev_id, rx_dev_id, target_dev_id; + u32 tx_chan, rx_chan; + void *tx_desc_head, *rx_desc_head; + ide_hwif_t *hwif; #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA - ide_drive_t *drive; - struct dbdma_cmd *dma_table_cpu; - dma_addr_t dma_table_dma; + ide_drive_t *drive; + struct dbdma_cmd *dma_table_cpu; + dma_addr_t dma_table_dma; #endif int irq; u32 regbase; #ifdef CONFIG_PM - pm_state pm; + pm_state pm; #endif } _auide_hwif; -/******************************************************************************/ -/* PIO Mode timing calculation : */ -/* */ -/* Static Bus Spec ATA Spec */ -/* Tcsoe = t1 */ -/* Toecs = t9 */ -/* Twcs = t9 */ -/* Tcsh = t2i | t2 */ -/* Tcsoff = t2i | t2 */ -/* Twp = t2 */ -/* Tcsw = t1 */ -/* Tpm = 0 */ -/* Ta = t1+t2 */ -/******************************************************************************/ +/******************************************************************************* +* PIO Mode timing calculation : * +* * +* Static Bus Spec ATA Spec * +* Tcsoe = t1 * +* Toecs = t9 * +* Twcs = t9 * +* Tcsh = t2i | t2 * +* Tcsoff = t2i | t2 * +* Twp = t2 * +* Tcsw = t1 * +* Tpm = 0 * +* Ta = t1+t2 * +*******************************************************************************/ -#define TCSOE_MASK (0x07 << 29) -#define TOECS_MASK (0x07 << 26) -#define TWCS_MASK (0x07 << 28) -#define TCSH_MASK (0x0F << 24) -#define TCSOFF_MASK (0x07 << 20) -#define TWP_MASK (0x3F << 14) -#define TCSW_MASK (0x0F << 10) -#define TPM_MASK (0x0F << 6) -#define TA_MASK (0x3F << 0) -#define TS_MASK (1 << 8) +#define TCSOE_MASK (0x07<<29) +#define TOECS_MASK (0x07<<26) +#define TWCS_MASK (0x07<<28) +#define TCSH_MASK (0x0F<<24) +#define TCSOFF_MASK (0x07<<20) +#define TWP_MASK (0x3F<<14) +#define TCSW_MASK (0x0F<<10) +#define TPM_MASK (0x0F<<6) +#define TA_MASK (0x3F<<0) +#define TS_MASK (1<<8) /* Timing parameters PIO mode 0 */ -#define SBC_IDE_PIO0_TCSOE (0x04 << 29) -#define SBC_IDE_PIO0_TOECS (0x01 << 26) -#define SBC_IDE_PIO0_TWCS (0x02 << 28) -#define SBC_IDE_PIO0_TCSH (0x08 << 24) -#define SBC_IDE_PIO0_TCSOFF (0x07 << 20) -#define SBC_IDE_PIO0_TWP (0x10 << 14) -#define SBC_IDE_PIO0_TCSW (0x04 << 10) -#define SBC_IDE_PIO0_TPM (0x00 << 6) -#define SBC_IDE_PIO0_TA (0x15 << 0) +#define SBC_IDE_PIO0_TCSOE (0x04<<29) +#define SBC_IDE_PIO0_TOECS (0x01<<26) +#define SBC_IDE_PIO0_TWCS (0x02<<28) +#define SBC_IDE_PIO0_TCSH (0x08<<24) +#define SBC_IDE_PIO0_TCSOFF (0x07<<20) +#define SBC_IDE_PIO0_TWP (0x10<<14) +#define SBC_IDE_PIO0_TCSW (0x04<<10) +#define SBC_IDE_PIO0_TPM (0x0<<6) +#define SBC_IDE_PIO0_TA (0x15<<0) /* Timing parameters PIO mode 1 */ -#define SBC_IDE_PIO1_TCSOE (0x03 << 29) -#define SBC_IDE_PIO1_TOECS (0x01 << 26) -#define SBC_IDE_PIO1_TWCS (0x01 << 28) -#define SBC_IDE_PIO1_TCSH (0x06 << 24) -#define SBC_IDE_PIO1_TCSOFF (0x06 << 20) -#define SBC_IDE_PIO1_TWP (0x08 << 14) -#define SBC_IDE_PIO1_TCSW (0x03 << 10) -#define SBC_IDE_PIO1_TPM (0x00 << 6) -#define SBC_IDE_PIO1_TA (0x0B << 0) +#define SBC_IDE_PIO1_TCSOE (0x03<<29) +#define SBC_IDE_PIO1_TOECS (0x01<<26) +#define SBC_IDE_PIO1_TWCS (0x01<<28) +#define SBC_IDE_PIO1_TCSH (0x06<<24) +#define SBC_IDE_PIO1_TCSOFF (0x06<<20) +#define SBC_IDE_PIO1_TWP (0x08<<14) +#define SBC_IDE_PIO1_TCSW (0x03<<10) +#define SBC_IDE_PIO1_TPM (0x00<<6) +#define SBC_IDE_PIO1_TA (0x0B<<0) /* Timing parameters PIO mode 2 */ -#define SBC_IDE_PIO2_TCSOE (0x05 << 29) -#define SBC_IDE_PIO2_TOECS (0x01 << 26) -#define SBC_IDE_PIO2_TWCS (0x01 << 28) -#define SBC_IDE_PIO2_TCSH (0x07 << 24) -#define SBC_IDE_PIO2_TCSOFF (0x07 << 20) -#define SBC_IDE_PIO2_TWP (0x1F << 14) -#define SBC_IDE_PIO2_TCSW (0x05 << 10) -#define SBC_IDE_PIO2_TPM (0x00 << 6) -#define SBC_IDE_PIO2_TA (0x22 << 0) +#define SBC_IDE_PIO2_TCSOE (0x05<<29) +#define SBC_IDE_PIO2_TOECS (0x01<<26) +#define SBC_IDE_PIO2_TWCS (0x01<<28) +#define SBC_IDE_PIO2_TCSH (0x07<<24) +#define SBC_IDE_PIO2_TCSOFF (0x07<<20) +#define SBC_IDE_PIO2_TWP (0x1F<<14) +#define SBC_IDE_PIO2_TCSW (0x05<<10) +#define SBC_IDE_PIO2_TPM (0x00<<6) +#define SBC_IDE_PIO2_TA (0x22<<0) /* Timing parameters PIO mode 3 */ -#define SBC_IDE_PIO3_TCSOE (0x05 << 29) -#define SBC_IDE_PIO3_TOECS (0x01 << 26) -#define SBC_IDE_PIO3_TWCS (0x01 << 28) -#define SBC_IDE_PIO3_TCSH (0x0D << 24) -#define SBC_IDE_PIO3_TCSOFF (0x0D << 20) -#define SBC_IDE_PIO3_TWP (0x15 << 14) -#define SBC_IDE_PIO3_TCSW (0x05 << 10) -#define SBC_IDE_PIO3_TPM (0x00 << 6) -#define SBC_IDE_PIO3_TA (0x1A << 0) +#define SBC_IDE_PIO3_TCSOE (0x05<<29) +#define SBC_IDE_PIO3_TOECS (0x01<<26) +#define SBC_IDE_PIO3_TWCS (0x01<<28) +#define SBC_IDE_PIO3_TCSH (0x0D<<24) +#define SBC_IDE_PIO3_TCSOFF (0x0D<<20) +#define SBC_IDE_PIO3_TWP (0x15<<14) +#define SBC_IDE_PIO3_TCSW (0x05<<10) +#define SBC_IDE_PIO3_TPM (0x00<<6) +#define SBC_IDE_PIO3_TA (0x1A<<0) /* Timing parameters PIO mode 4 */ -#define SBC_IDE_PIO4_TCSOE (0x04 << 29) -#define SBC_IDE_PIO4_TOECS (0x01 << 26) -#define SBC_IDE_PIO4_TWCS (0x01 << 28) -#define SBC_IDE_PIO4_TCSH (0x04 << 24) -#define SBC_IDE_PIO4_TCSOFF (0x04 << 20) -#define SBC_IDE_PIO4_TWP (0x0D << 14) -#define SBC_IDE_PIO4_TCSW (0x03 << 10) -#define SBC_IDE_PIO4_TPM (0x00 << 6) -#define SBC_IDE_PIO4_TA (0x12 << 0) +#define SBC_IDE_PIO4_TCSOE (0x04<<29) +#define SBC_IDE_PIO4_TOECS (0x01<<26) +#define SBC_IDE_PIO4_TWCS (0x01<<28) +#define SBC_IDE_PIO4_TCSH (0x04<<24) +#define SBC_IDE_PIO4_TCSOFF (0x04<<20) +#define SBC_IDE_PIO4_TWP (0x0D<<14) +#define SBC_IDE_PIO4_TCSW (0x03<<10) +#define SBC_IDE_PIO4_TPM (0x00<<6) +#define SBC_IDE_PIO4_TA (0x12<<0) /* Timing parameters MDMA mode 0 */ -#define SBC_IDE_MDMA0_TCSOE (0x03 << 29) -#define SBC_IDE_MDMA0_TOECS (0x01 << 26) -#define SBC_IDE_MDMA0_TWCS (0x01 << 28) -#define SBC_IDE_MDMA0_TCSH (0x07 << 24) -#define SBC_IDE_MDMA0_TCSOFF (0x07 << 20) -#define SBC_IDE_MDMA0_TWP (0x0C << 14) -#define SBC_IDE_MDMA0_TCSW (0x03 << 10) -#define SBC_IDE_MDMA0_TPM (0x00 << 6) -#define SBC_IDE_MDMA0_TA (0x0F << 0) +#define SBC_IDE_MDMA0_TCSOE (0x03<<29) +#define SBC_IDE_MDMA0_TOECS (0x01<<26) +#define SBC_IDE_MDMA0_TWCS (0x01<<28) +#define SBC_IDE_MDMA0_TCSH (0x07<<24) +#define SBC_IDE_MDMA0_TCSOFF (0x07<<20) +#define SBC_IDE_MDMA0_TWP (0x0C<<14) +#define SBC_IDE_MDMA0_TCSW (0x03<<10) +#define SBC_IDE_MDMA0_TPM (0x00<<6) +#define SBC_IDE_MDMA0_TA (0x0F<<0) /* Timing parameters MDMA mode 1 */ -#define SBC_IDE_MDMA1_TCSOE (0x05 << 29) -#define SBC_IDE_MDMA1_TOECS (0x01 << 26) -#define SBC_IDE_MDMA1_TWCS (0x01 << 28) -#define SBC_IDE_MDMA1_TCSH (0x05 << 24) -#define SBC_IDE_MDMA1_TCSOFF (0x05 << 20) -#define SBC_IDE_MDMA1_TWP (0x0F << 14) -#define SBC_IDE_MDMA1_TCSW (0x05 << 10) -#define SBC_IDE_MDMA1_TPM (0x00 << 6) -#define SBC_IDE_MDMA1_TA (0x15 << 0) +#define SBC_IDE_MDMA1_TCSOE (0x05<<29) +#define SBC_IDE_MDMA1_TOECS (0x01<<26) +#define SBC_IDE_MDMA1_TWCS (0x01<<28) +#define SBC_IDE_MDMA1_TCSH (0x05<<24) +#define SBC_IDE_MDMA1_TCSOFF (0x05<<20) +#define SBC_IDE_MDMA1_TWP (0x0F<<14) +#define SBC_IDE_MDMA1_TCSW (0x05<<10) +#define SBC_IDE_MDMA1_TPM (0x00<<6) +#define SBC_IDE_MDMA1_TA (0x15<<0) /* Timing parameters MDMA mode 2 */ -#define SBC_IDE_MDMA2_TCSOE (0x04 << 29) -#define SBC_IDE_MDMA2_TOECS (0x01 << 26) -#define SBC_IDE_MDMA2_TWCS (0x01 << 28) -#define SBC_IDE_MDMA2_TCSH (0x04 << 24) -#define SBC_IDE_MDMA2_TCSOFF (0x04 << 20) -#define SBC_IDE_MDMA2_TWP (0x0D << 14) -#define SBC_IDE_MDMA2_TCSW (0x04 << 10) -#define SBC_IDE_MDMA2_TPM (0x00 << 6) -#define SBC_IDE_MDMA2_TA (0x12 << 0) +#define SBC_IDE_MDMA2_TCSOE (0x04<<29) +#define SBC_IDE_MDMA2_TOECS (0x01<<26) +#define SBC_IDE_MDMA2_TWCS (0x01<<28) +#define SBC_IDE_MDMA2_TCSH (0x04<<24) +#define SBC_IDE_MDMA2_TCSOFF (0x04<<20) +#define SBC_IDE_MDMA2_TWP (0x0D<<14) +#define SBC_IDE_MDMA2_TCSW (0x04<<10) +#define SBC_IDE_MDMA2_TPM (0x00<<6) +#define SBC_IDE_MDMA2_TA (0x12<<0) #define SBC_IDE_TIMING(mode) \ - (SBC_IDE_##mode##_TWCS | \ - SBC_IDE_##mode##_TCSH | \ - SBC_IDE_##mode##_TCSOFF | \ - SBC_IDE_##mode##_TWP | \ - SBC_IDE_##mode##_TCSW | \ - SBC_IDE_##mode##_TPM | \ - SBC_IDE_##mode##_TA) + SBC_IDE_##mode##_TWCS | \ + SBC_IDE_##mode##_TCSH | \ + SBC_IDE_##mode##_TCSOFF | \ + SBC_IDE_##mode##_TWP | \ + SBC_IDE_##mode##_TCSW | \ + SBC_IDE_##mode##_TPM | \ + SBC_IDE_##mode##_TA diff --git a/trunk/include/asm-mips/mach-au1x00/au1xxx_psc.h b/trunk/include/asm-mips/mach-au1x00/au1xxx_psc.h index dae4eca2417e..1bd4e27caf6b 100644 --- a/trunk/include/asm-mips/mach-au1x00/au1xxx_psc.h +++ b/trunk/include/asm-mips/mach-au1x00/au1xxx_psc.h @@ -33,6 +33,7 @@ #ifndef _AU1000_PSC_H_ #define _AU1000_PSC_H_ + /* The PSC base addresses. */ #ifdef CONFIG_SOC_AU1550 #define PSC0_BASE_ADDR 0xb1a00000 @@ -46,8 +47,8 @@ #define PSC1_BASE_ADDR 0xb1b00000 #endif -/* - * The PSC select and control registers are common to all protocols. +/* The PSC select and control registers are common to + * all protocols. */ #define PSC_SEL_OFFSET 0x00000000 #define PSC_CTRL_OFFSET 0x00000004 @@ -58,17 +59,18 @@ #define PSC_SEL_CLK_SERCLK (2 << 4) #define PSC_SEL_PS_MASK 0x00000007 -#define PSC_SEL_PS_DISABLED 0 -#define PSC_SEL_PS_SPIMODE 2 -#define PSC_SEL_PS_I2SMODE 3 -#define PSC_SEL_PS_AC97MODE 4 -#define PSC_SEL_PS_SMBUSMODE 5 - -#define PSC_CTRL_DISABLE 0 -#define PSC_CTRL_SUSPEND 2 -#define PSC_CTRL_ENABLE 3 - -/* AC97 Registers. */ +#define PSC_SEL_PS_DISABLED (0) +#define PSC_SEL_PS_SPIMODE (2) +#define PSC_SEL_PS_I2SMODE (3) +#define PSC_SEL_PS_AC97MODE (4) +#define PSC_SEL_PS_SMBUSMODE (5) + +#define PSC_CTRL_DISABLE (0) +#define PSC_CTRL_SUSPEND (2) +#define PSC_CTRL_ENABLE (3) + +/* AC97 Registers. +*/ #define PSC_AC97CFG_OFFSET 0x00000008 #define PSC_AC97MSK_OFFSET 0x0000000c #define PSC_AC97PCR_OFFSET 0x00000010 @@ -93,7 +95,8 @@ #define PSC_AC97GPO (AC97_PSC_BASE + PSC_AC97GPO_OFFSET) #define PSC_AC97GPI (AC97_PSC_BASE + PSC_AC97GPI_OFFSET) -/* AC97 Config Register. */ +/* AC97 Config Register. +*/ #define PSC_AC97CFG_RT_MASK (3 << 30) #define PSC_AC97CFG_RT_FIFO1 (0 << 30) #define PSC_AC97CFG_RT_FIFO2 (1 << 30) @@ -115,19 +118,20 @@ #define PSC_AC97CFG_RXSLOT_MASK (0x3ff << 1) #define PSC_AC97CFG_GE_ENABLE (1) -/* Enable slots 3-12. */ +/* Enable slots 3-12. +*/ #define PSC_AC97CFG_TXSLOT_ENA(x) (1 << (((x) - 3) + 11)) #define PSC_AC97CFG_RXSLOT_ENA(x) (1 << (((x) - 3) + 1)) -/* - * The word length equation is ((x) * 2) + 2, so choose 'x' appropriately. +/* The word length equation is ((x) * 2) + 2, so choose 'x' appropriately. * The only sensible numbers are 7, 9, or possibly 11. Nah, just do the * arithmetic in the macro. */ -#define PSC_AC97CFG_SET_LEN(x) (((((x) - 2) / 2) & 0xf) << 21) +#define PSC_AC97CFG_SET_LEN(x) (((((x)-2)/2) & 0xf) << 21) #define PSC_AC97CFG_GET_LEN(x) (((((x) >> 21) & 0xf) * 2) + 2) -/* AC97 Mask Register. */ +/* AC97 Mask Register. +*/ #define PSC_AC97MSK_GR (1 << 25) #define PSC_AC97MSK_CD (1 << 24) #define PSC_AC97MSK_RR (1 << 13) @@ -144,7 +148,8 @@ PSC_AC97MSK_TO | PSC_AC97MSK_TU | \ PSC_AC97MSK_RD | PSC_AC97MSK_TD) -/* AC97 Protocol Control Register. */ +/* AC97 Protocol Control Register. +*/ #define PSC_AC97PCR_RC (1 << 6) #define PSC_AC97PCR_RP (1 << 5) #define PSC_AC97PCR_RS (1 << 4) @@ -152,7 +157,8 @@ #define PSC_AC97PCR_TP (1 << 1) #define PSC_AC97PCR_TS (1 << 0) -/* AC97 Status register (read only). */ +/* AC97 Status register (read only). +*/ #define PSC_AC97STAT_CB (1 << 26) #define PSC_AC97STAT_CP (1 << 25) #define PSC_AC97STAT_CR (1 << 24) @@ -168,7 +174,8 @@ #define PSC_AC97STAT_DR (1 << 1) #define PSC_AC97STAT_SR (1 << 0) -/* AC97 Event Register. */ +/* AC97 Event Register. +*/ #define PSC_AC97EVNT_GR (1 << 25) #define PSC_AC97EVNT_CD (1 << 24) #define PSC_AC97EVNT_RR (1 << 13) @@ -180,18 +187,22 @@ #define PSC_AC97EVNT_RD (1 << 5) #define PSC_AC97EVNT_TD (1 << 4) -/* CODEC Command Register. */ +/* CODEC Command Register. +*/ #define PSC_AC97CDC_RD (1 << 25) #define PSC_AC97CDC_ID_MASK (3 << 23) #define PSC_AC97CDC_INDX_MASK (0x7f << 16) -#define PSC_AC97CDC_ID(x) (((x) & 0x03) << 23) +#define PSC_AC97CDC_ID(x) (((x) & 0x3) << 23) #define PSC_AC97CDC_INDX(x) (((x) & 0x7f) << 16) -/* AC97 Reset Control Register. */ +/* AC97 Reset Control Register. +*/ #define PSC_AC97RST_RST (1 << 1) #define PSC_AC97RST_SNC (1 << 0) -/* PSC in I2S Mode. */ + +/* PSC in I2S Mode. +*/ typedef struct psc_i2s { u32 psc_sel; u32 psc_ctrl; @@ -204,7 +215,8 @@ typedef struct psc_i2s { u32 psc_i2sudf; } psc_i2s_t; -/* I2S Config Register. */ +/* I2S Config Register. +*/ #define PSC_I2SCFG_RT_MASK (3 << 30) #define PSC_I2SCFG_RT_FIFO1 (0 << 30) #define PSC_I2SCFG_RT_FIFO2 (1 << 30) @@ -235,7 +247,8 @@ typedef struct psc_i2s { #define PSC_I2SCFG_MLJ (1 << 10) #define PSC_I2SCFG_XM (1 << 9) -/* The word length equation is simply LEN+1. */ +/* The word length equation is simply LEN+1. + */ #define PSC_I2SCFG_SET_LEN(x) ((((x) - 1) & 0x1f) << 4) #define PSC_I2SCFG_GET_LEN(x) ((((x) >> 4) & 0x1f) + 1) @@ -243,7 +256,8 @@ typedef struct psc_i2s { #define PSC_I2SCFG_MLF (1 << 1) #define PSC_I2SCFG_MS (1 << 0) -/* I2S Mask Register. */ +/* I2S Mask Register. +*/ #define PSC_I2SMSK_RR (1 << 13) #define PSC_I2SMSK_RO (1 << 12) #define PSC_I2SMSK_RU (1 << 11) @@ -257,7 +271,8 @@ typedef struct psc_i2s { PSC_I2SMSK_TO | PSC_I2SMSK_TU | \ PSC_I2SMSK_RD | PSC_I2SMSK_TD) -/* I2S Protocol Control Register. */ +/* I2S Protocol Control Register. +*/ #define PSC_I2SPCR_RC (1 << 6) #define PSC_I2SPCR_RP (1 << 5) #define PSC_I2SPCR_RS (1 << 4) @@ -265,7 +280,8 @@ typedef struct psc_i2s { #define PSC_I2SPCR_TP (1 << 1) #define PSC_I2SPCR_TS (1 << 0) -/* I2S Status register (read only). */ +/* I2S Status register (read only). +*/ #define PSC_I2SSTAT_RF (1 << 13) #define PSC_I2SSTAT_RE (1 << 12) #define PSC_I2SSTAT_RR (1 << 11) @@ -278,7 +294,8 @@ typedef struct psc_i2s { #define PSC_I2SSTAT_DR (1 << 1) #define PSC_I2SSTAT_SR (1 << 0) -/* I2S Event Register. */ +/* I2S Event Register. +*/ #define PSC_I2SEVNT_RR (1 << 13) #define PSC_I2SEVNT_RO (1 << 12) #define PSC_I2SEVNT_RU (1 << 11) @@ -288,7 +305,8 @@ typedef struct psc_i2s { #define PSC_I2SEVNT_RD (1 << 5) #define PSC_I2SEVNT_TD (1 << 4) -/* PSC in SPI Mode. */ +/* PSC in SPI Mode. +*/ typedef struct psc_spi { u32 psc_sel; u32 psc_ctrl; @@ -300,7 +318,8 @@ typedef struct psc_spi { u32 psc_spitxrx; } psc_spi_t; -/* SPI Config Register. */ +/* SPI Config Register. +*/ #define PSC_SPICFG_RT_MASK (3 << 30) #define PSC_SPICFG_RT_FIFO1 (0 << 30) #define PSC_SPICFG_RT_FIFO2 (1 << 30) @@ -336,7 +355,8 @@ typedef struct psc_spi { #define PSC_SPICFG_MLF (1 << 1) #define PSC_SPICFG_MO (1 << 0) -/* SPI Mask Register. */ +/* SPI Mask Register. +*/ #define PSC_SPIMSK_MM (1 << 16) #define PSC_SPIMSK_RR (1 << 13) #define PSC_SPIMSK_RO (1 << 12) @@ -351,14 +371,16 @@ typedef struct psc_spi { PSC_SPIMSK_TU | PSC_SPIMSK_SD | \ PSC_SPIMSK_MD) -/* SPI Protocol Control Register. */ +/* SPI Protocol Control Register. +*/ #define PSC_SPIPCR_RC (1 << 6) #define PSC_SPIPCR_SP (1 << 5) #define PSC_SPIPCR_SS (1 << 4) #define PSC_SPIPCR_TC (1 << 2) #define PSC_SPIPCR_MS (1 << 0) -/* SPI Status register (read only). */ +/* SPI Status register (read only). +*/ #define PSC_SPISTAT_RF (1 << 13) #define PSC_SPISTAT_RE (1 << 12) #define PSC_SPISTAT_RR (1 << 11) @@ -371,7 +393,8 @@ typedef struct psc_spi { #define PSC_SPISTAT_DR (1 << 1) #define PSC_SPISTAT_SR (1 << 0) -/* SPI Event Register. */ +/* SPI Event Register. +*/ #define PSC_SPIEVNT_MM (1 << 16) #define PSC_SPIEVNT_RR (1 << 13) #define PSC_SPIEVNT_RO (1 << 12) @@ -382,11 +405,13 @@ typedef struct psc_spi { #define PSC_SPIEVNT_SD (1 << 5) #define PSC_SPIEVNT_MD (1 << 4) -/* Transmit register control. */ +/* Transmit register control. +*/ #define PSC_SPITXRX_LC (1 << 29) #define PSC_SPITXRX_SR (1 << 28) -/* PSC in SMBus (I2C) Mode. */ +/* PSC in SMBus (I2C) Mode. +*/ typedef struct psc_smb { u32 psc_sel; u32 psc_ctrl; @@ -399,7 +424,8 @@ typedef struct psc_smb { u32 psc_smbtmr; } psc_smb_t; -/* SMBus Config Register. */ +/* SMBus Config Register. +*/ #define PSC_SMBCFG_RT_MASK (3 << 30) #define PSC_SMBCFG_RT_FIFO1 (0 << 30) #define PSC_SMBCFG_RT_FIFO2 (1 << 30) @@ -426,7 +452,8 @@ typedef struct psc_smb { #define PSC_SMBCFG_SET_SLV(x) (((x) & 0x7f) << 1) -/* SMBus Mask Register. */ +/* SMBus Mask Register. +*/ #define PSC_SMBMSK_DN (1 << 30) #define PSC_SMBMSK_AN (1 << 29) #define PSC_SMBMSK_AL (1 << 28) @@ -444,11 +471,13 @@ typedef struct psc_smb { PSC_SMBMSK_TU | PSC_SMBMSK_SD | \ PSC_SMBMSK_MD) -/* SMBus Protocol Control Register. */ +/* SMBus Protocol Control Register. +*/ #define PSC_SMBPCR_DC (1 << 2) #define PSC_SMBPCR_MS (1 << 0) -/* SMBus Status register (read only). */ +/* SMBus Status register (read only). +*/ #define PSC_SMBSTAT_BB (1 << 28) #define PSC_SMBSTAT_RF (1 << 13) #define PSC_SMBSTAT_RE (1 << 12) @@ -462,7 +491,8 @@ typedef struct psc_smb { #define PSC_SMBSTAT_DR (1 << 1) #define PSC_SMBSTAT_SR (1 << 0) -/* SMBus Event Register. */ +/* SMBus Event Register. +*/ #define PSC_SMBEVNT_DN (1 << 30) #define PSC_SMBEVNT_AN (1 << 29) #define PSC_SMBEVNT_AL (1 << 28) @@ -480,13 +510,15 @@ typedef struct psc_smb { PSC_SMBEVNT_TU | PSC_SMBEVNT_SD | \ PSC_SMBEVNT_MD) -/* Transmit register control. */ +/* Transmit register control. +*/ #define PSC_SMBTXRX_RSR (1 << 28) #define PSC_SMBTXRX_STP (1 << 29) -#define PSC_SMBTXRX_DATAMASK 0xff +#define PSC_SMBTXRX_DATAMASK (0xff) -/* SMBus protocol timers register. */ -#define PSC_SMBTMR_SET_TH(x) (((x) & 0x03) << 30) +/* SMBus protocol timers register. +*/ +#define PSC_SMBTMR_SET_TH(x) (((x) & 0x3) << 30) #define PSC_SMBTMR_SET_PS(x) (((x) & 0x1f) << 25) #define PSC_SMBTMR_SET_PU(x) (((x) & 0x1f) << 20) #define PSC_SMBTMR_SET_SH(x) (((x) & 0x1f) << 15) @@ -494,4 +526,5 @@ typedef struct psc_smb { #define PSC_SMBTMR_SET_CL(x) (((x) & 0x1f) << 5) #define PSC_SMBTMR_SET_CH(x) (((x) & 0x1f) << 0) + #endif /* _AU1000_PSC_H_ */ diff --git a/trunk/include/asm-mips/mach-db1x00/db1200.h b/trunk/include/asm-mips/mach-db1x00/db1200.h index 27f26102b1bb..eedd048a7261 100644 --- a/trunk/include/asm-mips/mach-db1x00/db1200.h +++ b/trunk/include/asm-mips/mach-db1x00/db1200.h @@ -1,6 +1,6 @@ /* - * AMD Alchemy DBAu1200 Reference Board - * Board register defines. + * AMD Alchemy DB1200 Referrence Board + * Board Registers defines. * * ######################################################################## * @@ -27,25 +27,26 @@ #include #include -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX +// This is defined in au1000.h with bogus value +#undef AU1X00_EXTERNAL_INT -/* - * SPI and SMB are muxed on the DBAu1200 board. - * Refer to board documentation. +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX + +/* SPI and SMB are muxed on the Pb1200 board. + Refer to board documentation. */ -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define SMBUS_PSC_BASE PSC0_BASE_ADDR -/* - * AC'97 and I2S are muxed on the DBAu1200 board. - * Refer to board documentation. +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define SMBUS_PSC_BASE PSC0_BASE_ADDR +/* AC97 and I2S are muxed on the Pb1200 board. + Refer to board documentation. */ -#define AC97_PSC_BASE PSC1_BASE_ADDR +#define AC97_PSC_BASE PSC1_BASE_ADDR #define I2S_PSC_BASE PSC1_BASE_ADDR -#define BCSR_KSEG1_ADDR 0xB9800000 +#define BCSR_KSEG1_ADDR 0xB9800000 typedef volatile struct { @@ -101,9 +102,9 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_STATUS_SWAPBOOT 0x0040 #define BCSR_STATUS_FLASHBUSY 0x0100 #define BCSR_STATUS_IDECBLID 0x0200 -#define BCSR_STATUS_SD0WP 0x0400 -#define BCSR_STATUS_U0RXD 0x1000 -#define BCSR_STATUS_U1RXD 0x2000 +#define BCSR_STATUS_SD0WP 0x0400 +#define BCSR_STATUS_U0RXD 0x1000 +#define BCSR_STATUS_U1RXD 0x2000 #define BCSR_SWITCHES_OCTAL 0x00FF #define BCSR_SWITCHES_DIP_1 0x0080 @@ -121,8 +122,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_RESETS_DC 0x0004 #define BCSR_RESETS_IDE 0x0008 #define BCSR_RESETS_TV 0x0010 -/* Not resets but in the same register */ -#define BCSR_RESETS_PWMR1MUX 0x0800 +/* not resets but in the same register */ +#define BCSR_RESETS_PWMR1mUX 0x0800 #define BCSR_RESETS_PCS0MUX 0x1000 #define BCSR_RESETS_PCS1MUX 0x2000 #define BCSR_RESETS_SPISEL 0x4000 @@ -159,7 +160,7 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_INT_PC0STSCHG 0x0008 #define BCSR_INT_PC1 0x0010 #define BCSR_INT_PC1STSCHG 0x0020 -#define BCSR_INT_DC 0x0040 +#define BCSR_INT_DC 0x0040 #define BCSR_INT_FLASHBUSY 0x0080 #define BCSR_INT_PC0INSERT 0x0100 #define BCSR_INT_PC0EJECT 0x0200 @@ -178,10 +179,10 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1 #define IDE_RQSIZE 128 -#define NAND_PHYS_ADDR 0x20000000 +#define NAND_PHYS_ADDR 0x20000000 /* - * External Interrupts for DBAu1200 as of 8/6/2004. + * External Interrupts for Pb1200 as of 8/6/2004. * Bit positions in the CPLD registers can be calculated by taking * the interrupt define and subtracting the DB1200_INT_BEGIN value. * @@ -210,21 +211,23 @@ enum external_pb1200_ints { }; -/* - * DBAu1200 specific PCMCIA defines for drivers/pcmcia/au1000_db1x00.c - */ -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) +/* For drivers/pcmcia/au1000_db1x00.c */ + +/* PCMCIA Db1x00 specific defines */ + +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP, SLOT) \ - ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) +#define SET_VCC_VPP(VCC, VPP, SLOT)\ + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) -#define BOARD_PC0_INT DB1200_PC0_INT -#define BOARD_PC1_INT DB1200_PC1_INT -#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1 << (8 + (2 * SOCKET))) +#define BOARD_PC0_INT DB1200_PC0_INT +#define BOARD_PC1_INT DB1200_PC1_INT +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) -/* NAND chip select */ +/* Nand chip select */ #define NAND_CS 1 #endif /* __ASM_DB1200_H */ + diff --git a/trunk/include/asm-mips/mach-db1x00/db1x00.h b/trunk/include/asm-mips/mach-db1x00/db1x00.h index 612ae90dbcb8..e7a88ba35833 100644 --- a/trunk/include/asm-mips/mach-db1x00/db1x00.h +++ b/trunk/include/asm-mips/mach-db1x00/db1x00.h @@ -1,8 +1,9 @@ /* - * AMD Alchemy DBAu1x00 Reference Boards + * AMD Alchemy DB1x00 Reference Boards * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * ######################################################################## @@ -31,26 +32,26 @@ #ifdef CONFIG_MIPS_DB1550 -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define AC97_PSC_BASE PSC1_BASE_ADDR -#define SMBUS_PSC_BASE PSC2_BASE_ADDR -#define I2S_PSC_BASE PSC3_BASE_ADDR +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define AC97_PSC_BASE PSC1_BASE_ADDR +#define SMBUS_PSC_BASE PSC2_BASE_ADDR +#define I2S_PSC_BASE PSC3_BASE_ADDR -#define BCSR_KSEG1_ADDR 0xAF000000 -#define NAND_PHYS_ADDR 0x20000000 +#define BCSR_KSEG1_ADDR 0xAF000000 +#define NAND_PHYS_ADDR 0x20000000 #else #define BCSR_KSEG1_ADDR 0xAE000000 #endif /* - * Overlay data structure of the DBAu1x00 board registers. - * Registers are located at physical 0E0000xx, KSEG1 0xAE0000xx. + * Overlay data structure of the Db1x00 board registers. + * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx */ typedef volatile struct { @@ -137,19 +138,18 @@ typedef volatile struct #define BCSR_SWRESET_RESET 0x0080 -/* PCMCIA DBAu1x00 specific defines */ -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) +/* PCMCIA Db1x00 specific defines */ +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) /* VPP/VCC */ #define SET_VCC_VPP(VCC, VPP, SLOT)\ - ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) +/* SD controller macros */ /* - * SD controller macros + * Detect card. */ - -/* Detect card. */ #define mmc_card_inserted(_n_, _res_) \ do { \ BCSR * const bcsr = (BCSR *)0xAE000000; \ @@ -176,10 +176,10 @@ typedef volatile struct unsigned long mmc_pwr, mmc_wp, board_specific; \ if ((_n_)) { \ mmc_pwr = BCSR_BOARD_SD1_PWR; \ - mmc_wp = BCSR_BOARD_SD1_WP; \ + mmc_wp = BCSR_BOARD_SD1_WP; \ } else { \ mmc_pwr = BCSR_BOARD_SD0_PWR; \ - mmc_wp = BCSR_BOARD_SD0_WP; \ + mmc_wp = BCSR_BOARD_SD0_WP; \ } \ board_specific = au_readl((unsigned long)(&bcsr->specific)); \ if (!(board_specific & mmc_wp)) {/* low means card present */ \ @@ -190,19 +190,17 @@ typedef volatile struct } while (0) -/* - * NAND defines - * - * Timing values as described in databook, * ns value stripped of the +/* NAND defines */ +/* Timing values as described in databook, * ns value stripped of * lower 2 bits. - * These defines are here rather than an Au1550 generic file because + * These defines are here rather than an SOC1550 generic file because * the parts chosen on another board may be different and may require * different timings. */ -#define NAND_T_H (18 >> 2) -#define NAND_T_PUL (30 >> 2) -#define NAND_T_SU (30 >> 2) -#define NAND_T_WH (30 >> 2) +#define NAND_T_H (18 >> 2) +#define NAND_T_PUL (30 >> 2) +#define NAND_T_SU (30 >> 2) +#define NAND_T_WH (30 >> 2) /* Bitfield shift amounts */ #define NAND_T_H_SHIFT 0 @@ -210,15 +208,16 @@ typedef volatile struct #define NAND_T_SU_SHIFT 8 #define NAND_T_WH_SHIFT 12 -#define NAND_TIMING (((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)) -#define NAND_CS 1 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) +#define NAND_CS 1 -/* Should be done by YAMON */ -#define NAND_STCFG 0x00400005 /* 8-bit NAND */ -#define NAND_STTIME 0x00007774 /* valid for 396 MHz SD=2 only */ -#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ +/* should be done by yamon */ +#define NAND_STCFG 0x00400005 /* 8-bit NAND */ +#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */ +#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ #endif /* __ASM_DB1X00_H */ + diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1000.h b/trunk/include/asm-mips/mach-pb1x00/pb1000.h index 6d1ff9060e44..b52e0e7ee3fb 100644 --- a/trunk/include/asm-mips/mach-pb1x00/pb1000.h +++ b/trunk/include/asm-mips/mach-pb1x00/pb1000.h @@ -1,8 +1,9 @@ /* - * Alchemy Semi Pb1000 Referrence Board + * Alchemy Semi PB1000 Referrence Board * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * ######################################################################## * @@ -27,61 +28,145 @@ #define __ASM_PB1000_H /* PCMCIA PB1000 specific defines */ -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) - -#define PB1000_PCR 0xBE000000 -# define PCR_SLOT_0_VPP0 (1 << 0) -# define PCR_SLOT_0_VPP1 (1 << 1) -# define PCR_SLOT_0_VCC0 (1 << 2) -# define PCR_SLOT_0_VCC1 (1 << 3) -# define PCR_SLOT_0_RST (1 << 4) -# define PCR_SLOT_1_VPP0 (1 << 8) -# define PCR_SLOT_1_VPP1 (1 << 9) -# define PCR_SLOT_1_VCC0 (1 << 10) -# define PCR_SLOT_1_VCC1 (1 << 11) -# define PCR_SLOT_1_RST (1 << 12) - -#define PB1000_MDR 0xBE000004 -# define MDR_PI (1 << 5) /* PCMCIA int latch */ -# define MDR_EPI (1 << 14) /* enable PCMCIA int */ -# define MDR_CPI (1 << 15) /* clear PCMCIA int */ - -#define PB1000_ACR1 0xBE000008 -# define ACR1_SLOT_0_CD1 (1 << 0) /* card detect 1 */ -# define ACR1_SLOT_0_CD2 (1 << 1) /* card detect 2 */ -# define ACR1_SLOT_0_READY (1 << 2) /* ready */ -# define ACR1_SLOT_0_STATUS (1 << 3) /* status change */ -# define ACR1_SLOT_0_VS1 (1 << 4) /* voltage sense 1 */ -# define ACR1_SLOT_0_VS2 (1 << 5) /* voltage sense 2 */ -# define ACR1_SLOT_0_INPACK (1 << 6) /* inpack pin status */ -# define ACR1_SLOT_1_CD1 (1 << 8) /* card detect 1 */ -# define ACR1_SLOT_1_CD2 (1 << 9) /* card detect 2 */ -# define ACR1_SLOT_1_READY (1 << 10) /* ready */ -# define ACR1_SLOT_1_STATUS (1 << 11) /* status change */ -# define ACR1_SLOT_1_VS1 (1 << 12) /* voltage sense 1 */ -# define ACR1_SLOT_1_VS2 (1 << 13) /* voltage sense 2 */ -# define ACR1_SLOT_1_INPACK (1 << 14) /* inpack pin status */ - -#define CPLD_AUX0 0xBE00000C -#define CPLD_AUX1 0xBE000010 -#define CPLD_AUX2 0xBE000014 +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) + +#define PB1000_PCR 0xBE000000 +# define PCR_SLOT_0_VPP0 (1<<0) +# define PCR_SLOT_0_VPP1 (1<<1) +# define PCR_SLOT_0_VCC0 (1<<2) +# define PCR_SLOT_0_VCC1 (1<<3) +# define PCR_SLOT_0_RST (1<<4) + +# define PCR_SLOT_1_VPP0 (1<<8) +# define PCR_SLOT_1_VPP1 (1<<9) +# define PCR_SLOT_1_VCC0 (1<<10) +# define PCR_SLOT_1_VCC1 (1<<11) +# define PCR_SLOT_1_RST (1<<12) + +#define PB1000_MDR 0xBE000004 +# define MDR_PI (1<<5) /* pcmcia int latch */ +# define MDR_EPI (1<<14) /* enable pcmcia int */ +# define MDR_CPI (1<<15) /* clear pcmcia int */ + +#define PB1000_ACR1 0xBE000008 +# define ACR1_SLOT_0_CD1 (1<<0) /* card detect 1 */ +# define ACR1_SLOT_0_CD2 (1<<1) /* card detect 2 */ +# define ACR1_SLOT_0_READY (1<<2) /* ready */ +# define ACR1_SLOT_0_STATUS (1<<3) /* status change */ +# define ACR1_SLOT_0_VS1 (1<<4) /* voltage sense 1 */ +# define ACR1_SLOT_0_VS2 (1<<5) /* voltage sense 2 */ +# define ACR1_SLOT_0_INPACK (1<<6) /* inpack pin status */ +# define ACR1_SLOT_1_CD1 (1<<8) /* card detect 1 */ +# define ACR1_SLOT_1_CD2 (1<<9) /* card detect 2 */ +# define ACR1_SLOT_1_READY (1<<10) /* ready */ +# define ACR1_SLOT_1_STATUS (1<<11) /* status change */ +# define ACR1_SLOT_1_VS1 (1<<12) /* voltage sense 1 */ +# define ACR1_SLOT_1_VS2 (1<<13) /* voltage sense 2 */ +# define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */ + +#define CPLD_AUX0 0xBE00000C +#define CPLD_AUX1 0xBE000010 +#define CPLD_AUX2 0xBE000014 /* Voltage levels */ /* VPPEN1 - VPPEN0 */ -#define VPP_GND ((0 << 1) | (0 << 0)) -#define VPP_5V ((1 << 1) | (0 << 0)) -#define VPP_3V ((0 << 1) | (1 << 0)) -#define VPP_12V ((0 << 1) | (1 << 0)) -#define VPP_HIZ ((1 << 1) | (1 << 0)) +#define VPP_GND ((0<<1) | (0<<0)) +#define VPP_5V ((1<<1) | (0<<0)) +#define VPP_3V ((0<<1) | (1<<0)) +#define VPP_12V ((0<<1) | (1<<0)) +#define VPP_HIZ ((1<<1) | (1<<0)) /* VCCEN1 - VCCEN0 */ -#define VCC_3V ((0 << 1) | (1 << 0)) -#define VCC_5V ((1 << 1) | (0 << 0)) -#define VCC_HIZ ((0 << 1) | (0 << 0)) +#define VCC_3V ((0<<1) | (1<<0)) +#define VCC_5V ((1<<1) | (0<<0)) +#define VCC_HIZ ((0<<1) | (0<<0)) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP, SLOT) \ - ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) +#define SET_VCC_VPP(VCC, VPP, SLOT)\ + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) + + +/* PCI PB1000 specific defines */ +/* The reason these defines are here instead of au1000.h is because + * the Au1000 does not have a PCI bus controller so the PCI implementation + * on the some of the older Pb1000 boards was very board specific. + */ +#define PCI_CONFIG_BASE 0xBA020000 /* the only external slot */ + +#define SDRAM_DEVID 0xBA010000 +#define SDRAM_CMD 0xBA010004 +#define SDRAM_CLASS 0xBA010008 +#define SDRAM_MISC 0xBA01000C +#define SDRAM_MBAR 0xBA010010 + +#define PCI_IO_DATA_PORT 0xBA800000 + +#define PCI_IO_ADDR 0xBE00001C +#define PCI_INT_ACK 0xBBC00000 +#define PCI_IO_READ 0xBBC00020 +#define PCI_IO_WRITE 0xBBC00030 + +#define PCI_BRIDGE_CONFIG 0xBE000018 + +#define PCI_IO_START 0x10000000 +#define PCI_IO_END 0x1000ffff +#define PCI_MEM_START 0x18000000 +#define PCI_MEM_END 0x18ffffff + +#define PCI_FIRST_DEVFN 0 +#define PCI_LAST_DEVFN 1 + +static inline u8 au_pci_io_readb(u32 addr) +{ + writel(addr, PCI_IO_ADDR); + writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG); + return (readl(PCI_IO_DATA_PORT) & 0xff); +} + +static inline u16 au_pci_io_readw(u32 addr) +{ + writel(addr, PCI_IO_ADDR); + writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG); + return (readl(PCI_IO_DATA_PORT) & 0xffff); +} + +static inline u32 au_pci_io_readl(u32 addr) +{ + writel(addr, PCI_IO_ADDR); + writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff), PCI_BRIDGE_CONFIG); + return readl(PCI_IO_DATA_PORT); +} + +static inline void au_pci_io_writeb(u8 val, u32 addr) +{ + writel(addr, PCI_IO_ADDR); + writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG); + writel(val, PCI_IO_DATA_PORT); +} + +static inline void au_pci_io_writew(u16 val, u32 addr) +{ + writel(addr, PCI_IO_ADDR); + writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG); + writel(val, PCI_IO_DATA_PORT); +} + +static inline void au_pci_io_writel(u32 val, u32 addr) +{ + writel(addr, PCI_IO_ADDR); + writel(readl(PCI_BRIDGE_CONFIG) & 0xffffcfff, PCI_BRIDGE_CONFIG); + writel(val, PCI_IO_DATA_PORT); +} + +static inline void set_sdram_extbyte(void) +{ + writel(readl(PCI_BRIDGE_CONFIG) & 0xffffff00, PCI_BRIDGE_CONFIG); +} + +static inline void set_slot_extbyte(void) +{ + writel((readl(PCI_BRIDGE_CONFIG) & 0xffffbf00) | 0x18, PCI_BRIDGE_CONFIG); +} #endif /* __ASM_PB1000_H */ diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1100.h b/trunk/include/asm-mips/mach-pb1x00/pb1100.h index b1a60f1cbd02..63aa3926b297 100644 --- a/trunk/include/asm-mips/mach-pb1x00/pb1100.h +++ b/trunk/include/asm-mips/mach-pb1x00/pb1100.h @@ -1,8 +1,9 @@ /* - * Alchemy Semi Pb1100 Referrence Board + * Alchemy Semi PB1100 Referrence Board * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * ######################################################################## * @@ -26,60 +27,59 @@ #ifndef __ASM_PB1100_H #define __ASM_PB1100_H -#define PB1100_IDENT 0xAE000000 -#define BOARD_STATUS_REG 0xAE000004 -# define PB1100_ROM_SEL (1 << 15) -# define PB1100_ROM_SIZ (1 << 14) -# define PB1100_SWAP_BOOT (1 << 13) -# define PB1100_FLASH_WP (1 << 12) -# define PB1100_ROM_H_STS (1 << 11) -# define PB1100_ROM_L_STS (1 << 10) -# define PB1100_FLASH_H_STS (1 << 9) -# define PB1100_FLASH_L_STS (1 << 8) -# define PB1100_SRAM_SIZ (1 << 7) -# define PB1100_TSC_BUSY (1 << 6) -# define PB1100_PCMCIA_VS_MASK (3 << 4) -# define PB1100_RS232_CD (1 << 3) -# define PB1100_RS232_CTS (1 << 2) -# define PB1100_RS232_DSR (1 << 1) -# define PB1100_RS232_RI (1 << 0) +#define PB1100_IDENT 0xAE000000 +#define BOARD_STATUS_REG 0xAE000004 +# define PB1100_ROM_SEL (1<<15) +# define PB1100_ROM_SIZ (1<<14) +# define PB1100_SWAP_BOOT (1<<13) +# define PB1100_FLASH_WP (1<<12) +# define PB1100_ROM_H_STS (1<<11) +# define PB1100_ROM_L_STS (1<<10) +# define PB1100_FLASH_H_STS (1<<9) +# define PB1100_FLASH_L_STS (1<<8) +# define PB1100_SRAM_SIZ (1<<7) +# define PB1100_TSC_BUSY (1<<6) +# define PB1100_PCMCIA_VS_MASK (3<<4) +# define PB1100_RS232_CD (1<<3) +# define PB1100_RS232_CTS (1<<2) +# define PB1100_RS232_DSR (1<<1) +# define PB1100_RS232_RI (1<<0) -#define PB1100_IRDA_RS232 0xAE00000C -# define PB1100_IRDA_FULL (0 << 14) /* full power */ -# define PB1100_IRDA_SHUTDOWN (1 << 14) -# define PB1100_IRDA_TT (2 << 14) /* 2/3 power */ -# define PB1100_IRDA_OT (3 << 14) /* 1/3 power */ -# define PB1100_IRDA_FIR (1 << 13) +#define PB1100_IRDA_RS232 0xAE00000C +# define PB1100_IRDA_FULL (0<<14) /* full power */ +# define PB1100_IRDA_SHUTDOWN (1<<14) +# define PB1100_IRDA_TT (2<<14) /* 2/3 power */ +# define PB1100_IRDA_OT (3<<14) /* 1/3 power */ +# define PB1100_IRDA_FIR (1<<13) -#define PCMCIA_BOARD_REG 0xAE000010 -# define PB1100_SD_WP1_RO (1 << 15) /* read only */ -# define PB1100_SD_WP0_RO (1 << 14) /* read only */ -# define PB1100_SD_PWR1 (1 << 11) /* applies power to SD1 */ -# define PB1100_SD_PWR0 (1 << 10) /* applies power to SD0 */ -# define PB1100_SEL_SD_CONN1 (1 << 9) -# define PB1100_SEL_SD_CONN0 (1 << 8) -# define PC_DEASSERT_RST (1 << 7) -# define PC_DRV_EN (1 << 4) +#define PCMCIA_BOARD_REG 0xAE000010 +# define PB1100_SD_WP1_RO (1<<15) /* read only */ +# define PB1100_SD_WP0_RO (1<<14) /* read only */ +# define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */ +# define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */ +# define PB1100_SEL_SD_CONN1 (1<<9) +# define PB1100_SEL_SD_CONN0 (1<<8) +# define PC_DEASSERT_RST (1<<7) +# define PC_DRV_EN (1<<4) -#define PB1100_G_CONTROL 0xAE000014 /* graphics control */ +#define PB1100_G_CONTROL 0xAE000014 /* graphics control */ -#define PB1100_RST_VDDI 0xAE00001C -# define PB1100_SOFT_RESET (1 << 15) /* clear to reset the board */ -# define PB1100_VDDI_MASK 0x1F +#define PB1100_RST_VDDI 0xAE00001C +# define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */ +# define PB1100_VDDI_MASK (0x1F) -#define PB1100_LEDS 0xAE000018 +#define PB1100_LEDS 0xAE000018 -/* - * 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED. - * 7:0 is the LED Display's decimal points. +/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED. + * 7:0 is the LED Display's decimal points. */ -#define PB1100_HEX_LED 0xAE000018 +#define PB1100_HEX_LED 0xAE000018 -/* PCMCIA Pb1100 specific defines */ -#define PCMCIA_MAX_SOCK 0 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) +/* PCMCIA PB1100 specific defines */ +#define PCMCIA_MAX_SOCK 0 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP) (((VCC) << 2) | ((VPP) << 0)) +#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0)) #endif /* __ASM_PB1100_H */ diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1200.h b/trunk/include/asm-mips/mach-pb1x00/pb1200.h index c8618df88cb5..e2c6bcac3b42 100644 --- a/trunk/include/asm-mips/mach-pb1x00/pb1200.h +++ b/trunk/include/asm-mips/mach-pb1x00/pb1200.h @@ -1,5 +1,5 @@ /* - * AMD Alchemy Pb1200 Referrence Board + * AMD Alchemy PB1200 Referrence Board * Board Registers defines. * * ######################################################################## @@ -27,20 +27,21 @@ #include #include -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX +// This is defined in au1000.h with bogus value +#undef AU1X00_EXTERNAL_INT -/* - * SPI and SMB are muxed on the Pb1200 board. - * Refer to board documentation. +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX + +/* SPI and SMB are muxed on the Pb1200 board. + Refer to board documentation. */ -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define SMBUS_PSC_BASE PSC0_BASE_ADDR -/* - * AC97 and I2S are muxed on the Pb1200 board. - * Refer to board documentation. +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define SMBUS_PSC_BASE PSC0_BASE_ADDR +/* AC97 and I2S are muxed on the Pb1200 board. + Refer to board documentation. */ #define AC97_PSC_BASE PSC1_BASE_ADDR #define I2S_PSC_BASE PSC1_BASE_ADDR @@ -101,10 +102,10 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_STATUS_SWAPBOOT 0x0040 #define BCSR_STATUS_FLASHBUSY 0x0100 #define BCSR_STATUS_IDECBLID 0x0200 -#define BCSR_STATUS_SD0WP 0x0400 -#define BCSR_STATUS_SD1WP 0x0800 -#define BCSR_STATUS_U0RXD 0x1000 -#define BCSR_STATUS_U1RXD 0x2000 +#define BCSR_STATUS_SD0WP 0x0400 +#define BCSR_STATUS_SD1WP 0x0800 +#define BCSR_STATUS_U0RXD 0x1000 +#define BCSR_STATUS_U1RXD 0x2000 #define BCSR_SWITCHES_OCTAL 0x00FF #define BCSR_SWITCHES_DIP_1 0x0080 @@ -122,11 +123,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_RESETS_DC 0x0004 #define BCSR_RESETS_IDE 0x0008 /* not resets but in the same register */ -#define BCSR_RESETS_WSCFSM 0x0800 +#define BCSR_RESETS_WSCFSM 0x0800 #define BCSR_RESETS_PCS0MUX 0x1000 #define BCSR_RESETS_PCS1MUX 0x2000 #define BCSR_RESETS_SPISEL 0x4000 -#define BCSR_RESETS_SD1MUX 0x8000 +#define BCSR_RESETS_SD1MUX 0x8000 #define BCSR_PCMCIA_PC0VPP 0x0003 #define BCSR_PCMCIA_PC0VCC 0x000C @@ -162,7 +163,7 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_INT_PC0STSCHG 0x0008 #define BCSR_INT_PC1 0x0010 #define BCSR_INT_PC1STSCHG 0x0020 -#define BCSR_INT_DC 0x0040 +#define BCSR_INT_DC 0x0040 #define BCSR_INT_FLASHBUSY 0x0080 #define BCSR_INT_PC0INSERT 0x0100 #define BCSR_INT_PC0EJECT 0x0200 @@ -173,6 +174,14 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_INT_SD1INSERT 0x4000 #define BCSR_INT_SD1EJECT 0x8000 +/* PCMCIA Db1x00 specific defines */ +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) + +/* VPP/VCC */ +#define SET_VCC_VPP(VCC, VPP, SLOT)\ + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) + #define SMC91C111_PHYS_ADDR 0x0D000300 #define SMC91C111_INT PB1200_ETH_INT @@ -183,19 +192,18 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1 #define IDE_RQSIZE 128 -#define NAND_PHYS_ADDR 0x1C000000 +#define NAND_PHYS_ADDR 0x1C000000 -/* - * Timing values as described in databook, * ns value stripped of +/* Timing values as described in databook, * ns value stripped of * lower 2 bits. - * These defines are here rather than an Au1200 generic file because + * These defines are here rather than an SOC1200 generic file because * the parts chosen on another board may be different and may require * different timings. */ -#define NAND_T_H (18 >> 2) -#define NAND_T_PUL (30 >> 2) -#define NAND_T_SU (30 >> 2) -#define NAND_T_WH (30 >> 2) +#define NAND_T_H (18 >> 2) +#define NAND_T_PUL (30 >> 2) +#define NAND_T_SU (30 >> 2) +#define NAND_T_WH (30 >> 2) /* Bitfield shift amounts */ #define NAND_T_H_SHIFT 0 @@ -203,10 +211,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define NAND_T_SU_SHIFT 8 #define NAND_T_WH_SHIFT 12 -#define NAND_TIMING (((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)) +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) + /* * External Interrupts for Pb1200 as of 8/6/2004. @@ -239,21 +248,13 @@ enum external_pb1200_ints { PB1200_INT_END = PB1200_INT_BEGIN + 15 }; -/* - * Pb1200 specific PCMCIA defines for drivers/pcmcia/au1000_db1x00.c - */ -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) +/* For drivers/pcmcia/au1000_db1x00.c */ +#define BOARD_PC0_INT PB1200_PC0_INT +#define BOARD_PC1_INT PB1200_PC1_INT +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) -/* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP, SLOT) \ - ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) - -#define BOARD_PC0_INT PB1200_PC0_INT -#define BOARD_PC1_INT PB1200_PC1_INT -#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1 << (8 + (2 * SOCKET))) - -/* NAND chip select */ +/* Nand chip select */ #define NAND_CS 1 #endif /* __ASM_PB1200_H */ + diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1500.h b/trunk/include/asm-mips/mach-pb1x00/pb1500.h index da51a2eb7b82..ff6d40c87a25 100644 --- a/trunk/include/asm-mips/mach-pb1x00/pb1500.h +++ b/trunk/include/asm-mips/mach-pb1x00/pb1500.h @@ -1,8 +1,9 @@ /* - * Alchemy Semi Pb1500 Referrence Board + * Alchemy Semi PB1500 Referrence Board * - * Copyright 2001, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. + * Copyright 2001 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ppopov@mvista.com or source@mvista.com * * ######################################################################## * @@ -26,24 +27,25 @@ #ifndef __ASM_PB1500_H #define __ASM_PB1500_H -#define IDENT_BOARD_REG 0xAE000000 -#define BOARD_STATUS_REG 0xAE000004 -#define PCI_BOARD_REG 0xAE000010 -#define PCMCIA_BOARD_REG 0xAE000010 -# define PC_DEASSERT_RST 0x80 -# define PC_DRV_EN 0x10 -#define PB1500_G_CONTROL 0xAE000014 -#define PB1500_RST_VDDI 0xAE00001C -#define PB1500_LEDS 0xAE000018 -#define PB1500_HEX_LED 0xAF000004 -#define PB1500_HEX_LED_BLANK 0xAF000008 +#define IDENT_BOARD_REG 0xAE000000 +#define BOARD_STATUS_REG 0xAE000004 +#define PCI_BOARD_REG 0xAE000010 +#define PCMCIA_BOARD_REG 0xAE000010 + #define PC_DEASSERT_RST 0x80 + #define PC_DRV_EN 0x10 +#define PB1500_G_CONTROL 0xAE000014 +#define PB1500_RST_VDDI 0xAE00001C +#define PB1500_LEDS 0xAE000018 -/* PCMCIA Pb1500 specific defines */ -#define PCMCIA_MAX_SOCK 0 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) +#define PB1500_HEX_LED 0xAF000004 +#define PB1500_HEX_LED_BLANK 0xAF000008 + +/* PCMCIA PB1500 specific defines */ +#define PCMCIA_MAX_SOCK 0 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP) (((VCC) << 2) | ((VPP) << 0)) +#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0)) #endif /* __ASM_PB1500_H */ diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1550.h b/trunk/include/asm-mips/mach-pb1x00/pb1550.h index 6704a11497db..c2ab0e2df4ae 100644 --- a/trunk/include/asm-mips/mach-pb1x00/pb1550.h +++ b/trunk/include/asm-mips/mach-pb1x00/pb1550.h @@ -30,15 +30,15 @@ #include #include -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define AC97_PSC_BASE PSC1_BASE_ADDR -#define SMBUS_PSC_BASE PSC2_BASE_ADDR -#define I2S_PSC_BASE PSC3_BASE_ADDR +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define AC97_PSC_BASE PSC1_BASE_ADDR +#define SMBUS_PSC_BASE PSC2_BASE_ADDR +#define I2S_PSC_BASE PSC3_BASE_ADDR #define BCSR_PHYS_ADDR 0xAF000000 @@ -129,12 +129,12 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR; #define BCSR_SYSTEM_POWEROFF 0x4000 #define BCSR_SYSTEM_RESET 0x8000 -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP, SLOT) \ - ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) +#define SET_VCC_VPP(VCC, VPP, SLOT)\ + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) #if defined(CONFIG_MTD_PB1550_BOOT) && defined(CONFIG_MTD_PB1550_USER) #define PB1550_BOTH_BANKS @@ -144,17 +144,16 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR; #define PB1550_USER_ONLY #endif -/* - * Timing values as described in databook, * ns value stripped of +/* Timing values as described in databook, * ns value stripped of * lower 2 bits. * These defines are here rather than an SOC1550 generic file because * the parts chosen on another board may be different and may require * different timings. */ -#define NAND_T_H (18 >> 2) -#define NAND_T_PUL (30 >> 2) -#define NAND_T_SU (30 >> 2) -#define NAND_T_WH (30 >> 2) +#define NAND_T_H (18 >> 2) +#define NAND_T_PUL (30 >> 2) +#define NAND_T_SU (30 >> 2) +#define NAND_T_WH (30 >> 2) /* Bitfield shift amounts */ #define NAND_T_H_SHIFT 0 @@ -162,16 +161,16 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR; #define NAND_T_SU_SHIFT 8 #define NAND_T_WH_SHIFT 12 -#define NAND_TIMING (((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)) +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) #define NAND_CS 1 -/* Should be done by YAMON */ -#define NAND_STCFG 0x00400005 /* 8-bit NAND */ -#define NAND_STTIME 0x00007774 /* valid for 396 MHz SD=2 only */ -#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ +/* should be done by yamon */ +#define NAND_STCFG 0x00400005 /* 8-bit NAND */ +#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */ +#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ #endif /* __ASM_PB1550_H */ diff --git a/trunk/include/asm-mips/rtlx.h b/trunk/include/asm-mips/rtlx.h index 20b666022dcb..65778c890a62 100644 --- a/trunk/include/asm-mips/rtlx.h +++ b/trunk/include/asm-mips/rtlx.h @@ -29,13 +29,13 @@ extern unsigned int rtlx_read_poll(int index, int can_sleep); extern unsigned int rtlx_write_poll(int index); enum rtlx_state { - RTLX_STATE_UNUSED = 0, + RTLX_STATE_UNUSED, RTLX_STATE_INITIALISED, RTLX_STATE_REMOTE_READY, RTLX_STATE_OPENED }; -#define RTLX_BUFFER_SIZE 2048 +#define RTLX_BUFFER_SIZE 1024 /* each channel supports read and write. linux (vpe0) reads lx_buffer and writes rt_buffer diff --git a/trunk/include/asm-ppc/system.h b/trunk/include/asm-ppc/system.h index 70ebd333c55b..0593cb889d45 100644 --- a/trunk/include/asm-ppc/system.h +++ b/trunk/include/asm-ppc/system.h @@ -178,7 +178,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size } -static inline void * xchg_ptr(void * m, void * val) +extern inline void * xchg_ptr(void * m, void * val) { return (void *) xchg_u32(m, (unsigned long) val); } diff --git a/trunk/include/asm-s390/types.h b/trunk/include/asm-s390/types.h index 0e959e20e9a3..78dda038dd47 100644 --- a/trunk/include/asm-s390/types.h +++ b/trunk/include/asm-s390/types.h @@ -10,9 +10,9 @@ #define _S390_TYPES_H #ifndef __s390x__ -# include -#else # include +#else +# include #endif #ifndef __ASSEMBLY__ diff --git a/trunk/include/asm-sparc/ptrace.h b/trunk/include/asm-sparc/ptrace.h index 0afb867d6c1b..6b5e6ce5043c 100644 --- a/trunk/include/asm-sparc/ptrace.h +++ b/trunk/include/asm-sparc/ptrace.h @@ -10,8 +10,6 @@ #ifndef __ASSEMBLY__ -#include - struct pt_regs { unsigned long psr; unsigned long pc; diff --git a/trunk/include/asm-um/irq.h b/trunk/include/asm-um/irq.h index 4a2037f8204b..de389a477cdd 100644 --- a/trunk/include/asm-um/irq.h +++ b/trunk/include/asm-um/irq.h @@ -15,9 +15,8 @@ #define SIGIO_WRITE_IRQ 11 #define TELNETD_IRQ 12 #define XTERM_IRQ 13 -#define RANDOM_IRQ 14 -#define LAST_IRQ RANDOM_IRQ +#define LAST_IRQ XTERM_IRQ #define NR_IRQS (LAST_IRQ + 1) #endif diff --git a/trunk/include/asm-um/keyboard.h b/trunk/include/asm-um/keyboard.h new file mode 100644 index 000000000000..ee2e2303d0e4 --- /dev/null +++ b/trunk/include/asm-um/keyboard.h @@ -0,0 +1,6 @@ +#ifndef __UM_KEYBOARD_H +#define __UM_KEYBOARD_H + +#include "asm/arch/keyboard.h" + +#endif diff --git a/trunk/include/asm-um/page.h b/trunk/include/asm-um/page.h index 916e1a61999f..381f96b1c825 100644 --- a/trunk/include/asm-um/page.h +++ b/trunk/include/asm-um/page.h @@ -7,20 +7,16 @@ #ifndef __UM_PAGE_H #define __UM_PAGE_H -#include - -/* PAGE_SHIFT determines the page size */ -#define PAGE_SHIFT 12 -#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) - -#ifndef __ASSEMBLY__ - struct page; #include #include +/* PAGE_SHIFT determines the page size */ +#define PAGE_SHIFT 12 +#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_MASK (~(PAGE_SIZE-1)) + /* * These are used to make use of C type-checking.. */ @@ -124,5 +120,4 @@ extern struct page *arch_validate(struct page *page, gfp_t mask, int order); #include #include -#endif /* __ASSEMBLY__ */ -#endif /* __UM_PAGE_H */ +#endif diff --git a/trunk/include/linux/bitmap.h b/trunk/include/linux/bitmap.h index 1abfe664c444..43b406def35f 100644 --- a/trunk/include/linux/bitmap.h +++ b/trunk/include/linux/bitmap.h @@ -110,6 +110,7 @@ extern int __bitmap_weight(const unsigned long *bitmap, int bits); extern int bitmap_scnprintf(char *buf, unsigned int len, const unsigned long *src, int nbits); +extern int bitmap_scnprintf_len(unsigned int len); extern int __bitmap_parse(const char *buf, unsigned int buflen, int is_user, unsigned long *dst, int nbits); extern int bitmap_parse_user(const char __user *ubuf, unsigned int ulen, diff --git a/trunk/include/linux/cpumask.h b/trunk/include/linux/cpumask.h index 5df3db58fcc6..9650806fe2ea 100644 --- a/trunk/include/linux/cpumask.h +++ b/trunk/include/linux/cpumask.h @@ -289,6 +289,13 @@ static inline int __cpumask_scnprintf(char *buf, int len, return bitmap_scnprintf(buf, len, srcp->bits, nbits); } +#define cpumask_scnprintf_len(len) \ + __cpumask_scnprintf_len((len)) +static inline int __cpumask_scnprintf_len(int len) +{ + return bitmap_scnprintf_len(len); +} + #define cpumask_parse_user(ubuf, ulen, dst) \ __cpumask_parse_user((ubuf), (ulen), &(dst), NR_CPUS) static inline int __cpumask_parse_user(const char __user *buf, int len, diff --git a/trunk/include/linux/fuse.h b/trunk/include/linux/fuse.h index d48282197696..5c86f1196c3a 100644 --- a/trunk/include/linux/fuse.h +++ b/trunk/include/linux/fuse.h @@ -109,7 +109,6 @@ struct fuse_file_lock { #define FUSE_POSIX_LOCKS (1 << 1) #define FUSE_FILE_OPS (1 << 2) #define FUSE_ATOMIC_O_TRUNC (1 << 3) -#define FUSE_BIG_WRITES (1 << 5) /** * Release flags diff --git a/trunk/include/linux/mm_types.h b/trunk/include/linux/mm_types.h index 02a27ae78539..eb7c16cc9559 100644 --- a/trunk/include/linux/mm_types.h +++ b/trunk/include/linux/mm_types.h @@ -226,17 +226,8 @@ struct mm_struct { rwlock_t ioctx_list_lock; /* aio lock */ struct kioctx *ioctx_list; #ifdef CONFIG_MM_OWNER - /* - * "owner" points to a task that is regarded as the canonical - * user/owner of this mm. All of the following must be true in - * order for it to be changed: - * - * current == mm->owner - * current->mm != mm - * new_owner->mm == mm - * new_owner->alloc_lock is held - */ - struct task_struct *owner; + struct task_struct *owner; /* The thread group leader that */ + /* owns the mm_struct. */ #endif #ifdef CONFIG_PROC_FS diff --git a/trunk/include/linux/sched.h b/trunk/include/linux/sched.h index 5395a6176f4b..4ab9f32f9238 100644 --- a/trunk/include/linux/sched.h +++ b/trunk/include/linux/sched.h @@ -2027,7 +2027,7 @@ static inline int fatal_signal_pending(struct task_struct *p) static inline int need_resched(void) { - return unlikely(test_thread_flag(TIF_NEED_RESCHED)); + return unlikely(test_tsk_need_resched(current)); } /* @@ -2038,7 +2038,7 @@ static inline int need_resched(void) * cond_resched_softirq() will enable bhs before scheduling. */ extern int _cond_resched(void); -#ifdef CONFIG_PREEMPT_BKL +#ifdef CONFIG_PREEMPT static inline int cond_resched(void) { return 0; diff --git a/trunk/include/sound/soc.h b/trunk/include/sound/soc.h index d3c8c033dff8..e6ea6f750941 100644 --- a/trunk/include/sound/soc.h +++ b/trunk/include/sound/soc.h @@ -238,7 +238,7 @@ int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo); int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo); -#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info +#define snd_soc_info_bool_ext snd_ctl_boolean_mono int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, diff --git a/trunk/init/main.c b/trunk/init/main.c index f406fefa626c..ddada7acf363 100644 --- a/trunk/init/main.c +++ b/trunk/init/main.c @@ -702,6 +702,7 @@ static void __init do_initcalls(void) for (call = __initcall_start; call < __initcall_end; call++) { ktime_t t0, t1, delta; + char *msg = NULL; char msgbuf[40]; int result; @@ -723,23 +724,22 @@ static void __init do_initcalls(void) (unsigned long long) delta.tv64 >> 20); } - msgbuf[0] = 0; - - if (result && result != -ENODEV && initcall_debug) - sprintf(msgbuf, "error code %d ", result); - + if (result && result != -ENODEV && initcall_debug) { + sprintf(msgbuf, "error code %d", result); + msg = msgbuf; + } if (preempt_count() != count) { - strncat(msgbuf, "preemption imbalance ", sizeof(msgbuf)); + msg = "preemption imbalance"; preempt_count() = count; } if (irqs_disabled()) { - strncat(msgbuf, "disabled interrupts ", sizeof(msgbuf)); + msg = "disabled interrupts"; local_irq_enable(); } - if (msgbuf[0]) { + if (msg) { print_fn_descriptor_symbol(KERN_WARNING "initcall %s()", (unsigned long) *call); - printk(" returned with %s\n", msgbuf); + printk(" returned with %s\n", msg); } } diff --git a/trunk/lib/bitmap.c b/trunk/lib/bitmap.c index 482df94ea21e..c4cb48f77f0c 100644 --- a/trunk/lib/bitmap.c +++ b/trunk/lib/bitmap.c @@ -315,6 +315,22 @@ int bitmap_scnprintf(char *buf, unsigned int buflen, } EXPORT_SYMBOL(bitmap_scnprintf); +/** + * bitmap_scnprintf_len - return buffer length needed to convert + * bitmap to an ASCII hex string. + * @len: number of bits to be converted + */ +int bitmap_scnprintf_len(unsigned int len) +{ + /* we need 9 chars per word for 32 bit words (8 hexdigits + sep/null) */ + int bitslen = ALIGN(len, CHUNKSZ); + int wordlen = CHUNKSZ / 4; + int buflen = (bitslen / wordlen) * (wordlen + 1) * sizeof(char); + + return buflen; +} +EXPORT_SYMBOL(bitmap_scnprintf_len); + /** * __bitmap_parse - convert an ASCII hex string into a bitmap. * @buf: pointer to buffer containing string. diff --git a/trunk/mm/pdflush.c b/trunk/mm/pdflush.c index 9d834aa4b979..1c96cfc9e040 100644 --- a/trunk/mm/pdflush.c +++ b/trunk/mm/pdflush.c @@ -207,6 +207,7 @@ int pdflush_operation(void (*fn)(unsigned long), unsigned long arg0) spin_lock_irqsave(&pdflush_lock, flags); if (list_empty(&pdflush_list)) { + spin_unlock_irqrestore(&pdflush_lock, flags); ret = -1; } else { struct pdflush_work *pdf; @@ -218,9 +219,8 @@ int pdflush_operation(void (*fn)(unsigned long), unsigned long arg0) pdf->fn = fn; pdf->arg0 = arg0; wake_up_process(pdf->who); + spin_unlock_irqrestore(&pdflush_lock, flags); } - spin_unlock_irqrestore(&pdflush_lock, flags); - return ret; } diff --git a/trunk/mm/vmstat.c b/trunk/mm/vmstat.c index db9eabb2c5b3..1a32130b958c 100644 --- a/trunk/mm/vmstat.c +++ b/trunk/mm/vmstat.c @@ -41,9 +41,7 @@ static void sum_vm_events(unsigned long *ret, cpumask_t *cpumask) */ void all_vm_events(unsigned long *ret) { - get_online_cpus(); sum_vm_events(ret, &cpu_online_map); - put_online_cpus(); } EXPORT_SYMBOL_GPL(all_vm_events); diff --git a/trunk/sound/soc/codecs/tlv320aic3x.c b/trunk/sound/soc/codecs/tlv320aic3x.c index 09b1661b8a3a..630684f4a0bc 100644 --- a/trunk/sound/soc/codecs/tlv320aic3x.c +++ b/trunk/sound/soc/codecs/tlv320aic3x.c @@ -539,8 +539,8 @@ static const char *intercon[][3] = { {"HPRCOM", NULL, "Right HP Com"}, /* Mono Output */ - {"MONO_LOUT", NULL, "Mono Out"}, - {"MONO_LOUT", NULL, "Mono Out"}, + {"MONOLOUT", NULL, "Mono Out"}, + {"MONOLOUT", NULL, "Mono Out"}, /* Left Input */ {"Left Line1L Mux", "single-ended", "LINE1L"}, diff --git a/trunk/sound/soc/fsl/fsl_ssi.c b/trunk/sound/soc/fsl/fsl_ssi.c index f588545698f3..b2a11b0d2e4c 100644 --- a/trunk/sound/soc/fsl/fsl_ssi.c +++ b/trunk/sound/soc/fsl/fsl_ssi.c @@ -416,7 +416,7 @@ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd) * to put data into its FIFO. Without it, ALSA starts * to complain about overruns. */ - mdelay(1); + msleep(1); } break; diff --git a/trunk/sound/soc/omap/n810.c b/trunk/sound/soc/omap/n810.c index 6533563a6011..83b1eb4e40f3 100644 --- a/trunk/sound/soc/omap/n810.c +++ b/trunk/sound/soc/omap/n810.c @@ -188,8 +188,8 @@ static const char *audio_map[][3] = { static const char *spk_function[] = {"Off", "On"}; static const char *jack_function[] = {"Off", "Headphone"}; static const struct soc_enum n810_enum[] = { - SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(spk_function), spk_function), - SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(jack_function), jack_function), + SOC_ENUM_SINGLE_EXT(2, spk_function), + SOC_ENUM_SINGLE_EXT(3, jack_function), }; static const struct snd_kcontrol_new aic33_n810_controls[] = { diff --git a/trunk/sound/synth/emux/emux_synth.c b/trunk/sound/synth/emux/emux_synth.c index b343818dbb96..478369bb38c3 100644 --- a/trunk/sound/synth/emux/emux_synth.c +++ b/trunk/sound/synth/emux/emux_synth.c @@ -341,12 +341,8 @@ snd_emux_control(void *p, int type, struct snd_midi_channel *chan) case MIDI_CTL_SOFT_PEDAL: #ifdef SNDRV_EMUX_USE_RAW_EFFECT /* FIXME: this is an emulation */ - if (chan->control[type] >= 64) - snd_emux_send_effect(port, chan, EMUX_FX_CUTOFF, -160, + snd_emux_send_effect(port, chan, EMUX_FX_CUTOFF, -160, EMUX_FX_FLAG_ADD); - else - snd_emux_send_effect(port, chan, EMUX_FX_CUTOFF, 0, - EMUX_FX_FLAG_OFF); #endif break;