From eb97dba38fa5157df74aad44deba405880484768 Mon Sep 17 00:00:00 2001 From: Andi Kleen Date: Wed, 30 Jan 2008 13:32:40 +0100 Subject: [PATCH] --- yaml --- r: 80160 b: refs/heads/master c: 51fc97b93545e71cec578d6771bceeb92bc2d50b h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/x86/kernel/tsc_32.c | 5 +++++ trunk/arch/x86/kernel/tsc_64.c | 5 ++--- 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 9a927e932cae..f6fb7a9a1f71 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 2b16a2353814a513cdb5c5c739b76a19d7ea39ce +refs/heads/master: 51fc97b93545e71cec578d6771bceeb92bc2d50b diff --git a/trunk/arch/x86/kernel/tsc_32.c b/trunk/arch/x86/kernel/tsc_32.c index 00bb4c1c0593..2a7b95bd8509 100644 --- a/trunk/arch/x86/kernel/tsc_32.c +++ b/trunk/arch/x86/kernel/tsc_32.c @@ -354,6 +354,11 @@ __cpuinit int unsynchronized_tsc(void) { if (!cpu_has_tsc || tsc_unstable) return 1; + + /* Anything with constant TSC should be synchronized */ + if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) + return 0; + /* * Intel systems are normally all synchronized. * Exceptions must mark TSC as unstable: diff --git a/trunk/arch/x86/kernel/tsc_64.c b/trunk/arch/x86/kernel/tsc_64.c index 2cc55b726c22..322b38c68198 100644 --- a/trunk/arch/x86/kernel/tsc_64.c +++ b/trunk/arch/x86/kernel/tsc_64.c @@ -272,9 +272,8 @@ __cpuinit int unsynchronized_tsc(void) if (apic_is_clustered_box()) return 1; #endif - /* Most intel systems have synchronized TSCs except for - multi node systems */ - if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + + if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { #ifdef CONFIG_ACPI /* But TSC doesn't tick in C3 so don't use it there */ if (acpi_gbl_FADT.header.length > 0 &&