From ec1161d3241ec1e3f4bb8e43eec17ad5318cff47 Mon Sep 17 00:00:00 2001 From: Matthieu Castet Date: Thu, 3 Jul 2008 11:24:45 +0100 Subject: [PATCH] --- yaml --- r: 100847 b: refs/heads/master c: d5c52922b618aa6ddd6b5ebebc8d0a5ec9a20f10 h: refs/heads/master i: 100845: 01be85052d7231afb80f8491b3afafecab6d2135 100843: 566bc8dbd72fa719c798f98d0bc0b0883e34920b 100839: 76d877bd4592ba2466a7b480c01e5d11bf0727e6 100831: 045b703f7f1f34004a8801f62167704f95b34d83 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-s3c2412/clock.c | 13 +++++++++++-- trunk/include/asm-arm/arch-s3c2410/regs-clock.h | 2 ++ 3 files changed, 14 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 4f80ed5380d6..7146eb9fc261 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9c3871ca59884563e3f41669a330c9231952643b +refs/heads/master: d5c52922b618aa6ddd6b5ebebc8d0a5ec9a20f10 diff --git a/trunk/arch/arm/mach-s3c2412/clock.c b/trunk/arch/arm/mach-s3c2412/clock.c index 2697a65ba727..1157b5a16263 100644 --- a/trunk/arch/arm/mach-s3c2412/clock.c +++ b/trunk/arch/arm/mach-s3c2412/clock.c @@ -631,6 +631,17 @@ static struct clk_init clks_src[] __initdata = { .bit = S3C2412_CLKSRC_USBCLK_HCLK, .src_0 = &clk_usysclk, .src_1 = &clk_h, + /* here we assume OM[4] select xtal */ + }, { + .clk = &clk_erefclk, + .bit = S3C2412_CLKSRC_EREFCLK_EXTCLK, + .src_0 = &clk_xtal, + .src_1 = &clk_ext, + }, { + .clk = &clk_urefclk, + .bit = S3C2412_CLKSRC_UREFCLK_EXTCLK, + .src_0 = &clk_xtal, + .src_1 = &clk_ext, }, }; @@ -666,8 +677,6 @@ static void __init s3c2412_clk_initparents(void) static struct clk *clks[] __initdata = { &clk_ext, &clk_usb_bus, - &clk_erefclk, - &clk_urefclk, &clk_mrefclk, &clk_armclk, }; diff --git a/trunk/include/asm-arm/arch-s3c2410/regs-clock.h b/trunk/include/asm-arm/arch-s3c2410/regs-clock.h index ecae9e7f5e45..37661358b42b 100644 --- a/trunk/include/asm-arm/arch-s3c2410/regs-clock.h +++ b/trunk/include/asm-arm/arch-s3c2410/regs-clock.h @@ -189,6 +189,8 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) #define S3C2412_CLKSRC_I2SCLK_MPLL (1<<9) #define S3C2412_CLKSRC_USBCLK_HCLK (1<<10) #define S3C2412_CLKSRC_CAMCLK_HCLK (1<<11) +#define S3C2412_CLKSRC_UREFCLK_EXTCLK (1<<12) +#define S3C2412_CLKSRC_EREFCLK_EXTCLK (1<<14) #endif /* CONFIG_CPU_S3C2412 | CONFIG_CPU_S3C2413 */