From ec538244426372ae75f6fce55f189bc777d5ad4b Mon Sep 17 00:00:00 2001 From: Stephane Eranian Date: Thu, 7 Dec 2006 02:14:00 +0100 Subject: [PATCH] --- yaml --- r: 42999 b: refs/heads/master c: bd1d599518bf11992cc6d5b0df08da4a2b7b0db5 h: refs/heads/master i: 42997: 3c9d66d3014ebb7b986dfda1755c042ebf3dd16f 42995: f5d1dada2a59684a9a6b6f13a59852a3f6722239 42991: 1d7a819e5868a85108c8bc6228b61a9fb7335f4b v: v3 --- [refs] | 2 +- trunk/include/asm-x86_64/cpufeature.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 72b847b7f66b..2c49a113fdfc 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 87e1652c7863b9ae406ff37f33c7ec2bb494d7b1 +refs/heads/master: bd1d599518bf11992cc6d5b0df08da4a2b7b0db5 diff --git a/trunk/include/asm-x86_64/cpufeature.h b/trunk/include/asm-x86_64/cpufeature.h index ee792faaca01..65eb39e8f3cc 100644 --- a/trunk/include/asm-x86_64/cpufeature.h +++ b/trunk/include/asm-x86_64/cpufeature.h @@ -29,7 +29,7 @@ #define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */ #define X86_FEATURE_PN (0*32+18) /* Processor serial number */ #define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */ -#define X86_FEATURE_DTES (0*32+21) /* Debug Trace Store */ +#define X86_FEATURE_DS (0*32+21) /* Debug Store */ #define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */ #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */ @@ -112,5 +112,6 @@ #define cpu_has_cyrix_arr 0 #define cpu_has_centaur_mcr 0 #define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH) +#define cpu_has_ds boot_cpu_has(X86_FEATURE_DS) #endif /* __ASM_X8664_CPUFEATURE_H */