diff --git a/[refs] b/[refs]
index c97f0e56c635..300b7561da3e 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
---
-refs/heads/master: 58bbf018a70c562437eeae121a5d021ba7fe56a5
+refs/heads/master: 1ffa325bac55982d72a61ccab1a4190501e37148
diff --git a/trunk/Documentation/DocBook/dvb/dvbapi.xml b/trunk/Documentation/DocBook/dvb/dvbapi.xml
index ad8678d48916..e3a97fdd62a6 100644
--- a/trunk/Documentation/DocBook/dvb/dvbapi.xml
+++ b/trunk/Documentation/DocBook/dvb/dvbapi.xml
@@ -28,7 +28,7 @@
Convergence GmbH
- 2009-2011
+ 2009-2010
Mauro Carvalho Chehab
diff --git a/trunk/Documentation/DocBook/media.tmpl b/trunk/Documentation/DocBook/media.tmpl
index a99088aae1aa..f11048d4053f 100644
--- a/trunk/Documentation/DocBook/media.tmpl
+++ b/trunk/Documentation/DocBook/media.tmpl
@@ -28,7 +28,7 @@
LINUX MEDIA INFRASTRUCTURE API
- 2009-2011
+ 2009-2010
LinuxTV Developers
@@ -86,7 +86,7 @@ Foundation. A copy of the license is included in the chapter entitled
- 2009-2011
+ 2009-2010
Mauro Carvalho Chehab
diff --git a/trunk/Documentation/DocBook/v4l/dev-rds.xml b/trunk/Documentation/DocBook/v4l/dev-rds.xml
index 2427f54397e7..360d2737e649 100644
--- a/trunk/Documentation/DocBook/v4l/dev-rds.xml
+++ b/trunk/Documentation/DocBook/v4l/dev-rds.xml
@@ -75,7 +75,6 @@ as follows:
- RDS datastructures
struct
v4l2_rds_data
@@ -130,11 +129,10 @@ as follows:
Block defines
-
+
-
-
+
V4L2_RDS_BLOCK_MSK
diff --git a/trunk/Documentation/DocBook/v4l/v4l2.xml b/trunk/Documentation/DocBook/v4l/v4l2.xml
index 9288af96de34..839e93e875ae 100644
--- a/trunk/Documentation/DocBook/v4l/v4l2.xml
+++ b/trunk/Documentation/DocBook/v4l/v4l2.xml
@@ -100,7 +100,6 @@ Remote Controller chapter.
2008
2009
2010
- 2011
Bill Dirks, Michael H. Schimek, Hans Verkuil, Martin
Rubli, Andy Walls, Muralidharan Karicheri, Mauro Carvalho Chehab
@@ -382,7 +381,7 @@ and discussions on the V4L mailing list.
Video for Linux Two API Specification
- Revision 2.6.38
+ Revision 2.6.33
&sub-common;
diff --git a/trunk/Documentation/feature-removal-schedule.txt b/trunk/Documentation/feature-removal-schedule.txt
index b959659c5df4..8c594c45b6a1 100644
--- a/trunk/Documentation/feature-removal-schedule.txt
+++ b/trunk/Documentation/feature-removal-schedule.txt
@@ -357,6 +357,14 @@ Who: Dave Jones , Matthew Garrett
-----------------------------
+What: __do_IRQ all in one fits nothing interrupt handler
+When: 2.6.32
+Why: __do_IRQ was kept for easy migration to the type flow handlers.
+ More than two years of migration time is enough.
+Who: Thomas Gleixner
+
+-----------------------------
+
What: fakephp and associated sysfs files in /sys/bus/pci/slots/
When: 2011
Why: In 2.6.27, the semantics of /sys/bus/pci/slots was redefined to
diff --git a/trunk/Documentation/hwmon/lm93 b/trunk/Documentation/hwmon/lm93
index f3b2ad2ceb01..7a10616d0b44 100644
--- a/trunk/Documentation/hwmon/lm93
+++ b/trunk/Documentation/hwmon/lm93
@@ -6,10 +6,6 @@ Supported chips:
Prefix 'lm93'
Addresses scanned: I2C 0x2c-0x2e
Datasheet: http://www.national.com/ds.cgi/LM/LM93.pdf
- * National Semiconductor LM94
- Prefix 'lm94'
- Addresses scanned: I2C 0x2c-0x2e
- Datasheet: http://www.national.com/ds.cgi/LM/LM94.pdf
Authors:
Mark M. Hoffman
@@ -60,9 +56,6 @@ previous motherboard management ASICs and uses some of the LM85's features
for dynamic Vccp monitoring and PROCHOT. It is designed to monitor a dual
processor Xeon class motherboard with a minimum of external components.
-LM94 is also supported in LM93 compatible mode. Extra sensors and features of
-LM94 are not supported.
-
User Interface
--------------
diff --git a/trunk/Documentation/lguest/lguest.c b/trunk/Documentation/lguest/lguest.c
index d9da7e148538..dc73bc54cc4e 100644
--- a/trunk/Documentation/lguest/lguest.c
+++ b/trunk/Documentation/lguest/lguest.c
@@ -39,9 +39,6 @@
#include
#include
#include
-#include
-#include
-
#include
#include
#include
@@ -301,27 +298,20 @@ static void *map_zeroed_pages(unsigned int num)
/*
* We use a private mapping (ie. if we write to the page, it will be
- * copied). We allocate an extra two pages PROT_NONE to act as guard
- * pages against read/write attempts that exceed allocated space.
+ * copied).
*/
- addr = mmap(NULL, getpagesize() * (num+2),
- PROT_NONE, MAP_PRIVATE, fd, 0);
-
+ addr = mmap(NULL, getpagesize() * num,
+ PROT_READ|PROT_WRITE|PROT_EXEC, MAP_PRIVATE, fd, 0);
if (addr == MAP_FAILED)
err(1, "Mmapping %u pages of /dev/zero", num);
- if (mprotect(addr + getpagesize(), getpagesize() * num,
- PROT_READ|PROT_WRITE) == -1)
- err(1, "mprotect rw %u pages failed", num);
-
/*
* One neat mmap feature is that you can close the fd, and it
* stays mapped.
*/
close(fd);
- /* Return address after PROT_NONE page */
- return addr + getpagesize();
+ return addr;
}
/* Get some more pages for a device. */
@@ -353,7 +343,7 @@ static void map_at(int fd, void *addr, unsigned long offset, unsigned long len)
* done to it. This allows us to share untouched memory between
* Guests.
*/
- if (mmap(addr, len, PROT_READ|PROT_WRITE,
+ if (mmap(addr, len, PROT_READ|PROT_WRITE|PROT_EXEC,
MAP_FIXED|MAP_PRIVATE, fd, offset) != MAP_FAILED)
return;
@@ -583,10 +573,10 @@ static void *_check_pointer(unsigned long addr, unsigned int size,
unsigned int line)
{
/*
- * Check if the requested address and size exceeds the allocated memory,
- * or addr + size wraps around.
+ * We have to separately check addr and addr+size, because size could
+ * be huge and addr + size might wrap around.
*/
- if ((addr + size) > guest_limit || (addr + size) < addr)
+ if (addr >= guest_limit || addr + size >= guest_limit)
errx(1, "%s:%i: Invalid address %#lx", __FILE__, line, addr);
/*
* We return a pointer for the caller's convenience, now we know it's
@@ -1882,8 +1872,6 @@ static struct option opts[] = {
{ "block", 1, NULL, 'b' },
{ "rng", 0, NULL, 'r' },
{ "initrd", 1, NULL, 'i' },
- { "username", 1, NULL, 'u' },
- { "chroot", 1, NULL, 'c' },
{ NULL },
};
static void usage(void)
@@ -1906,12 +1894,6 @@ int main(int argc, char *argv[])
/* If they specify an initrd file to load. */
const char *initrd_name = NULL;
- /* Password structure for initgroups/setres[gu]id */
- struct passwd *user_details = NULL;
-
- /* Directory to chroot to */
- char *chroot_path = NULL;
-
/* Save the args: we "reboot" by execing ourselves again. */
main_args = argv;
@@ -1968,14 +1950,6 @@ int main(int argc, char *argv[])
case 'i':
initrd_name = optarg;
break;
- case 'u':
- user_details = getpwnam(optarg);
- if (!user_details)
- err(1, "getpwnam failed, incorrect username?");
- break;
- case 'c':
- chroot_path = optarg;
- break;
default:
warnx("Unknown argument %s", argv[optind]);
usage();
@@ -2047,37 +2021,6 @@ int main(int argc, char *argv[])
/* If we exit via err(), this kills all the threads, restores tty. */
atexit(cleanup_devices);
- /* If requested, chroot to a directory */
- if (chroot_path) {
- if (chroot(chroot_path) != 0)
- err(1, "chroot(\"%s\") failed", chroot_path);
-
- if (chdir("/") != 0)
- err(1, "chdir(\"/\") failed");
-
- verbose("chroot done\n");
- }
-
- /* If requested, drop privileges */
- if (user_details) {
- uid_t u;
- gid_t g;
-
- u = user_details->pw_uid;
- g = user_details->pw_gid;
-
- if (initgroups(user_details->pw_name, g) != 0)
- err(1, "initgroups failed");
-
- if (setresgid(g, g, g) != 0)
- err(1, "setresgid failed");
-
- if (setresuid(u, u, u) != 0)
- err(1, "setresuid failed");
-
- verbose("Dropping privileges completed\n");
- }
-
/* Finally, run the Guest. This doesn't return. */
run_guest();
}
diff --git a/trunk/Documentation/lguest/lguest.txt b/trunk/Documentation/lguest/lguest.txt
index dad99978a6a8..6ccaf8e1a00e 100644
--- a/trunk/Documentation/lguest/lguest.txt
+++ b/trunk/Documentation/lguest/lguest.txt
@@ -117,11 +117,6 @@ Running Lguest:
for general information on how to get bridging to work.
-- Random number generation. Using the --rng option will provide a
- /dev/hwrng in the guest that will read from the host's /dev/random.
- Use this option in conjunction with rng-tools (see ../hw_random.txt)
- to provide entropy to the guest kernel's /dev/random.
-
There is a helpful mailing list at http://ozlabs.org/mailman/listinfo/lguest
Good luck!
diff --git a/trunk/Documentation/sound/alsa/soc/codec.txt b/trunk/Documentation/sound/alsa/soc/codec.txt
index bce23a4a7875..37ba3a72cb76 100644
--- a/trunk/Documentation/sound/alsa/soc/codec.txt
+++ b/trunk/Documentation/sound/alsa/soc/codec.txt
@@ -27,38 +27,42 @@ ASoC Codec driver breakdown
1 - Codec DAI and PCM configuration
-----------------------------------
-Each codec driver must have a struct snd_soc_dai_driver to define its DAI and
+Each codec driver must have a struct snd_soc_codec_dai to define its DAI and
PCM capabilities and operations. This struct is exported so that it can be
registered with the core by your machine driver.
e.g.
-static struct snd_soc_dai_ops wm8731_dai_ops = {
- .prepare = wm8731_pcm_prepare,
- .hw_params = wm8731_hw_params,
- .shutdown = wm8731_shutdown,
- .digital_mute = wm8731_mute,
- .set_sysclk = wm8731_set_dai_sysclk,
- .set_fmt = wm8731_set_dai_fmt,
-};
-
-struct snd_soc_dai_driver wm8731_dai = {
- .name = "wm8731-hifi",
+struct snd_soc_codec_dai wm8731_dai = {
+ .name = "WM8731",
+ /* playback capabilities */
.playback = {
.stream_name = "Playback",
.channels_min = 1,
.channels_max = 2,
.rates = WM8731_RATES,
.formats = WM8731_FORMATS,},
+ /* capture capabilities */
.capture = {
.stream_name = "Capture",
.channels_min = 1,
.channels_max = 2,
.rates = WM8731_RATES,
.formats = WM8731_FORMATS,},
- .ops = &wm8731_dai_ops,
- .symmetric_rates = 1,
+ /* pcm operations - see section 4 below */
+ .ops = {
+ .prepare = wm8731_pcm_prepare,
+ .hw_params = wm8731_hw_params,
+ .shutdown = wm8731_shutdown,
+ },
+ /* DAI operations - see DAI.txt */
+ .dai_ops = {
+ .digital_mute = wm8731_mute,
+ .set_sysclk = wm8731_set_dai_sysclk,
+ .set_fmt = wm8731_set_dai_fmt,
+ }
};
+EXPORT_SYMBOL_GPL(wm8731_dai);
2 - Codec control IO
@@ -182,14 +186,13 @@ when the mute is applied or freed.
i.e.
-static int wm8974_mute(struct snd_soc_dai *dai, int mute)
+static int wm8974_mute(struct snd_soc_codec *codec,
+ struct snd_soc_codec_dai *dai, int mute)
{
- struct snd_soc_codec *codec = dai->codec;
- u16 mute_reg = snd_soc_read(codec, WM8974_DAC) & 0xffbf;
-
- if (mute)
- snd_soc_write(codec, WM8974_DAC, mute_reg | 0x40);
+ u16 mute_reg = wm8974_read_reg_cache(codec, WM8974_DAC) & 0xffbf;
+ if(mute)
+ wm8974_write(codec, WM8974_DAC, mute_reg | 0x40);
else
- snd_soc_write(codec, WM8974_DAC, mute_reg);
+ wm8974_write(codec, WM8974_DAC, mute_reg);
return 0;
}
diff --git a/trunk/Documentation/sound/alsa/soc/machine.txt b/trunk/Documentation/sound/alsa/soc/machine.txt
index 3e2ec9cbf397..2524c75557df 100644
--- a/trunk/Documentation/sound/alsa/soc/machine.txt
+++ b/trunk/Documentation/sound/alsa/soc/machine.txt
@@ -12,8 +12,6 @@ the following struct:-
struct snd_soc_card {
char *name;
- ...
-
int (*probe)(struct platform_device *pdev);
int (*remove)(struct platform_device *pdev);
@@ -24,13 +22,12 @@ struct snd_soc_card {
int (*resume_pre)(struct platform_device *pdev);
int (*resume_post)(struct platform_device *pdev);
- ...
+ /* machine stream operations */
+ struct snd_soc_ops *ops;
/* CPU <--> Codec DAI links */
struct snd_soc_dai_link *dai_link;
int num_links;
-
- ...
};
probe()/remove()
@@ -45,6 +42,11 @@ of any machine audio tasks that have to be done before or after the codec, DAIs
and DMA is suspended and resumed. Optional.
+Machine operations
+------------------
+The machine specific audio operations can be set here. Again this is optional.
+
+
Machine DAI Configuration
-------------------------
The machine DAI configuration glues all the codec and CPU DAIs together. It can
@@ -59,10 +61,8 @@ struct snd_soc_dai_link is used to set up each DAI in your machine. e.g.
static struct snd_soc_dai_link corgi_dai = {
.name = "WM8731",
.stream_name = "WM8731",
- .cpu_dai_name = "pxa-is2-dai",
- .codec_dai_name = "wm8731-hifi",
- .platform_name = "pxa-pcm-audio",
- .codec_name = "wm8713-codec.0-001a",
+ .cpu_dai = &pxa_i2s_dai,
+ .codec_dai = &wm8731_dai,
.init = corgi_wm8731_init,
.ops = &corgi_ops,
};
@@ -77,6 +77,26 @@ static struct snd_soc_card snd_soc_corgi = {
};
+Machine Audio Subsystem
+-----------------------
+
+The machine soc device glues the platform, machine and codec driver together.
+Private data can also be set here. e.g.
+
+/* corgi audio private data */
+static struct wm8731_setup_data corgi_wm8731_setup = {
+ .i2c_address = 0x1b,
+};
+
+/* corgi audio subsystem */
+static struct snd_soc_device corgi_snd_devdata = {
+ .machine = &snd_soc_corgi,
+ .platform = &pxa2xx_soc_platform,
+ .codec_dev = &soc_codec_dev_wm8731,
+ .codec_data = &corgi_wm8731_setup,
+};
+
+
Machine Power Map
-----------------
diff --git a/trunk/Documentation/sound/alsa/soc/platform.txt b/trunk/Documentation/sound/alsa/soc/platform.txt
index d57efad37e0a..06d835987c6a 100644
--- a/trunk/Documentation/sound/alsa/soc/platform.txt
+++ b/trunk/Documentation/sound/alsa/soc/platform.txt
@@ -20,10 +20,9 @@ struct snd_soc_ops {
int (*trigger)(struct snd_pcm_substream *, int);
};
-The platform driver exports its DMA functionality via struct
-snd_soc_platform_driver:-
+The platform driver exports its DMA functionality via struct snd_soc_platform:-
-struct snd_soc_platform_driver {
+struct snd_soc_platform {
char *name;
int (*probe)(struct platform_device *pdev);
@@ -35,13 +34,6 @@ struct snd_soc_platform_driver {
int (*pcm_new)(struct snd_card *, struct snd_soc_codec_dai *, struct snd_pcm *);
void (*pcm_free)(struct snd_pcm *);
- /*
- * For platform caused delay reporting.
- * Optional.
- */
- snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
- struct snd_soc_dai *);
-
/* platform stream ops */
struct snd_pcm_ops *pcm_ops;
};
diff --git a/trunk/Documentation/video4linux/v4l2-controls.txt b/trunk/Documentation/video4linux/v4l2-controls.txt
index 881e7f44491b..8773778d23fc 100644
--- a/trunk/Documentation/video4linux/v4l2-controls.txt
+++ b/trunk/Documentation/video4linux/v4l2-controls.txt
@@ -285,9 +285,6 @@ implement g_volatile_ctrl like this:
The 'new value' union is not used in g_volatile_ctrl. In general controls
that need to implement g_volatile_ctrl are read-only controls.
-Note that if one or more controls in a control cluster are marked as volatile,
-then all the controls in the cluster are seen as volatile.
-
To mark a control as volatile you have to set the is_volatile flag:
ctrl = v4l2_ctrl_new_std(&sd->ctrl_handler, ...);
@@ -465,15 +462,6 @@ pointer to the v4l2_ctrl_ops struct that is used for that cluster.
Obviously, all controls in the cluster array must be initialized to either
a valid control or to NULL.
-In rare cases you might want to know which controls of a cluster actually
-were set explicitly by the user. For this you can check the 'is_new' flag of
-each control. For example, in the case of a volume/mute cluster the 'is_new'
-flag of the mute control would be set if the user called VIDIOC_S_CTRL for
-mute only. If the user would call VIDIOC_S_EXT_CTRLS for both mute and volume
-controls, then the 'is_new' flag would be 1 for both controls.
-
-The 'is_new' flag is always 1 when called from v4l2_ctrl_handler_setup().
-
VIDIOC_LOG_STATUS Support
=========================
diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS
index 55592f8b672c..1af022e63668 100644
--- a/trunk/MAINTAINERS
+++ b/trunk/MAINTAINERS
@@ -162,7 +162,7 @@ L: linux-serial@vger.kernel.org
W: http://serial.sourceforge.net
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6.git
-F: drivers/tty/serial/8250*
+F: drivers/serial/8250*
F: include/linux/serial_8250.h
8390 NETWORK DRIVERS [WD80x3/SMC-ELITE, SMC-ULTRA, NE2000, 3C503, etc.]
@@ -624,15 +624,11 @@ M: Lennert Buytenhek
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
-ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES
+ARM/ATMEL AT91RM9200 ARM ARCHITECTURE
M: Andrew Victor
-M: Nicolas Ferre
-M: Jean-Christophe Plagniol-Villard
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
W: http://maxim.org.za/at91_26.html
-W: http://www.linux4sam.org
-S: Supported
-F: arch/arm/mach-at91/
+S: Maintained
ARM/BCMRING ARM ARCHITECTURE
M: Jiandong Zheng
@@ -892,8 +888,8 @@ F: arch/arm/mach-msm/
F: drivers/video/msm/
F: drivers/mmc/host/msm_sdcc.c
F: drivers/mmc/host/msm_sdcc.h
-F: drivers/tty/serial/msm_serial.h
-F: drivers/tty/serial/msm_serial.c
+F: drivers/serial/msm_serial.h
+F: drivers/serial/msm_serial.c
T: git git://codeaurora.org/quic/kernel/davidb/linux-msm.git
S: Maintained
@@ -1260,7 +1256,7 @@ F: drivers/mmc/host/atmel-mci-regs.h
ATMEL AT91 / AT32 SERIAL DRIVER
M: Nicolas Ferre
S: Supported
-F: drivers/tty/serial/atmel_serial.c
+F: drivers/serial/atmel_serial.c
ATMEL LCDFB DRIVER
M: Nicolas Ferre
@@ -1416,7 +1412,7 @@ M: Sonic Zhang
L: uclinux-dist-devel@blackfin.uclinux.org
W: http://blackfin.uclinux.org
S: Supported
-F: drivers/tty/serial/bfin_5xx.c
+F: drivers/serial/bfin_5xx.c
BLACKFIN WATCHDOG DRIVER
M: Mike Frysinger
@@ -1881,7 +1877,7 @@ L: linux-cris-kernel@axis.com
W: http://developer.axis.com
S: Maintained
F: arch/cris/
-F: drivers/tty/serial/crisv10.*
+F: drivers/serial/crisv10.*
CRYPTO API
M: Herbert Xu
@@ -2220,7 +2216,7 @@ F: drivers/net/wan/dscc4.c
DZ DECSTATION DZ11 SERIAL DRIVER
M: "Maciej W. Rozycki"
S: Maintained
-F: drivers/tty/serial/dz.*
+F: drivers/serial/dz.*
EATA-DMA SCSI DRIVER
M: Michael Neuffer
@@ -2647,7 +2643,7 @@ FREESCALE QUICC ENGINE UCC UART DRIVER
M: Timur Tabi
L: linuxppc-dev@lists.ozlabs.org
S: Supported
-F: drivers/tty/serial/ucc_uart.c
+F: drivers/serial/ucc_uart.c
FREESCALE SOC SOUND DRIVERS
M: Timur Tabi
@@ -3150,7 +3146,7 @@ S: Orphan
F: drivers/video/imsttfb.c
INFINIBAND SUBSYSTEM
-M: Roland Dreier
+M: Roland Dreier
M: Sean Hefty
M: Hal Rosenstock
L: linux-rdma@vger.kernel.org
@@ -3354,7 +3350,7 @@ IOC3 SERIAL DRIVER
M: Pat Gefre
L: linux-serial@vger.kernel.org
S: Maintained
-F: drivers/tty/serial/ioc3_serial.c
+F: drivers/serial/ioc3_serial.c
IP MASQUERADING
M: Juanjo Ciarlante
@@ -3531,7 +3527,7 @@ JSM Neo PCI based serial card
M: Breno Leitao
L: linux-serial@vger.kernel.org
S: Maintained
-F: drivers/tty/serial/jsm/
+F: drivers/serial/jsm/
K10TEMP HARDWARE MONITORING DRIVER
M: Clemens Ladisch
@@ -3681,7 +3677,7 @@ L: kgdb-bugreport@lists.sourceforge.net
S: Maintained
F: Documentation/DocBook/kgdb.tmpl
F: drivers/misc/kgdbts.c
-F: drivers/tty/serial/kgdboc.c
+F: drivers/serial/kgdboc.c
F: include/linux/kdb.h
F: include/linux/kgdb.h
F: kernel/debug/
@@ -5549,7 +5545,7 @@ M: Pat Gefre
L: linux-ia64@vger.kernel.org
S: Supported
F: Documentation/ia64/serial.txt
-F: drivers/tty/serial/ioc?_serial.c
+F: drivers/serial/ioc?_serial.c
F: include/linux/ioc?.h
SGI VISUAL WORKSTATION 320 AND 540
@@ -5571,7 +5567,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: Documentation/arm/Sharp-LH/ADC-LH7-Touchscreen
F: arch/arm/mach-lh7a40x/
-F: drivers/tty/serial/serial_lh7a40x.c
+F: drivers/serial/serial_lh7a40x.c
F: drivers/usb/gadget/lh7a40*
F: drivers/usb/host/ohci-lh7a40*
@@ -5791,14 +5787,14 @@ L: sparclinux@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6.git
S: Maintained
-F: drivers/tty/serial/suncore.c
-F: drivers/tty/serial/suncore.h
-F: drivers/tty/serial/sunhv.c
-F: drivers/tty/serial/sunsab.c
-F: drivers/tty/serial/sunsab.h
-F: drivers/tty/serial/sunsu.c
-F: drivers/tty/serial/sunzilog.c
-F: drivers/tty/serial/sunzilog.h
+F: drivers/serial/suncore.c
+F: drivers/serial/suncore.h
+F: drivers/serial/sunhv.c
+F: drivers/serial/sunsab.c
+F: drivers/serial/sunsab.h
+F: drivers/serial/sunsu.c
+F: drivers/serial/sunzilog.c
+F: drivers/serial/sunzilog.h
SPEAR PLATFORM SUPPORT
M: Viresh Kumar
@@ -6128,8 +6124,8 @@ TTY LAYER
M: Greg Kroah-Hartman
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6.git
-F: drivers/tty/*
-F: drivers/tty/serial/serial_core.c
+F: drivers/char/tty_*
+F: drivers/serial/serial_core.c
F: include/linux/serial_core.h
F: include/linux/serial.h
F: include/linux/tty.h
@@ -6874,7 +6870,7 @@ XILINX UARTLITE SERIAL DRIVER
M: Peter Korsgaard
L: linux-serial@vger.kernel.org
S: Maintained
-F: drivers/tty/serial/uartlite.c
+F: drivers/serial/uartlite.c
YAM DRIVER FOR AX.25
M: Jean-Paul Roubelat
@@ -6920,7 +6916,7 @@ F: drivers/media/video/zoran/
ZS DECSTATION Z85C30 SERIAL DRIVER
M: "Maciej W. Rozycki"
S: Maintained
-F: drivers/tty/serial/zs.*
+F: drivers/serial/zs.*
GRE DEMULTIPLEXER DRIVER
M: Dmitry Kozlov
diff --git a/trunk/Makefile b/trunk/Makefile
index 1f474953427f..6a457690d10b 100644
--- a/trunk/Makefile
+++ b/trunk/Makefile
@@ -1,7 +1,7 @@
VERSION = 2
PATCHLEVEL = 6
-SUBLEVEL = 38
-EXTRAVERSION = -rc2
+SUBLEVEL = 37
+EXTRAVERSION =
NAME = Flesh-Eating Bats with Fangs
# *DOCUMENTATION*
diff --git a/trunk/arch/alpha/Kconfig b/trunk/arch/alpha/Kconfig
index 47f63d480141..fc95ee1bcf6f 100644
--- a/trunk/arch/alpha/Kconfig
+++ b/trunk/arch/alpha/Kconfig
@@ -8,9 +8,6 @@ config ALPHA
select HAVE_IRQ_WORK
select HAVE_PERF_EVENTS
select HAVE_DMA_ATTRS
- select HAVE_GENERIC_HARDIRQS
- select GENERIC_IRQ_PROBE
- select AUTO_IRQ_AFFINITY if SMP
help
The Alpha is a 64-bit general-purpose processor designed and
marketed by the Digital Equipment Corporation of blessed memory,
@@ -71,6 +68,22 @@ config GENERIC_IOMAP
bool
default n
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ def_bool y
+
+config GENERIC_HARDIRQS
+ bool
+ default y
+
+config GENERIC_IRQ_PROBE
+ bool
+ default y
+
+config AUTO_IRQ_AFFINITY
+ bool
+ depends on SMP
+ default y
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
diff --git a/trunk/arch/arm/configs/ag5evm_defconfig b/trunk/arch/arm/configs/ag5evm_defconfig
index 212ead354a6b..2b9cf56db363 100644
--- a/trunk/arch/arm/configs/ag5evm_defconfig
+++ b/trunk/arch/arm/configs/ag5evm_defconfig
@@ -10,7 +10,7 @@ CONFIG_NAMESPACES=y
# CONFIG_PID_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
diff --git a/trunk/arch/arm/configs/am200epdkit_defconfig b/trunk/arch/arm/configs/am200epdkit_defconfig
index f0dea52e49c4..5536c488dd01 100644
--- a/trunk/arch/arm/configs/am200epdkit_defconfig
+++ b/trunk/arch/arm/configs/am200epdkit_defconfig
@@ -3,7 +3,7 @@ CONFIG_LOCALVERSION="gum"
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_EPOLL is not set
# CONFIG_SHMEM is not set
diff --git a/trunk/arch/arm/configs/at572d940hfek_defconfig b/trunk/arch/arm/configs/at572d940hfek_defconfig
index 1b1158ae8f82..695e32d4fb58 100644
--- a/trunk/arch/arm/configs/at572d940hfek_defconfig
+++ b/trunk/arch/arm/configs/at572d940hfek_defconfig
@@ -17,7 +17,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
diff --git a/trunk/arch/arm/configs/badge4_defconfig b/trunk/arch/arm/configs/badge4_defconfig
index 5b54abbeb0b3..3a1ad15a779f 100644
--- a/trunk/arch/arm/configs/badge4_defconfig
+++ b/trunk/arch/arm/configs/badge4_defconfig
@@ -1,6 +1,6 @@
CONFIG_EXPERIMENTAL=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_MODULES=y
CONFIG_MODVERSIONS=y
CONFIG_ARCH_SA1100=y
diff --git a/trunk/arch/arm/configs/bcmring_defconfig b/trunk/arch/arm/configs/bcmring_defconfig
index 795374d48f81..75984cd1e233 100644
--- a/trunk/arch/arm/configs/bcmring_defconfig
+++ b/trunk/arch/arm/configs/bcmring_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_HOTPLUG is not set
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/arm/configs/cm_x2xx_defconfig b/trunk/arch/arm/configs/cm_x2xx_defconfig
index a93ff8da5bab..dcfbcf3b6c3e 100644
--- a/trunk/arch/arm/configs/cm_x2xx_defconfig
+++ b/trunk/arch/arm/configs/cm_x2xx_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_VM_EVENT_COUNTERS is not set
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
diff --git a/trunk/arch/arm/configs/colibri_pxa270_defconfig b/trunk/arch/arm/configs/colibri_pxa270_defconfig
index 2ef2c5e8aaec..f52c64e36d8d 100644
--- a/trunk/arch/arm/configs/colibri_pxa270_defconfig
+++ b/trunk/arch/arm/configs/colibri_pxa270_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/collie_defconfig b/trunk/arch/arm/configs/collie_defconfig
index 6c56ad086c7c..310f9a6270be 100644
--- a/trunk/arch/arm/configs/collie_defconfig
+++ b/trunk/arch/arm/configs/collie_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_BASE_FULL is not set
# CONFIG_EPOLL is not set
CONFIG_SLOB=y
diff --git a/trunk/arch/arm/configs/corgi_defconfig b/trunk/arch/arm/configs/corgi_defconfig
index e53c47563845..4a1fa81ed37d 100644
--- a/trunk/arch/arm/configs/corgi_defconfig
+++ b/trunk/arch/arm/configs/corgi_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/da8xx_omapl_defconfig b/trunk/arch/arm/configs/da8xx_omapl_defconfig
index 88ccde058ba4..cdc40c4b8c48 100644
--- a/trunk/arch/arm/configs/da8xx_omapl_defconfig
+++ b/trunk/arch/arm/configs/da8xx_omapl_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/davinci_all_defconfig b/trunk/arch/arm/configs/davinci_all_defconfig
index 889922ad229c..2519cc5a5f8f 100644
--- a/trunk/arch/arm/configs/davinci_all_defconfig
+++ b/trunk/arch/arm/configs/davinci_all_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/dove_defconfig b/trunk/arch/arm/configs/dove_defconfig
index 54bf5eec8016..9359e1bf32c1 100644
--- a/trunk/arch/arm/configs/dove_defconfig
+++ b/trunk/arch/arm/configs/dove_defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/ebsa110_defconfig b/trunk/arch/arm/configs/ebsa110_defconfig
index 14559dbb4c2c..c3194186920c 100644
--- a/trunk/arch/arm/configs/ebsa110_defconfig
+++ b/trunk/arch/arm/configs/ebsa110_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_MODULES=y
CONFIG_ARCH_EBSA110=y
CONFIG_PCCARD=m
diff --git a/trunk/arch/arm/configs/edb7211_defconfig b/trunk/arch/arm/configs/edb7211_defconfig
index d52ded350a12..7b62be1561ea 100644
--- a/trunk/arch/arm/configs/edb7211_defconfig
+++ b/trunk/arch/arm/configs/edb7211_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
CONFIG_ARCH_CLPS711X=y
CONFIG_ARCH_EDB7211=y
diff --git a/trunk/arch/arm/configs/em_x270_defconfig b/trunk/arch/arm/configs/em_x270_defconfig
index 60a21e01eb70..d7db34f79702 100644
--- a/trunk/arch/arm/configs/em_x270_defconfig
+++ b/trunk/arch/arm/configs/em_x270_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_VM_EVENT_COUNTERS is not set
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
diff --git a/trunk/arch/arm/configs/ep93xx_defconfig b/trunk/arch/arm/configs/ep93xx_defconfig
index 8e97b2f7ceec..6d6689cdf398 100644
--- a/trunk/arch/arm/configs/ep93xx_defconfig
+++ b/trunk/arch/arm/configs/ep93xx_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/eseries_pxa_defconfig b/trunk/arch/arm/configs/eseries_pxa_defconfig
index d68ac67c201c..1691dea582fe 100644
--- a/trunk/arch/arm/configs/eseries_pxa_defconfig
+++ b/trunk/arch/arm/configs/eseries_pxa_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/arm/configs/ezx_defconfig b/trunk/arch/arm/configs/ezx_defconfig
index 227a477346ed..c4eeb6d1cbf0 100644
--- a/trunk/arch/arm/configs/ezx_defconfig
+++ b/trunk/arch/arm/configs/ezx_defconfig
@@ -7,7 +7,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/footbridge_defconfig b/trunk/arch/arm/configs/footbridge_defconfig
index 038518ab39a8..4f925ead2617 100644
--- a/trunk/arch/arm/configs/footbridge_defconfig
+++ b/trunk/arch/arm/configs/footbridge_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
CONFIG_MODULES=y
CONFIG_ARCH_FOOTBRIDGE=y
diff --git a/trunk/arch/arm/configs/fortunet_defconfig b/trunk/arch/arm/configs/fortunet_defconfig
index 840fced7529f..e11c7eab8ed0 100644
--- a/trunk/arch/arm/configs/fortunet_defconfig
+++ b/trunk/arch/arm/configs/fortunet_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
CONFIG_ARCH_CLPS711X=y
CONFIG_ARCH_FORTUNET=y
diff --git a/trunk/arch/arm/configs/h5000_defconfig b/trunk/arch/arm/configs/h5000_defconfig
index 37903e3f0efc..ac336f10000c 100644
--- a/trunk/arch/arm/configs/h5000_defconfig
+++ b/trunk/arch/arm/configs/h5000_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/imote2_defconfig b/trunk/arch/arm/configs/imote2_defconfig
index 176ec22af034..ade55c8c408b 100644
--- a/trunk/arch/arm/configs/imote2_defconfig
+++ b/trunk/arch/arm/configs/imote2_defconfig
@@ -6,7 +6,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/ixp2000_defconfig b/trunk/arch/arm/configs/ixp2000_defconfig
index 8405aded97a3..908324684549 100644
--- a/trunk/arch/arm/configs/ixp2000_defconfig
+++ b/trunk/arch/arm/configs/ixp2000_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/ixp23xx_defconfig b/trunk/arch/arm/configs/ixp23xx_defconfig
index 688717612e91..7fc056a8569c 100644
--- a/trunk/arch/arm/configs/ixp23xx_defconfig
+++ b/trunk/arch/arm/configs/ixp23xx_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/ixp4xx_defconfig b/trunk/arch/arm/configs/ixp4xx_defconfig
index 063e2ab2c8f1..5c5023934001 100644
--- a/trunk/arch/arm/configs/ixp4xx_defconfig
+++ b/trunk/arch/arm/configs/ixp4xx_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_MODULES=y
CONFIG_MODVERSIONS=y
# CONFIG_BLK_DEV_BSG is not set
diff --git a/trunk/arch/arm/configs/loki_defconfig b/trunk/arch/arm/configs/loki_defconfig
index 1ba752b2dc6d..e1eaff7f5536 100644
--- a/trunk/arch/arm/configs/loki_defconfig
+++ b/trunk/arch/arm/configs/loki_defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/lpd7a400_defconfig b/trunk/arch/arm/configs/lpd7a400_defconfig
index 5a48f171204c..20caaaba4a04 100644
--- a/trunk/arch/arm/configs/lpd7a400_defconfig
+++ b/trunk/arch/arm/configs/lpd7a400_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
# CONFIG_EPOLL is not set
# CONFIG_IOSCHED_DEADLINE is not set
diff --git a/trunk/arch/arm/configs/lpd7a404_defconfig b/trunk/arch/arm/configs/lpd7a404_defconfig
index 22d0631de009..1efcce97b4a7 100644
--- a/trunk/arch/arm/configs/lpd7a404_defconfig
+++ b/trunk/arch/arm/configs/lpd7a404_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_LOG_BUF_SHIFT=16
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
# CONFIG_EPOLL is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/arm/configs/magician_defconfig b/trunk/arch/arm/configs/magician_defconfig
index a88e64d4e9a5..af805e8fd03d 100644
--- a/trunk/arch/arm/configs/magician_defconfig
+++ b/trunk/arch/arm/configs/magician_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/mv78xx0_defconfig b/trunk/arch/arm/configs/mv78xx0_defconfig
index 7305ebddb510..b0d082422d46 100644
--- a/trunk/arch/arm/configs/mv78xx0_defconfig
+++ b/trunk/arch/arm/configs/mv78xx0_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_ALL=y
# CONFIG_SLUB_DEBUG is not set
CONFIG_PROFILING=y
diff --git a/trunk/arch/arm/configs/mx1_defconfig b/trunk/arch/arm/configs/mx1_defconfig
index b39b5ced8a10..2f38d9715437 100644
--- a/trunk/arch/arm/configs/mx1_defconfig
+++ b/trunk/arch/arm/configs/mx1_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/mx21_defconfig b/trunk/arch/arm/configs/mx21_defconfig
index 411f88dd4402..6454e18e2abe 100644
--- a/trunk/arch/arm/configs/mx21_defconfig
+++ b/trunk/arch/arm/configs/mx21_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/mx27_defconfig b/trunk/arch/arm/configs/mx27_defconfig
index 9ad4c656c9bd..813cfb366c18 100644
--- a/trunk/arch/arm/configs/mx27_defconfig
+++ b/trunk/arch/arm/configs/mx27_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/arm/configs/mx3_defconfig b/trunk/arch/arm/configs/mx3_defconfig
index 7c4b30b34952..e648ea3429be 100644
--- a/trunk/arch/arm/configs/mx3_defconfig
+++ b/trunk/arch/arm/configs/mx3_defconfig
@@ -4,7 +4,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/mx51_defconfig b/trunk/arch/arm/configs/mx51_defconfig
index 9cba68cfa51a..5c7a87260fab 100644
--- a/trunk/arch/arm/configs/mx51_defconfig
+++ b/trunk/arch/arm/configs/mx51_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_RELAY=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/nhk8815_defconfig b/trunk/arch/arm/configs/nhk8815_defconfig
index 37207d1bf44b..0e2dc26ebe66 100644
--- a/trunk/arch/arm/configs/nhk8815_defconfig
+++ b/trunk/arch/arm/configs/nhk8815_defconfig
@@ -7,7 +7,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_ALL=y
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/omap1_defconfig b/trunk/arch/arm/configs/omap1_defconfig
index 7b63462b349d..a350cc6bfe6a 100644
--- a/trunk/arch/arm/configs/omap1_defconfig
+++ b/trunk/arch/arm/configs/omap1_defconfig
@@ -6,7 +6,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_ELF_CORE is not set
# CONFIG_BASE_FULL is not set
diff --git a/trunk/arch/arm/configs/omap2plus_defconfig b/trunk/arch/arm/configs/omap2plus_defconfig
index ae890caa17a7..ccedde1371c3 100644
--- a/trunk/arch/arm/configs/omap2plus_defconfig
+++ b/trunk/arch/arm/configs/omap2plus_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_SLAB=y
diff --git a/trunk/arch/arm/configs/orion5x_defconfig b/trunk/arch/arm/configs/orion5x_defconfig
index a288d7033950..439323b3b0ed 100644
--- a/trunk/arch/arm/configs/orion5x_defconfig
+++ b/trunk/arch/arm/configs/orion5x_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SLUB_DEBUG is not set
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
diff --git a/trunk/arch/arm/configs/pcm027_defconfig b/trunk/arch/arm/configs/pcm027_defconfig
index 2f136c30a989..583a0610bd00 100644
--- a/trunk/arch/arm/configs/pcm027_defconfig
+++ b/trunk/arch/arm/configs/pcm027_defconfig
@@ -7,7 +7,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/pcontrol_g20_defconfig b/trunk/arch/arm/configs/pcontrol_g20_defconfig
index c75c9fcede58..b42ee62c4d77 100644
--- a/trunk/arch/arm/configs/pcontrol_g20_defconfig
+++ b/trunk/arch/arm/configs/pcontrol_g20_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_NAMESPACES=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/trunk/arch/arm/configs/pleb_defconfig b/trunk/arch/arm/configs/pleb_defconfig
index cb08cc561da5..d1efbdc1e6dc 100644
--- a/trunk/arch/arm/configs/pleb_defconfig
+++ b/trunk/arch/arm/configs/pleb_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
# CONFIG_SHMEM is not set
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/pnx4008_defconfig b/trunk/arch/arm/configs/pnx4008_defconfig
index 35a31ccacc32..bd481f04276f 100644
--- a/trunk/arch/arm/configs/pnx4008_defconfig
+++ b/trunk/arch/arm/configs/pnx4008_defconfig
@@ -5,7 +5,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_AUDIT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/simpad_defconfig b/trunk/arch/arm/configs/simpad_defconfig
index d3358155bf8a..af3b12e3b464 100644
--- a/trunk/arch/arm/configs/simpad_defconfig
+++ b/trunk/arch/arm/configs/simpad_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_LOCALVERSION="oe1"
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/spitz_defconfig b/trunk/arch/arm/configs/spitz_defconfig
index 70158273c6dd..aebd4bb0ad01 100644
--- a/trunk/arch/arm/configs/spitz_defconfig
+++ b/trunk/arch/arm/configs/spitz_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/stmp378x_defconfig b/trunk/arch/arm/configs/stmp378x_defconfig
index 1079c2b6eb3a..94a2d904bf94 100644
--- a/trunk/arch/arm/configs/stmp378x_defconfig
+++ b/trunk/arch/arm/configs/stmp378x_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/stmp37xx_defconfig b/trunk/arch/arm/configs/stmp37xx_defconfig
index 564a5cc44085..d8ee58cfa872 100644
--- a/trunk/arch/arm/configs/stmp37xx_defconfig
+++ b/trunk/arch/arm/configs/stmp37xx_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/arm/configs/tct_hammer_defconfig b/trunk/arch/arm/configs/tct_hammer_defconfig
index 95c0f0d63db6..e89ca19489c2 100644
--- a/trunk/arch/arm/configs/tct_hammer_defconfig
+++ b/trunk/arch/arm/configs/tct_hammer_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_BUG is not set
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/arm/configs/trizeps4_defconfig b/trunk/arch/arm/configs/trizeps4_defconfig
index 3162173fa75a..37f48342827c 100644
--- a/trunk/arch/arm/configs/trizeps4_defconfig
+++ b/trunk/arch/arm/configs/trizeps4_defconfig
@@ -7,7 +7,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/u300_defconfig b/trunk/arch/arm/configs/u300_defconfig
index 4a5a12681be2..c1c252cdca60 100644
--- a/trunk/arch/arm/configs/u300_defconfig
+++ b/trunk/arch/arm/configs/u300_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_AIO is not set
# CONFIG_VM_EVENT_COUNTERS is not set
CONFIG_MODULES=y
diff --git a/trunk/arch/arm/configs/viper_defconfig b/trunk/arch/arm/configs/viper_defconfig
index 8b0c717378fa..9d7bf5e0d0f5 100644
--- a/trunk/arch/arm/configs/viper_defconfig
+++ b/trunk/arch/arm/configs/viper_defconfig
@@ -3,7 +3,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=13
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_ELF_CORE is not set
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/arm/configs/xcep_defconfig b/trunk/arch/arm/configs/xcep_defconfig
index 5b5504143647..70d47dbae6db 100644
--- a/trunk/arch/arm/configs/xcep_defconfig
+++ b/trunk/arch/arm/configs/xcep_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
# CONFIG_SHMEM is not set
# CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/trunk/arch/arm/mach-msm/board-qsd8x50.c b/trunk/arch/arm/mach-msm/board-qsd8x50.c
index 6dde8185205f..2e8391307f55 100644
--- a/trunk/arch/arm/mach-msm/board-qsd8x50.c
+++ b/trunk/arch/arm/mach-msm/board-qsd8x50.c
@@ -43,7 +43,7 @@ static const unsigned qsd8x50_surf_smc91x_gpio __initdata = 156;
* at run-time: they vary from board to board, and the true
* configuration won't be known until boot.
*/
-static struct resource smc91x_resources[] = {
+static struct resource smc91x_resources[] __initdata = {
[0] = {
.flags = IORESOURCE_MEM,
},
@@ -52,7 +52,7 @@ static struct resource smc91x_resources[] = {
},
};
-static struct platform_device smc91x_device = {
+static struct platform_device smc91x_device __initdata = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
diff --git a/trunk/arch/arm/mach-s5p6442/mach-smdk6442.c b/trunk/arch/arm/mach-s5p6442/mach-smdk6442.c
index eaf6b9c489ff..e69f137b0a39 100644
--- a/trunk/arch/arm/mach-s5p6442/mach-smdk6442.c
+++ b/trunk/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -68,7 +68,6 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
static struct platform_device *smdk6442_devices[] __initdata = {
&s3c_device_i2c0,
- &samsung_asoc_dma,
&s5p6442_device_iis0,
&s3c_device_wdt,
};
diff --git a/trunk/arch/arm/mach-s5p64x0/mach-smdk6440.c b/trunk/arch/arm/mach-s5p64x0/mach-smdk6440.c
index e5beb84e2393..e9802755daeb 100644
--- a/trunk/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/trunk/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -95,7 +95,6 @@ static struct platform_device *smdk6440_devices[] __initdata = {
&s3c_device_i2c1,
&s3c_device_ts,
&s3c_device_wdt,
- &samsung_asoc_dma,
&s5p6440_device_iis,
};
diff --git a/trunk/arch/arm/mach-s5p64x0/mach-smdk6450.c b/trunk/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 3a20de0a9264..b78f56292780 100644
--- a/trunk/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/trunk/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -113,7 +113,6 @@ static struct platform_device *smdk6450_devices[] __initdata = {
&s3c_device_i2c1,
&s3c_device_ts,
&s3c_device_wdt,
- &samsung_asoc_dma,
&s5p6450_device_iis0,
/* s5p6450_device_spi0 will be added */
};
diff --git a/trunk/arch/arm/mach-s5pv210/mach-smdkc110.c b/trunk/arch/arm/mach-s5pv210/mach-smdkc110.c
index ce11a02eabf3..bb20a14da100 100644
--- a/trunk/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/trunk/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -81,7 +81,6 @@ static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = {
};
static struct platform_device *smdkc110_devices[] __initdata = {
- &samsung_asoc_dma,
&s5pv210_device_iis0,
&s5pv210_device_ac97,
&s5pv210_device_spdif,
diff --git a/trunk/arch/arm/mach-s5pv210/mach-smdkv210.c b/trunk/arch/arm/mach-s5pv210/mach-smdkv210.c
index bc9fdb52a020..88e45223c8af 100644
--- a/trunk/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/trunk/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -225,7 +225,6 @@ static struct platform_device *smdkv210_devices[] __initdata = {
&s5pv210_device_ac97,
&s5pv210_device_iis0,
&s5pv210_device_spdif,
- &samsung_asoc_dma,
&samsung_device_keypad,
&smdkv210_dm9000,
&smdkv210_lcd_lte480wv,
diff --git a/trunk/arch/arm/mach-s5pv310/mach-smdkc210.c b/trunk/arch/arm/mach-s5pv310/mach-smdkc210.c
index d9cab02e23ca..2d49273c0a26 100644
--- a/trunk/arch/arm/mach-s5pv310/mach-smdkc210.c
+++ b/trunk/arch/arm/mach-s5pv310/mach-smdkc210.c
@@ -163,9 +163,8 @@ static struct platform_device *smdkc210_devices[] __initdata = {
&s5pv310_device_pd[PD_CAM],
&s5pv310_device_pd[PD_TV],
&s5pv310_device_pd[PD_GPS],
- &s5pv310_device_sysmmu,
- &samsung_asoc_dma,
&smdkc210_smsc911x,
+ &s5pv310_device_sysmmu,
};
static void __init smdkc210_smsc911x_init(void)
diff --git a/trunk/arch/arm/mach-s5pv310/mach-smdkv310.c b/trunk/arch/arm/mach-s5pv310/mach-smdkv310.c
index b1cddbf3c616..28680cf9a72c 100644
--- a/trunk/arch/arm/mach-s5pv310/mach-smdkv310.c
+++ b/trunk/arch/arm/mach-s5pv310/mach-smdkv310.c
@@ -163,9 +163,8 @@ static struct platform_device *smdkv310_devices[] __initdata = {
&s5pv310_device_pd[PD_CAM],
&s5pv310_device_pd[PD_TV],
&s5pv310_device_pd[PD_GPS],
- &s5pv310_device_sysmmu,
- &samsung_asoc_dma,
&smdkv310_smsc911x,
+ &s5pv310_device_sysmmu,
};
static void __init smdkv310_smsc911x_init(void)
diff --git a/trunk/arch/avr32/Kconfig b/trunk/arch/avr32/Kconfig
index cd2062fe0f61..313b13073c54 100644
--- a/trunk/arch/avr32/Kconfig
+++ b/trunk/arch/avr32/Kconfig
@@ -1,8 +1,8 @@
config AVR32
def_bool y
- # With EXPERT=n, we get lots of stuff automatically selected
+ # With EMBEDDED=n, we get lots of stuff automatically selected
# that we usually don't need on AVR32.
- select EXPERT
+ select EMBEDDED
select HAVE_CLK
select HAVE_OPROFILE
select HAVE_KPROBES
diff --git a/trunk/arch/blackfin/Kconfig b/trunk/arch/blackfin/Kconfig
index c09577ddc3c5..0a221d48152d 100644
--- a/trunk/arch/blackfin/Kconfig
+++ b/trunk/arch/blackfin/Kconfig
@@ -30,9 +30,6 @@ config BLACKFIN
select HAVE_KERNEL_LZO if RAMKERNEL
select HAVE_OPROFILE
select ARCH_WANT_OPTIONAL_GPIOLIB
- select HAVE_GENERIC_HARDIRQS
- select GENERIC_IRQ_PROBE
- select IRQ_PER_CPU if SMP
config GENERIC_CSUM
def_bool y
@@ -47,6 +44,15 @@ config ZONE_DMA
config GENERIC_FIND_NEXT_BIT
def_bool y
+config GENERIC_HARDIRQS
+ def_bool y
+
+config GENERIC_IRQ_PROBE
+ def_bool y
+
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ def_bool y
+
config GENERIC_GPIO
def_bool y
@@ -248,6 +254,11 @@ config HOTPLUG_CPU
depends on SMP && HOTPLUG
default y
+config IRQ_PER_CPU
+ bool
+ depends on SMP
+ default y
+
config HAVE_LEGACY_PER_CPU_AREA
def_bool y
depends on SMP
diff --git a/trunk/arch/blackfin/configs/BF518F-EZBRD_defconfig b/trunk/arch/blackfin/configs/BF518F-EZBRD_defconfig
index db8d38a12a9a..c0b988ee30df 100644
--- a/trunk/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/trunk/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF526-EZBRD_defconfig b/trunk/arch/blackfin/configs/BF526-EZBRD_defconfig
index 3e50d7857c27..864af5b68874 100644
--- a/trunk/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/trunk/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig b/trunk/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig
index 362f59dd5228..7b6a3370dbe2 100644
--- a/trunk/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig
+++ b/trunk/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_ELF_CORE is not set
# CONFIG_AIO is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/blackfin/configs/BF527-EZKIT-V2_defconfig b/trunk/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
index 023ff0df2692..4faa6b46a352 100644
--- a/trunk/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
+++ b/trunk/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF527-EZKIT_defconfig b/trunk/arch/blackfin/configs/BF527-EZKIT_defconfig
index 4e5a121b3c56..9d893eb68243 100644
--- a/trunk/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/trunk/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF527-TLL6527M_defconfig b/trunk/arch/blackfin/configs/BF527-TLL6527M_defconfig
index cd0636bb24a0..97a2767c80f8 100644
--- a/trunk/arch/blackfin/configs/BF527-TLL6527M_defconfig
+++ b/trunk/arch/blackfin/configs/BF527-TLL6527M_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF533-EZKIT_defconfig b/trunk/arch/blackfin/configs/BF533-EZKIT_defconfig
index 9f8fc84e4ac9..f84774360c5b 100644
--- a/trunk/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/trunk/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF533-STAMP_defconfig b/trunk/arch/blackfin/configs/BF533-STAMP_defconfig
index ccc432b722a0..0e7262c04cc2 100644
--- a/trunk/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/trunk/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF537-STAMP_defconfig b/trunk/arch/blackfin/configs/BF537-STAMP_defconfig
index 566695472a84..4d14a002e7bd 100644
--- a/trunk/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/trunk/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF538-EZKIT_defconfig b/trunk/arch/blackfin/configs/BF538-EZKIT_defconfig
index ac22124ccb6c..fbee9d776f56 100644
--- a/trunk/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/trunk/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF548-EZKIT_defconfig b/trunk/arch/blackfin/configs/BF548-EZKIT_defconfig
index 944404b6ff08..05dd11db2f7d 100644
--- a/trunk/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/trunk/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF561-ACVILON_defconfig b/trunk/arch/blackfin/configs/BF561-ACVILON_defconfig
index b7c8451f26ac..bcb14d1c5664 100644
--- a/trunk/arch/blackfin/configs/BF561-ACVILON_defconfig
+++ b/trunk/arch/blackfin/configs/BF561-ACVILON_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig b/trunk/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig
index 7e67ba31e991..4cf451024fd8 100644
--- a/trunk/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig
+++ b/trunk/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BF561-EZKIT_defconfig b/trunk/arch/blackfin/configs/BF561-EZKIT_defconfig
index 141e5933e1aa..843aaa54a9e3 100644
--- a/trunk/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/trunk/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/BlackStamp_defconfig b/trunk/arch/blackfin/configs/BlackStamp_defconfig
index 97ebe09a7370..dae7adf3b2a2 100644
--- a/trunk/arch/blackfin/configs/BlackStamp_defconfig
+++ b/trunk/arch/blackfin/configs/BlackStamp_defconfig
@@ -6,7 +6,7 @@ CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/CM-BF527_defconfig b/trunk/arch/blackfin/configs/CM-BF527_defconfig
index c2457543e58c..f3414244bfed 100644
--- a/trunk/arch/blackfin/configs/CM-BF527_defconfig
+++ b/trunk/arch/blackfin/configs/CM-BF527_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_GZIP is not set
CONFIG_RD_LZMA=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/CM-BF533_defconfig b/trunk/arch/blackfin/configs/CM-BF533_defconfig
index baf1c1573e5e..8c7e08f173d4 100644
--- a/trunk/arch/blackfin/configs/CM-BF533_defconfig
+++ b/trunk/arch/blackfin/configs/CM-BF533_defconfig
@@ -7,7 +7,7 @@ CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_GZIP is not set
CONFIG_RD_LZMA=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/blackfin/configs/CM-BF537E_defconfig b/trunk/arch/blackfin/configs/CM-BF537E_defconfig
index 707cbf8a2590..bd3cb766d078 100644
--- a/trunk/arch/blackfin/configs/CM-BF537E_defconfig
+++ b/trunk/arch/blackfin/configs/CM-BF537E_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_GZIP is not set
CONFIG_RD_LZMA=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/blackfin/configs/CM-BF537U_defconfig b/trunk/arch/blackfin/configs/CM-BF537U_defconfig
index 4596935eadac..82224f37c04e 100644
--- a/trunk/arch/blackfin/configs/CM-BF537U_defconfig
+++ b/trunk/arch/blackfin/configs/CM-BF537U_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_GZIP is not set
CONFIG_RD_LZMA=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/blackfin/configs/CM-BF548_defconfig b/trunk/arch/blackfin/configs/CM-BF548_defconfig
index df267588efec..433598c6e773 100644
--- a/trunk/arch/blackfin/configs/CM-BF548_defconfig
+++ b/trunk/arch/blackfin/configs/CM-BF548_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_GZIP is not set
CONFIG_RD_LZMA=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/blackfin/configs/CM-BF561_defconfig b/trunk/arch/blackfin/configs/CM-BF561_defconfig
index 6c7b21585a43..ded7d845cb39 100644
--- a/trunk/arch/blackfin/configs/CM-BF561_defconfig
+++ b/trunk/arch/blackfin/configs/CM-BF561_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_GZIP is not set
CONFIG_RD_LZMA=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/blackfin/configs/DNP5370_defconfig b/trunk/arch/blackfin/configs/DNP5370_defconfig
index f50313657f3e..0ebc7d9aa426 100644
--- a/trunk/arch/blackfin/configs/DNP5370_defconfig
+++ b/trunk/arch/blackfin/configs/DNP5370_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLOB=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_CFQ is not set
diff --git a/trunk/arch/blackfin/configs/H8606_defconfig b/trunk/arch/blackfin/configs/H8606_defconfig
index 7450127b6455..700fb701c121 100644
--- a/trunk/arch/blackfin/configs/H8606_defconfig
+++ b/trunk/arch/blackfin/configs/H8606_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/IP0X_defconfig b/trunk/arch/blackfin/configs/IP0X_defconfig
index 5e797cf72043..b40156d217e3 100644
--- a/trunk/arch/blackfin/configs/IP0X_defconfig
+++ b/trunk/arch/blackfin/configs/IP0X_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_HOTPLUG is not set
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/blackfin/configs/PNAV-10_defconfig b/trunk/arch/blackfin/configs/PNAV-10_defconfig
index a566a2fe6b9b..be866d95ed76 100644
--- a/trunk/arch/blackfin/configs/PNAV-10_defconfig
+++ b/trunk/arch/blackfin/configs/PNAV-10_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/SRV1_defconfig b/trunk/arch/blackfin/configs/SRV1_defconfig
index 853809510ee9..b64bdf759b82 100644
--- a/trunk/arch/blackfin/configs/SRV1_defconfig
+++ b/trunk/arch/blackfin/configs/SRV1_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS_ALL=y
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/blackfin/configs/TCM-BF518_defconfig b/trunk/arch/blackfin/configs/TCM-BF518_defconfig
index d496ae9a39b0..1bccd9a50986 100644
--- a/trunk/arch/blackfin/configs/TCM-BF518_defconfig
+++ b/trunk/arch/blackfin/configs/TCM-BF518_defconfig
@@ -7,7 +7,7 @@ CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_GZIP is not set
CONFIG_RD_LZMA=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/blackfin/configs/TCM-BF537_defconfig b/trunk/arch/blackfin/configs/TCM-BF537_defconfig
index 65f642167a50..00ce899e9e5d 100644
--- a/trunk/arch/blackfin/configs/TCM-BF537_defconfig
+++ b/trunk/arch/blackfin/configs/TCM-BF537_defconfig
@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_GZIP is not set
CONFIG_RD_LZMA=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_ELF_CORE is not set
diff --git a/trunk/arch/cris/Kconfig b/trunk/arch/cris/Kconfig
index 0a7a4c11d8b1..613e62831c55 100644
--- a/trunk/arch/cris/Kconfig
+++ b/trunk/arch/cris/Kconfig
@@ -54,8 +54,6 @@ config CRIS
bool
default y
select HAVE_IDE
- select HAVE_GENERIC_HARDIRQS
- select GENERIC_HARDIRQS_NO_DEPRECATED
config HZ
int
@@ -69,6 +67,10 @@ menu "General setup"
source "fs/Kconfig.binfmt"
+config GENERIC_HARDIRQS
+ bool
+ default y
+
config ETRAX_CMDLINE
string "Kernel command line"
default "root=/dev/mtdblock3"
diff --git a/trunk/arch/cris/arch-v10/kernel/irq.c b/trunk/arch/cris/arch-v10/kernel/irq.c
index 7328a7cf7449..a0c0df8be9c8 100644
--- a/trunk/arch/cris/arch-v10/kernel/irq.c
+++ b/trunk/arch/cris/arch-v10/kernel/irq.c
@@ -104,21 +104,43 @@ static void (*interrupt[NR_IRQS])(void) = {
IRQ31_interrupt
};
-static void enable_crisv10_irq(struct irq_data *data)
+static void enable_crisv10_irq(unsigned int irq);
+
+static unsigned int startup_crisv10_irq(unsigned int irq)
+{
+ enable_crisv10_irq(irq);
+ return 0;
+}
+
+#define shutdown_crisv10_irq disable_crisv10_irq
+
+static void enable_crisv10_irq(unsigned int irq)
+{
+ crisv10_unmask_irq(irq);
+}
+
+static void disable_crisv10_irq(unsigned int irq)
+{
+ crisv10_mask_irq(irq);
+}
+
+static void ack_crisv10_irq(unsigned int irq)
{
- crisv10_unmask_irq(data->irq);
}
-static void disable_crisv10_irq(struct irq_data *data)
+static void end_crisv10_irq(unsigned int irq)
{
- crisv10_mask_irq(data->irq);
}
static struct irq_chip crisv10_irq_type = {
- .name = "CRISv10",
- .irq_shutdown = disable_crisv10_irq,
- .irq_enable = enable_crisv10_irq,
- .irq_disable = disable_crisv10_irq,
+ .name = "CRISv10",
+ .startup = startup_crisv10_irq,
+ .shutdown = shutdown_crisv10_irq,
+ .enable = enable_crisv10_irq,
+ .disable = disable_crisv10_irq,
+ .ack = ack_crisv10_irq,
+ .end = end_crisv10_irq,
+ .set_affinity = NULL
};
void weird_irq(void);
@@ -199,8 +221,7 @@ init_IRQ(void)
/* Initialize IRQ handler descriptors. */
for(i = 2; i < NR_IRQS; i++) {
- set_irq_desc_and_handler(i, &crisv10_irq_type,
- handle_simple_irq);
+ irq_desc[i].chip = &crisv10_irq_type;
set_int_vector(i, interrupt[i]);
}
diff --git a/trunk/arch/cris/arch-v32/kernel/irq.c b/trunk/arch/cris/arch-v32/kernel/irq.c
index 0ad9db5126c7..2ed48ae3d313 100644
--- a/trunk/arch/cris/arch-v32/kernel/irq.c
+++ b/trunk/arch/cris/arch-v32/kernel/irq.c
@@ -291,33 +291,54 @@ void crisv32_unmask_irq(int irq)
}
-static void enable_crisv32_irq(struct irq_data *data)
+static unsigned int startup_crisv32_irq(unsigned int irq)
{
- crisv32_unmask_irq(data->irq);
+ crisv32_unmask_irq(irq);
+ return 0;
}
-static void disable_crisv32_irq(struct irq_data *data)
+static void shutdown_crisv32_irq(unsigned int irq)
{
- crisv32_mask_irq(data->irq);
+ crisv32_mask_irq(irq);
}
-static int set_affinity_crisv32_irq(struct irq_data *data,
- const struct cpumask *dest, bool force)
+static void enable_crisv32_irq(unsigned int irq)
{
- unsigned long flags;
+ crisv32_unmask_irq(irq);
+}
+
+static void disable_crisv32_irq(unsigned int irq)
+{
+ crisv32_mask_irq(irq);
+}
+static void ack_crisv32_irq(unsigned int irq)
+{
+}
+
+static void end_crisv32_irq(unsigned int irq)
+{
+}
+
+int set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
+{
+ unsigned long flags;
spin_lock_irqsave(&irq_lock, flags);
- irq_allocations[data->irq - FIRST_IRQ].mask = *dest;
+ irq_allocations[irq - FIRST_IRQ].mask = *dest;
spin_unlock_irqrestore(&irq_lock, flags);
+
return 0;
}
static struct irq_chip crisv32_irq_type = {
- .name = "CRISv32",
- .irq_shutdown = disable_crisv32_irq,
- .irq_enable = enable_crisv32_irq,
- .irq_disable = disable_crisv32_irq,
- .irq_set_affinity = set_affinity_crisv32_irq,
+ .name = "CRISv32",
+ .startup = startup_crisv32_irq,
+ .shutdown = shutdown_crisv32_irq,
+ .enable = enable_crisv32_irq,
+ .disable = disable_crisv32_irq,
+ .ack = ack_crisv32_irq,
+ .end = end_crisv32_irq,
+ .set_affinity = set_affinity_crisv32_irq
};
void
@@ -451,8 +472,7 @@ init_IRQ(void)
/* Point all IRQ's to bad handlers. */
for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
- set_irq_chip_and_handler(j, &crisv32_irq_type,
- handle_simple_irq);
+ irq_desc[j].chip = &crisv32_irq_type;
set_exception_vector(i, interrupt[j]);
}
diff --git a/trunk/arch/cris/configs/artpec_3_defconfig b/trunk/arch/cris/configs/artpec_3_defconfig
index 71854d41c5a0..590f72c9455d 100644
--- a/trunk/arch/cris/configs/artpec_3_defconfig
+++ b/trunk/arch/cris/configs/artpec_3_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
# CONFIG_SWAP is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_BLK_DEV_BSG is not set
diff --git a/trunk/arch/cris/configs/etrax-100lx_v2_defconfig b/trunk/arch/cris/configs/etrax-100lx_v2_defconfig
index a85aabf92be5..1b2853e39801 100644
--- a/trunk/arch/cris/configs/etrax-100lx_v2_defconfig
+++ b/trunk/arch/cris/configs/etrax-100lx_v2_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
# CONFIG_SWAP is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_BLK_DEV_BSG is not set
diff --git a/trunk/arch/cris/configs/etraxfs_defconfig b/trunk/arch/cris/configs/etraxfs_defconfig
index 87c7227fecb2..f73d38cc9c66 100644
--- a/trunk/arch/cris/configs/etraxfs_defconfig
+++ b/trunk/arch/cris/configs/etraxfs_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
# CONFIG_SWAP is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_BLK_DEV_BSG is not set
diff --git a/trunk/arch/cris/kernel/irq.c b/trunk/arch/cris/kernel/irq.c
index c346952f06dc..469f7f9d62e0 100644
--- a/trunk/arch/cris/kernel/irq.c
+++ b/trunk/arch/cris/kernel/irq.c
@@ -62,7 +62,7 @@ int show_interrupts(struct seq_file *p, void *v)
for_each_online_cpu(j)
seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
#endif
- seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name);
+ seq_printf(p, " %14s", irq_desc[i].chip->name);
seq_printf(p, " %s", action->name);
for (action=action->next; action; action = action->next)
@@ -93,8 +93,8 @@ asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
printk("do_IRQ: stack overflow: %lX\n", sp);
show_stack(NULL, (unsigned long *)sp);
}
- generic_handle_irq(irq);
- irq_exit();
+ __do_IRQ(irq);
+ irq_exit();
set_irq_regs(old_regs);
}
diff --git a/trunk/arch/frv/Kconfig b/trunk/arch/frv/Kconfig
index 747499a1b31e..f6bcb039cd6d 100644
--- a/trunk/arch/frv/Kconfig
+++ b/trunk/arch/frv/Kconfig
@@ -5,7 +5,6 @@ config FRV
select HAVE_ARCH_TRACEHOOK
select HAVE_IRQ_WORK
select HAVE_PERF_EVENTS
- select HAVE_GENERIC_HARDIRQS
config ZONE_DMA
bool
@@ -30,6 +29,14 @@ config GENERIC_CALIBRATE_DELAY
bool
default n
+config GENERIC_HARDIRQS
+ bool
+ default y
+
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ bool
+ default y
+
config TIME_LOW_RES
bool
default y
diff --git a/trunk/arch/frv/defconfig b/trunk/arch/frv/defconfig
index b1b792610fdf..b8ebe9e8a493 100644
--- a/trunk/arch/frv/defconfig
+++ b/trunk/arch/frv/defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
CONFIG_MMU=y
CONFIG_FRV_OUTOFLINE_ATOMIC_OPS=y
diff --git a/trunk/arch/h8300/Kconfig b/trunk/arch/h8300/Kconfig
index 6df692d1475f..65f897d8c1e9 100644
--- a/trunk/arch/h8300/Kconfig
+++ b/trunk/arch/h8300/Kconfig
@@ -2,8 +2,6 @@ config H8300
bool
default y
select HAVE_IDE
- select HAVE_GENERIC_HARDIRQS
- select GENERIC_HARDIRQS_NO_DEPRECATED
config SYMBOL_PREFIX
string
@@ -49,6 +47,10 @@ config GENERIC_HWEIGHT
bool
default y
+config GENERIC_HARDIRQS
+ bool
+ default y
+
config GENERIC_CALIBRATE_DELAY
bool
default y
diff --git a/trunk/arch/h8300/defconfig b/trunk/arch/h8300/defconfig
index 042425a02645..342f77765f02 100644
--- a/trunk/arch/h8300/defconfig
+++ b/trunk/arch/h8300/defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_UID16 is not set
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
diff --git a/trunk/arch/h8300/kernel/irq.c b/trunk/arch/h8300/kernel/irq.c
index 7643d39925d6..c25dc2c2b1da 100644
--- a/trunk/arch/h8300/kernel/irq.c
+++ b/trunk/arch/h8300/kernel/irq.c
@@ -38,30 +38,34 @@ static inline int is_ext_irq(unsigned int irq)
return (irq >= EXT_IRQ0 && irq <= (EXT_IRQ0 + EXT_IRQS));
}
-static void h8300_enable_irq(struct irq_data *data)
+static void h8300_enable_irq(unsigned int irq)
{
- if (is_ext_irq(data->irq))
- IER_REGS |= 1 << (data->irq - EXT_IRQ0);
+ if (is_ext_irq(irq))
+ IER_REGS |= 1 << (irq - EXT_IRQ0);
}
-static void h8300_disable_irq(struct irq_data *data)
+static void h8300_disable_irq(unsigned int irq)
{
- if (is_ext_irq(data->irq))
- IER_REGS &= ~(1 << (data->irq - EXT_IRQ0));
+ if (is_ext_irq(irq))
+ IER_REGS &= ~(1 << (irq - EXT_IRQ0));
}
-static unsigned int h8300_startup_irq(struct irq_data *data)
+static void h8300_end_irq(unsigned int irq)
{
- if (is_ext_irq(data->irq))
- return h8300_enable_irq_pin(data->irq);
+}
+
+static unsigned int h8300_startup_irq(unsigned int irq)
+{
+ if (is_ext_irq(irq))
+ return h8300_enable_irq_pin(irq);
else
return 0;
}
-static void h8300_shutdown_irq(struct irq_data *data)
+static void h8300_shutdown_irq(unsigned int irq)
{
- if (is_ext_irq(data->irq))
- h8300_disable_irq_pin(data->irq);
+ if (is_ext_irq(irq))
+ h8300_disable_irq_pin(irq);
}
/*
@@ -69,10 +73,12 @@ static void h8300_shutdown_irq(struct irq_data *data)
*/
struct irq_chip h8300irq_chip = {
.name = "H8300-INTC",
- .irq_startup = h8300_startup_irq,
- .irq_shutdown = h8300_shutdown_irq,
- .irq_enable = h8300_enable_irq,
- .irq_disable = h8300_disable_irq,
+ .startup = h8300_startup_irq,
+ .shutdown = h8300_shutdown_irq,
+ .enable = h8300_enable_irq,
+ .disable = h8300_disable_irq,
+ .ack = NULL,
+ .end = h8300_end_irq,
};
#if defined(CONFIG_RAMKERNEL)
@@ -154,14 +160,18 @@ void __init init_IRQ(void)
setup_vector();
- for (c = 0; c < NR_IRQS; c++)
- set_irq_chip_and_handler(c, &h8300irq_chip, handle_simple_irq);
+ for (c = 0; c < NR_IRQS; c++) {
+ irq_desc[c].status = IRQ_DISABLED;
+ irq_desc[c].action = NULL;
+ irq_desc[c].depth = 1;
+ irq_desc[c].chip = &h8300irq_chip;
+ }
}
asmlinkage void do_IRQ(int irq)
{
irq_enter();
- generic_handle_irq(irq);
+ __do_IRQ(irq);
irq_exit();
}
@@ -182,7 +192,7 @@ int show_interrupts(struct seq_file *p, void *v)
goto unlock;
seq_printf(p, "%3d: ",i);
seq_printf(p, "%10u ", kstat_irqs(i));
- seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name);
+ seq_printf(p, " %14s", irq_desc[i].chip->name);
seq_printf(p, "-%-8s", irq_desc[i].name);
seq_printf(p, " %s", action->name);
diff --git a/trunk/arch/ia64/Kconfig b/trunk/arch/ia64/Kconfig
index fcf3b437a2d9..e0f5b6d7f849 100644
--- a/trunk/arch/ia64/Kconfig
+++ b/trunk/arch/ia64/Kconfig
@@ -22,10 +22,6 @@ config IA64
select HAVE_KVM
select HAVE_ARCH_TRACEHOOK
select HAVE_DMA_API_DEBUG
- select HAVE_GENERIC_HARDIRQS
- select GENERIC_IRQ_PROBE
- select GENERIC_PENDING_IRQ if SMP
- select IRQ_PER_CPU
default y
help
The Itanium Processor Family is Intel's 64-bit successor to
@@ -682,6 +678,28 @@ source "arch/ia64/kvm/Kconfig"
source "lib/Kconfig"
+#
+# Use the generic interrupt handling code in kernel/irq/:
+#
+config GENERIC_HARDIRQS
+ def_bool y
+
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ def_bool y
+
+config GENERIC_IRQ_PROBE
+ bool
+ default y
+
+config GENERIC_PENDING_IRQ
+ bool
+ depends on GENERIC_HARDIRQS && SMP
+ default y
+
+config IRQ_PER_CPU
+ bool
+ default y
+
config IOMMU_HELPER
def_bool (IA64_HP_ZX1 || IA64_HP_ZX1_SWIOTLB || IA64_GENERIC || SWIOTLB)
diff --git a/trunk/arch/m32r/Kconfig b/trunk/arch/m32r/Kconfig
index ef4c1e442be3..5c291d65196b 100644
--- a/trunk/arch/m32r/Kconfig
+++ b/trunk/arch/m32r/Kconfig
@@ -7,9 +7,6 @@ config M32R
select HAVE_KERNEL_GZIP
select HAVE_KERNEL_BZIP2
select HAVE_KERNEL_LZMA
- select HAVE_GENERIC_HARDIRQS
- select GENERIC_HARDIRQS_NO_DEPRECATED
- select GENERIC_IRQ_PROBE
config SBUS
bool
@@ -22,6 +19,14 @@ config ZONE_DMA
bool
default y
+config GENERIC_HARDIRQS
+ bool
+ default y
+
+config GENERIC_IRQ_PROBE
+ bool
+ default y
+
config NO_IOPORT
def_bool y
diff --git a/trunk/arch/m32r/configs/m32700ut.smp_defconfig b/trunk/arch/m32r/configs/m32700ut.smp_defconfig
index a3d727ed6a16..816c3ecaa2aa 100644
--- a/trunk/arch/m32r/configs/m32700ut.smp_defconfig
+++ b/trunk/arch/m32r/configs/m32700ut.smp_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=15
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/m32700ut.up_defconfig b/trunk/arch/m32r/configs/m32700ut.up_defconfig
index b8334163099d..84785686640a 100644
--- a/trunk/arch/m32r/configs/m32700ut.up_defconfig
+++ b/trunk/arch/m32r/configs/m32700ut.up_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/mappi.nommu_defconfig b/trunk/arch/m32r/configs/mappi.nommu_defconfig
index 7c90ce2fc42b..354a964d084d 100644
--- a/trunk/arch/m32r/configs/mappi.nommu_defconfig
+++ b/trunk/arch/m32r/configs/mappi.nommu_defconfig
@@ -3,7 +3,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/mappi.smp_defconfig b/trunk/arch/m32r/configs/mappi.smp_defconfig
index 367d07cebcd3..9022307bd073 100644
--- a/trunk/arch/m32r/configs/mappi.smp_defconfig
+++ b/trunk/arch/m32r/configs/mappi.smp_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=15
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/mappi.up_defconfig b/trunk/arch/m32r/configs/mappi.up_defconfig
index cb11384386ce..3726068721a5 100644
--- a/trunk/arch/m32r/configs/mappi.up_defconfig
+++ b/trunk/arch/m32r/configs/mappi.up_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/mappi2.opsp_defconfig b/trunk/arch/m32r/configs/mappi2.opsp_defconfig
index 3bff779259b4..6136fad048e4 100644
--- a/trunk/arch/m32r/configs/mappi2.opsp_defconfig
+++ b/trunk/arch/m32r/configs/mappi2.opsp_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/mappi2.vdec2_defconfig b/trunk/arch/m32r/configs/mappi2.vdec2_defconfig
index 75246c9c1af8..dce1fc7d67ed 100644
--- a/trunk/arch/m32r/configs/mappi2.vdec2_defconfig
+++ b/trunk/arch/m32r/configs/mappi2.vdec2_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/mappi3.smp_defconfig b/trunk/arch/m32r/configs/mappi3.smp_defconfig
index 27cefd41ac1f..b204e2ecd0f1 100644
--- a/trunk/arch/m32r/configs/mappi3.smp_defconfig
+++ b/trunk/arch/m32r/configs/mappi3.smp_defconfig
@@ -5,7 +5,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=15
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/oaks32r_defconfig b/trunk/arch/m32r/configs/oaks32r_defconfig
index 5087a510ca4f..5aa4ea9ebb10 100644
--- a/trunk/arch/m32r/configs/oaks32r_defconfig
+++ b/trunk/arch/m32r/configs/oaks32r_defconfig
@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/opsput_defconfig b/trunk/arch/m32r/configs/opsput_defconfig
index 50c6f525db20..8494c6a276e8 100644
--- a/trunk/arch/m32r/configs/opsput_defconfig
+++ b/trunk/arch/m32r/configs/opsput_defconfig
@@ -4,7 +4,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/m32r/configs/usrv_defconfig b/trunk/arch/m32r/configs/usrv_defconfig
index a3cfaaedab60..1df293bc2ab9 100644
--- a/trunk/arch/m32r/configs/usrv_defconfig
+++ b/trunk/arch/m32r/configs/usrv_defconfig
@@ -5,7 +5,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=15
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/m32r/kernel/irq.c b/trunk/arch/m32r/kernel/irq.c
index f745c1287f3a..7db26f1f082d 100644
--- a/trunk/arch/m32r/kernel/irq.c
+++ b/trunk/arch/m32r/kernel/irq.c
@@ -40,10 +40,8 @@ int show_interrupts(struct seq_file *p, void *v)
}
if (i < NR_IRQS) {
- struct irq_desc *desc = irq_to_desc(i);
-
- raw_spin_lock_irqsave(&desc->lock, flags);
- action = desc->action;
+ raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
+ action = irq_desc[i].action;
if (!action)
goto skip;
seq_printf(p, "%3d: ",i);
@@ -53,7 +51,7 @@ int show_interrupts(struct seq_file *p, void *v)
for_each_online_cpu(j)
seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
#endif
- seq_printf(p, " %14s", desc->irq_data.chip->name);
+ seq_printf(p, " %14s", irq_desc[i].chip->name);
seq_printf(p, " %s", action->name);
for (action=action->next; action; action = action->next)
@@ -61,7 +59,7 @@ int show_interrupts(struct seq_file *p, void *v)
seq_putc(p, '\n');
skip:
- raw_spin_unlock_irqrestore(&desc->lock, flags);
+ raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
}
return 0;
}
diff --git a/trunk/arch/m32r/platforms/m32104ut/setup.c b/trunk/arch/m32r/platforms/m32104ut/setup.c
index 4a693d02c1e1..402a59d7219b 100644
--- a/trunk/arch/m32r/platforms/m32104ut/setup.c
+++ b/trunk/arch/m32r/platforms/m32104ut/setup.c
@@ -39,30 +39,39 @@ static void enable_m32104ut_irq(unsigned int irq)
outl(data, port);
}
-static void mask_m32104ut_irq(struct irq_data *data)
+static void mask_and_ack_m32104ut(unsigned int irq)
{
- disable_m32104ut_irq(data->irq);
+ disable_m32104ut_irq(irq);
}
-static void unmask_m32104ut_irq(struct irq_data *data)
+static void end_m32104ut_irq(unsigned int irq)
{
- enable_m32104ut_irq(data->irq);
+ enable_m32104ut_irq(irq);
}
-static void shutdown_m32104ut_irq(struct irq_data *data)
+static unsigned int startup_m32104ut_irq(unsigned int irq)
{
- unsigned int irq = data->irq;
- unsigned long port = irq2port(irq);
+ enable_m32104ut_irq(irq);
+ return (0);
+}
+
+static void shutdown_m32104ut_irq(unsigned int irq)
+{
+ unsigned long port;
+ port = irq2port(irq);
outl(M32R_ICUCR_ILEVEL7, port);
}
static struct irq_chip m32104ut_irq_type =
{
- .name = "M32104UT-IRQ",
- .irq_shutdown = shutdown_m32104ut_irq,
- .irq_unmask = unmask_m32104ut_irq,
- .irq_mask = mask_m32104ut_irq,
+ .name = "M32104UT-IRQ",
+ .startup = startup_m32104ut_irq,
+ .shutdown = shutdown_m32104ut_irq,
+ .enable = enable_m32104ut_irq,
+ .disable = disable_m32104ut_irq,
+ .ack = mask_and_ack_m32104ut,
+ .end = end_m32104ut_irq
};
void __init init_IRQ(void)
@@ -76,29 +85,36 @@ void __init init_IRQ(void)
#if defined(CONFIG_SMC91X)
/* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
- set_irq_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type,
- handle_level_irq);
- /* "H" level sense */
- cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11;
+ irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type;
+ irq_desc[M32R_IRQ_INT0].action = 0;
+ irq_desc[M32R_IRQ_INT0].depth = 1;
+ icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
disable_m32104ut_irq(M32R_IRQ_INT0);
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
- set_irq_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type;
+ irq_desc[M32R_IRQ_MFT2].action = 0;
+ irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
disable_m32104ut_irq(M32R_IRQ_MFT2);
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type;
+ irq_desc[M32R_IRQ_SIO0_R].action = 0;
+ irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
disable_m32104ut_irq(M32R_IRQ_SIO0_R);
/* SIO0_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type;
+ irq_desc[M32R_IRQ_SIO0_S].action = 0;
+ irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
disable_m32104ut_irq(M32R_IRQ_SIO0_S);
#endif /* CONFIG_SERIAL_M32R_SIO */
diff --git a/trunk/arch/m32r/platforms/m32700ut/setup.c b/trunk/arch/m32r/platforms/m32700ut/setup.c
index 2074bcc841eb..80b1a026795a 100644
--- a/trunk/arch/m32r/platforms/m32700ut/setup.c
+++ b/trunk/arch/m32r/platforms/m32700ut/setup.c
@@ -45,30 +45,39 @@ static void enable_m32700ut_irq(unsigned int irq)
outl(data, port);
}
-static void mask_m32700ut(struct irq_data *data)
+static void mask_and_ack_m32700ut(unsigned int irq)
{
- disable_m32700ut_irq(data->irq);
+ disable_m32700ut_irq(irq);
}
-static void unmask_m32700ut(struct irq_data *data)
+static void end_m32700ut_irq(unsigned int irq)
{
- enable_m32700ut_irq(data->irq);
+ enable_m32700ut_irq(irq);
}
-static void shutdown_m32700ut(struct irq_data *data)
+static unsigned int startup_m32700ut_irq(unsigned int irq)
+{
+ enable_m32700ut_irq(irq);
+ return (0);
+}
+
+static void shutdown_m32700ut_irq(unsigned int irq)
{
unsigned long port;
- port = irq2port(data->irq);
+ port = irq2port(irq);
outl(M32R_ICUCR_ILEVEL7, port);
}
static struct irq_chip m32700ut_irq_type =
{
- .name = "M32700UT-IRQ",
- .irq_shutdown = shutdown_m32700ut,
- .irq_mask = mask_m32700ut,
- .irq_unmask = unmask_m32700ut
+ .name = "M32700UT-IRQ",
+ .startup = startup_m32700ut_irq,
+ .shutdown = shutdown_m32700ut_irq,
+ .enable = enable_m32700ut_irq,
+ .disable = disable_m32700ut_irq,
+ .ack = mask_and_ack_m32700ut,
+ .end = end_m32700ut_irq
};
/*
@@ -90,6 +99,7 @@ static void disable_m32700ut_pld_irq(unsigned int irq)
unsigned int pldirq;
pldirq = irq2pldirq(irq);
+// disable_m32700ut_irq(M32R_IRQ_INT1);
port = pldirq2port(pldirq);
data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
outw(data, port);
@@ -101,38 +111,50 @@ static void enable_m32700ut_pld_irq(unsigned int irq)
unsigned int pldirq;
pldirq = irq2pldirq(irq);
+// enable_m32700ut_irq(M32R_IRQ_INT1);
port = pldirq2port(pldirq);
data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
outw(data, port);
}
-static void mask_m32700ut_pld(struct irq_data *data)
+static void mask_and_ack_m32700ut_pld(unsigned int irq)
{
- disable_m32700ut_pld_irq(data->irq);
+ disable_m32700ut_pld_irq(irq);
+// mask_and_ack_m32700ut(M32R_IRQ_INT1);
}
-static void unmask_m32700ut_pld(struct irq_data *data)
+static void end_m32700ut_pld_irq(unsigned int irq)
{
- enable_m32700ut_pld_irq(data->irq);
- enable_m32700ut_irq(M32R_IRQ_INT1);
+ enable_m32700ut_pld_irq(irq);
+ end_m32700ut_irq(M32R_IRQ_INT1);
}
-static void shutdown_m32700ut_pld_irq(struct irq_data *data)
+static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
+{
+ enable_m32700ut_pld_irq(irq);
+ return (0);
+}
+
+static void shutdown_m32700ut_pld_irq(unsigned int irq)
{
unsigned long port;
unsigned int pldirq;
- pldirq = irq2pldirq(data->irq);
+ pldirq = irq2pldirq(irq);
+// shutdown_m32700ut_irq(M32R_IRQ_INT1);
port = pldirq2port(pldirq);
outw(PLD_ICUCR_ILEVEL7, port);
}
static struct irq_chip m32700ut_pld_irq_type =
{
- .name = "M32700UT-PLD-IRQ",
- .irq_shutdown = shutdown_m32700ut_pld_irq,
- .irq_mask = mask_m32700ut_pld,
- .irq_unmask = unmask_m32700ut_pld,
+ .name = "M32700UT-PLD-IRQ",
+ .startup = startup_m32700ut_pld_irq,
+ .shutdown = shutdown_m32700ut_pld_irq,
+ .enable = enable_m32700ut_pld_irq,
+ .disable = disable_m32700ut_pld_irq,
+ .ack = mask_and_ack_m32700ut_pld,
+ .end = end_m32700ut_pld_irq
};
/*
@@ -166,33 +188,42 @@ static void enable_m32700ut_lanpld_irq(unsigned int irq)
outw(data, port);
}
-static void mask_m32700ut_lanpld(struct irq_data *data)
+static void mask_and_ack_m32700ut_lanpld(unsigned int irq)
{
- disable_m32700ut_lanpld_irq(data->irq);
+ disable_m32700ut_lanpld_irq(irq);
}
-static void unmask_m32700ut_lanpld(struct irq_data *data)
+static void end_m32700ut_lanpld_irq(unsigned int irq)
{
- enable_m32700ut_lanpld_irq(data->irq);
- enable_m32700ut_irq(M32R_IRQ_INT0);
+ enable_m32700ut_lanpld_irq(irq);
+ end_m32700ut_irq(M32R_IRQ_INT0);
}
-static void shutdown_m32700ut_lanpld(struct irq_data *data)
+static unsigned int startup_m32700ut_lanpld_irq(unsigned int irq)
+{
+ enable_m32700ut_lanpld_irq(irq);
+ return (0);
+}
+
+static void shutdown_m32700ut_lanpld_irq(unsigned int irq)
{
unsigned long port;
unsigned int pldirq;
- pldirq = irq2lanpldirq(data->irq);
+ pldirq = irq2lanpldirq(irq);
port = lanpldirq2port(pldirq);
outw(PLD_ICUCR_ILEVEL7, port);
}
static struct irq_chip m32700ut_lanpld_irq_type =
{
- .name = "M32700UT-PLD-LAN-IRQ",
- .irq_shutdown = shutdown_m32700ut_lanpld,
- .irq_mask = mask_m32700ut_lanpld,
- .irq_unmask = unmask_m32700ut_lanpld,
+ .name = "M32700UT-PLD-LAN-IRQ",
+ .startup = startup_m32700ut_lanpld_irq,
+ .shutdown = shutdown_m32700ut_lanpld_irq,
+ .enable = enable_m32700ut_lanpld_irq,
+ .disable = disable_m32700ut_lanpld_irq,
+ .ack = mask_and_ack_m32700ut_lanpld,
+ .end = end_m32700ut_lanpld_irq
};
/*
@@ -226,110 +257,143 @@ static void enable_m32700ut_lcdpld_irq(unsigned int irq)
outw(data, port);
}
-static void mask_m32700ut_lcdpld(struct irq_data *data)
+static void mask_and_ack_m32700ut_lcdpld(unsigned int irq)
{
- disable_m32700ut_lcdpld_irq(data->irq);
+ disable_m32700ut_lcdpld_irq(irq);
}
-static void unmask_m32700ut_lcdpld(struct irq_data *data)
+static void end_m32700ut_lcdpld_irq(unsigned int irq)
{
- enable_m32700ut_lcdpld_irq(data->irq);
- enable_m32700ut_irq(M32R_IRQ_INT2);
+ enable_m32700ut_lcdpld_irq(irq);
+ end_m32700ut_irq(M32R_IRQ_INT2);
}
-static void shutdown_m32700ut_lcdpld(struct irq_data *data)
+static unsigned int startup_m32700ut_lcdpld_irq(unsigned int irq)
+{
+ enable_m32700ut_lcdpld_irq(irq);
+ return (0);
+}
+
+static void shutdown_m32700ut_lcdpld_irq(unsigned int irq)
{
unsigned long port;
unsigned int pldirq;
- pldirq = irq2lcdpldirq(data->irq);
+ pldirq = irq2lcdpldirq(irq);
port = lcdpldirq2port(pldirq);
outw(PLD_ICUCR_ILEVEL7, port);
}
static struct irq_chip m32700ut_lcdpld_irq_type =
{
- .name = "M32700UT-PLD-LCD-IRQ",
- .irq_shutdown = shutdown_m32700ut_lcdpld,
- .irq_mask = mask_m32700ut_lcdpld,
- .irq_unmask = unmask_m32700ut_lcdpld,
+ .name = "M32700UT-PLD-LCD-IRQ",
+ .startup = startup_m32700ut_lcdpld_irq,
+ .shutdown = shutdown_m32700ut_lcdpld_irq,
+ .enable = enable_m32700ut_lcdpld_irq,
+ .disable = disable_m32700ut_lcdpld_irq,
+ .ack = mask_and_ack_m32700ut_lcdpld,
+ .end = end_m32700ut_lcdpld_irq
};
void __init init_IRQ(void)
{
#if defined(CONFIG_SMC91X)
/* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
- set_irq_chip_and_handler(M32700UT_LAN_IRQ_LAN,
- &m32700ut_lanpld_irq_type, handle_level_irq);
+ irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED;
+ irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type;
+ irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
+ irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN);
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
- set_irq_chip_and_handler(M32R_IRQ_MFT2, &m32700ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type;
+ irq_desc[M32R_IRQ_MFT2].action = 0;
+ irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
disable_m32700ut_irq(M32R_IRQ_MFT2);
/* SIO0 : receive */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &m32700ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type;
+ irq_desc[M32R_IRQ_SIO0_R].action = 0;
+ irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
disable_m32700ut_irq(M32R_IRQ_SIO0_R);
/* SIO0 : send */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &m32700ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type;
+ irq_desc[M32R_IRQ_SIO0_S].action = 0;
+ irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
disable_m32700ut_irq(M32R_IRQ_SIO0_S);
/* SIO1 : receive */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &m32700ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type;
+ irq_desc[M32R_IRQ_SIO1_R].action = 0;
+ irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
disable_m32700ut_irq(M32R_IRQ_SIO1_R);
/* SIO1 : send */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &m32700ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type;
+ irq_desc[M32R_IRQ_SIO1_S].action = 0;
+ irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_m32700ut_irq(M32R_IRQ_SIO1_S);
/* DMA1 : */
- set_irq_chip_and_handler(M32R_IRQ_DMA1, &m32700ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type;
+ irq_desc[M32R_IRQ_DMA1].action = 0;
+ irq_desc[M32R_IRQ_DMA1].depth = 1;
icu_data[M32R_IRQ_DMA1].icucr = 0;
disable_m32700ut_irq(M32R_IRQ_DMA1);
#ifdef CONFIG_SERIAL_M32R_PLDSIO
/* INT#1: SIO0 Receive on PLD */
- set_irq_chip_and_handler(PLD_IRQ_SIO0_RCV, &m32700ut_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type;
+ irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
+ irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV);
/* INT#1: SIO0 Send on PLD */
- set_irq_chip_and_handler(PLD_IRQ_SIO0_SND, &m32700ut_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type;
+ irq_desc[PLD_IRQ_SIO0_SND].action = 0;
+ irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND);
#endif /* CONFIG_SERIAL_M32R_PLDSIO */
/* INT#1: CFC IREQ on PLD */
- set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &m32700ut_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type;
+ irq_desc[PLD_IRQ_CFIREQ].action = 0;
+ irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ);
/* INT#1: CFC Insert on PLD */
- set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &m32700ut_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type;
+ irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
+ irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT);
/* INT#1: CFC Eject on PLD */
- set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &m32700ut_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type;
+ irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
+ irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT);
@@ -349,11 +413,13 @@ void __init init_IRQ(void)
#if defined(CONFIG_USB)
outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
- set_irq_chip_and_handler(M32700UT_LCD_IRQ_USB_INT1,
- &m32700ut_lcdpld_irq_type, handle_level_irq);
- lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
- disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1);
+ irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
+ irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type;
+ irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
+ irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
+ lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
+ disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1);
#endif
/*
* INT2# is used for BAT, USB, AUDIO
@@ -366,8 +432,10 @@ void __init init_IRQ(void)
/*
* INT3# is used for AR
*/
- set_irq_chip_and_handler(M32R_IRQ_INT3, &m32700ut_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type;
+ irq_desc[M32R_IRQ_INT3].action = 0;
+ irq_desc[M32R_IRQ_INT3].depth = 1;
icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_m32700ut_irq(M32R_IRQ_INT3);
#endif /* CONFIG_VIDEO_M32R_AR */
diff --git a/trunk/arch/m32r/platforms/mappi/setup.c b/trunk/arch/m32r/platforms/mappi/setup.c
index cdd8c4574027..ea00c84d6b1b 100644
--- a/trunk/arch/m32r/platforms/mappi/setup.c
+++ b/trunk/arch/m32r/platforms/mappi/setup.c
@@ -38,30 +38,40 @@ static void enable_mappi_irq(unsigned int irq)
outl(data, port);
}
-static void mask_mappi(struct irq_data *data)
+static void mask_and_ack_mappi(unsigned int irq)
{
- disable_mappi_irq(data->irq);
+ disable_mappi_irq(irq);
}
-static void unmask_mappi(struct irq_data *data)
+static void end_mappi_irq(unsigned int irq)
{
- enable_mappi_irq(data->irq);
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ enable_mappi_irq(irq);
}
-static void shutdown_mappi(struct irq_data *data)
+static unsigned int startup_mappi_irq(unsigned int irq)
+{
+ enable_mappi_irq(irq);
+ return (0);
+}
+
+static void shutdown_mappi_irq(unsigned int irq)
{
unsigned long port;
- port = irq2port(data->irq);
+ port = irq2port(irq);
outl(M32R_ICUCR_ILEVEL7, port);
}
static struct irq_chip mappi_irq_type =
{
- .name = "MAPPI-IRQ",
- .irq_shutdown = shutdown_mappi,
- .irq_mask = mask_mappi,
- .irq_unmask = unmask_mappi,
+ .name = "MAPPI-IRQ",
+ .startup = startup_mappi_irq,
+ .shutdown = shutdown_mappi_irq,
+ .enable = enable_mappi_irq,
+ .disable = disable_mappi_irq,
+ .ack = mask_and_ack_mappi,
+ .end = end_mappi_irq
};
void __init init_IRQ(void)
@@ -75,54 +85,70 @@ void __init init_IRQ(void)
#ifdef CONFIG_NE2000
/* INT0 : LAN controller (RTL8019AS) */
- set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_INT0].action = NULL;
+ irq_desc[M32R_IRQ_INT0].depth = 1;
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
disable_mappi_irq(M32R_IRQ_INT0);
#endif /* CONFIG_M32R_NE2000 */
/* MFT2 : system timer */
- set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_MFT2].action = NULL;
+ irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
disable_mappi_irq(M32R_IRQ_MFT2);
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_SIO0_R].action = NULL;
+ irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
disable_mappi_irq(M32R_IRQ_SIO0_R);
/* SIO0_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_SIO0_S].action = NULL;
+ irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
disable_mappi_irq(M32R_IRQ_SIO0_S);
/* SIO1_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_SIO1_R].action = NULL;
+ irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
disable_mappi_irq(M32R_IRQ_SIO1_R);
/* SIO1_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_SIO1_S].action = NULL;
+ irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_mappi_irq(M32R_IRQ_SIO1_S);
#endif /* CONFIG_SERIAL_M32R_SIO */
#if defined(CONFIG_M32R_PCC)
/* INT1 : pccard0 interrupt */
- set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_INT1].action = NULL;
+ irq_desc[M32R_IRQ_INT1].depth = 1;
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
disable_mappi_irq(M32R_IRQ_INT1);
/* INT2 : pccard1 interrupt */
- set_irq_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_INT2].action = NULL;
+ irq_desc[M32R_IRQ_INT2].depth = 1;
icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
disable_mappi_irq(M32R_IRQ_INT2);
#endif /* CONFIG_M32RPCC */
diff --git a/trunk/arch/m32r/platforms/mappi2/setup.c b/trunk/arch/m32r/platforms/mappi2/setup.c
index 9117c30ea365..c049376d0270 100644
--- a/trunk/arch/m32r/platforms/mappi2/setup.c
+++ b/trunk/arch/m32r/platforms/mappi2/setup.c
@@ -46,97 +46,126 @@ static void enable_mappi2_irq(unsigned int irq)
outl(data, port);
}
-static void mask_mappi2(struct irq_data *data)
+static void mask_and_ack_mappi2(unsigned int irq)
{
- disable_mappi2_irq(data->irq);
+ disable_mappi2_irq(irq);
}
-static void unmask_mappi2(struct irq_data *data)
+static void end_mappi2_irq(unsigned int irq)
{
- enable_mappi2_irq(data->irq);
+ enable_mappi2_irq(irq);
}
-static void shutdown_mappi2(struct irq_data *data)
+static unsigned int startup_mappi2_irq(unsigned int irq)
+{
+ enable_mappi2_irq(irq);
+ return (0);
+}
+
+static void shutdown_mappi2_irq(unsigned int irq)
{
unsigned long port;
- port = irq2port(data->irq);
+ port = irq2port(irq);
outl(M32R_ICUCR_ILEVEL7, port);
}
static struct irq_chip mappi2_irq_type =
{
- .name = "MAPPI2-IRQ",
- .irq_shutdown = shutdown_mappi2,
- .irq_mask = mask_mappi2,
- .irq_unmask = unmask_mappi2,
+ .name = "MAPPI2-IRQ",
+ .startup = startup_mappi2_irq,
+ .shutdown = shutdown_mappi2_irq,
+ .enable = enable_mappi2_irq,
+ .disable = disable_mappi2_irq,
+ .ack = mask_and_ack_mappi2,
+ .end = end_mappi2_irq
};
void __init init_IRQ(void)
{
#if defined(CONFIG_SMC91X)
/* INT0 : LAN controller (SMC91111) */
- set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
+ irq_desc[M32R_IRQ_INT0].action = 0;
+ irq_desc[M32R_IRQ_INT0].depth = 1;
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_mappi2_irq(M32R_IRQ_INT0);
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
- set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
+ irq_desc[M32R_IRQ_MFT2].action = 0;
+ irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
disable_mappi2_irq(M32R_IRQ_MFT2);
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
+ irq_desc[M32R_IRQ_SIO0_R].action = 0;
+ irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
disable_mappi2_irq(M32R_IRQ_SIO0_R);
/* SIO0_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
+ irq_desc[M32R_IRQ_SIO0_S].action = 0;
+ irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
disable_mappi2_irq(M32R_IRQ_SIO0_S);
/* SIO1_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
+ irq_desc[M32R_IRQ_SIO1_R].action = 0;
+ irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
disable_mappi2_irq(M32R_IRQ_SIO1_R);
/* SIO1_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
+ irq_desc[M32R_IRQ_SIO1_S].action = 0;
+ irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_mappi2_irq(M32R_IRQ_SIO1_S);
#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
#if defined(CONFIG_USB)
/* INT1 : USB Host controller interrupt */
- set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
+ irq_desc[M32R_IRQ_INT1].action = 0;
+ irq_desc[M32R_IRQ_INT1].depth = 1;
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
disable_mappi2_irq(M32R_IRQ_INT1);
#endif /* CONFIG_USB */
/* ICUCR40: CFC IREQ */
- set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
+ irq_desc[PLD_IRQ_CFIREQ].action = 0;
+ irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
disable_mappi2_irq(PLD_IRQ_CFIREQ);
#if defined(CONFIG_M32R_CFC)
/* ICUCR41: CFC Insert */
- set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
+ irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
+ irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
/* ICUCR42: CFC Eject */
- set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
+ irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
+ irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
#endif /* CONFIG_MAPPI2_CFC */
diff --git a/trunk/arch/m32r/platforms/mappi3/setup.c b/trunk/arch/m32r/platforms/mappi3/setup.c
index b44f5ded2bbe..882de25c6e8c 100644
--- a/trunk/arch/m32r/platforms/mappi3/setup.c
+++ b/trunk/arch/m32r/platforms/mappi3/setup.c
@@ -46,98 +46,128 @@ static void enable_mappi3_irq(unsigned int irq)
outl(data, port);
}
-static void mask_mappi3(struct irq_data *data)
+static void mask_and_ack_mappi3(unsigned int irq)
{
- disable_mappi3_irq(data->irq);
+ disable_mappi3_irq(irq);
}
-static void unmask_mappi3(struct irq_data *data)
+static void end_mappi3_irq(unsigned int irq)
{
- enable_mappi3_irq(data->irq);
+ enable_mappi3_irq(irq);
}
-static void shutdown_mappi3(struct irq_data *data)
+static unsigned int startup_mappi3_irq(unsigned int irq)
+{
+ enable_mappi3_irq(irq);
+ return (0);
+}
+
+static void shutdown_mappi3_irq(unsigned int irq)
{
unsigned long port;
- port = irq2port(data->irq);
+ port = irq2port(irq);
outl(M32R_ICUCR_ILEVEL7, port);
}
-static struct irq_chip mappi3_irq_type = {
- .name = "MAPPI3-IRQ",
- .irq_shutdown = shutdown_mappi3,
- .irq_mask = mask_mappi3,
- .irq_unmask = unmask_mappi3,
+static struct irq_chip mappi3_irq_type =
+{
+ .name = "MAPPI3-IRQ",
+ .startup = startup_mappi3_irq,
+ .shutdown = shutdown_mappi3_irq,
+ .enable = enable_mappi3_irq,
+ .disable = disable_mappi3_irq,
+ .ack = mask_and_ack_mappi3,
+ .end = end_mappi3_irq
};
void __init init_IRQ(void)
{
#if defined(CONFIG_SMC91X)
/* INT0 : LAN controller (SMC91111) */
- set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
+ irq_desc[M32R_IRQ_INT0].action = 0;
+ irq_desc[M32R_IRQ_INT0].depth = 1;
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_mappi3_irq(M32R_IRQ_INT0);
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
- set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
+ irq_desc[M32R_IRQ_MFT2].action = 0;
+ irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
disable_mappi3_irq(M32R_IRQ_MFT2);
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
+ irq_desc[M32R_IRQ_SIO0_R].action = 0;
+ irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
disable_mappi3_irq(M32R_IRQ_SIO0_R);
/* SIO0_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
+ irq_desc[M32R_IRQ_SIO0_S].action = 0;
+ irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
disable_mappi3_irq(M32R_IRQ_SIO0_S);
/* SIO1_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
+ irq_desc[M32R_IRQ_SIO1_R].action = 0;
+ irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
disable_mappi3_irq(M32R_IRQ_SIO1_R);
/* SIO1_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
+ irq_desc[M32R_IRQ_SIO1_S].action = 0;
+ irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_mappi3_irq(M32R_IRQ_SIO1_S);
#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
#if defined(CONFIG_USB)
/* INT1 : USB Host controller interrupt */
- set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
+ irq_desc[M32R_IRQ_INT1].action = 0;
+ irq_desc[M32R_IRQ_INT1].depth = 1;
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
disable_mappi3_irq(M32R_IRQ_INT1);
#endif /* CONFIG_USB */
/* CFC IREQ */
- set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
+ irq_desc[PLD_IRQ_CFIREQ].action = 0;
+ irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
disable_mappi3_irq(PLD_IRQ_CFIREQ);
#if defined(CONFIG_M32R_CFC)
/* ICUCR41: CFC Insert & eject */
- set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
+ irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
+ irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
#endif /* CONFIG_M32R_CFC */
/* IDE IREQ */
- set_irq_chip_and_handler(PLD_IRQ_IDEIREQ, &mappi3_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
+ irq_desc[PLD_IRQ_IDEIREQ].action = 0;
+ irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_mappi3_irq(PLD_IRQ_IDEIREQ);
diff --git a/trunk/arch/m32r/platforms/oaks32r/setup.c b/trunk/arch/m32r/platforms/oaks32r/setup.c
index 19a02db7b818..d11d93bf74f5 100644
--- a/trunk/arch/m32r/platforms/oaks32r/setup.c
+++ b/trunk/arch/m32r/platforms/oaks32r/setup.c
@@ -37,30 +37,39 @@ static void enable_oaks32r_irq(unsigned int irq)
outl(data, port);
}
-static void mask_oaks32r(struct irq_data *data)
+static void mask_and_ack_mappi(unsigned int irq)
{
- disable_oaks32r_irq(data->irq);
+ disable_oaks32r_irq(irq);
}
-static void unmask_oaks32r(struct irq_data *data)
+static void end_oaks32r_irq(unsigned int irq)
{
- enable_oaks32r_irq(data->irq);
+ enable_oaks32r_irq(irq);
}
-static void shutdown_oaks32r(struct irq_data *data)
+static unsigned int startup_oaks32r_irq(unsigned int irq)
+{
+ enable_oaks32r_irq(irq);
+ return (0);
+}
+
+static void shutdown_oaks32r_irq(unsigned int irq)
{
unsigned long port;
- port = irq2port(data->irq);
+ port = irq2port(irq);
outl(M32R_ICUCR_ILEVEL7, port);
}
static struct irq_chip oaks32r_irq_type =
{
- .name = "OAKS32R-IRQ",
- .irq_shutdown = shutdown_oaks32r,
- .irq_mask = mask_oaks32r,
- .irq_unmask = unmask_oaks32r,
+ .name = "OAKS32R-IRQ",
+ .startup = startup_oaks32r_irq,
+ .shutdown = shutdown_oaks32r_irq,
+ .enable = enable_oaks32r_irq,
+ .disable = disable_oaks32r_irq,
+ .ack = mask_and_ack_mappi,
+ .end = end_oaks32r_irq
};
void __init init_IRQ(void)
@@ -74,40 +83,52 @@ void __init init_IRQ(void)
#ifdef CONFIG_NE2000
/* INT3 : LAN controller (RTL8019AS) */
- set_irq_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_INT3].action = 0;
+ irq_desc[M32R_IRQ_INT3].depth = 1;
icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_oaks32r_irq(M32R_IRQ_INT3);
#endif /* CONFIG_M32R_NE2000 */
/* MFT2 : system timer */
- set_irq_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_MFT2].action = 0;
+ irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
disable_oaks32r_irq(M32R_IRQ_MFT2);
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_SIO0_R].action = 0;
+ irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
disable_oaks32r_irq(M32R_IRQ_SIO0_R);
/* SIO0_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_SIO0_S].action = 0;
+ irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
disable_oaks32r_irq(M32R_IRQ_SIO0_S);
/* SIO1_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_SIO1_R].action = 0;
+ irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
disable_oaks32r_irq(M32R_IRQ_SIO1_R);
/* SIO1_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_SIO1_S].action = 0;
+ irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_oaks32r_irq(M32R_IRQ_SIO1_S);
#endif /* CONFIG_SERIAL_M32R_SIO */
diff --git a/trunk/arch/m32r/platforms/opsput/setup.c b/trunk/arch/m32r/platforms/opsput/setup.c
index 12731547e8bf..5f3402a2fbaf 100644
--- a/trunk/arch/m32r/platforms/opsput/setup.c
+++ b/trunk/arch/m32r/platforms/opsput/setup.c
@@ -46,30 +46,39 @@ static void enable_opsput_irq(unsigned int irq)
outl(data, port);
}
-static void mask_opsput(struct irq_data *data)
+static void mask_and_ack_opsput(unsigned int irq)
{
- disable_opsput_irq(data->irq);
+ disable_opsput_irq(irq);
}
-static void unmask_opsput(struct irq_data *data)
+static void end_opsput_irq(unsigned int irq)
{
- enable_opsput_irq(data->irq);
+ enable_opsput_irq(irq);
}
-static void shutdown_opsput(struct irq_data *data)
+static unsigned int startup_opsput_irq(unsigned int irq)
+{
+ enable_opsput_irq(irq);
+ return (0);
+}
+
+static void shutdown_opsput_irq(unsigned int irq)
{
unsigned long port;
- port = irq2port(data->irq);
+ port = irq2port(irq);
outl(M32R_ICUCR_ILEVEL7, port);
}
static struct irq_chip opsput_irq_type =
{
- .name = "OPSPUT-IRQ",
- .irq_shutdown = shutdown_opsput,
- .irq_mask = mask_opsput,
- .irq_unmask = unmask_opsput,
+ .name = "OPSPUT-IRQ",
+ .startup = startup_opsput_irq,
+ .shutdown = shutdown_opsput_irq,
+ .enable = enable_opsput_irq,
+ .disable = disable_opsput_irq,
+ .ack = mask_and_ack_opsput,
+ .end = end_opsput_irq
};
/*
@@ -91,6 +100,7 @@ static void disable_opsput_pld_irq(unsigned int irq)
unsigned int pldirq;
pldirq = irq2pldirq(irq);
+// disable_opsput_irq(M32R_IRQ_INT1);
port = pldirq2port(pldirq);
data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
outw(data, port);
@@ -102,38 +112,50 @@ static void enable_opsput_pld_irq(unsigned int irq)
unsigned int pldirq;
pldirq = irq2pldirq(irq);
+// enable_opsput_irq(M32R_IRQ_INT1);
port = pldirq2port(pldirq);
data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
outw(data, port);
}
-static void mask_opsput_pld(struct irq_data *data)
+static void mask_and_ack_opsput_pld(unsigned int irq)
{
- disable_opsput_pld_irq(data->irq);
+ disable_opsput_pld_irq(irq);
+// mask_and_ack_opsput(M32R_IRQ_INT1);
}
-static void unmask_opsput_pld(struct irq_data *data)
+static void end_opsput_pld_irq(unsigned int irq)
{
- enable_opsput_pld_irq(data->irq);
- enable_opsput_irq(M32R_IRQ_INT1);
+ enable_opsput_pld_irq(irq);
+ end_opsput_irq(M32R_IRQ_INT1);
}
-static void shutdown_opsput_pld(struct irq_data *data)
+static unsigned int startup_opsput_pld_irq(unsigned int irq)
+{
+ enable_opsput_pld_irq(irq);
+ return (0);
+}
+
+static void shutdown_opsput_pld_irq(unsigned int irq)
{
unsigned long port;
unsigned int pldirq;
- pldirq = irq2pldirq(data->irq);
+ pldirq = irq2pldirq(irq);
+// shutdown_opsput_irq(M32R_IRQ_INT1);
port = pldirq2port(pldirq);
outw(PLD_ICUCR_ILEVEL7, port);
}
static struct irq_chip opsput_pld_irq_type =
{
- .name = "OPSPUT-PLD-IRQ",
- .irq_shutdown = shutdown_opsput_pld,
- .irq_mask = mask_opsput_pld,
- .irq_unmask = unmask_opsput_pld,
+ .name = "OPSPUT-PLD-IRQ",
+ .startup = startup_opsput_pld_irq,
+ .shutdown = shutdown_opsput_pld_irq,
+ .enable = enable_opsput_pld_irq,
+ .disable = disable_opsput_pld_irq,
+ .ack = mask_and_ack_opsput_pld,
+ .end = end_opsput_pld_irq
};
/*
@@ -167,33 +189,42 @@ static void enable_opsput_lanpld_irq(unsigned int irq)
outw(data, port);
}
-static void mask_opsput_lanpld(struct irq_data *data)
+static void mask_and_ack_opsput_lanpld(unsigned int irq)
{
- disable_opsput_lanpld_irq(data->irq);
+ disable_opsput_lanpld_irq(irq);
}
-static void unmask_opsput_lanpld(struct irq_data *data)
+static void end_opsput_lanpld_irq(unsigned int irq)
{
- enable_opsput_lanpld_irq(data->irq);
- enable_opsput_irq(M32R_IRQ_INT0);
+ enable_opsput_lanpld_irq(irq);
+ end_opsput_irq(M32R_IRQ_INT0);
}
-static void shutdown_opsput_lanpld(struct irq_data *data)
+static unsigned int startup_opsput_lanpld_irq(unsigned int irq)
+{
+ enable_opsput_lanpld_irq(irq);
+ return (0);
+}
+
+static void shutdown_opsput_lanpld_irq(unsigned int irq)
{
unsigned long port;
unsigned int pldirq;
- pldirq = irq2lanpldirq(data->irq);
+ pldirq = irq2lanpldirq(irq);
port = lanpldirq2port(pldirq);
outw(PLD_ICUCR_ILEVEL7, port);
}
static struct irq_chip opsput_lanpld_irq_type =
{
- .name = "OPSPUT-PLD-LAN-IRQ",
- .irq_shutdown = shutdown_opsput_lanpld,
- .irq_mask = mask_opsput_lanpld,
- .irq_unmask = unmask_opsput_lanpld,
+ .name = "OPSPUT-PLD-LAN-IRQ",
+ .startup = startup_opsput_lanpld_irq,
+ .shutdown = shutdown_opsput_lanpld_irq,
+ .enable = enable_opsput_lanpld_irq,
+ .disable = disable_opsput_lanpld_irq,
+ .ack = mask_and_ack_opsput_lanpld,
+ .end = end_opsput_lanpld_irq
};
/*
@@ -227,109 +258,143 @@ static void enable_opsput_lcdpld_irq(unsigned int irq)
outw(data, port);
}
-static void mask_opsput_lcdpld(struct irq_data *data)
+static void mask_and_ack_opsput_lcdpld(unsigned int irq)
{
- disable_opsput_lcdpld_irq(data->irq);
+ disable_opsput_lcdpld_irq(irq);
}
-static void unmask_opsput_lcdpld(struct irq_data *data)
+static void end_opsput_lcdpld_irq(unsigned int irq)
{
- enable_opsput_lcdpld_irq(data->irq);
- enable_opsput_irq(M32R_IRQ_INT2);
+ enable_opsput_lcdpld_irq(irq);
+ end_opsput_irq(M32R_IRQ_INT2);
}
-static void shutdown_opsput_lcdpld(struct irq_data *data)
+static unsigned int startup_opsput_lcdpld_irq(unsigned int irq)
+{
+ enable_opsput_lcdpld_irq(irq);
+ return (0);
+}
+
+static void shutdown_opsput_lcdpld_irq(unsigned int irq)
{
unsigned long port;
unsigned int pldirq;
- pldirq = irq2lcdpldirq(data->irq);
+ pldirq = irq2lcdpldirq(irq);
port = lcdpldirq2port(pldirq);
outw(PLD_ICUCR_ILEVEL7, port);
}
-static struct irq_chip opsput_lcdpld_irq_type = {
- .name = "OPSPUT-PLD-LCD-IRQ",
- .irq_shutdown = shutdown_opsput_lcdpld,
- .irq_mask = mask_opsput_lcdpld,
- .irq_unmask = unmask_opsput_lcdpld,
+static struct irq_chip opsput_lcdpld_irq_type =
+{
+ "OPSPUT-PLD-LCD-IRQ",
+ startup_opsput_lcdpld_irq,
+ shutdown_opsput_lcdpld_irq,
+ enable_opsput_lcdpld_irq,
+ disable_opsput_lcdpld_irq,
+ mask_and_ack_opsput_lcdpld,
+ end_opsput_lcdpld_irq
};
void __init init_IRQ(void)
{
#if defined(CONFIG_SMC91X)
/* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
- set_irq_chip_and_handler(OPSPUT_LAN_IRQ_LAN, &opsput_lanpld_irq_type,
- handle_level_irq);
+ irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED;
+ irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type;
+ irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
+ irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN);
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
- set_irq_chip_and_handler(M32R_IRQ_MFT2, &opsput_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type;
+ irq_desc[M32R_IRQ_MFT2].action = 0;
+ irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
disable_opsput_irq(M32R_IRQ_MFT2);
/* SIO0 : receive */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &opsput_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type;
+ irq_desc[M32R_IRQ_SIO0_R].action = 0;
+ irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
disable_opsput_irq(M32R_IRQ_SIO0_R);
/* SIO0 : send */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &opsput_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type;
+ irq_desc[M32R_IRQ_SIO0_S].action = 0;
+ irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
disable_opsput_irq(M32R_IRQ_SIO0_S);
/* SIO1 : receive */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &opsput_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type;
+ irq_desc[M32R_IRQ_SIO1_R].action = 0;
+ irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
disable_opsput_irq(M32R_IRQ_SIO1_R);
/* SIO1 : send */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &opsput_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type;
+ irq_desc[M32R_IRQ_SIO1_S].action = 0;
+ irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_opsput_irq(M32R_IRQ_SIO1_S);
/* DMA1 : */
- set_irq_chip_and_handler(M32R_IRQ_DMA1, &opsput_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type;
+ irq_desc[M32R_IRQ_DMA1].action = 0;
+ irq_desc[M32R_IRQ_DMA1].depth = 1;
icu_data[M32R_IRQ_DMA1].icucr = 0;
disable_opsput_irq(M32R_IRQ_DMA1);
#ifdef CONFIG_SERIAL_M32R_PLDSIO
/* INT#1: SIO0 Receive on PLD */
- set_irq_chip_and_handler(PLD_IRQ_SIO0_RCV, &opsput_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type;
+ irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
+ irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV);
/* INT#1: SIO0 Send on PLD */
- set_irq_chip_and_handler(PLD_IRQ_SIO0_SND, &opsput_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type;
+ irq_desc[PLD_IRQ_SIO0_SND].action = 0;
+ irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
disable_opsput_pld_irq(PLD_IRQ_SIO0_SND);
#endif /* CONFIG_SERIAL_M32R_PLDSIO */
/* INT#1: CFC IREQ on PLD */
- set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &opsput_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type;
+ irq_desc[PLD_IRQ_CFIREQ].action = 0;
+ irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
disable_opsput_pld_irq(PLD_IRQ_CFIREQ);
/* INT#1: CFC Insert on PLD */
- set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &opsput_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type;
+ irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
+ irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT);
/* INT#1: CFC Eject on PLD */
- set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &opsput_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type;
+ irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
+ irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT);
@@ -348,11 +413,14 @@ void __init init_IRQ(void)
enable_opsput_irq(M32R_IRQ_INT1);
#if defined(CONFIG_USB)
- outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
- set_irq_chip_and_handler(OPSPUT_LCD_IRQ_USB_INT1,
- &opsput_lcdpld_irq_type, handle_level_irq);
- lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
- disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
+ outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
+
+ irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
+ irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type;
+ irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0;
+ irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1;
+ lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
+ disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
#endif
/*
* INT2# is used for BAT, USB, AUDIO
@@ -365,8 +433,10 @@ void __init init_IRQ(void)
/*
* INT3# is used for AR
*/
- set_irq_chip_and_handler(M32R_IRQ_INT3, &opsput_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type;
+ irq_desc[M32R_IRQ_INT3].action = 0;
+ irq_desc[M32R_IRQ_INT3].depth = 1;
icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
disable_opsput_irq(M32R_IRQ_INT3);
#endif /* CONFIG_VIDEO_M32R_AR */
diff --git a/trunk/arch/m32r/platforms/usrv/setup.c b/trunk/arch/m32r/platforms/usrv/setup.c
index f3cff26d6e74..1beac7a51ed4 100644
--- a/trunk/arch/m32r/platforms/usrv/setup.c
+++ b/trunk/arch/m32r/platforms/usrv/setup.c
@@ -37,30 +37,39 @@ static void enable_mappi_irq(unsigned int irq)
outl(data, port);
}
-static void mask_mappi(struct irq_data *data)
+static void mask_and_ack_mappi(unsigned int irq)
{
- disable_mappi_irq(data->irq);
+ disable_mappi_irq(irq);
}
-static void unmask_mappi(struct irq_data *data)
+static void end_mappi_irq(unsigned int irq)
{
- enable_mappi_irq(data->irq);
+ enable_mappi_irq(irq);
}
-static void shutdown_mappi(struct irq_data *data)
+static unsigned int startup_mappi_irq(unsigned int irq)
+{
+ enable_mappi_irq(irq);
+ return 0;
+}
+
+static void shutdown_mappi_irq(unsigned int irq)
{
unsigned long port;
- port = irq2port(data->irq);
+ port = irq2port(irq);
outl(M32R_ICUCR_ILEVEL7, port);
}
static struct irq_chip mappi_irq_type =
{
- .name = "M32700-IRQ",
- .irq_shutdown = shutdown_mappi,
- .irq_mask = mask_mappi,
- .irq_unmask = unmask_mappi,
+ .name = "M32700-IRQ",
+ .startup = startup_mappi_irq,
+ .shutdown = shutdown_mappi_irq,
+ .enable = enable_mappi_irq,
+ .disable = disable_mappi_irq,
+ .ack = mask_and_ack_mappi,
+ .end = end_mappi_irq
};
/*
@@ -98,33 +107,42 @@ static void enable_m32700ut_pld_irq(unsigned int irq)
outw(data, port);
}
-static void mask_m32700ut_pld(struct irq_data *data)
+static void mask_and_ack_m32700ut_pld(unsigned int irq)
{
- disable_m32700ut_pld_irq(data->irq);
+ disable_m32700ut_pld_irq(irq);
}
-static void unmask_m32700ut_pld(struct irq_data *data)
+static void end_m32700ut_pld_irq(unsigned int irq)
{
- enable_m32700ut_pld_irq(data->irq);
- enable_mappi_irq(M32R_IRQ_INT1);
+ enable_m32700ut_pld_irq(irq);
+ end_mappi_irq(M32R_IRQ_INT1);
}
-static void shutdown_m32700ut_pld(struct irq_data *data)
+static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
+{
+ enable_m32700ut_pld_irq(irq);
+ return 0;
+}
+
+static void shutdown_m32700ut_pld_irq(unsigned int irq)
{
unsigned long port;
unsigned int pldirq;
- pldirq = irq2pldirq(data->irq);
+ pldirq = irq2pldirq(irq);
port = pldirq2port(pldirq);
outw(PLD_ICUCR_ILEVEL7, port);
}
static struct irq_chip m32700ut_pld_irq_type =
{
- .name = "USRV-PLD-IRQ",
- .irq_shutdown = shutdown_m32700ut_pld,
- .irq_mask = mask_m32700ut_pld,
- .irq_unmask = unmask_m32700ut_pld,
+ .name = "USRV-PLD-IRQ",
+ .startup = startup_m32700ut_pld_irq,
+ .shutdown = shutdown_m32700ut_pld_irq,
+ .enable = enable_m32700ut_pld_irq,
+ .disable = disable_m32700ut_pld_irq,
+ .ack = mask_and_ack_m32700ut_pld,
+ .end = end_m32700ut_pld_irq
};
void __init init_IRQ(void)
@@ -138,42 +156,53 @@ void __init init_IRQ(void)
once++;
/* MFT2 : system timer */
- set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_MFT2].action = 0;
+ irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
disable_mappi_irq(M32R_IRQ_MFT2);
#if defined(CONFIG_SERIAL_M32R_SIO)
/* SIO0_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_SIO0_R].action = 0;
+ irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
disable_mappi_irq(M32R_IRQ_SIO0_R);
/* SIO0_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_SIO0_S].action = 0;
+ irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
disable_mappi_irq(M32R_IRQ_SIO0_S);
/* SIO1_R : uart receive data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_SIO1_R].action = 0;
+ irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
disable_mappi_irq(M32R_IRQ_SIO1_R);
/* SIO1_S : uart send data */
- set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
- handle_level_irq);
+ irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
+ irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
+ irq_desc[M32R_IRQ_SIO1_S].action = 0;
+ irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_mappi_irq(M32R_IRQ_SIO1_S);
#endif /* CONFIG_SERIAL_M32R_SIO */
/* INT#67-#71: CFC#0 IREQ on PLD */
for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) {
- set_irq_chip_and_handler(PLD_IRQ_CF0 + i,
- &m32700ut_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
+ irq_desc[PLD_IRQ_CF0 + i].action = 0;
+ irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
= PLD_ICUCR_ISMOD01; /* 'L' level sense */
disable_m32700ut_pld_irq(PLD_IRQ_CF0 + i);
@@ -181,15 +210,19 @@ void __init init_IRQ(void)
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
/* INT#76: 16552D#0 IREQ on PLD */
- set_irq_chip_and_handler(PLD_IRQ_UART0, &m32700ut_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type;
+ irq_desc[PLD_IRQ_UART0].action = 0;
+ irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
= PLD_ICUCR_ISMOD03; /* 'H' level sense */
disable_m32700ut_pld_irq(PLD_IRQ_UART0);
/* INT#77: 16552D#1 IREQ on PLD */
- set_irq_chip_and_handler(PLD_IRQ_UART1, &m32700ut_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type;
+ irq_desc[PLD_IRQ_UART1].action = 0;
+ irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
= PLD_ICUCR_ISMOD03; /* 'H' level sense */
disable_m32700ut_pld_irq(PLD_IRQ_UART1);
@@ -197,8 +230,10 @@ void __init init_IRQ(void)
#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
/* INT#80: AK4524 IREQ on PLD */
- set_irq_chip_and_handler(PLD_IRQ_SNDINT, &m32700ut_pld_irq_type,
- handle_level_irq);
+ irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED;
+ irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type;
+ irq_desc[PLD_IRQ_SNDINT].action = 0;
+ irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
= PLD_ICUCR_ISMOD01; /* 'L' level sense */
disable_m32700ut_pld_irq(PLD_IRQ_SNDINT);
diff --git a/trunk/arch/m68k/include/asm/cacheflush_no.h b/trunk/arch/m68k/include/asm/cacheflush_no.h
index cb88aa96c4f1..7085bd51668b 100644
--- a/trunk/arch/m68k/include/asm/cacheflush_no.h
+++ b/trunk/arch/m68k/include/asm/cacheflush_no.h
@@ -2,22 +2,21 @@
#define _M68KNOMMU_CACHEFLUSH_H
/*
- * (C) Copyright 2000-2010, Greg Ungerer
+ * (C) Copyright 2000-2004, Greg Ungerer
*/
#include
-#include
#define flush_cache_all() __flush_cache_all()
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_dup_mm(mm) do { } while (0)
-#define flush_cache_range(vma, start, end) do { } while (0)
+#define flush_cache_range(vma, start, end) __flush_cache_all()
#define flush_cache_page(vma, vmaddr) do { } while (0)
-#define flush_dcache_range(start, len) __flush_dcache_all()
+#define flush_dcache_range(start,len) __flush_cache_all()
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
-#define flush_icache_range(start, len) __flush_icache_all()
+#define flush_icache_range(start,len) __flush_cache_all()
#define flush_icache_page(vma,pg) do { } while (0)
#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
#define flush_cache_vmap(start, end) do { } while (0)
@@ -28,52 +27,66 @@
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
memcpy(dst, src, len)
-void mcf_cache_push(void);
-
static inline void __flush_cache_all(void)
{
-#ifdef CACHE_PUSH
- mcf_cache_push();
-#endif
-#ifdef CACHE_INVALIDATE
+#if defined(CONFIG_M5407) || defined(CONFIG_M548x)
+ /*
+ * Use cpushl to push and invalidate all cache lines.
+ * Gas doesn't seem to know how to generate the ColdFire
+ * cpushl instruction... Oh well, bit stuff it for now.
+ */
+ __asm__ __volatile__ (
+ "nop\n\t"
+ "clrl %%d0\n\t"
+ "1:\n\t"
+ "movel %%d0,%%a0\n\t"
+ "2:\n\t"
+ ".word 0xf468\n\t"
+ "addl #0x10,%%a0\n\t"
+ "cmpl #0x00000800,%%a0\n\t"
+ "blt 2b\n\t"
+ "addql #1,%%d0\n\t"
+ "cmpil #4,%%d0\n\t"
+ "bne 1b\n\t"
+ "movel #0xb6088500,%%d0\n\t"
+ "movec %%d0,%%CACR\n\t"
+ : : : "d0", "a0" );
+#endif /* CONFIG_M5407 */
+#if defined(CONFIG_M523x) || defined(CONFIG_M527x)
__asm__ __volatile__ (
- "movel %0, %%d0\n\t"
+ "movel #0x81400100, %%d0\n\t"
"movec %%d0, %%CACR\n\t"
"nop\n\t"
- : : "i" (CACHE_INVALIDATE) : "d0" );
-#endif
-}
-
-/*
- * Some ColdFire parts implement separate instruction and data caches,
- * on those we should just flush the appropriate cache. If we don't need
- * to do any specific flushing then this will be optimized away.
- */
-static inline void __flush_icache_all(void)
-{
-#ifdef CACHE_INVALIDATEI
+ : : : "d0" );
+#endif /* CONFIG_M523x || CONFIG_M527x */
+#if defined(CONFIG_M528x)
__asm__ __volatile__ (
- "movel %0, %%d0\n\t"
+ "movel #0x81000200, %%d0\n\t"
"movec %%d0, %%CACR\n\t"
"nop\n\t"
- : : "i" (CACHE_INVALIDATEI) : "d0" );
-#endif
-}
-
-static inline void __flush_dcache_all(void)
-{
-#ifdef CACHE_PUSH
- mcf_cache_push();
-#endif
-#ifdef CACHE_INVALIDATED
+ : : : "d0" );
+#endif /* CONFIG_M528x */
+#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272)
+ __asm__ __volatile__ (
+ "movel #0x81000100, %%d0\n\t"
+ "movec %%d0, %%CACR\n\t"
+ "nop\n\t"
+ : : : "d0" );
+#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */
+#ifdef CONFIG_M5249
__asm__ __volatile__ (
- "movel %0, %%d0\n\t"
+ "movel #0xa1000200, %%d0\n\t"
"movec %%d0, %%CACR\n\t"
"nop\n\t"
- : : "i" (CACHE_INVALIDATED) : "d0" );
-#else
- /* Flush the wrtite buffer */
- __asm__ __volatile__ ( "nop" );
-#endif
+ : : : "d0" );
+#endif /* CONFIG_M5249 */
+#ifdef CONFIG_M532x
+ __asm__ __volatile__ (
+ "movel #0x81000200, %%d0\n\t"
+ "movec %%d0, %%CACR\n\t"
+ "nop\n\t"
+ : : : "d0" );
+#endif /* CONFIG_M532x */
}
+
#endif /* _M68KNOMMU_CACHEFLUSH_H */
diff --git a/trunk/arch/m68k/include/asm/coldfire.h b/trunk/arch/m68k/include/asm/coldfire.h
index 213028cbe110..3b0a34d0fe33 100644
--- a/trunk/arch/m68k/include/asm/coldfire.h
+++ b/trunk/arch/m68k/include/asm/coldfire.h
@@ -32,7 +32,7 @@
*/
#define MCF_MBAR 0x10000000
#define MCF_MBAR2 0x80000000
-#if defined(CONFIG_M54xx)
+#if defined(CONFIG_M548x)
#define MCF_IPSBAR MCF_MBAR
#elif defined(CONFIG_M520x)
#define MCF_IPSBAR 0xFC000000
diff --git a/trunk/arch/m68k/include/asm/entry_no.h b/trunk/arch/m68k/include/asm/entry_no.h
index 627d69bacc58..26be277394f9 100644
--- a/trunk/arch/m68k/include/asm/entry_no.h
+++ b/trunk/arch/m68k/include/asm/entry_no.h
@@ -42,16 +42,12 @@
*/
#ifdef CONFIG_COLDFIRE
-#ifdef CONFIG_COLDFIRE_SW_A7
/*
- * This is made a little more tricky on older ColdFires. There is no
- * separate supervisor and user stack pointers. Need to artificially
+ * This is made a little more tricky on the ColdFire. There is no
+ * separate kernel and user stack pointers. Need to artificially
* construct a usp in software... When doing this we need to disable
- * interrupts, otherwise bad things will happen.
+ * interrupts, otherwise bad things could happen.
*/
-.globl sw_usp
-.globl sw_ksp
-
.macro SAVE_ALL
move #0x2700,%sr /* disable intrs */
btst #5,%sp@(2) /* from user? */
@@ -78,7 +74,9 @@
7:
.endm
-.macro RESTORE_USER
+.macro RESTORE_ALL
+ btst #5,%sp@(PT_SR) /* going user? */
+ bnes 8f /* no, skip */
move #0x2700,%sr /* disable intrs */
movel sw_usp,%a0 /* get usp */
movel %sp@(PT_OFF_PC),%a0@- /* copy exception program counter */
@@ -93,22 +91,19 @@
subql #8,sw_usp /* set exception */
movel sw_usp,%sp /* restore usp */
rte
+ 8:
+ moveml %sp@,%d1-%d5/%a0-%a2
+ lea %sp@(32),%sp /* space for 8 regs */
+ movel %sp@+,%d0
+ addql #4,%sp /* orig d0 */
+ addl %sp@+,%sp /* stkadj */
+ rte
.endm
-.macro RDUSP
- movel sw_usp,%a2
-.endm
-
-.macro WRUSP
- movel %a0,sw_usp
-.endm
-
-#else /* !CONFIG_COLDFIRE_SW_A7 */
/*
- * Modern ColdFire parts have separate supervisor and user stack
- * pointers. Simple load and restore macros for this case.
+ * Quick exception save, use current stack only.
*/
-.macro SAVE_ALL
+.macro SAVE_LOCAL
move #0x2700,%sr /* disable intrs */
clrl %sp@- /* stkadj */
movel %d0,%sp@- /* orig d0 */
@@ -117,7 +112,7 @@
moveml %d1-%d5/%a0-%a2,%sp@
.endm
-.macro RESTORE_USER
+.macro RESTORE_LOCAL
moveml %sp@,%d1-%d5/%a0-%a2
lea %sp@(32),%sp /* space for 8 regs */
movel %sp@+,%d0
@@ -126,18 +121,6 @@
rte
.endm
-.macro RDUSP
- /*move %usp,%a2*/
- .word 0x4e6a
-.endm
-
-.macro WRUSP
- /*move %a0,%usp*/
- .word 0x4e60
-.endm
-
-#endif /* !CONFIG_COLDFIRE_SW_A7 */
-
.macro SAVE_SWITCH_STACK
lea %sp@(-24),%sp /* 6 regs */
moveml %a3-%a6/%d6-%d7,%sp@
@@ -148,6 +131,14 @@
lea %sp@(24),%sp /* 6 regs */
.endm
+/*
+ * Software copy of the user and kernel stack pointers... Ugh...
+ * Need these to get around ColdFire not having separate kernel
+ * and user stack pointers.
+ */
+.globl sw_usp
+.globl sw_ksp
+
#else /* !CONFIG_COLDFIRE */
/*
@@ -176,6 +167,6 @@
moveml %sp@+,%a3-%a6/%d6-%d7
.endm
-#endif /* !COLDFIRE_SW_A7 */
+#endif /* !CONFIG_COLDFIRE */
#endif /* __ASSEMBLY__ */
#endif /* __M68KNOMMU_ENTRY_H */
diff --git a/trunk/arch/m68k/include/asm/gpio.h b/trunk/arch/m68k/include/asm/gpio.h
index c64c7b74cf86..1b57adbafad5 100644
--- a/trunk/arch/m68k/include/asm/gpio.h
+++ b/trunk/arch/m68k/include/asm/gpio.h
@@ -37,7 +37,7 @@
#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
- defined(CONFIG_M532x) || defined(CONFIG_M54xx)
+ defined(CONFIG_M532x) || defined(CONFIG_M548x)
/* These parts have GPIO organized by 8 bit ports */
diff --git a/trunk/arch/m68k/include/asm/io_no.h b/trunk/arch/m68k/include/asm/io_no.h
index cf20f3097af6..6e2413e518cb 100644
--- a/trunk/arch/m68k/include/asm/io_no.h
+++ b/trunk/arch/m68k/include/asm/io_no.h
@@ -145,6 +145,7 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
#define IOMAP_WRITETHROUGH 3
extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
+extern void __iounmap(void *addr, unsigned long size);
static inline void *ioremap(unsigned long physaddr, unsigned long size)
{
diff --git a/trunk/arch/m68k/include/asm/m5206sim.h b/trunk/arch/m68k/include/asm/m5206sim.h
index 561b03b5ddf8..9c384e294af9 100644
--- a/trunk/arch/m68k/include/asm/m5206sim.h
+++ b/trunk/arch/m68k/include/asm/m5206sim.h
@@ -12,10 +12,6 @@
#define m5206sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5206)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
/*
* Define the 5206 SIM register set addresses.
@@ -92,14 +88,6 @@
#define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */
#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */
-#if defined(CONFIG_NETtel)
-#define MCFUART_BASE1 0x180 /* Base address of UART1 */
-#define MCFUART_BASE2 0x140 /* Base address of UART2 */
-#else
-#define MCFUART_BASE1 0x140 /* Base address of UART1 */
-#define MCFUART_BASE2 0x180 /* Base address of UART2 */
-#endif
-
/*
* Define system peripheral IRQ usage.
*/
@@ -107,7 +95,7 @@
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
/*
- * Generic GPIO
+ * Generic GPIO
*/
#define MCFGPIO_PIN_MAX 8
#define MCFGPIO_IRQ_VECBASE -1
diff --git a/trunk/arch/m68k/include/asm/m520xsim.h b/trunk/arch/m68k/include/asm/m520xsim.h
index 88ed8239fe4e..db824a4b136e 100644
--- a/trunk/arch/m68k/include/asm/m520xsim.h
+++ b/trunk/arch/m68k/include/asm/m520xsim.h
@@ -11,11 +11,6 @@
#define m520xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m520x)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
-
/*
* Define the 520x SIM register set addresses.
*/
@@ -59,9 +54,6 @@
#define MCFSIM_SDCS0 0x000a8110 /* SDRAM Chip Select 0 Configuration */
#define MCFSIM_SDCS1 0x000a8114 /* SDRAM Chip Select 1 Configuration */
-/*
- * EPORT and GPIO registers.
- */
#define MCFEPORT_EPDDR 0xFC088002
#define MCFEPORT_EPDR 0xFC088004
#define MCFEPORT_EPPDR 0xFC088005
@@ -105,7 +97,6 @@
#define MCFGPIO_PCLRR_UART 0xFC0A402A
#define MCFGPIO_PCLRR_FECH 0xFC0A402B
#define MCFGPIO_PCLRR_FECL 0xFC0A402C
-
/*
* Generic GPIO support
*/
@@ -118,6 +109,7 @@
#define MCFGPIO_PIN_MAX 80
#define MCFGPIO_IRQ_MAX 8
#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
+/****************************************************************************/
#define MCF_GPIO_PAR_UART (0xA4036)
#define MCF_GPIO_PAR_FECI2C (0xA4033)
@@ -133,13 +125,6 @@
#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02)
#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04)
-/*
- * UART module.
- */
-#define MCFUART_BASE1 0x60000 /* Base address of UART1 */
-#define MCFUART_BASE2 0x64000 /* Base address of UART2 */
-#define MCFUART_BASE3 0x68000 /* Base address of UART2 */
-
/*
* Reset Controll Unit.
*/
diff --git a/trunk/arch/m68k/include/asm/m523xsim.h b/trunk/arch/m68k/include/asm/m523xsim.h
index 4ad7a00257a8..e8d06b24a48e 100644
--- a/trunk/arch/m68k/include/asm/m523xsim.h
+++ b/trunk/arch/m68k/include/asm/m523xsim.h
@@ -11,10 +11,6 @@
#define m523xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m523x)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
/*
* Define the 523x SIM register set addresses.
@@ -54,13 +50,6 @@
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
-/*
- * UART module.
- */
-#define MCFUART_BASE1 0x200 /* Base address of UART1 */
-#define MCFUART_BASE2 0x240 /* Base address of UART2 */
-#define MCFUART_BASE3 0x280 /* Base address of UART3 */
-
#define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000)
#define MCFGPIO_PODR_DATAH (MCF_IPSBAR + 0x100001)
#define MCFGPIO_PODR_DATAL (MCF_IPSBAR + 0x100002)
diff --git a/trunk/arch/m68k/include/asm/m5249sim.h b/trunk/arch/m68k/include/asm/m5249sim.h
index 4908b118f2fd..79b7b402f3c9 100644
--- a/trunk/arch/m68k/include/asm/m5249sim.h
+++ b/trunk/arch/m68k/include/asm/m5249sim.h
@@ -11,11 +11,6 @@
#define m5249sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5249)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
-
/*
* Define the 5249 SIM register set addresses.
*/
@@ -61,11 +56,6 @@
#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
-/*
- * UART module.
- */
-#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
-#define MCFUART_BASE2 0x200 /* Base address of UART2 */
/*
* Some symbol defines for the above...
diff --git a/trunk/arch/m68k/include/asm/m5272sim.h b/trunk/arch/m68k/include/asm/m5272sim.h
index b7cc50abc831..df3332c2317d 100644
--- a/trunk/arch/m68k/include/asm/m5272sim.h
+++ b/trunk/arch/m68k/include/asm/m5272sim.h
@@ -12,11 +12,6 @@
#define m5272sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5272)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
-
/*
* Define the 5272 SIM register set addresses.
*/
@@ -67,9 +62,6 @@
#define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */
#define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */
-#define MCFUART_BASE1 0x100 /* Base address of UART1 */
-#define MCFUART_BASE2 0x140 /* Base address of UART2 */
-
#define MCFSIM_PACNT (MCF_MBAR + 0x80) /* Port A Control (r/w) */
#define MCFSIM_PADDR (MCF_MBAR + 0x84) /* Port A Direction (r/w) */
#define MCFSIM_PADAT (MCF_MBAR + 0x86) /* Port A Data (r/w) */
diff --git a/trunk/arch/m68k/include/asm/m527xsim.h b/trunk/arch/m68k/include/asm/m527xsim.h
index e8042e8bc003..1feb46f108ce 100644
--- a/trunk/arch/m68k/include/asm/m527xsim.h
+++ b/trunk/arch/m68k/include/asm/m527xsim.h
@@ -11,10 +11,6 @@
#define m527xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m527x)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
/*
* Define the 5270/5271 SIM register set addresses.
@@ -59,12 +55,6 @@
#define MCFSIM_DMR1 0x5c /* SDRAM address mask 1 */
#endif
-/*
- * UART module.
- */
-#define MCFUART_BASE1 0x200 /* Base address of UART1 */
-#define MCFUART_BASE2 0x240 /* Base address of UART2 */
-#define MCFUART_BASE3 0x280 /* Base address of UART3 */
#ifdef CONFIG_M5271
#define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000)
diff --git a/trunk/arch/m68k/include/asm/m528xsim.h b/trunk/arch/m68k/include/asm/m528xsim.h
index a6d2f4d9aaa0..891cbedad972 100644
--- a/trunk/arch/m68k/include/asm/m528xsim.h
+++ b/trunk/arch/m68k/include/asm/m528xsim.h
@@ -11,10 +11,6 @@
#define m528xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m528x)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
/*
* Define the 5280/5282 SIM register set addresses.
@@ -45,13 +41,6 @@
#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */
#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */
-/*
- * UART module.
- */
-#define MCFUART_BASE1 0x200 /* Base address of UART1 */
-#define MCFUART_BASE2 0x240 /* Base address of UART2 */
-#define MCFUART_BASE3 0x280 /* Base address of UART3 */
-
/*
* GPIO registers
*/
diff --git a/trunk/arch/m68k/include/asm/m52xxacr.h b/trunk/arch/m68k/include/asm/m52xxacr.h
deleted file mode 100644
index abc391a9ae8d..000000000000
--- a/trunk/arch/m68k/include/asm/m52xxacr.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/****************************************************************************/
-
-/*
- * m52xxacr.h -- ColdFire version 2 core cache support
- *
- * (C) Copyright 2010, Greg Ungerer
- */
-
-/****************************************************************************/
-#ifndef m52xxacr_h
-#define m52xxacr_h
-/****************************************************************************/
-
-/*
- * All varients of the ColdFire using version 2 cores have a similar
- * cache setup. Although not absolutely identical the cache register
- * definitions are compatible for all of them. Mostly they support a
- * configurable cache memory that can be instruction only, data only,
- * or split instruction and data. The exception is the very old version 2
- * core based parts, like the 5206(e), 5249 and 5272, which are instruction
- * cache only. Cache size varies from 2k up to 16k.
- */
-
-/*
- * Define the Cache Control register flags.
- */
-#define CACR_CENB 0x80000000 /* Enable cache */
-#define CACR_CDPI 0x10000000 /* Disable invalidation by CPUSHL */
-#define CACR_CFRZ 0x08000000 /* Cache freeze mode */
-#define CACR_CINV 0x01000000 /* Invalidate cache */
-#define CACR_DISI 0x00800000 /* Disable instruction cache */
-#define CACR_DISD 0x00400000 /* Disable data cache */
-#define CACR_INVI 0x00200000 /* Invalidate instruction cache */
-#define CACR_INVD 0x00100000 /* Invalidate data cache */
-#define CACR_CEIB 0x00000400 /* Non-cachable instruction burst */
-#define CACR_DCM 0x00000200 /* Default cache mode */
-#define CACR_DBWE 0x00000100 /* Buffered write enable */
-#define CACR_DWP 0x00000020 /* Write protection */
-#define CACR_EUSP 0x00000010 /* Enable separate user a7 */
-
-/*
- * Define the Access Control register flags.
- */
-#define ACR_BASE_POS 24 /* Address Base (upper 8 bits) */
-#define ACR_MASK_POS 16 /* Address Mask (next 8 bits) */
-#define ACR_ENABLE 0x00008000 /* Enable this ACR */
-#define ACR_USER 0x00000000 /* Allow only user accesses */
-#define ACR_SUPER 0x00002000 /* Allow supervisor access only */
-#define ACR_ANY 0x00004000 /* Allow any access type */
-#define ACR_CENB 0x00000000 /* Caching of region enabled */
-#define ACR_CDIS 0x00000040 /* Caching of region disabled */
-#define ACR_BWE 0x00000020 /* Write buffer enabled */
-#define ACR_WPROTECT 0x00000004 /* Write protect region */
-
-/*
- * Set the cache controller settings we will use. On the cores that support
- * a split cache configuration we allow all the combinations at Kconfig
- * time. For those cores that only have an instruction cache we just set
- * that as on.
- */
-#if defined(CONFIG_CACHE_I)
-#define CACHE_TYPE (CACR_DISD + CACR_EUSP)
-#define CACHE_INVTYPEI 0
-#elif defined(CONFIG_CACHE_D)
-#define CACHE_TYPE (CACR_DISI + CACR_EUSP)
-#define CACHE_INVTYPED 0
-#elif defined(CONFIG_CACHE_BOTH)
-#define CACHE_TYPE CACR_EUSP
-#define CACHE_INVTYPEI CACR_INVI
-#define CACHE_INVTYPED CACR_INVD
-#else
-/* This is the instruction cache only devices (no split cache, no eusp) */
-#define CACHE_TYPE 0
-#define CACHE_INVTYPEI 0
-#endif
-
-#define CACHE_INIT (CACR_CINV + CACHE_TYPE)
-#define CACHE_MODE (CACR_CENB + CACHE_TYPE + CACR_DCM)
-
-#define CACHE_INVALIDATE (CACHE_MODE + CACR_CINV)
-#if defined(CACHE_INVTYPEI)
-#define CACHE_INVALIDATEI (CACHE_MODE + CACR_CINV + CACHE_INVTYPEI)
-#endif
-#if defined(CACHE_INVTYPED)
-#define CACHE_INVALIDATED (CACHE_MODE + CACR_CINV + CACHE_INVTYPED)
-#endif
-
-#define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \
- (0x000f0000) + \
- (ACR_ENABLE + ACR_ANY + ACR_CENB + ACR_BWE))
-#define ACR1_MODE 0
-
-/****************************************************************************/
-#endif /* m52xxsim_h */
diff --git a/trunk/arch/m68k/include/asm/m5307sim.h b/trunk/arch/m68k/include/asm/m5307sim.h
index 0bf57397e7a9..c6830e5b54ce 100644
--- a/trunk/arch/m68k/include/asm/m5307sim.h
+++ b/trunk/arch/m68k/include/asm/m5307sim.h
@@ -14,11 +14,6 @@
#define m5307sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5307)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
-
/*
* Define the 5307 SIM register set addresses.
*/
@@ -98,17 +93,6 @@
#define MCFSIM_PADDR (MCF_MBAR + 0x244)
#define MCFSIM_PADAT (MCF_MBAR + 0x248)
-/*
- * UART module.
- */
-#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
-#define MCFUART_BASE1 0x200 /* Base address of UART1 */
-#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */
-#else
-#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
-#define MCFUART_BASE2 0x200 /* Base address of UART2 */
-#endif
-
/*
* Generic GPIO support
*/
@@ -162,5 +146,32 @@
#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
+/*
+ * Define the Cache register flags.
+ */
+#define CACR_EC (1<<31)
+#define CACR_ESB (1<<29)
+#define CACR_DPI (1<<28)
+#define CACR_HLCK (1<<27)
+#define CACR_CINVA (1<<24)
+#define CACR_DNFB (1<<10)
+#define CACR_DCM_WTHRU (0<<8)
+#define CACR_DCM_WBACK (1<<8)
+#define CACR_DCM_OFF_PRE (2<<8)
+#define CACR_DCM_OFF_IMP (3<<8)
+#define CACR_DW (1<<5)
+
+#define ACR_BASE_POS 24
+#define ACR_MASK_POS 16
+#define ACR_ENABLE (1<<15)
+#define ACR_USER (0<<13)
+#define ACR_SUPER (1<<13)
+#define ACR_ANY (2<<13)
+#define ACR_CM_WTHRU (0<<5)
+#define ACR_CM_WBACK (1<<5)
+#define ACR_CM_OFF_PRE (2<<5)
+#define ACR_CM_OFF_IMP (3<<5)
+#define ACR_WPROTECT (1<<2)
+
/****************************************************************************/
#endif /* m5307sim_h */
diff --git a/trunk/arch/m68k/include/asm/m532xsim.h b/trunk/arch/m68k/include/asm/m532xsim.h
index e6470f8ca324..c4bf1c81e3cf 100644
--- a/trunk/arch/m68k/include/asm/m532xsim.h
+++ b/trunk/arch/m68k/include/asm/m532xsim.h
@@ -9,11 +9,6 @@
#define m532xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m532x)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
-
#define MCF_REG32(x) (*(volatile unsigned long *)(x))
#define MCF_REG16(x) (*(volatile unsigned short *)(x))
#define MCF_REG08(x) (*(volatile unsigned char *)(x))
@@ -79,11 +74,31 @@
#define MCF_IRQ_PROFILER (64 + 33) /* Timer1 */
/*
- * UART module.
+ * Define the Cache register flags.
*/
-#define MCFUART_BASE1 0xFC060000 /* Base address of UART1 */
-#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */
-#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */
+#define CACR_EC (1<<31)
+#define CACR_ESB (1<<29)
+#define CACR_DPI (1<<28)
+#define CACR_HLCK (1<<27)
+#define CACR_CINVA (1<<24)
+#define CACR_DNFB (1<<10)
+#define CACR_DCM_WTHRU (0<<8)
+#define CACR_DCM_WBACK (1<<8)
+#define CACR_DCM_OFF_PRE (2<<8)
+#define CACR_DCM_OFF_IMP (3<<8)
+#define CACR_DW (1<<5)
+
+#define ACR_BASE_POS 24
+#define ACR_MASK_POS 16
+#define ACR_ENABLE (1<<15)
+#define ACR_USER (0<<13)
+#define ACR_SUPER (1<<13)
+#define ACR_ANY (2<<13)
+#define ACR_CM_WTHRU (0<<5)
+#define ACR_CM_WBACK (1<<5)
+#define ACR_CM_OFF_PRE (2<<5)
+#define ACR_CM_OFF_IMP (3<<5)
+#define ACR_WPROTECT (1<<2)
/*********************************************************************
*
diff --git a/trunk/arch/m68k/include/asm/m53xxacr.h b/trunk/arch/m68k/include/asm/m53xxacr.h
deleted file mode 100644
index cd952b0a8bd3..000000000000
--- a/trunk/arch/m68k/include/asm/m53xxacr.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/****************************************************************************/
-
-/*
- * m53xxacr.h -- ColdFire version 3 core cache support
- *
- * (C) Copyright 2010, Greg Ungerer
- */
-
-/****************************************************************************/
-#ifndef m53xxacr_h
-#define m53xxacr_h
-/****************************************************************************/
-
-/*
- * All varients of the ColdFire using version 3 cores have a similar
- * cache setup. They have a unified instruction and data cache, with
- * configurable write-through or copy-back operation.
- */
-
-/*
- * Define the Cache Control register flags.
- */
-#define CACR_EC 0x80000000 /* Enable cache */
-#define CACR_ESB 0x20000000 /* Enable store buffer */
-#define CACR_DPI 0x10000000 /* Disable invalidation by CPUSHL */
-#define CACR_HLCK 0x08000000 /* Half cache lock mode */
-#define CACR_CINVA 0x01000000 /* Invalidate cache */
-#define CACR_DNFB 0x00000400 /* Inhibited fill buffer */
-#define CACR_DCM_WT 0x00000000 /* Cacheable write-through */
-#define CACR_DCM_CB 0x00000100 /* Cacheable copy-back */
-#define CACR_DCM_PRE 0x00000200 /* Cache inhibited, precise */
-#define CACR_DCM_IMPRE 0x00000300 /* Cache inhibited, imprecise */
-#define CACR_WPROTECT 0x00000020 /* Write protect*/
-#define CACR_EUSP 0x00000010 /* Eanble separate user a7 */
-
-/*
- * Define the Access Control register flags.
- */
-#define ACR_BASE_POS 24 /* Address Base (upper 8 bits) */
-#define ACR_MASK_POS 16 /* Address Mask (next 8 bits) */
-#define ACR_ENABLE 0x00008000 /* Enable this ACR */
-#define ACR_USER 0x00000000 /* Allow only user accesses */
-#define ACR_SUPER 0x00002000 /* Allow supervisor access only */
-#define ACR_ANY 0x00004000 /* Allow any access type */
-#define ACR_CM_WT 0x00000000 /* Cacheable, write-through */
-#define ACR_CM_CB 0x00000020 /* Cacheable, copy-back */
-#define ACR_CM_PRE 0x00000040 /* Cache inhibited, precise */
-#define ACR_CM_IMPRE 0x00000060 /* Cache inhibited, imprecise */
-#define ACR_WPROTECT 0x00000004 /* Write protect region */
-
-/*
- * Define the cache type and arrangement (needed for pushes).
- */
-#if defined(CONFIG_M5307)
-#define CACHE_SIZE 0x2000 /* 8k of unified cache */
-#define ICACHE_SIZE CACHE_SIZE
-#define DCACHE_SIZE CACHE_SIZE
-#elif defined(CONFIG_M532x)
-#define CACHE_SIZE 0x4000 /* 32k of unified cache */
-#define ICACHE_SIZE CACHE_SIZE
-#define DCACHE_SIZE CACHE_SIZE
-#endif
-
-#define CACHE_LINE_SIZE 16 /* 16 byte line size */
-#define CACHE_WAYS 4 /* 4 ways - set associative */
-
-/*
- * Set the cache controller settings we will use. This default in the
- * CACR is cache inhibited, we use the ACR register to set cacheing
- * enabled on the regions we want (eg RAM).
- */
-#if defined(CONFIG_CACHE_COPYBACK)
-#define CACHE_TYPE ACR_CM_CB
-#define CACHE_PUSH
-#else
-#define CACHE_TYPE ACR_CM_WT
-#endif
-
-#ifdef CONFIG_COLDFIRE_SW_A7
-#define CACHE_MODE (CACR_EC + CACR_ESB + CACR_DCM_PRE)
-#else
-#define CACHE_MODE (CACR_EC + CACR_ESB + CACR_DCM_PRE + CACR_EUSP)
-#endif
-
-/*
- * Unified cache means we will never need to flush for coherency of
- * instruction fetch. We will need to flush to maintain memory/DMA
- * coherency though in all cases. And for copyback caches we will need
- * to push cached data as well.
- */
-#define CACHE_INIT CACR_CINVA
-#define CACHE_INVALIDATE CACR_CINVA
-#define CACHE_INVALIDATED CACR_CINVA
-
-#define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \
- (0x000f0000) + \
- (ACR_ENABLE + ACR_ANY + CACHE_TYPE))
-#define ACR1_MODE 0
-
-/****************************************************************************/
-#endif /* m53xxsim_h */
diff --git a/trunk/arch/m68k/include/asm/m5407sim.h b/trunk/arch/m68k/include/asm/m5407sim.h
index 75f5c28a551d..c399abbf953c 100644
--- a/trunk/arch/m68k/include/asm/m5407sim.h
+++ b/trunk/arch/m68k/include/asm/m5407sim.h
@@ -14,11 +14,6 @@
#define m5407sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5407)"
-#define CPU_INSTR_PER_JIFFY 3
-
-#include
-
/*
* Define the 5407 SIM register set addresses.
*/
@@ -78,9 +73,6 @@
#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
-#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
-#define MCFUART_BASE2 0x200 /* Base address of UART2 */
-
#define MCFSIM_PADDR (MCF_MBAR + 0x244)
#define MCFSIM_PADAT (MCF_MBAR + 0x248)
@@ -125,5 +117,39 @@
#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
+/*
+ * Define the Cache register flags.
+ */
+#define CACR_DEC 0x80000000 /* Enable data cache */
+#define CACR_DWP 0x40000000 /* Data write protection */
+#define CACR_DESB 0x20000000 /* Enable data store buffer */
+#define CACR_DDPI 0x10000000 /* Disable CPUSHL */
+#define CACR_DHCLK 0x08000000 /* Half data cache lock mode */
+#define CACR_DDCM_WT 0x00000000 /* Write through cache*/
+#define CACR_DDCM_CP 0x02000000 /* Copyback cache */
+#define CACR_DDCM_P 0x04000000 /* No cache, precise */
+#define CACR_DDCM_IMP 0x06000000 /* No cache, imprecise */
+#define CACR_DCINVA 0x01000000 /* Invalidate data cache */
+#define CACR_BEC 0x00080000 /* Enable branch cache */
+#define CACR_BCINVA 0x00040000 /* Invalidate branch cache */
+#define CACR_IEC 0x00008000 /* Enable instruction cache */
+#define CACR_DNFB 0x00002000 /* Inhibited fill buffer */
+#define CACR_IDPI 0x00001000 /* Disable CPUSHL */
+#define CACR_IHLCK 0x00000800 /* Intruction cache half lock */
+#define CACR_IDCM 0x00000400 /* Intruction cache inhibit */
+#define CACR_ICINVA 0x00000100 /* Invalidate instr cache */
+
+#define ACR_BASE_POS 24 /* Address Base */
+#define ACR_MASK_POS 16 /* Address Mask */
+#define ACR_ENABLE 0x00008000 /* Enable address */
+#define ACR_USER 0x00000000 /* User mode access only */
+#define ACR_SUPER 0x00002000 /* Supervisor mode only */
+#define ACR_ANY 0x00004000 /* Match any access mode */
+#define ACR_CM_WT 0x00000000 /* Write through mode */
+#define ACR_CM_CP 0x00000020 /* Copyback mode */
+#define ACR_CM_OFF_PRE 0x00000040 /* No cache, precise */
+#define ACR_CM_OFF_IMP 0x00000060 /* No cache, imprecise */
+#define ACR_WPROTECT 0x00000004 /* Write protect */
+
/****************************************************************************/
#endif /* m5407sim_h */
diff --git a/trunk/arch/m68k/include/asm/m54xxgpt.h b/trunk/arch/m68k/include/asm/m548xgpt.h
similarity index 95%
rename from trunk/arch/m68k/include/asm/m54xxgpt.h
rename to trunk/arch/m68k/include/asm/m548xgpt.h
index df75dd87ae7a..33b2eef90f0a 100644
--- a/trunk/arch/m68k/include/asm/m54xxgpt.h
+++ b/trunk/arch/m68k/include/asm/m548xgpt.h
@@ -1,13 +1,13 @@
/*
- * File: m54xxgpt.h
- * Purpose: Register and bit definitions for the MCF54XX
+ * File: m548xgpt.h
+ * Purpose: Register and bit definitions for the MCF548X
*
* Notes:
*
*/
-#ifndef m54xxgpt_h
-#define m54xxgpt_h
+#ifndef m548xgpt_h
+#define m548xgpt_h
/*********************************************************************
*
@@ -87,4 +87,4 @@
/********************************************************************/
-#endif /* m54xxgpt_h */
+#endif /* m548xgpt_h */
diff --git a/trunk/arch/m68k/include/asm/m54xxsim.h b/trunk/arch/m68k/include/asm/m548xsim.h
similarity index 73%
rename from trunk/arch/m68k/include/asm/m54xxsim.h
rename to trunk/arch/m68k/include/asm/m548xsim.h
index 462ae5328441..149135ef30d2 100644
--- a/trunk/arch/m68k/include/asm/m54xxsim.h
+++ b/trunk/arch/m68k/include/asm/m548xsim.h
@@ -1,16 +1,11 @@
/*
- * m54xxsim.h -- ColdFire 547x/548x System Integration Unit support.
+ * m548xsim.h -- ColdFire 547x/548x System Integration Unit support.
*/
-#ifndef m54xxsim_h
-#define m54xxsim_h
+#ifndef m548xsim_h
+#define m548xsim_h
-#define CPU_NAME "COLDFIRE(m54xx)"
-#define CPU_INSTR_PER_JIFFY 2
-
-#include
-
-#define MCFINT_VECBASE 64
+#define MCFINT_VECBASE 64
/*
* Interrupt Controller Registers
@@ -26,14 +21,6 @@
#define MCFINTC_IACKL 0x19 /* */
#define MCFINTC_ICR0 0x40 /* Base ICR register */
-/*
- * UART module.
- */
-#define MCFUART_BASE1 0x8600 /* Base address of UART1 */
-#define MCFUART_BASE2 0x8700 /* Base address of UART2 */
-#define MCFUART_BASE3 0x8800 /* Base address of UART3 */
-#define MCFUART_BASE4 0x8900 /* Base address of UART4 */
-
/*
* Define system peripheral IRQ usage.
*/
@@ -65,4 +52,4 @@
#define MCF_PAR_PSC_RTS_RTS (0x30)
#define MCF_PAR_PSC_CANRX (0x40)
-#endif /* m54xxsim_h */
+#endif /* m548xsim_h */
diff --git a/trunk/arch/m68k/include/asm/m54xxacr.h b/trunk/arch/m68k/include/asm/m54xxacr.h
deleted file mode 100644
index 16a1835f9b2a..000000000000
--- a/trunk/arch/m68k/include/asm/m54xxacr.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * Bit definitions for the MCF54xx ACR and CACR registers.
- */
-
-#ifndef m54xxacr_h
-#define m54xxacr_h
-
-/*
- * Define the Cache register flags.
- */
-#define CACR_DEC 0x80000000 /* Enable data cache */
-#define CACR_DWP 0x40000000 /* Data write protection */
-#define CACR_DESB 0x20000000 /* Enable data store buffer */
-#define CACR_DDPI 0x10000000 /* Disable invalidation by CPUSHL */
-#define CACR_DHCLK 0x08000000 /* Half data cache lock mode */
-#define CACR_DDCM_WT 0x00000000 /* Write through cache*/
-#define CACR_DDCM_CP 0x02000000 /* Copyback cache */
-#define CACR_DDCM_P 0x04000000 /* No cache, precise */
-#define CACR_DDCM_IMP 0x06000000 /* No cache, imprecise */
-#define CACR_DCINVA 0x01000000 /* Invalidate data cache */
-#define CACR_BEC 0x00080000 /* Enable branch cache */
-#define CACR_BCINVA 0x00040000 /* Invalidate branch cache */
-#define CACR_IEC 0x00008000 /* Enable instruction cache */
-#define CACR_DNFB 0x00002000 /* Inhibited fill buffer */
-#define CACR_IDPI 0x00001000 /* Disable CPUSHL */
-#define CACR_IHLCK 0x00000800 /* Intruction cache half lock */
-#define CACR_IDCM 0x00000400 /* Intruction cache inhibit */
-#define CACR_ICINVA 0x00000100 /* Invalidate instr cache */
-#define CACR_EUSP 0x00000020 /* Enable separate user a7 */
-
-#define ACR_BASE_POS 24 /* Address Base */
-#define ACR_MASK_POS 16 /* Address Mask */
-#define ACR_ENABLE 0x00008000 /* Enable address */
-#define ACR_USER 0x00000000 /* User mode access only */
-#define ACR_SUPER 0x00002000 /* Supervisor mode only */
-#define ACR_ANY 0x00004000 /* Match any access mode */
-#define ACR_CM_WT 0x00000000 /* Write through mode */
-#define ACR_CM_CP 0x00000020 /* Copyback mode */
-#define ACR_CM_OFF_PRE 0x00000040 /* No cache, precise */
-#define ACR_CM_OFF_IMP 0x00000060 /* No cache, imprecise */
-#define ACR_CM 0x00000060 /* Cache mode mask */
-#define ACR_WPROTECT 0x00000004 /* Write protect */
-
-#if defined(CONFIG_M5407)
-
-#define ICACHE_SIZE 0x4000 /* instruction - 16k */
-#define DCACHE_SIZE 0x2000 /* data - 8k */
-
-#elif defined(CONFIG_M54xx)
-
-#define ICACHE_SIZE 0x8000 /* instruction - 32k */
-#define DCACHE_SIZE 0x8000 /* data - 32k */
-
-#endif
-
-#define CACHE_LINE_SIZE 0x0010 /* 16 bytes */
-#define CACHE_WAYS 4 /* 4 ways */
-
-/*
- * Version 4 cores have a true harvard style separate instruction
- * and data cache. Enable data and instruction caches, also enable write
- * buffers and branch accelerator.
- */
-/* attention : enabling CACR_DESB requires a "nop" to flush the store buffer */
-/* use '+' instead of '|' for assembler's sake */
-
- /* Enable data cache */
- /* Enable data store buffer */
- /* outside ACRs : No cache, precise */
- /* Enable instruction+branch caches */
-#if defined(CONFIG_M5407)
-#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC)
-#else
-#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
-#endif
-#if defined(CONFIG_CACHE_COPYBACK)
-#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP)
-#else
-#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_WT)
-#endif
-#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
-
-#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
-#define CACHE_INVALIDATE (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
-#define CACHE_INVALIDATEI (CACHE_MODE+CACR_BCINVA+CACR_ICINVA)
-#define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA)
-#define ACR0_MODE (0x000f0000+DATA_CACHE_MODE)
-#define ACR1_MODE 0
-#define ACR2_MODE (0x000f0000+INSN_CACHE_MODE)
-#define ACR3_MODE 0
-
-#if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_CP)
-/* Copyback cache mode must push dirty cache lines first */
-#define CACHE_PUSH
-#endif
-
-#endif /* m54xxacr_h */
diff --git a/trunk/arch/m68k/include/asm/mcfcache.h b/trunk/arch/m68k/include/asm/mcfcache.h
new file mode 100644
index 000000000000..f49dfc09f70a
--- /dev/null
+++ b/trunk/arch/m68k/include/asm/mcfcache.h
@@ -0,0 +1,150 @@
+/****************************************************************************/
+
+/*
+ * mcfcache.h -- ColdFire CPU cache support code
+ *
+ * (C) Copyright 2004, Greg Ungerer
+ */
+
+/****************************************************************************/
+#ifndef __M68KNOMMU_MCFCACHE_H
+#define __M68KNOMMU_MCFCACHE_H
+/****************************************************************************/
+
+
+/*
+ * The different ColdFire families have different cache arrangments.
+ * Everything from a small instruction only cache, to configurable
+ * data and/or instruction cache, to unified instruction/data, to
+ * harvard style separate instruction and data caches.
+ */
+
+#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272)
+/*
+ * Simple version 2 core cache. These have instruction cache only,
+ * we just need to invalidate it and enable it.
+ */
+.macro CACHE_ENABLE
+ movel #0x01000000,%d0 /* invalidate cache cmd */
+ movec %d0,%CACR /* do invalidate cache */
+ movel #0x80000100,%d0 /* setup cache mask */
+ movec %d0,%CACR /* enable cache */
+.endm
+#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */
+
+#if defined(CONFIG_M523x) || defined(CONFIG_M527x)
+/*
+ * New version 2 cores have a configurable split cache arrangement.
+ * For now I am just enabling instruction cache - but ultimately I
+ * think a split instruction/data cache would be better.
+ */
+.macro CACHE_ENABLE
+ movel #0x01400000,%d0
+ movec %d0,%CACR /* invalidate cache */
+ nop
+ movel #0x0000c000,%d0 /* set SDRAM cached only */
+ movec %d0,%ACR0
+ movel #0x00000000,%d0 /* no other regions cached */
+ movec %d0,%ACR1
+ movel #0x80400100,%d0 /* configure cache */
+ movec %d0,%CACR /* enable cache */
+ nop
+.endm
+#endif /* CONFIG_M523x || CONFIG_M527x */
+
+#if defined(CONFIG_M528x)
+.macro CACHE_ENABLE
+ nop
+ movel #0x01000000, %d0
+ movec %d0, %CACR /* Invalidate cache */
+ nop
+ movel #0x0000c020, %d0 /* Set SDRAM cached only */
+ movec %d0, %ACR0
+ movel #0x00000000, %d0 /* No other regions cached */
+ movec %d0, %ACR1
+ movel #0x80000200, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Enable cache */
+ nop
+.endm
+#endif /* CONFIG_M528x */
+
+#if defined(CONFIG_M5249) || defined(CONFIG_M5307)
+/*
+ * The version 3 core cache. Oddly enough the version 2 core 5249
+ * has the same SDRAM and cache setup as the version 3 cores.
+ * This is a single unified instruction/data cache.
+ */
+.macro CACHE_ENABLE
+ movel #0x01000000,%d0 /* invalidate whole cache */
+ movec %d0,%CACR
+ nop
+#if defined(DEBUGGER_COMPATIBLE_CACHE) || defined(CONFIG_SECUREEDGEMP3)
+ movel #0x0000c000,%d0 /* set SDRAM cached (write-thru) */
+#else
+ movel #0x0000c020,%d0 /* set SDRAM cached (copyback) */
+#endif
+ movec %d0,%ACR0
+ movel #0x00000000,%d0 /* no other regions cached */
+ movec %d0,%ACR1
+ movel #0xa0000200,%d0 /* enable cache */
+ movec %d0,%CACR
+ nop
+.endm
+#endif /* CONFIG_M5249 || CONFIG_M5307 */
+
+#if defined(CONFIG_M532x)
+.macro CACHE_ENABLE
+ movel #0x01000000,%d0 /* invalidate cache cmd */
+ movec %d0,%CACR /* do invalidate cache */
+ nop
+ movel #0x4001C000,%d0 /* set SDRAM cached (write-thru) */
+ movec %d0,%ACR0
+ movel #0x00000000,%d0 /* no other regions cached */
+ movec %d0,%ACR1
+ movel #0x80000200,%d0 /* setup cache mask */
+ movec %d0,%CACR /* enable cache */
+ nop
+.endm
+#endif /* CONFIG_M532x */
+
+#if defined(CONFIG_M5407) || defined(CONFIG_M548x)
+/*
+ * Version 4 cores have a true harvard style separate instruction
+ * and data cache. Invalidate and enable cache, also enable write
+ * buffers and branch accelerator.
+ */
+.macro CACHE_ENABLE
+ movel #0x01040100,%d0 /* invalidate whole cache */
+ movec %d0,%CACR
+ nop
+ movel #0x000fc000,%d0 /* set SDRAM cached only */
+ movec %d0, %ACR0
+ movel #0x00000000,%d0 /* no other regions cached */
+ movec %d0, %ACR1
+ movel #0x000fc000,%d0 /* set SDRAM cached only */
+ movec %d0, %ACR2
+ movel #0x00000000,%d0 /* no other regions cached */
+ movec %d0, %ACR3
+ movel #0xb6088400,%d0 /* enable caches */
+ movec %d0,%CACR
+ nop
+.endm
+#endif /* CONFIG_M5407 */
+
+#if defined(CONFIG_M520x)
+.macro CACHE_ENABLE
+ move.l #0x01000000,%d0 /* invalidate whole cache */
+ movec %d0,%CACR
+ nop
+ move.l #0x0000c000,%d0 /* set SDRAM cached (write-thru) */
+ movec %d0,%ACR0
+ move.l #0x00000000,%d0 /* no other regions cached */
+ movec %d0,%ACR1
+ move.l #0x80400000,%d0 /* enable 8K instruction cache */
+ movec %d0,%CACR
+ nop
+.endm
+#endif /* CONFIG_M520x */
+
+/****************************************************************************/
+#endif /* __M68KNOMMU_MCFCACHE_H */
diff --git a/trunk/arch/m68k/include/asm/mcfsim.h b/trunk/arch/m68k/include/asm/mcfsim.h
index ebd0304054ad..6901fd68165b 100644
--- a/trunk/arch/m68k/include/asm/mcfsim.h
+++ b/trunk/arch/m68k/include/asm/mcfsim.h
@@ -41,8 +41,8 @@
#elif defined(CONFIG_M5407)
#include
#include
-#elif defined(CONFIG_M54xx)
-#include
+#elif defined(CONFIG_M548x)
+#include
#endif
/****************************************************************************/
diff --git a/trunk/arch/m68k/include/asm/mcfuart.h b/trunk/arch/m68k/include/asm/mcfuart.h
index 2abedff0a694..db72e2b889ca 100644
--- a/trunk/arch/m68k/include/asm/mcfuart.h
+++ b/trunk/arch/m68k/include/asm/mcfuart.h
@@ -12,6 +12,49 @@
#define mcfuart_h
/****************************************************************************/
+/*
+ * Define the base address of the UARTS within the MBAR address
+ * space.
+ */
+#if defined(CONFIG_M5272)
+#define MCFUART_BASE1 0x100 /* Base address of UART1 */
+#define MCFUART_BASE2 0x140 /* Base address of UART2 */
+#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
+#if defined(CONFIG_NETtel)
+#define MCFUART_BASE1 0x180 /* Base address of UART1 */
+#define MCFUART_BASE2 0x140 /* Base address of UART2 */
+#else
+#define MCFUART_BASE1 0x140 /* Base address of UART1 */
+#define MCFUART_BASE2 0x180 /* Base address of UART2 */
+#endif
+#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
+#define MCFUART_BASE1 0x200 /* Base address of UART1 */
+#define MCFUART_BASE2 0x240 /* Base address of UART2 */
+#define MCFUART_BASE3 0x280 /* Base address of UART3 */
+#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
+#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
+#define MCFUART_BASE1 0x200 /* Base address of UART1 */
+#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */
+#else
+#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
+#define MCFUART_BASE2 0x200 /* Base address of UART2 */
+#endif
+#elif defined(CONFIG_M520x)
+#define MCFUART_BASE1 0x60000 /* Base address of UART1 */
+#define MCFUART_BASE2 0x64000 /* Base address of UART2 */
+#define MCFUART_BASE3 0x68000 /* Base address of UART2 */
+#elif defined(CONFIG_M532x)
+#define MCFUART_BASE1 0xfc060000 /* Base address of UART1 */
+#define MCFUART_BASE2 0xfc064000 /* Base address of UART2 */
+#define MCFUART_BASE3 0xfc068000 /* Base address of UART3 */
+#elif defined(CONFIG_M548x)
+#define MCFUART_BASE1 0x8600 /* on M548x */
+#define MCFUART_BASE2 0x8700 /* on M548x */
+#define MCFUART_BASE3 0x8800 /* on M548x */
+#define MCFUART_BASE4 0x8900 /* on M548x */
+#endif
+
+
#include
#include
@@ -174,7 +217,7 @@ struct mcf_platform_uart {
#define MCFUART_URF_RXS 0xc0 /* Receiver status */
#endif
-#if defined(CONFIG_M54xx)
+#if defined(CONFIG_M548x)
#define MCFUART_TXFIFOSIZE 512
#elif defined(CONFIG_M5272)
#define MCFUART_TXFIFOSIZE 25
diff --git a/trunk/arch/m68k/include/asm/processor.h b/trunk/arch/m68k/include/asm/processor.h
index 278c69bad57a..7a6a7590cc02 100644
--- a/trunk/arch/m68k/include/asm/processor.h
+++ b/trunk/arch/m68k/include/asm/processor.h
@@ -20,26 +20,23 @@
static inline unsigned long rdusp(void)
{
-#ifdef CONFIG_COLDFIRE_SW_A7
+#ifdef CONFIG_COLDFIRE
extern unsigned int sw_usp;
return sw_usp;
#else
- register unsigned long usp __asm__("a0");
- /* move %usp,%a0 */
- __asm__ __volatile__(".word 0x4e68" : "=a" (usp));
+ unsigned long usp;
+ __asm__ __volatile__("move %/usp,%0" : "=a" (usp));
return usp;
#endif
}
static inline void wrusp(unsigned long usp)
{
-#ifdef CONFIG_COLDFIRE_SW_A7
+#ifdef CONFIG_COLDFIRE
extern unsigned int sw_usp;
sw_usp = usp;
#else
- register unsigned long a0 __asm__("a0") = usp;
- /* move %a0,%usp */
- __asm__ __volatile__(".word 0x4e60" : : "a" (a0) );
+ __asm__ __volatile__("move %0,%/usp" : : "a" (usp));
#endif
}
diff --git a/trunk/arch/m68knommu/Kconfig b/trunk/arch/m68knommu/Kconfig
index 8b9dacaa0f6e..fa9f746cf4ae 100644
--- a/trunk/arch/m68knommu/Kconfig
+++ b/trunk/arch/m68knommu/Kconfig
@@ -2,7 +2,6 @@ config M68K
bool
default y
select HAVE_IDE
- select HAVE_GENERIC_HARDIRQS
config MMU
bool
@@ -49,6 +48,14 @@ config GENERIC_HWEIGHT
bool
default y
+config GENERIC_HARDIRQS
+ bool
+ default y
+
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ bool
+ default y
+
config GENERIC_CALIBRATE_DELAY
bool
default y
@@ -68,16 +75,6 @@ config GENERIC_CLOCKEVENTS
config NO_IOPORT
def_bool y
-config COLDFIRE_SW_A7
- bool
- default n
-
-config HAVE_CACHE_SPLIT
- bool
-
-config HAVE_CACHE_CB
- bool
-
source "init/Kconfig"
source "kernel/Kconfig.freezer"
@@ -110,90 +107,69 @@ config M68360
config M5206
bool "MCF5206"
- select COLDFIRE_SW_A7
help
Motorola ColdFire 5206 processor support.
config M5206e
bool "MCF5206e"
- select COLDFIRE_SW_A7
help
Motorola ColdFire 5206e processor support.
config M520x
bool "MCF520x"
select GENERIC_CLOCKEVENTS
- select HAVE_CACHE_SPLIT
help
Freescale Coldfire 5207/5208 processor support.
config M523x
bool "MCF523x"
select GENERIC_CLOCKEVENTS
- select HAVE_CACHE_SPLIT
help
Freescale Coldfire 5230/1/2/4/5 processor support
config M5249
bool "MCF5249"
- select COLDFIRE_SW_A7
help
Motorola ColdFire 5249 processor support.
config M5271
bool "MCF5271"
- select HAVE_CACHE_SPLIT
help
Freescale (Motorola) ColdFire 5270/5271 processor support.
config M5272
bool "MCF5272"
- select COLDFIRE_SW_A7
help
Motorola ColdFire 5272 processor support.
config M5275
bool "MCF5275"
- select HAVE_CACHE_SPLIT
help
Freescale (Motorola) ColdFire 5274/5275 processor support.
config M528x
bool "MCF528x"
select GENERIC_CLOCKEVENTS
- select HAVE_CACHE_SPLIT
help
Motorola ColdFire 5280/5282 processor support.
config M5307
bool "MCF5307"
- select COLDFIRE_SW_A7
- select HAVE_CACHE_CB
help
Motorola ColdFire 5307 processor support.
config M532x
bool "MCF532x"
- select HAVE_CACHE_CB
help
Freescale (Motorola) ColdFire 532x processor support.
config M5407
bool "MCF5407"
- select COLDFIRE_SW_A7
- select HAVE_CACHE_CB
help
Motorola ColdFire 5407 processor support.
-config M547x
- bool "MCF547x"
- select HAVE_CACHE_CB
- help
- Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
-
config M548x
bool "MCF548x"
- select HAVE_CACHE_CB
help
Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
@@ -205,14 +181,9 @@ config M527x
select GENERIC_CLOCKEVENTS
default y
-config M54xx
- bool
- depends on (M548x || M547x)
- default y
-
config COLDFIRE
bool
- depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx)
+ depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M548x)
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
default y
@@ -259,46 +230,6 @@ config OLDMASK
Build support for the older revision ColdFire 5307 silicon.
Specifically this is the 1H55J mask revision.
-if HAVE_CACHE_SPLIT
-choice
- prompt "Split Cache Configuration"
- default CACHE_I
-
-config CACHE_I
- bool "Instruction"
- help
- Use all of the ColdFire CPU cache memory as an instruction cache.
-
-config CACHE_D
- bool "Data"
- help
- Use all of the ColdFire CPU cache memory as a data cache.
-
-config CACHE_BOTH
- bool "Both"
- help
- Split the ColdFire CPU cache, and use half as an instruction cache
- and half as a data cache.
-endchoice
-endif
-
-if HAVE_CACHE_CB
-choice
- prompt "Data cache mode"
- default CACHE_WRITETHRU
-
-config CACHE_WRITETHRU
- bool "Write-through"
- help
- The ColdFire CPU cache is set into Write-through mode.
-
-config CACHE_COPYBACK
- bool "Copy-back"
- help
- The ColdFire CPU cache is set into Copy-back mode.
-endchoice
-endif
-
comment "Platform"
config PILOT3
@@ -314,16 +245,16 @@ config XCOPILOT_BUGS
Support the bugs of Xcopilot.
config UC5272
- bool 'Arcturus Networks uC5272 dimm board support'
- depends on M5272
- help
- Support for the Arcturus Networks uC5272 dimm board.
+ bool 'Arcturus Networks uC5272 dimm board support'
+ depends on M5272
+ help
+ Support for the Arcturus Networks uC5272 dimm board.
config UC5282
- bool "Arcturus Networks uC5282 board support"
- depends on M528x
- help
- Support for the Arcturus Networks uC5282 dimm board.
+ bool "Arcturus Networks uC5282 board support"
+ depends on M528x
+ help
+ Support for the Arcturus Networks uC5282 dimm board.
config UCSIMM
bool "uCsimm module support"
@@ -348,7 +279,7 @@ config DIRECT_IO_ACCESS
depends on (UCSIMM || UCDIMM || DRAGEN2)
help
Disable the CPU internal registers protection in user mode,
- to allow a user application to read/write them.
+ to allow a user application to read/write them.
config INIT_LCD
bool "Initialize LCD"
@@ -586,7 +517,7 @@ config EMAC_INC
depends on (SOM5282EM)
config SNEHA
- bool
+ bool
default y
depends on CPU16B
diff --git a/trunk/arch/m68knommu/Makefile b/trunk/arch/m68knommu/Makefile
index 589613fed31d..026ef16fa68e 100644
--- a/trunk/arch/m68knommu/Makefile
+++ b/trunk/arch/m68knommu/Makefile
@@ -25,7 +25,7 @@ platform-$(CONFIG_M528x) := 528x
platform-$(CONFIG_M5307) := 5307
platform-$(CONFIG_M532x) := 532x
platform-$(CONFIG_M5407) := 5407
-platform-$(CONFIG_M54xx) := 54xx
+platform-$(CONFIG_M548x) := 548x
PLATFORM := $(platform-y)
board-$(CONFIG_PILOT) := pilot
@@ -74,7 +74,7 @@ cpuclass-$(CONFIG_M528x) := coldfire
cpuclass-$(CONFIG_M5307) := coldfire
cpuclass-$(CONFIG_M532x) := coldfire
cpuclass-$(CONFIG_M5407) := coldfire
-cpuclass-$(CONFIG_M54xx) := coldfire
+cpuclass-$(CONFIG_M548x) := coldfire
cpuclass-$(CONFIG_M68328) := 68328
cpuclass-$(CONFIG_M68EZ328) := 68328
cpuclass-$(CONFIG_M68VZ328) := 68328
@@ -91,18 +91,18 @@ export PLATFORM BOARD MODEL CPUCLASS
# Some CFLAG additions based on specific CPU type.
#
cflags-$(CONFIG_M5206) := $(call cc-option,-mcpu=5206,-m5200)
-cflags-$(CONFIG_M5206e) := $(call cc-option,-mcpu=5206e,-m5200)
+cflags-$(CONFIG_M5206e) := $(call cc-option,-m5206e,-m5200)
cflags-$(CONFIG_M520x) := $(call cc-option,-mcpu=5208,-m5200)
cflags-$(CONFIG_M523x) := $(call cc-option,-mcpu=523x,-m5307)
cflags-$(CONFIG_M5249) := $(call cc-option,-mcpu=5249,-m5200)
cflags-$(CONFIG_M5271) := $(call cc-option,-mcpu=5271,-m5307)
cflags-$(CONFIG_M5272) := $(call cc-option,-mcpu=5272,-m5307)
cflags-$(CONFIG_M5275) := $(call cc-option,-mcpu=5275,-m5307)
-cflags-$(CONFIG_M528x) := $(call cc-option,-mcpu=528x,-m5307)
-cflags-$(CONFIG_M5307) := $(call cc-option,-mcpu=5307,-m5200)
+cflags-$(CONFIG_M528x) := $(call cc-option,-m528x,-m5307)
+cflags-$(CONFIG_M5307) := $(call cc-option,-m5307,-m5200)
cflags-$(CONFIG_M532x) := $(call cc-option,-mcpu=532x,-m5307)
-cflags-$(CONFIG_M5407) := $(call cc-option,-mcpu=5407,-m5200)
-cflags-$(CONFIG_M54xx) := $(call cc-option,-mcpu=5475,-m5200)
+cflags-$(CONFIG_M5407) := $(call cc-option,-m5407,-m5200)
+cflags-$(CONFIG_M548x) := $(call cc-option,-m5407,-m5200)
cflags-$(CONFIG_M68328) := -m68000
cflags-$(CONFIG_M68EZ328) := -m68000
cflags-$(CONFIG_M68VZ328) := -m68000
diff --git a/trunk/arch/m68knommu/configs/m5208evb_defconfig b/trunk/arch/m68knommu/configs/m5208evb_defconfig
index 2f5655c577af..6ac2981a2cdf 100644
--- a/trunk/arch/m68knommu/configs/m5208evb_defconfig
+++ b/trunk/arch/m68knommu/configs/m5208evb_defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/m68knommu/configs/m5249evb_defconfig b/trunk/arch/m68knommu/configs/m5249evb_defconfig
index 16df72bfbd45..14934ff8d5c3 100644
--- a/trunk/arch/m68knommu/configs/m5249evb_defconfig
+++ b/trunk/arch/m68knommu/configs/m5249evb_defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/m68knommu/configs/m5272c3_defconfig b/trunk/arch/m68knommu/configs/m5272c3_defconfig
index 4e6ea50c7f33..5985a3b593d8 100644
--- a/trunk/arch/m68knommu/configs/m5272c3_defconfig
+++ b/trunk/arch/m68knommu/configs/m5272c3_defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/m68knommu/configs/m5275evb_defconfig b/trunk/arch/m68knommu/configs/m5275evb_defconfig
index f3dd74115a34..5a7857efb45d 100644
--- a/trunk/arch/m68knommu/configs/m5275evb_defconfig
+++ b/trunk/arch/m68knommu/configs/m5275evb_defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/m68knommu/configs/m5307c3_defconfig b/trunk/arch/m68knommu/configs/m5307c3_defconfig
index bce0a20c3737..e8102018c8d4 100644
--- a/trunk/arch/m68knommu/configs/m5307c3_defconfig
+++ b/trunk/arch/m68knommu/configs/m5307c3_defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/m68knommu/configs/m5407c3_defconfig b/trunk/arch/m68knommu/configs/m5407c3_defconfig
index 618cc32691f2..5c124a7ba2a7 100644
--- a/trunk/arch/m68knommu/configs/m5407c3_defconfig
+++ b/trunk/arch/m68knommu/configs/m5407c3_defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/m68knommu/defconfig b/trunk/arch/m68knommu/defconfig
index 2f5655c577af..6ac2981a2cdf 100644
--- a/trunk/arch/m68knommu/defconfig
+++ b/trunk/arch/m68knommu/defconfig
@@ -1,7 +1,7 @@
CONFIG_EXPERIMENTAL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
# CONFIG_FUTEX is not set
diff --git a/trunk/arch/m68knommu/kernel/setup.c b/trunk/arch/m68knommu/kernel/setup.c
index 16b2de7f5101..c684adf5dc40 100644
--- a/trunk/arch/m68knommu/kernel/setup.c
+++ b/trunk/arch/m68knommu/kernel/setup.c
@@ -55,29 +55,55 @@ void (*mach_halt)(void);
void (*mach_power_off)(void);
#ifdef CONFIG_M68328
-#define CPU_NAME "MC68328"
+ #define CPU "MC68328"
#endif
#ifdef CONFIG_M68EZ328
-#define CPU_NAME "MC68EZ328"
+ #define CPU "MC68EZ328"
#endif
#ifdef CONFIG_M68VZ328
-#define CPU_NAME "MC68VZ328"
+ #define CPU "MC68VZ328"
#endif
#ifdef CONFIG_M68360
-#define CPU_NAME "MC68360"
+ #define CPU "MC68360"
#endif
-#ifndef CPU_NAME
-#define CPU_NAME "UNKNOWN"
+#if defined(CONFIG_M5206)
+ #define CPU "COLDFIRE(m5206)"
#endif
-
-/*
- * Different cores have different instruction execution timings.
- * The old/traditional 68000 cores are basically all the same, at 16.
- * The ColdFire cores vary a little, their values are defined in their
- * headers. We default to the standard 68000 value here.
- */
-#ifndef CPU_INSTR_PER_JIFFY
-#define CPU_INSTR_PER_JIFFY 16
+#if defined(CONFIG_M5206e)
+ #define CPU "COLDFIRE(m5206e)"
+#endif
+#if defined(CONFIG_M520x)
+ #define CPU "COLDFIRE(m520x)"
+#endif
+#if defined(CONFIG_M523x)
+ #define CPU "COLDFIRE(m523x)"
+#endif
+#if defined(CONFIG_M5249)
+ #define CPU "COLDFIRE(m5249)"
+#endif
+#if defined(CONFIG_M5271)
+ #define CPU "COLDFIRE(m5270/5271)"
+#endif
+#if defined(CONFIG_M5272)
+ #define CPU "COLDFIRE(m5272)"
+#endif
+#if defined(CONFIG_M5275)
+ #define CPU "COLDFIRE(m5274/5275)"
+#endif
+#if defined(CONFIG_M528x)
+ #define CPU "COLDFIRE(m5280/5282)"
+#endif
+#if defined(CONFIG_M5307)
+ #define CPU "COLDFIRE(m5307)"
+#endif
+#if defined(CONFIG_M532x)
+ #define CPU "COLDFIRE(m532x)"
+#endif
+#if defined(CONFIG_M5407)
+ #define CPU "COLDFIRE(m5407)"
+#endif
+#ifndef CPU
+ #define CPU "UNKNOWN"
#endif
extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
@@ -182,7 +208,7 @@ void __init setup_arch(char **cmdline_p)
command_line[sizeof(command_line) - 1] = 0;
#endif /* CONFIG_UBOOT */
- printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU_NAME "\n");
+ printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU "\n");
#ifdef CONFIG_UCDIMM
printk(KERN_INFO "uCdimm by Lineo, Inc. \n");
@@ -231,6 +257,11 @@ void __init setup_arch(char **cmdline_p)
memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
boot_command_line[COMMAND_LINE_SIZE-1] = 0;
+#ifdef DEBUG
+ if (strlen(*cmdline_p))
+ printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p);
+#endif
+
#if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE)
conswitchp = &dummy_con;
#endif
@@ -272,10 +303,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
char *cpu, *mmu, *fpu;
u_long clockfreq;
- cpu = CPU_NAME;
+ cpu = CPU;
mmu = "none";
fpu = "none";
- clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
+
+#ifdef CONFIG_COLDFIRE
+ clockfreq = (loops_per_jiffy * HZ) * 3;
+#else
+ clockfreq = (loops_per_jiffy * HZ) * 16;
+#endif
seq_printf(m, "CPU:\t\t%s\n"
"MMU:\t\t%s\n"
diff --git a/trunk/arch/m68knommu/mm/Makefile b/trunk/arch/m68knommu/mm/Makefile
index b54ab6b4b523..fc91f254f51b 100644
--- a/trunk/arch/m68knommu/mm/Makefile
+++ b/trunk/arch/m68knommu/mm/Makefile
@@ -2,4 +2,4 @@
# Makefile for the linux m68knommu specific parts of the memory manager.
#
-obj-y += init.o kmap.o
+obj-y += init.o fault.o memory.o kmap.o
diff --git a/trunk/arch/m68knommu/mm/fault.c b/trunk/arch/m68knommu/mm/fault.c
new file mode 100644
index 000000000000..bc05cf74d9c0
--- /dev/null
+++ b/trunk/arch/m68knommu/mm/fault.c
@@ -0,0 +1,57 @@
+/*
+ * linux/arch/m68knommu/mm/fault.c
+ *
+ * Copyright (C) 1998 D. Jeff Dionne ,
+ * Copyright (C) 2000 Lineo, Inc. (www.lineo.com)
+ *
+ * Based on:
+ *
+ * linux/arch/m68k/mm/fault.c
+ *
+ * Copyright (C) 1995 Hamish Macdonald
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+extern void die_if_kernel(char *, struct pt_regs *, long);
+
+/*
+ * This routine handles page faults. It determines the problem, and
+ * then passes it off to one of the appropriate routines.
+ *
+ * error_code:
+ * bit 0 == 0 means no page found, 1 means protection fault
+ * bit 1 == 0 means read, 1 means write
+ *
+ * If this routine detects a bad access, it returns 1, otherwise it
+ * returns 0.
+ */
+asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
+ unsigned long error_code)
+{
+#ifdef DEBUG
+ printk(KERN_DEBUG "regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n",
+ regs->sr, regs->pc, address, error_code);
+#endif
+
+ /*
+ * Oops. The kernel tried to access some bad page. We'll have to
+ * terminate things with extreme prejudice.
+ */
+ if ((unsigned long) address < PAGE_SIZE)
+ printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
+ else
+ printk(KERN_ALERT "Unable to handle kernel access");
+ printk(KERN_ALERT " at virtual address %08lx\n", address);
+ die_if_kernel("Oops", regs, error_code);
+ do_exit(SIGKILL);
+
+ return 1;
+}
+
diff --git a/trunk/arch/m68knommu/mm/kmap.c b/trunk/arch/m68knommu/mm/kmap.c
index ece8d5ad4e6c..902c1dfda9e5 100644
--- a/trunk/arch/m68knommu/mm/kmap.c
+++ b/trunk/arch/m68knommu/mm/kmap.c
@@ -35,6 +35,15 @@ void iounmap(void *addr)
{
}
+/*
+ * __iounmap unmaps nearly everything, so be careful
+ * it doesn't free currently pointer/page tables anymore but it
+ * wans't used anyway and might be added later.
+ */
+void __iounmap(void *addr, unsigned long size)
+{
+}
+
/*
* Set new cache mode for some kernel address space.
* The caller must push data for that range itself, if such data may already
diff --git a/trunk/arch/m68knommu/mm/memory.c b/trunk/arch/m68knommu/mm/memory.c
new file mode 100644
index 000000000000..8f7949e786d4
--- /dev/null
+++ b/trunk/arch/m68knommu/mm/memory.c
@@ -0,0 +1,33 @@
+/*
+ * linux/arch/m68knommu/mm/memory.c
+ *
+ * Copyright (C) 1998 Kenneth Albanowski ,
+ * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ *
+ * Based on:
+ *
+ * linux/arch/m68k/mm/memory.c
+ *
+ * Copyright (C) 1995 Hamish Macdonald
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+/*
+ * Map some physical address range into the kernel address space.
+ */
+
+unsigned long kernel_map(unsigned long paddr, unsigned long size,
+ int nocacheflag, unsigned long *memavailp )
+{
+ return paddr;
+}
+
diff --git a/trunk/arch/m68knommu/platform/54xx/Makefile b/trunk/arch/m68knommu/platform/548x/Makefile
similarity index 100%
rename from trunk/arch/m68knommu/platform/54xx/Makefile
rename to trunk/arch/m68knommu/platform/548x/Makefile
diff --git a/trunk/arch/m68knommu/platform/54xx/config.c b/trunk/arch/m68knommu/platform/548x/config.c
similarity index 74%
rename from trunk/arch/m68knommu/platform/54xx/config.c
rename to trunk/arch/m68knommu/platform/548x/config.c
index 78130984db95..9888846bd1cf 100644
--- a/trunk/arch/m68knommu/platform/54xx/config.c
+++ b/trunk/arch/m68knommu/platform/548x/config.c
@@ -1,7 +1,7 @@
/***************************************************************************/
/*
- * linux/arch/m68knommu/platform/54xx/config.c
+ * linux/arch/m68knommu/platform/548x/config.c
*
* Copyright (C) 2010, Philippe De Muyter
*/
@@ -15,13 +15,13 @@
#include
#include
#include
-#include
+#include
#include
-#include
+#include
/***************************************************************************/
-static struct mcf_platform_uart m54xx_uart_platform[] = {
+static struct mcf_platform_uart m548x_uart_platform[] = {
{
.mapbase = MCF_MBAR + MCFUART_BASE1,
.irq = 64 + 35,
@@ -40,20 +40,20 @@ static struct mcf_platform_uart m54xx_uart_platform[] = {
},
};
-static struct platform_device m54xx_uart = {
+static struct platform_device m548x_uart = {
.name = "mcfuart",
.id = 0,
- .dev.platform_data = m54xx_uart_platform,
+ .dev.platform_data = m548x_uart_platform,
};
-static struct platform_device *m54xx_devices[] __initdata = {
- &m54xx_uart,
+static struct platform_device *m548x_devices[] __initdata = {
+ &m548x_uart,
};
/***************************************************************************/
-static void __init m54xx_uart_init_line(int line, int irq)
+static void __init m548x_uart_init_line(int line, int irq)
{
int rts_cts;
@@ -72,18 +72,18 @@ static void __init m54xx_uart_init_line(int line, int irq)
MCF_MBAR + MCF_PAR_PSC(line));
}
-static void __init m54xx_uarts_init(void)
+static void __init m548x_uarts_init(void)
{
- const int nrlines = ARRAY_SIZE(m54xx_uart_platform);
+ const int nrlines = ARRAY_SIZE(m548x_uart_platform);
int line;
for (line = 0; (line < nrlines); line++)
- m54xx_uart_init_line(line, m54xx_uart_platform[line].irq);
+ m548x_uart_init_line(line, m548x_uart_platform[line].irq);
}
/***************************************************************************/
-static void mcf54xx_reset(void)
+static void mcf548x_reset(void)
{
/* disable interrupts and enable the watchdog */
asm("movew #0x2700, %sr\n");
@@ -97,8 +97,8 @@ static void mcf54xx_reset(void)
void __init config_BSP(char *commandp, int size)
{
- mach_reset = mcf54xx_reset;
- m54xx_uarts_init();
+ mach_reset = mcf548x_reset;
+ m548x_uarts_init();
}
/***************************************************************************/
@@ -106,7 +106,7 @@ void __init config_BSP(char *commandp, int size)
static int __init init_BSP(void)
{
- platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices));
+ platform_add_devices(m548x_devices, ARRAY_SIZE(m548x_devices));
return 0;
}
diff --git a/trunk/arch/m68knommu/platform/68328/ints.c b/trunk/arch/m68knommu/platform/68328/ints.c
index 2a3af193ccd3..865852806a17 100644
--- a/trunk/arch/m68knommu/platform/68328/ints.c
+++ b/trunk/arch/m68knommu/platform/68328/ints.c
@@ -179,8 +179,8 @@ void __init init_IRQ(void)
IMR = ~0;
for (i = 0; (i < NR_IRQS); i++) {
- set_irq_chip(i, &intc_irq_chip);
- set_irq_handler(i, handle_level_irq);
+ set_irq_chip(irq, &intc_irq_chip);
+ set_irq_handler(irq, handle_level_irq);
}
}
diff --git a/trunk/arch/m68knommu/platform/coldfire/Makefile b/trunk/arch/m68knommu/platform/coldfire/Makefile
index a8967baabd72..45f501fa4525 100644
--- a/trunk/arch/m68knommu/platform/coldfire/Makefile
+++ b/trunk/arch/m68knommu/platform/coldfire/Makefile
@@ -14,7 +14,7 @@
asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o
+obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o
obj-$(CONFIG_M5206) += timers.o intc.o
obj-$(CONFIG_M5206e) += timers.o intc.o
obj-$(CONFIG_M520x) += pit.o intc-simr.o
@@ -26,7 +26,7 @@ obj-$(CONFIG_M528x) += pit.o intc-2.o
obj-$(CONFIG_M5307) += timers.o intc.o
obj-$(CONFIG_M532x) += timers.o intc-simr.o
obj-$(CONFIG_M5407) += timers.o intc.o
-obj-$(CONFIG_M54xx) += sltimers.o intc-2.o
+obj-$(CONFIG_M548x) += sltimers.o intc-2.o
obj-y += pinmux.o gpio.o
extra-y := head.o
diff --git a/trunk/arch/m68knommu/platform/coldfire/cache.c b/trunk/arch/m68knommu/platform/coldfire/cache.c
deleted file mode 100644
index 235d3c4f4f0f..000000000000
--- a/trunk/arch/m68knommu/platform/coldfire/cache.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/***************************************************************************/
-
-/*
- * cache.c -- general ColdFire Cache maintainence code
- *
- * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
- */
-
-/***************************************************************************/
-
-#include
-#include
-#include
-
-/***************************************************************************/
-#ifdef CACHE_PUSH
-/***************************************************************************/
-
-/*
- * Use cpushl to push all dirty cache lines back to memory.
- * Older versions of GAS don't seem to know how to generate the
- * ColdFire cpushl instruction... Oh well, bit stuff it for now.
- */
-
-void mcf_cache_push(void)
-{
- __asm__ __volatile__ (
- "clrl %%d0\n\t"
- "1:\n\t"
- "movel %%d0,%%a0\n\t"
- "2:\n\t"
- ".word 0xf468\n\t"
- "addl %0,%%a0\n\t"
- "cmpl %1,%%a0\n\t"
- "blt 2b\n\t"
- "addql #1,%%d0\n\t"
- "cmpil %2,%%d0\n\t"
- "bne 1b\n\t"
- : /* No output */
- : "i" (CACHE_LINE_SIZE),
- "i" (DCACHE_SIZE / CACHE_WAYS),
- "i" (CACHE_WAYS)
- : "d0", "a0" );
-}
-
-/***************************************************************************/
-#endif /* CACHE_PUSH */
-/***************************************************************************/
diff --git a/trunk/arch/m68knommu/platform/coldfire/entry.S b/trunk/arch/m68knommu/platform/coldfire/entry.S
index 4ddfc3da70d8..e1debc8285ef 100644
--- a/trunk/arch/m68knommu/platform/coldfire/entry.S
+++ b/trunk/arch/m68knommu/platform/coldfire/entry.S
@@ -36,16 +36,13 @@
#include
#include
-#ifdef CONFIG_COLDFIRE_SW_A7
-/*
- * Define software copies of the supervisor and user stack pointers.
- */
.bss
+
sw_ksp:
.long 0
+
sw_usp:
.long 0
-#endif /* CONFIG_COLDFIRE_SW_A7 */
.text
@@ -54,6 +51,7 @@ sw_usp:
.globl ret_from_exception
.globl ret_from_signal
.globl sys_call_table
+.globl ret_from_interrupt
.globl inthandler
.globl fasthandler
@@ -142,7 +140,20 @@ Luser_return:
jne Lwork_to_do /* still work to do */
Lreturn:
- RESTORE_USER
+ move #0x2700,%sr /* disable intrs */
+ movel sw_usp,%a0 /* get usp */
+ movel %sp@(PT_OFF_PC),%a0@- /* copy exception program counter */
+ movel %sp@(PT_OFF_FORMATVEC),%a0@- /* copy exception format/vector/sr */
+ moveml %sp@,%d1-%d5/%a0-%a2
+ lea %sp@(32),%sp /* space for 8 regs */
+ movel %sp@+,%d0
+ addql #4,%sp /* orig d0 */
+ addl %sp@+,%sp /* stk adj */
+ addql #8,%sp /* remove exception */
+ movel %sp,sw_ksp /* save ksp */
+ subql #8,sw_usp /* set exception */
+ movel sw_usp,%sp /* restore usp */
+ rte
Lwork_to_do:
movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
@@ -180,7 +191,31 @@ ENTRY(inthandler)
jbsr do_IRQ /* call high level irq handler */
lea %sp@(8),%sp /* pop args off stack */
- bra ret_from_exception
+ bra ret_from_interrupt /* this was fallthrough */
+
+/*
+ * This is the fast interrupt handler (for certain hardware interrupt
+ * sources). Unlike the normal interrupt handler it just uses the
+ * current stack (doesn't care if it is user or kernel). It also
+ * doesn't bother doing the bottom half handlers.
+ */
+ENTRY(fasthandler)
+ SAVE_LOCAL
+
+ movew %sp@(PT_OFF_FORMATVEC),%d0
+ andl #0x03fc,%d0 /* mask out vector only */
+
+ movel %sp,%sp@- /* push regs arg */
+ lsrl #2,%d0 /* calculate real vector # */
+ movel %d0,%sp@- /* push vector number */
+ jbsr do_IRQ /* call high level irq handler */
+ lea %sp@(8),%sp /* pop args off stack */
+
+ RESTORE_LOCAL
+
+ENTRY(ret_from_interrupt)
+ /* the fasthandler is confusing me, haven't seen any user */
+ jmp ret_from_exception
/*
* Beware - when entering resume, prev (the current task) is
@@ -191,8 +226,9 @@ ENTRY(inthandler)
*/
ENTRY(resume)
movel %a0, %d1 /* get prev thread in d1 */
- RDUSP
- movel %a2,%a0@(TASK_THREAD+THREAD_USP)
+
+ movel sw_usp,%d0 /* save usp */
+ movel %d0,%a0@(TASK_THREAD+THREAD_USP)
SAVE_SWITCH_STACK
movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
@@ -200,5 +236,5 @@ ENTRY(resume)
RESTORE_SWITCH_STACK
movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */
- WRUSP
+ movel %a0, sw_usp
rts
diff --git a/trunk/arch/m68knommu/platform/coldfire/head.S b/trunk/arch/m68knommu/platform/coldfire/head.S
index d5977909ae5f..0b2d7c7adf79 100644
--- a/trunk/arch/m68knommu/platform/coldfire/head.S
+++ b/trunk/arch/m68knommu/platform/coldfire/head.S
@@ -3,7 +3,7 @@
/*
* head.S -- common startup code for ColdFire CPUs.
*
- * (C) Copyright 1999-2010, Greg Ungerer .
+ * (C) Copyright 1999-2006, Greg Ungerer .
*/
/*****************************************************************************/
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
#include
#include
@@ -172,27 +173,10 @@ _start:
/*
* Now that we know what the memory is, lets enable cache
- * and get things moving. This is Coldfire CPU specific. Not
- * all version cores have identical cache register setup. But
- * it is very similar. Define the exact settings in the headers
- * then the code here is the same for all.
+ * and get things moving. This is Coldfire CPU specific.
*/
- movel #CACHE_INIT,%d0 /* invalidate whole cache */
- movec %d0,%CACR
- nop
- movel #ACR0_MODE,%d0 /* set RAM region for caching */
- movec %d0,%ACR0
- movel #ACR1_MODE,%d0 /* anything else to cache? */
- movec %d0,%ACR1
-#ifdef ACR2_MODE
- movel #ACR2_MODE,%d0
- movec %d0,%ACR2
- movel #ACR3_MODE,%d0
- movec %d0,%ACR3
-#endif
- movel #CACHE_MODE,%d0 /* enable cache */
- movec %d0,%CACR
- nop
+ CACHE_ENABLE /* enable CPU cache */
+
#ifdef CONFIG_ROMFS_FS
/*
diff --git a/trunk/arch/microblaze/Kconfig b/trunk/arch/microblaze/Kconfig
index 31680032053e..5f5018a71a3d 100644
--- a/trunk/arch/microblaze/Kconfig
+++ b/trunk/arch/microblaze/Kconfig
@@ -15,8 +15,6 @@ config MICROBLAZE
select TRACING_SUPPORT
select OF
select OF_EARLY_FLATTREE
- select HAVE_GENERIC_HARDIRQS
- select GENERIC_IRQ_PROBE
config SWAP
def_bool n
@@ -39,6 +37,12 @@ config GENERIC_FIND_NEXT_BIT
config GENERIC_HWEIGHT
def_bool y
+config GENERIC_HARDIRQS
+ def_bool y
+
+config GENERIC_IRQ_PROBE
+ def_bool y
+
config GENERIC_CALIBRATE_DELAY
def_bool y
@@ -48,6 +52,9 @@ config GENERIC_TIME_VSYSCALL
config GENERIC_CLOCKEVENTS
def_bool y
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ def_bool y
+
config GENERIC_GPIO
def_bool y
diff --git a/trunk/arch/microblaze/configs/mmu_defconfig b/trunk/arch/microblaze/configs/mmu_defconfig
index b3f5eecff2a7..ab8fbe7ad90b 100644
--- a/trunk/arch/microblaze/configs/mmu_defconfig
+++ b/trunk/arch/microblaze/configs/mmu_defconfig
@@ -7,7 +7,7 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
CONFIG_INITRAMFS_COMPRESSION_GZIP=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_HOTPLUG is not set
diff --git a/trunk/arch/microblaze/configs/nommu_defconfig b/trunk/arch/microblaze/configs/nommu_defconfig
index 0249e4b7e1d3..ebc143c5368e 100644
--- a/trunk/arch/microblaze/configs/nommu_defconfig
+++ b/trunk/arch/microblaze/configs/nommu_defconfig
@@ -6,7 +6,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_HOTPLUG is not set
diff --git a/trunk/arch/microblaze/include/asm/pgtable.h b/trunk/arch/microblaze/include/asm/pgtable.h
index b23f68075879..cae268c22ba2 100644
--- a/trunk/arch/microblaze/include/asm/pgtable.h
+++ b/trunk/arch/microblaze/include/asm/pgtable.h
@@ -444,9 +444,8 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
*ptep = pte;
}
-#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
-static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
- unsigned long address, pte_t *ptep)
+static inline int ptep_test_and_clear_young(struct mm_struct *mm,
+ unsigned long addr, pte_t *ptep)
{
return (pte_update(ptep, _PAGE_ACCESSED, 0) & _PAGE_ACCESSED) != 0;
}
@@ -458,7 +457,6 @@ static inline int ptep_test_and_clear_dirty(struct mm_struct *mm,
(_PAGE_DIRTY | _PAGE_HWWRITE), 0) & _PAGE_DIRTY) != 0;
}
-#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
unsigned long addr, pte_t *ptep)
{
diff --git a/trunk/arch/microblaze/include/asm/tlb.h b/trunk/arch/microblaze/include/asm/tlb.h
index 8aa97817cc8c..e8abd4a0349c 100644
--- a/trunk/arch/microblaze/include/asm/tlb.h
+++ b/trunk/arch/microblaze/include/asm/tlb.h
@@ -13,7 +13,6 @@
#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
-#include
#include
#ifdef CONFIG_MMU
diff --git a/trunk/arch/mips/Kbuild.platforms b/trunk/arch/mips/Kbuild.platforms
index 7ff9b5492041..78439b8a83c4 100644
--- a/trunk/arch/mips/Kbuild.platforms
+++ b/trunk/arch/mips/Kbuild.platforms
@@ -2,7 +2,6 @@
platforms += alchemy
platforms += ar7
-platforms += ath79
platforms += bcm47xx
platforms += bcm63xx
platforms += cavium-octeon
diff --git a/trunk/arch/mips/Kconfig b/trunk/arch/mips/Kconfig
index f5ecc0566bc2..f489ec30e071 100644
--- a/trunk/arch/mips/Kconfig
+++ b/trunk/arch/mips/Kconfig
@@ -21,7 +21,6 @@ config MIPS
select HAVE_DMA_API_DEBUG
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_PROBE
- select HAVE_ARCH_JUMP_LABEL
menu "Machine selection"
@@ -66,22 +65,6 @@ config AR7
Support for the Texas Instruments AR7 System-on-a-Chip
family: TNETD7100, 7200 and 7300.
-config ATH79
- bool "Atheros AR71XX/AR724X/AR913X based boards"
- select ARCH_REQUIRE_GPIOLIB
- select BOOT_RAW
- select CEVT_R4K
- select CSRC_R4K
- select DMA_NONCOHERENT
- select IRQ_CPU
- select MIPS_MACHINE
- select SYS_HAS_CPU_MIPS32_R2
- select SYS_HAS_EARLY_PRINTK
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- help
- Support for the Atheros AR71XX/AR724X/AR913X SoCs.
-
config BCM47XX
bool "Broadcom BCM47XX based boards"
select CEVT_R4K
@@ -734,7 +717,6 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
endchoice
source "arch/mips/alchemy/Kconfig"
-source "arch/mips/ath79/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/jz4740/Kconfig"
@@ -793,6 +775,9 @@ config SCHED_OMIT_FRAME_POINTER
bool
default y
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ def_bool y
+
#
# Select some configuration options automatically based on user selections.
#
@@ -898,9 +883,6 @@ config MIPS_DISABLE_OBSOLETE_IDE
config SYNC_R4K
bool
-config MIPS_MACHINE
- def_bool n
-
config NO_IOPORT
def_bool n
@@ -2418,20 +2400,4 @@ source "security/Kconfig"
source "crypto/Kconfig"
-menuconfig VIRTUALIZATION
- bool "Virtualization"
- default n
- ---help---
- Say Y here to get to see options for using your Linux host to run other
- operating systems inside virtual machines (guests).
- This option alone does not add any kernel code.
-
- If you say N, all options in this submenu will be skipped and disabled.
-
-if VIRTUALIZATION
-
-source drivers/virtio/Kconfig
-
-endif # VIRTUALIZATION
-
source "lib/Kconfig"
diff --git a/trunk/arch/mips/Kconfig.debug b/trunk/arch/mips/Kconfig.debug
index 5358f90b4dd2..f437cd1fafb8 100644
--- a/trunk/arch/mips/Kconfig.debug
+++ b/trunk/arch/mips/Kconfig.debug
@@ -7,7 +7,7 @@ config TRACE_IRQFLAGS_SUPPORT
source "lib/Kconfig.debug"
config EARLY_PRINTK
- bool "Early printk" if EXPERT
+ bool "Early printk" if EMBEDDED
depends on SYS_HAS_EARLY_PRINTK
default y
help
diff --git a/trunk/arch/mips/ath79/Kconfig b/trunk/arch/mips/ath79/Kconfig
deleted file mode 100644
index b05828260f7f..000000000000
--- a/trunk/arch/mips/ath79/Kconfig
+++ /dev/null
@@ -1,50 +0,0 @@
-if ATH79
-
-menu "Atheros AR71XX/AR724X/AR913X machine selection"
-
-config ATH79_MACH_AP81
- bool "Atheros AP81 reference board"
- select SOC_AR913X
- select ATH79_DEV_AR913X_WMAC
- select ATH79_DEV_GPIO_BUTTONS
- select ATH79_DEV_LEDS_GPIO
- select ATH79_DEV_SPI
- help
- Say 'Y' here if you want your kernel to support the
- Atheros AP81 reference board.
-
-config ATH79_MACH_PB44
- bool "Atheros PB44 reference board"
- select SOC_AR71XX
- select ATH79_DEV_GPIO_BUTTONS
- select ATH79_DEV_LEDS_GPIO
- select ATH79_DEV_SPI
- help
- Say 'Y' here if you want your kernel to support the
- Atheros PB44 reference board.
-
-endmenu
-
-config SOC_AR71XX
- def_bool n
-
-config SOC_AR724X
- def_bool n
-
-config SOC_AR913X
- def_bool n
-
-config ATH79_DEV_AR913X_WMAC
- depends on SOC_AR913X
- def_bool n
-
-config ATH79_DEV_GPIO_BUTTONS
- def_bool n
-
-config ATH79_DEV_LEDS_GPIO
- def_bool n
-
-config ATH79_DEV_SPI
- def_bool n
-
-endif
diff --git a/trunk/arch/mips/ath79/Makefile b/trunk/arch/mips/ath79/Makefile
deleted file mode 100644
index c33d4653007c..000000000000
--- a/trunk/arch/mips/ath79/Makefile
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# Makefile for the Atheros AR71XX/AR724X/AR913X specific parts of the kernel
-#
-# Copyright (C) 2008-2011 Gabor Juhos
-# Copyright (C) 2008 Imre Kaloz
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 as published
-# by the Free Software Foundation.
-
-obj-y := prom.o setup.o irq.o common.o clock.o gpio.o
-
-obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
-#
-# Devices
-#
-obj-y += dev-common.o
-obj-$(CONFIG_ATH79_DEV_AR913X_WMAC) += dev-ar913x-wmac.o
-obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o
-obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o
-obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o
-
-#
-# Machines
-#
-obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
-obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
diff --git a/trunk/arch/mips/ath79/Platform b/trunk/arch/mips/ath79/Platform
deleted file mode 100644
index 2bd663647d27..000000000000
--- a/trunk/arch/mips/ath79/Platform
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Atheros AR71xx/AR724x/AR913x
-#
-
-platform-$(CONFIG_ATH79) += ath79/
-cflags-$(CONFIG_ATH79) += -I$(srctree)/arch/mips/include/asm/mach-ath79
-load-$(CONFIG_ATH79) = 0xffffffff80060000
diff --git a/trunk/arch/mips/ath79/clock.c b/trunk/arch/mips/ath79/clock.c
deleted file mode 100644
index 680bde99a26c..000000000000
--- a/trunk/arch/mips/ath79/clock.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X common routines
- *
- * Copyright (C) 2011 Gabor Juhos
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include
-#include "common.h"
-
-#define AR71XX_BASE_FREQ 40000000
-#define AR724X_BASE_FREQ 5000000
-#define AR913X_BASE_FREQ 5000000
-
-struct clk {
- unsigned long rate;
-};
-
-static struct clk ath79_ref_clk;
-static struct clk ath79_cpu_clk;
-static struct clk ath79_ddr_clk;
-static struct clk ath79_ahb_clk;
-static struct clk ath79_wdt_clk;
-static struct clk ath79_uart_clk;
-
-static void __init ar71xx_clocks_init(void)
-{
- u32 pll;
- u32 freq;
- u32 div;
-
- ath79_ref_clk.rate = AR71XX_BASE_FREQ;
-
- pll = ath79_pll_rr(AR71XX_PLL_REG_CPU_CONFIG);
-
- div = ((pll >> AR71XX_PLL_DIV_SHIFT) & AR71XX_PLL_DIV_MASK) + 1;
- freq = div * ath79_ref_clk.rate;
-
- div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1;
- ath79_cpu_clk.rate = freq / div;
-
- div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1;
- ath79_ddr_clk.rate = freq / div;
-
- div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2;
- ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;
-
- ath79_wdt_clk.rate = ath79_ahb_clk.rate;
- ath79_uart_clk.rate = ath79_ahb_clk.rate;
-}
-
-static void __init ar724x_clocks_init(void)
-{
- u32 pll;
- u32 freq;
- u32 div;
-
- ath79_ref_clk.rate = AR724X_BASE_FREQ;
- pll = ath79_pll_rr(AR724X_PLL_REG_CPU_CONFIG);
-
- div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK);
- freq = div * ath79_ref_clk.rate;
-
- div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK);
- freq *= div;
-
- ath79_cpu_clk.rate = freq;
-
- div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1;
- ath79_ddr_clk.rate = freq / div;
-
- div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2;
- ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;
-
- ath79_wdt_clk.rate = ath79_ahb_clk.rate;
- ath79_uart_clk.rate = ath79_ahb_clk.rate;
-}
-
-static void __init ar913x_clocks_init(void)
-{
- u32 pll;
- u32 freq;
- u32 div;
-
- ath79_ref_clk.rate = AR913X_BASE_FREQ;
- pll = ath79_pll_rr(AR913X_PLL_REG_CPU_CONFIG);
-
- div = ((pll >> AR913X_PLL_DIV_SHIFT) & AR913X_PLL_DIV_MASK);
- freq = div * ath79_ref_clk.rate;
-
- ath79_cpu_clk.rate = freq;
-
- div = ((pll >> AR913X_DDR_DIV_SHIFT) & AR913X_DDR_DIV_MASK) + 1;
- ath79_ddr_clk.rate = freq / div;
-
- div = (((pll >> AR913X_AHB_DIV_SHIFT) & AR913X_AHB_DIV_MASK) + 1) * 2;
- ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;
-
- ath79_wdt_clk.rate = ath79_ahb_clk.rate;
- ath79_uart_clk.rate = ath79_ahb_clk.rate;
-}
-
-void __init ath79_clocks_init(void)
-{
- if (soc_is_ar71xx())
- ar71xx_clocks_init();
- else if (soc_is_ar724x())
- ar724x_clocks_init();
- else if (soc_is_ar913x())
- ar913x_clocks_init();
- else
- BUG();
-
- pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, "
- "Ref:%lu.%03luMHz",
- ath79_cpu_clk.rate / 1000000,
- (ath79_cpu_clk.rate / 1000) % 1000,
- ath79_ddr_clk.rate / 1000000,
- (ath79_ddr_clk.rate / 1000) % 1000,
- ath79_ahb_clk.rate / 1000000,
- (ath79_ahb_clk.rate / 1000) % 1000,
- ath79_ref_clk.rate / 1000000,
- (ath79_ref_clk.rate / 1000) % 1000);
-}
-
-/*
- * Linux clock API
- */
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (!strcmp(id, "ref"))
- return &ath79_ref_clk;
-
- if (!strcmp(id, "cpu"))
- return &ath79_cpu_clk;
-
- if (!strcmp(id, "ddr"))
- return &ath79_ddr_clk;
-
- if (!strcmp(id, "ahb"))
- return &ath79_ahb_clk;
-
- if (!strcmp(id, "wdt"))
- return &ath79_wdt_clk;
-
- if (!strcmp(id, "uart"))
- return &ath79_uart_clk;
-
- return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-int clk_enable(struct clk *clk)
-{
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
diff --git a/trunk/arch/mips/ath79/common.c b/trunk/arch/mips/ath79/common.c
deleted file mode 100644
index 58f60e722a03..000000000000
--- a/trunk/arch/mips/ath79/common.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X common routines
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-#include
-
-#include
-#include
-#include "common.h"
-
-static DEFINE_SPINLOCK(ath79_device_reset_lock);
-
-u32 ath79_cpu_freq;
-EXPORT_SYMBOL_GPL(ath79_cpu_freq);
-
-u32 ath79_ahb_freq;
-EXPORT_SYMBOL_GPL(ath79_ahb_freq);
-
-u32 ath79_ddr_freq;
-EXPORT_SYMBOL_GPL(ath79_ddr_freq);
-
-enum ath79_soc_type ath79_soc;
-
-void __iomem *ath79_pll_base;
-void __iomem *ath79_reset_base;
-EXPORT_SYMBOL_GPL(ath79_reset_base);
-void __iomem *ath79_ddr_base;
-
-void ath79_ddr_wb_flush(u32 reg)
-{
- void __iomem *flush_reg = ath79_ddr_base + reg;
-
- /* Flush the DDR write buffer. */
- __raw_writel(0x1, flush_reg);
- while (__raw_readl(flush_reg) & 0x1)
- ;
-
- /* It must be run twice. */
- __raw_writel(0x1, flush_reg);
- while (__raw_readl(flush_reg) & 0x1)
- ;
-}
-EXPORT_SYMBOL_GPL(ath79_ddr_wb_flush);
-
-void ath79_device_reset_set(u32 mask)
-{
- unsigned long flags;
- u32 reg;
- u32 t;
-
- if (soc_is_ar71xx())
- reg = AR71XX_RESET_REG_RESET_MODULE;
- else if (soc_is_ar724x())
- reg = AR724X_RESET_REG_RESET_MODULE;
- else if (soc_is_ar913x())
- reg = AR913X_RESET_REG_RESET_MODULE;
- else
- BUG();
-
- spin_lock_irqsave(&ath79_device_reset_lock, flags);
- t = ath79_reset_rr(reg);
- ath79_reset_wr(reg, t | mask);
- spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
-}
-EXPORT_SYMBOL_GPL(ath79_device_reset_set);
-
-void ath79_device_reset_clear(u32 mask)
-{
- unsigned long flags;
- u32 reg;
- u32 t;
-
- if (soc_is_ar71xx())
- reg = AR71XX_RESET_REG_RESET_MODULE;
- else if (soc_is_ar724x())
- reg = AR724X_RESET_REG_RESET_MODULE;
- else if (soc_is_ar913x())
- reg = AR913X_RESET_REG_RESET_MODULE;
- else
- BUG();
-
- spin_lock_irqsave(&ath79_device_reset_lock, flags);
- t = ath79_reset_rr(reg);
- ath79_reset_wr(reg, t & ~mask);
- spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
-}
-EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
diff --git a/trunk/arch/mips/ath79/common.h b/trunk/arch/mips/ath79/common.h
deleted file mode 100644
index 561906c2345e..000000000000
--- a/trunk/arch/mips/ath79/common.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X common definitions
- *
- * Copyright (C) 2008-2011 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * Parts of this file are based on Atheros' 2.6.15 BSP
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef __ATH79_COMMON_H
-#define __ATH79_COMMON_H
-
-#include
-#include
-
-#define ATH79_MEM_SIZE_MIN (2 * 1024 * 1024)
-#define ATH79_MEM_SIZE_MAX (128 * 1024 * 1024)
-
-void ath79_clocks_init(void);
-void ath79_ddr_wb_flush(unsigned int reg);
-
-void ath79_gpio_function_enable(u32 mask);
-void ath79_gpio_function_disable(u32 mask);
-void ath79_gpio_function_setup(u32 set, u32 clear);
-void ath79_gpio_init(void);
-
-#endif /* __ATH79_COMMON_H */
diff --git a/trunk/arch/mips/ath79/dev-ar913x-wmac.c b/trunk/arch/mips/ath79/dev-ar913x-wmac.c
deleted file mode 100644
index 48f425a5ba28..000000000000
--- a/trunk/arch/mips/ath79/dev-ar913x-wmac.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Atheros AR913X SoC built-in WMAC device support
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include
-#include "dev-ar913x-wmac.h"
-
-static struct ath9k_platform_data ar913x_wmac_data;
-
-static struct resource ar913x_wmac_resources[] = {
- {
- .start = AR913X_WMAC_BASE,
- .end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = ATH79_CPU_IRQ_IP2,
- .end = ATH79_CPU_IRQ_IP2,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device ar913x_wmac_device = {
- .name = "ath9k",
- .id = -1,
- .resource = ar913x_wmac_resources,
- .num_resources = ARRAY_SIZE(ar913x_wmac_resources),
- .dev = {
- .platform_data = &ar913x_wmac_data,
- },
-};
-
-void __init ath79_register_ar913x_wmac(u8 *cal_data)
-{
- if (cal_data)
- memcpy(ar913x_wmac_data.eeprom_data, cal_data,
- sizeof(ar913x_wmac_data.eeprom_data));
-
- /* reset the WMAC */
- ath79_device_reset_set(AR913X_RESET_AMBA2WMAC);
- mdelay(10);
-
- ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC);
- mdelay(10);
-
- platform_device_register(&ar913x_wmac_device);
-}
diff --git a/trunk/arch/mips/ath79/dev-ar913x-wmac.h b/trunk/arch/mips/ath79/dev-ar913x-wmac.h
deleted file mode 100644
index 579d562bbda8..000000000000
--- a/trunk/arch/mips/ath79/dev-ar913x-wmac.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Atheros AR913X SoC built-in WMAC device support
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef _ATH79_DEV_AR913X_WMAC_H
-#define _ATH79_DEV_AR913X_WMAC_H
-
-void ath79_register_ar913x_wmac(u8 *cal_data);
-
-#endif /* _ATH79_DEV_AR913X_WMAC_H */
diff --git a/trunk/arch/mips/ath79/dev-common.c b/trunk/arch/mips/ath79/dev-common.c
deleted file mode 100644
index 3b82e325bebf..000000000000
--- a/trunk/arch/mips/ath79/dev-common.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X common devices
- *
- * Copyright (C) 2008-2011 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * Parts of this file are based on Atheros' 2.6.15 BSP
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include
-#include "common.h"
-#include "dev-common.h"
-
-static struct resource ath79_uart_resources[] = {
- {
- .start = AR71XX_UART_BASE,
- .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
-static struct plat_serial8250_port ath79_uart_data[] = {
- {
- .mapbase = AR71XX_UART_BASE,
- .irq = ATH79_MISC_IRQ_UART,
- .flags = AR71XX_UART_FLAGS,
- .iotype = UPIO_MEM32,
- .regshift = 2,
- }, {
- /* terminating entry */
- }
-};
-
-static struct platform_device ath79_uart_device = {
- .name = "serial8250",
- .id = PLAT8250_DEV_PLATFORM,
- .resource = ath79_uart_resources,
- .num_resources = ARRAY_SIZE(ath79_uart_resources),
- .dev = {
- .platform_data = ath79_uart_data
- },
-};
-
-void __init ath79_register_uart(void)
-{
- struct clk *clk;
-
- clk = clk_get(NULL, "uart");
- if (IS_ERR(clk))
- panic("unable to get UART clock, err=%ld", PTR_ERR(clk));
-
- ath79_uart_data[0].uartclk = clk_get_rate(clk);
- platform_device_register(&ath79_uart_device);
-}
-
-static struct platform_device ath79_wdt_device = {
- .name = "ath79-wdt",
- .id = -1,
-};
-
-void __init ath79_register_wdt(void)
-{
- platform_device_register(&ath79_wdt_device);
-}
diff --git a/trunk/arch/mips/ath79/dev-common.h b/trunk/arch/mips/ath79/dev-common.h
deleted file mode 100644
index 0f514e1affce..000000000000
--- a/trunk/arch/mips/ath79/dev-common.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X common devices
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef _ATH79_DEV_COMMON_H
-#define _ATH79_DEV_COMMON_H
-
-void ath79_register_uart(void);
-void ath79_register_wdt(void);
-
-#endif /* _ATH79_DEV_COMMON_H */
diff --git a/trunk/arch/mips/ath79/dev-gpio-buttons.c b/trunk/arch/mips/ath79/dev-gpio-buttons.c
deleted file mode 100644
index 4b0168a11c01..000000000000
--- a/trunk/arch/mips/ath79/dev-gpio-buttons.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X GPIO button support
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include "linux/init.h"
-#include "linux/slab.h"
-#include
-
-#include "dev-gpio-buttons.h"
-
-void __init ath79_register_gpio_keys_polled(int id,
- unsigned poll_interval,
- unsigned nbuttons,
- struct gpio_keys_button *buttons)
-{
- struct platform_device *pdev;
- struct gpio_keys_platform_data pdata;
- struct gpio_keys_button *p;
- int err;
-
- p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
- if (!p)
- return;
-
- memcpy(p, buttons, nbuttons * sizeof(*p));
-
- pdev = platform_device_alloc("gpio-keys-polled", id);
- if (!pdev)
- goto err_free_buttons;
-
- memset(&pdata, 0, sizeof(pdata));
- pdata.poll_interval = poll_interval;
- pdata.nbuttons = nbuttons;
- pdata.buttons = p;
-
- err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
- if (err)
- goto err_put_pdev;
-
- err = platform_device_add(pdev);
- if (err)
- goto err_put_pdev;
-
- return;
-
-err_put_pdev:
- platform_device_put(pdev);
-
-err_free_buttons:
- kfree(p);
-}
diff --git a/trunk/arch/mips/ath79/dev-gpio-buttons.h b/trunk/arch/mips/ath79/dev-gpio-buttons.h
deleted file mode 100644
index 481847ac1cba..000000000000
--- a/trunk/arch/mips/ath79/dev-gpio-buttons.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X GPIO button support
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef _ATH79_DEV_GPIO_BUTTONS_H
-#define _ATH79_DEV_GPIO_BUTTONS_H
-
-#include
-#include
-
-void ath79_register_gpio_keys_polled(int id,
- unsigned poll_interval,
- unsigned nbuttons,
- struct gpio_keys_button *buttons);
-
-#endif /* _ATH79_DEV_GPIO_BUTTONS_H */
diff --git a/trunk/arch/mips/ath79/dev-leds-gpio.c b/trunk/arch/mips/ath79/dev-leds-gpio.c
deleted file mode 100644
index cdade68dcd17..000000000000
--- a/trunk/arch/mips/ath79/dev-leds-gpio.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X common GPIO LEDs support
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-
-#include "dev-leds-gpio.h"
-
-void __init ath79_register_leds_gpio(int id,
- unsigned num_leds,
- struct gpio_led *leds)
-{
- struct platform_device *pdev;
- struct gpio_led_platform_data pdata;
- struct gpio_led *p;
- int err;
-
- p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
- if (!p)
- return;
-
- memcpy(p, leds, num_leds * sizeof(*p));
-
- pdev = platform_device_alloc("leds-gpio", id);
- if (!pdev)
- goto err_free_leds;
-
- memset(&pdata, 0, sizeof(pdata));
- pdata.num_leds = num_leds;
- pdata.leds = p;
-
- err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
- if (err)
- goto err_put_pdev;
-
- err = platform_device_add(pdev);
- if (err)
- goto err_put_pdev;
-
- return;
-
-err_put_pdev:
- platform_device_put(pdev);
-
-err_free_leds:
- kfree(p);
-}
diff --git a/trunk/arch/mips/ath79/dev-leds-gpio.h b/trunk/arch/mips/ath79/dev-leds-gpio.h
deleted file mode 100644
index 6e5d8851ebcf..000000000000
--- a/trunk/arch/mips/ath79/dev-leds-gpio.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X common GPIO LEDs support
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef _ATH79_DEV_LEDS_GPIO_H
-#define _ATH79_DEV_LEDS_GPIO_H
-
-#include
-
-void ath79_register_leds_gpio(int id,
- unsigned num_leds,
- struct gpio_led *leds);
-
-#endif /* _ATH79_DEV_LEDS_GPIO_H */
diff --git a/trunk/arch/mips/ath79/dev-spi.c b/trunk/arch/mips/ath79/dev-spi.c
deleted file mode 100644
index aa30163efbfd..000000000000
--- a/trunk/arch/mips/ath79/dev-spi.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X SPI controller device
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include "dev-spi.h"
-
-static struct resource ath79_spi_resources[] = {
- {
- .start = AR71XX_SPI_BASE,
- .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device ath79_spi_device = {
- .name = "ath79-spi",
- .id = -1,
- .resource = ath79_spi_resources,
- .num_resources = ARRAY_SIZE(ath79_spi_resources),
-};
-
-void __init ath79_register_spi(struct ath79_spi_platform_data *pdata,
- struct spi_board_info const *info,
- unsigned n)
-{
- spi_register_board_info(info, n);
- ath79_spi_device.dev.platform_data = pdata;
- platform_device_register(&ath79_spi_device);
-}
diff --git a/trunk/arch/mips/ath79/dev-spi.h b/trunk/arch/mips/ath79/dev-spi.h
deleted file mode 100644
index d732565ca736..000000000000
--- a/trunk/arch/mips/ath79/dev-spi.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X SPI controller device
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef _ATH79_DEV_SPI_H
-#define _ATH79_DEV_SPI_H
-
-#include
-#include
-
-void ath79_register_spi(struct ath79_spi_platform_data *pdata,
- struct spi_board_info const *info,
- unsigned n);
-
-#endif /* _ATH79_DEV_SPI_H */
diff --git a/trunk/arch/mips/ath79/early_printk.c b/trunk/arch/mips/ath79/early_printk.c
deleted file mode 100644
index 7499b0e9df26..000000000000
--- a/trunk/arch/mips/ath79/early_printk.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X SoC early printk support
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-
-#include
-
-static inline void prom_wait_thre(void __iomem *base)
-{
- u32 lsr;
-
- do {
- lsr = __raw_readl(base + UART_LSR * 4);
- if (lsr & UART_LSR_THRE)
- break;
- } while (1);
-}
-
-void prom_putchar(unsigned char ch)
-{
- void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
-
- prom_wait_thre(base);
- __raw_writel(ch, base + UART_TX * 4);
- prom_wait_thre(base);
-}
diff --git a/trunk/arch/mips/ath79/gpio.c b/trunk/arch/mips/ath79/gpio.c
deleted file mode 100644
index a0c426b82123..000000000000
--- a/trunk/arch/mips/ath79/gpio.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X GPIO API support
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include
-#include "common.h"
-
-static void __iomem *ath79_gpio_base;
-static unsigned long ath79_gpio_count;
-static DEFINE_SPINLOCK(ath79_gpio_lock);
-
-static void __ath79_gpio_set_value(unsigned gpio, int value)
-{
- void __iomem *base = ath79_gpio_base;
-
- if (value)
- __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_SET);
- else
- __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_CLEAR);
-}
-
-static int __ath79_gpio_get_value(unsigned gpio)
-{
- return (__raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_IN) >> gpio) & 1;
-}
-
-static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned offset)
-{
- return __ath79_gpio_get_value(offset);
-}
-
-static void ath79_gpio_set_value(struct gpio_chip *chip,
- unsigned offset, int value)
-{
- __ath79_gpio_set_value(offset, value);
-}
-
-static int ath79_gpio_direction_input(struct gpio_chip *chip,
- unsigned offset)
-{
- void __iomem *base = ath79_gpio_base;
- unsigned long flags;
-
- spin_lock_irqsave(&ath79_gpio_lock, flags);
-
- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset),
- base + AR71XX_GPIO_REG_OE);
-
- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
-
- return 0;
-}
-
-static int ath79_gpio_direction_output(struct gpio_chip *chip,
- unsigned offset, int value)
-{
- void __iomem *base = ath79_gpio_base;
- unsigned long flags;
-
- spin_lock_irqsave(&ath79_gpio_lock, flags);
-
- if (value)
- __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET);
- else
- __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR);
-
- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset),
- base + AR71XX_GPIO_REG_OE);
-
- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
-
- return 0;
-}
-
-static struct gpio_chip ath79_gpio_chip = {
- .label = "ath79",
- .get = ath79_gpio_get_value,
- .set = ath79_gpio_set_value,
- .direction_input = ath79_gpio_direction_input,
- .direction_output = ath79_gpio_direction_output,
- .base = 0,
-};
-
-void ath79_gpio_function_enable(u32 mask)
-{
- void __iomem *base = ath79_gpio_base;
- unsigned long flags;
-
- spin_lock_irqsave(&ath79_gpio_lock, flags);
-
- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) | mask,
- base + AR71XX_GPIO_REG_FUNC);
- /* flush write */
- __raw_readl(base + AR71XX_GPIO_REG_FUNC);
-
- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
-}
-
-void ath79_gpio_function_disable(u32 mask)
-{
- void __iomem *base = ath79_gpio_base;
- unsigned long flags;
-
- spin_lock_irqsave(&ath79_gpio_lock, flags);
-
- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~mask,
- base + AR71XX_GPIO_REG_FUNC);
- /* flush write */
- __raw_readl(base + AR71XX_GPIO_REG_FUNC);
-
- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
-}
-
-void ath79_gpio_function_setup(u32 set, u32 clear)
-{
- void __iomem *base = ath79_gpio_base;
- unsigned long flags;
-
- spin_lock_irqsave(&ath79_gpio_lock, flags);
-
- __raw_writel((__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~clear) | set,
- base + AR71XX_GPIO_REG_FUNC);
- /* flush write */
- __raw_readl(base + AR71XX_GPIO_REG_FUNC);
-
- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
-}
-
-void __init ath79_gpio_init(void)
-{
- int err;
-
- if (soc_is_ar71xx())
- ath79_gpio_count = AR71XX_GPIO_COUNT;
- else if (soc_is_ar724x())
- ath79_gpio_count = AR724X_GPIO_COUNT;
- else if (soc_is_ar913x())
- ath79_gpio_count = AR913X_GPIO_COUNT;
- else
- BUG();
-
- ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
- ath79_gpio_chip.ngpio = ath79_gpio_count;
-
- err = gpiochip_add(&ath79_gpio_chip);
- if (err)
- panic("cannot add AR71xx GPIO chip, error=%d", err);
-}
-
-int gpio_get_value(unsigned gpio)
-{
- if (gpio < ath79_gpio_count)
- return __ath79_gpio_get_value(gpio);
-
- return __gpio_get_value(gpio);
-}
-EXPORT_SYMBOL(gpio_get_value);
-
-void gpio_set_value(unsigned gpio, int value)
-{
- if (gpio < ath79_gpio_count)
- __ath79_gpio_set_value(gpio, value);
- else
- __gpio_set_value(gpio, value);
-}
-EXPORT_SYMBOL(gpio_set_value);
-
-int gpio_to_irq(unsigned gpio)
-{
- /* FIXME */
- return -EINVAL;
-}
-EXPORT_SYMBOL(gpio_to_irq);
-
-int irq_to_gpio(unsigned irq)
-{
- /* FIXME */
- return -EINVAL;
-}
-EXPORT_SYMBOL(irq_to_gpio);
diff --git a/trunk/arch/mips/ath79/irq.c b/trunk/arch/mips/ath79/irq.c
deleted file mode 100644
index 1bf7f719ba53..000000000000
--- a/trunk/arch/mips/ath79/irq.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * Atheros AR71xx/AR724x/AR913x specific interrupt handling
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * Parts of this file are based on Atheros' 2.6.15 BSP
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-#include
-
-#include
-#include
-
-#include
-#include
-#include "common.h"
-
-static unsigned int ath79_ip2_flush_reg;
-static unsigned int ath79_ip3_flush_reg;
-
-static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
-{
- void __iomem *base = ath79_reset_base;
- u32 pending;
-
- pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) &
- __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
-
- if (pending & MISC_INT_UART)
- generic_handle_irq(ATH79_MISC_IRQ_UART);
-
- else if (pending & MISC_INT_DMA)
- generic_handle_irq(ATH79_MISC_IRQ_DMA);
-
- else if (pending & MISC_INT_PERFC)
- generic_handle_irq(ATH79_MISC_IRQ_PERFC);
-
- else if (pending & MISC_INT_TIMER)
- generic_handle_irq(ATH79_MISC_IRQ_TIMER);
-
- else if (pending & MISC_INT_OHCI)
- generic_handle_irq(ATH79_MISC_IRQ_OHCI);
-
- else if (pending & MISC_INT_ERROR)
- generic_handle_irq(ATH79_MISC_IRQ_ERROR);
-
- else if (pending & MISC_INT_GPIO)
- generic_handle_irq(ATH79_MISC_IRQ_GPIO);
-
- else if (pending & MISC_INT_WDOG)
- generic_handle_irq(ATH79_MISC_IRQ_WDOG);
-
- else
- spurious_interrupt();
-}
-
-static void ar71xx_misc_irq_unmask(unsigned int irq)
-{
- void __iomem *base = ath79_reset_base;
- u32 t;
-
- irq -= ATH79_MISC_IRQ_BASE;
-
- t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
- __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
-
- /* flush write */
- __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
-}
-
-static void ar71xx_misc_irq_mask(unsigned int irq)
-{
- void __iomem *base = ath79_reset_base;
- u32 t;
-
- irq -= ATH79_MISC_IRQ_BASE;
-
- t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
-
- /* flush write */
- __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
-}
-
-static void ar724x_misc_irq_ack(unsigned int irq)
-{
- void __iomem *base = ath79_reset_base;
- u32 t;
-
- irq -= ATH79_MISC_IRQ_BASE;
-
- t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
-
- /* flush write */
- __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
-}
-
-static struct irq_chip ath79_misc_irq_chip = {
- .name = "MISC",
- .unmask = ar71xx_misc_irq_unmask,
- .mask = ar71xx_misc_irq_mask,
-};
-
-static void __init ath79_misc_irq_init(void)
-{
- void __iomem *base = ath79_reset_base;
- int i;
-
- __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
- __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
-
- if (soc_is_ar71xx() || soc_is_ar913x())
- ath79_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
- else if (soc_is_ar724x())
- ath79_misc_irq_chip.ack = ar724x_misc_irq_ack;
- else
- BUG();
-
- for (i = ATH79_MISC_IRQ_BASE;
- i < ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- set_irq_chip_and_handler(i, &ath79_misc_irq_chip,
- handle_level_irq);
- }
-
- set_irq_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler);
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned long pending;
-
- pending = read_c0_status() & read_c0_cause() & ST0_IM;
-
- if (pending & STATUSF_IP7)
- do_IRQ(ATH79_CPU_IRQ_TIMER);
-
- else if (pending & STATUSF_IP2) {
- ath79_ddr_wb_flush(ath79_ip2_flush_reg);
- do_IRQ(ATH79_CPU_IRQ_IP2);
- }
-
- else if (pending & STATUSF_IP4)
- do_IRQ(ATH79_CPU_IRQ_GE0);
-
- else if (pending & STATUSF_IP5)
- do_IRQ(ATH79_CPU_IRQ_GE1);
-
- else if (pending & STATUSF_IP3) {
- ath79_ddr_wb_flush(ath79_ip3_flush_reg);
- do_IRQ(ATH79_CPU_IRQ_USB);
- }
-
- else if (pending & STATUSF_IP6)
- do_IRQ(ATH79_CPU_IRQ_MISC);
-
- else
- spurious_interrupt();
-}
-
-void __init arch_init_irq(void)
-{
- if (soc_is_ar71xx()) {
- ath79_ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI;
- ath79_ip3_flush_reg = AR71XX_DDR_REG_FLUSH_USB;
- } else if (soc_is_ar724x()) {
- ath79_ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE;
- ath79_ip3_flush_reg = AR724X_DDR_REG_FLUSH_USB;
- } else if (soc_is_ar913x()) {
- ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC;
- ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB;
- } else
- BUG();
-
- cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC;
- mips_cpu_irq_init();
- ath79_misc_irq_init();
-}
diff --git a/trunk/arch/mips/ath79/mach-ap81.c b/trunk/arch/mips/ath79/mach-ap81.c
deleted file mode 100644
index eee4c121deb4..000000000000
--- a/trunk/arch/mips/ath79/mach-ap81.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * Atheros AP81 board support
- *
- * Copyright (C) 2009-2010 Gabor Juhos
- * Copyright (C) 2009 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include "machtypes.h"
-#include "dev-ar913x-wmac.h"
-#include "dev-gpio-buttons.h"
-#include "dev-leds-gpio.h"
-#include "dev-spi.h"
-
-#define AP81_GPIO_LED_STATUS 1
-#define AP81_GPIO_LED_AOSS 3
-#define AP81_GPIO_LED_WLAN 6
-#define AP81_GPIO_LED_POWER 14
-
-#define AP81_GPIO_BTN_SW4 12
-#define AP81_GPIO_BTN_SW1 21
-
-#define AP81_KEYS_POLL_INTERVAL 20 /* msecs */
-#define AP81_KEYS_DEBOUNCE_INTERVAL (3 * AP81_KEYS_POLL_INTERVAL)
-
-#define AP81_CAL_DATA_ADDR 0x1fff1000
-
-static struct gpio_led ap81_leds_gpio[] __initdata = {
- {
- .name = "ap81:green:status",
- .gpio = AP81_GPIO_LED_STATUS,
- .active_low = 1,
- }, {
- .name = "ap81:amber:aoss",
- .gpio = AP81_GPIO_LED_AOSS,
- .active_low = 1,
- }, {
- .name = "ap81:green:wlan",
- .gpio = AP81_GPIO_LED_WLAN,
- .active_low = 1,
- }, {
- .name = "ap81:green:power",
- .gpio = AP81_GPIO_LED_POWER,
- .active_low = 1,
- }
-};
-
-static struct gpio_keys_button ap81_gpio_keys[] __initdata = {
- {
- .desc = "sw1",
- .type = EV_KEY,
- .code = BTN_0,
- .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
- .gpio = AP81_GPIO_BTN_SW1,
- .active_low = 1,
- } , {
- .desc = "sw4",
- .type = EV_KEY,
- .code = BTN_1,
- .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
- .gpio = AP81_GPIO_BTN_SW4,
- .active_low = 1,
- }
-};
-
-static struct spi_board_info ap81_spi_info[] = {
- {
- .bus_num = 0,
- .chip_select = 0,
- .max_speed_hz = 25000000,
- .modalias = "m25p64",
- }
-};
-
-static struct ath79_spi_platform_data ap81_spi_data = {
- .bus_num = 0,
- .num_chipselect = 1,
-};
-
-static void __init ap81_setup(void)
-{
- u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR);
-
- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio),
- ap81_leds_gpio);
- ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
- ARRAY_SIZE(ap81_gpio_keys),
- ap81_gpio_keys);
- ath79_register_spi(&ap81_spi_data, ap81_spi_info,
- ARRAY_SIZE(ap81_spi_info));
- ath79_register_ar913x_wmac(cal_data);
-}
-
-MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board",
- ap81_setup);
diff --git a/trunk/arch/mips/ath79/mach-pb44.c b/trunk/arch/mips/ath79/mach-pb44.c
deleted file mode 100644
index ec7b7a135d53..000000000000
--- a/trunk/arch/mips/ath79/mach-pb44.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * Atheros PB44 reference board support
- *
- * Copyright (C) 2009-2010 Gabor Juhos
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-#include
-#include
-
-#include "machtypes.h"
-#include "dev-gpio-buttons.h"
-#include "dev-leds-gpio.h"
-#include "dev-spi.h"
-
-#define PB44_GPIO_I2C_SCL 0
-#define PB44_GPIO_I2C_SDA 1
-
-#define PB44_GPIO_EXP_BASE 16
-#define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6)
-#define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8)
-#define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9)
-#define PB44_GPIO_LED_JUMP2 (PB44_GPIO_EXP_BASE + 10)
-
-#define PB44_KEYS_POLL_INTERVAL 20 /* msecs */
-#define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL)
-
-static struct i2c_gpio_platform_data pb44_i2c_gpio_data = {
- .sda_pin = PB44_GPIO_I2C_SDA,
- .scl_pin = PB44_GPIO_I2C_SCL,
-};
-
-static struct platform_device pb44_i2c_gpio_device = {
- .name = "i2c-gpio",
- .id = 0,
- .dev = {
- .platform_data = &pb44_i2c_gpio_data,
- }
-};
-
-static struct pcf857x_platform_data pb44_pcf857x_data = {
- .gpio_base = PB44_GPIO_EXP_BASE,
-};
-
-static struct i2c_board_info pb44_i2c_board_info[] __initdata = {
- {
- I2C_BOARD_INFO("pcf8575", 0x20),
- .platform_data = &pb44_pcf857x_data,
- },
-};
-
-static struct gpio_led pb44_leds_gpio[] __initdata = {
- {
- .name = "pb44:amber:jump1",
- .gpio = PB44_GPIO_LED_JUMP1,
- .active_low = 1,
- }, {
- .name = "pb44:green:jump2",
- .gpio = PB44_GPIO_LED_JUMP2,
- .active_low = 1,
- },
-};
-
-static struct gpio_keys_button pb44_gpio_keys[] __initdata = {
- {
- .desc = "soft_reset",
- .type = EV_KEY,
- .code = KEY_RESTART,
- .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
- .gpio = PB44_GPIO_SW_RESET,
- .active_low = 1,
- } , {
- .desc = "jumpstart",
- .type = EV_KEY,
- .code = KEY_WPS_BUTTON,
- .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
- .gpio = PB44_GPIO_SW_JUMP,
- .active_low = 1,
- }
-};
-
-static struct spi_board_info pb44_spi_info[] = {
- {
- .bus_num = 0,
- .chip_select = 0,
- .max_speed_hz = 25000000,
- .modalias = "m25p64",
- },
-};
-
-static struct ath79_spi_platform_data pb44_spi_data = {
- .bus_num = 0,
- .num_chipselect = 1,
-};
-
-static void __init pb44_init(void)
-{
- i2c_register_board_info(0, pb44_i2c_board_info,
- ARRAY_SIZE(pb44_i2c_board_info));
- platform_device_register(&pb44_i2c_gpio_device);
-
- ath79_register_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio),
- pb44_leds_gpio);
- ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL,
- ARRAY_SIZE(pb44_gpio_keys),
- pb44_gpio_keys);
- ath79_register_spi(&pb44_spi_data, pb44_spi_info,
- ARRAY_SIZE(pb44_spi_info));
-}
-
-MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
- pb44_init);
diff --git a/trunk/arch/mips/ath79/machtypes.h b/trunk/arch/mips/ath79/machtypes.h
deleted file mode 100644
index 3940fe470b2d..000000000000
--- a/trunk/arch/mips/ath79/machtypes.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X machine type definitions
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef _ATH79_MACHTYPE_H
-#define _ATH79_MACHTYPE_H
-
-#include
-
-enum ath79_mach_type {
- ATH79_MACH_GENERIC = 0,
- ATH79_MACH_AP81, /* Atheros AP81 reference board */
- ATH79_MACH_PB44, /* Atheros PB44 reference board */
-};
-
-#endif /* _ATH79_MACHTYPE_H */
diff --git a/trunk/arch/mips/ath79/prom.c b/trunk/arch/mips/ath79/prom.c
deleted file mode 100644
index e9cbd7c2918f..000000000000
--- a/trunk/arch/mips/ath79/prom.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X specific prom routines
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-#include
-
-#include
-#include
-
-#include "common.h"
-
-static inline int is_valid_ram_addr(void *addr)
-{
- if (((u32) addr > KSEG0) &&
- ((u32) addr < (KSEG0 + ATH79_MEM_SIZE_MAX)))
- return 1;
-
- if (((u32) addr > KSEG1) &&
- ((u32) addr < (KSEG1 + ATH79_MEM_SIZE_MAX)))
- return 1;
-
- return 0;
-}
-
-static __init void ath79_prom_init_cmdline(int argc, char **argv)
-{
- int i;
-
- if (!is_valid_ram_addr(argv))
- return;
-
- for (i = 0; i < argc; i++)
- if (is_valid_ram_addr(argv[i])) {
- strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
- strlcat(arcs_cmdline, argv[i], sizeof(arcs_cmdline));
- }
-}
-
-void __init prom_init(void)
-{
- ath79_prom_init_cmdline(fw_arg0, (char **)fw_arg1);
-}
-
-void __init prom_free_prom_memory(void)
-{
- /* We do not have to prom memory to free */
-}
diff --git a/trunk/arch/mips/ath79/setup.c b/trunk/arch/mips/ath79/setup.c
deleted file mode 100644
index 159b42f106b0..000000000000
--- a/trunk/arch/mips/ath79/setup.c
+++ /dev/null
@@ -1,206 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X specific setup
- *
- * Copyright (C) 2008-2011 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * Parts of this file are based on Atheros' 2.6.15 BSP
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include /* for mips_hpt_frequency */
-#include /* for _machine_{restart,halt} */
-#include
-
-#include
-#include
-#include "common.h"
-#include "dev-common.h"
-#include "machtypes.h"
-
-#define ATH79_SYS_TYPE_LEN 64
-
-#define AR71XX_BASE_FREQ 40000000
-#define AR724X_BASE_FREQ 5000000
-#define AR913X_BASE_FREQ 5000000
-
-static char ath79_sys_type[ATH79_SYS_TYPE_LEN];
-
-static void ath79_restart(char *command)
-{
- ath79_device_reset_set(AR71XX_RESET_FULL_CHIP);
- for (;;)
- if (cpu_wait)
- cpu_wait();
-}
-
-static void ath79_halt(void)
-{
- while (1)
- cpu_wait();
-}
-
-static void __init ath79_detect_mem_size(void)
-{
- unsigned long size;
-
- for (size = ATH79_MEM_SIZE_MIN; size < ATH79_MEM_SIZE_MAX;
- size <<= 1) {
- if (!memcmp(ath79_detect_mem_size,
- ath79_detect_mem_size + size, 1024))
- break;
- }
-
- add_memory_region(0, size, BOOT_MEM_RAM);
-}
-
-static void __init ath79_detect_sys_type(void)
-{
- char *chip = "????";
- u32 id;
- u32 major;
- u32 minor;
- u32 rev = 0;
-
- id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID);
- major = id & REV_ID_MAJOR_MASK;
-
- switch (major) {
- case REV_ID_MAJOR_AR71XX:
- minor = id & AR71XX_REV_ID_MINOR_MASK;
- rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
- rev &= AR71XX_REV_ID_REVISION_MASK;
- switch (minor) {
- case AR71XX_REV_ID_MINOR_AR7130:
- ath79_soc = ATH79_SOC_AR7130;
- chip = "7130";
- break;
-
- case AR71XX_REV_ID_MINOR_AR7141:
- ath79_soc = ATH79_SOC_AR7141;
- chip = "7141";
- break;
-
- case AR71XX_REV_ID_MINOR_AR7161:
- ath79_soc = ATH79_SOC_AR7161;
- chip = "7161";
- break;
- }
- break;
-
- case REV_ID_MAJOR_AR7240:
- ath79_soc = ATH79_SOC_AR7240;
- chip = "7240";
- rev = (id & AR724X_REV_ID_REVISION_MASK);
- break;
-
- case REV_ID_MAJOR_AR7241:
- ath79_soc = ATH79_SOC_AR7241;
- chip = "7241";
- rev = (id & AR724X_REV_ID_REVISION_MASK);
- break;
-
- case REV_ID_MAJOR_AR7242:
- ath79_soc = ATH79_SOC_AR7242;
- chip = "7242";
- rev = (id & AR724X_REV_ID_REVISION_MASK);
- break;
-
- case REV_ID_MAJOR_AR913X:
- minor = id & AR913X_REV_ID_MINOR_MASK;
- rev = id >> AR913X_REV_ID_REVISION_SHIFT;
- rev &= AR913X_REV_ID_REVISION_MASK;
- switch (minor) {
- case AR913X_REV_ID_MINOR_AR9130:
- ath79_soc = ATH79_SOC_AR9130;
- chip = "9130";
- break;
-
- case AR913X_REV_ID_MINOR_AR9132:
- ath79_soc = ATH79_SOC_AR9132;
- chip = "9132";
- break;
- }
- break;
-
- default:
- panic("ath79: unknown SoC, id:0x%08x\n", id);
- }
-
- sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
- pr_info("SoC: %s\n", ath79_sys_type);
-}
-
-const char *get_system_type(void)
-{
- return ath79_sys_type;
-}
-
-unsigned int __cpuinit get_c0_compare_int(void)
-{
- return CP0_LEGACY_COMPARE_IRQ;
-}
-
-void __init plat_mem_setup(void)
-{
- set_io_port_base(KSEG1);
-
- ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
- AR71XX_RESET_SIZE);
- ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
- AR71XX_PLL_SIZE);
- ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE,
- AR71XX_DDR_CTRL_SIZE);
-
- ath79_detect_sys_type();
- ath79_detect_mem_size();
- ath79_clocks_init();
-
- _machine_restart = ath79_restart;
- _machine_halt = ath79_halt;
- pm_power_off = ath79_halt;
-}
-
-void __init plat_time_init(void)
-{
- struct clk *clk;
-
- clk = clk_get(NULL, "cpu");
- if (IS_ERR(clk))
- panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
-
- mips_hpt_frequency = clk_get_rate(clk) / 2;
-}
-
-static int __init ath79_setup(void)
-{
- ath79_gpio_init();
- ath79_register_uart();
- ath79_register_wdt();
-
- mips_machine_setup();
-
- return 0;
-}
-
-arch_initcall(ath79_setup);
-
-static void __init ath79_generic_init(void)
-{
- /* Nothing to do */
-}
-
-MIPS_MACHINE(ATH79_MACH_GENERIC,
- "Generic",
- "Generic AR71XX/AR724X/AR913X based board",
- ath79_generic_init);
diff --git a/trunk/arch/mips/configs/ar7_defconfig b/trunk/arch/mips/configs/ar7_defconfig
index 6cd5a519ce5c..c78c7e7e41df 100644
--- a/trunk/arch/mips/configs/ar7_defconfig
+++ b/trunk/arch/mips/configs/ar7_defconfig
@@ -14,7 +14,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_LZMA=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_ELF_CORE is not set
# CONFIG_PCSPKR_PLATFORM is not set
diff --git a/trunk/arch/mips/configs/bcm47xx_defconfig b/trunk/arch/mips/configs/bcm47xx_defconfig
index 22fdf2f0cc23..927d58b2cd03 100644
--- a/trunk/arch/mips/configs/bcm47xx_defconfig
+++ b/trunk/arch/mips/configs/bcm47xx_defconfig
@@ -21,7 +21,7 @@ CONFIG_CGROUP_CPUACCT=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_LZMA=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/mips/configs/bcm63xx_defconfig b/trunk/arch/mips/configs/bcm63xx_defconfig
index 919005139f5a..b806a4e32896 100644
--- a/trunk/arch/mips/configs/bcm63xx_defconfig
+++ b/trunk/arch/mips/configs/bcm63xx_defconfig
@@ -10,7 +10,7 @@ CONFIG_EXPERIMENTAL=y
# CONFIG_SWAP is not set
CONFIG_TINY_RCU=y
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/mips/configs/bigsur_defconfig b/trunk/arch/mips/configs/bigsur_defconfig
index 1cdff6b6327d..9749bc8758db 100644
--- a/trunk/arch/mips/configs/bigsur_defconfig
+++ b/trunk/arch/mips/configs/bigsur_defconfig
@@ -26,7 +26,7 @@ CONFIG_PID_NS=y
CONFIG_NET_NS=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/mips/configs/capcella_defconfig b/trunk/arch/mips/configs/capcella_defconfig
index 5135dc0b950a..502a8e9c084b 100644
--- a/trunk/arch/mips/configs/capcella_defconfig
+++ b/trunk/arch/mips/configs/capcella_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/mips/configs/cavium-octeon_defconfig b/trunk/arch/mips/configs/cavium-octeon_defconfig
index 75165dfa60c1..3567b6f07b37 100644
--- a/trunk/arch/mips/configs/cavium-octeon_defconfig
+++ b/trunk/arch/mips/configs/cavium-octeon_defconfig
@@ -15,7 +15,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/cobalt_defconfig b/trunk/arch/mips/configs/cobalt_defconfig
index 5419adb219a8..6c4f7e9d3383 100644
--- a/trunk/arch/mips/configs/cobalt_defconfig
+++ b/trunk/arch/mips/configs/cobalt_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_RELAY=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
diff --git a/trunk/arch/mips/configs/db1000_defconfig b/trunk/arch/mips/configs/db1000_defconfig
index 4044c9e0fb73..dda158b2c8dc 100644
--- a/trunk/arch/mips/configs/db1000_defconfig
+++ b/trunk/arch/mips/configs/db1000_defconfig
@@ -11,7 +11,7 @@ CONFIG_POSIX_MQUEUE=y
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/trunk/arch/mips/configs/db1100_defconfig b/trunk/arch/mips/configs/db1100_defconfig
index c6b49938ee84..7e4fc76df538 100644
--- a/trunk/arch/mips/configs/db1100_defconfig
+++ b/trunk/arch/mips/configs/db1100_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_PCSPKR_PLATFORM is not set
diff --git a/trunk/arch/mips/configs/db1200_defconfig b/trunk/arch/mips/configs/db1200_defconfig
index 1f69249b839a..6fe205fa7b61 100644
--- a/trunk/arch/mips/configs/db1200_defconfig
+++ b/trunk/arch/mips/configs/db1200_defconfig
@@ -12,7 +12,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_PCSPKR_PLATFORM is not set
diff --git a/trunk/arch/mips/configs/db1500_defconfig b/trunk/arch/mips/configs/db1500_defconfig
index b6e21c7cb6bd..a741c55448d0 100644
--- a/trunk/arch/mips/configs/db1500_defconfig
+++ b/trunk/arch/mips/configs/db1500_defconfig
@@ -10,7 +10,7 @@ CONFIG_LOCALVERSION="-db1500"
CONFIG_KERNEL_LZMA=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/trunk/arch/mips/configs/db1550_defconfig b/trunk/arch/mips/configs/db1550_defconfig
index 798a553c9e80..cd32dd8c8008 100644
--- a/trunk/arch/mips/configs/db1550_defconfig
+++ b/trunk/arch/mips/configs/db1550_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_PCSPKR_PLATFORM is not set
diff --git a/trunk/arch/mips/configs/decstation_defconfig b/trunk/arch/mips/configs/decstation_defconfig
index 87d0340837aa..b15bfd1e69c8 100644
--- a/trunk/arch/mips/configs/decstation_defconfig
+++ b/trunk/arch/mips/configs/decstation_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_HOTPLUG is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/mips/configs/e55_defconfig b/trunk/arch/mips/configs/e55_defconfig
index 0126e66d60cb..0b60c06a943d 100644
--- a/trunk/arch/mips/configs/e55_defconfig
+++ b/trunk/arch/mips/configs/e55_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/fuloong2e_defconfig b/trunk/arch/mips/configs/fuloong2e_defconfig
index e5b73de08fc5..63944a14b816 100644
--- a/trunk/arch/mips/configs/fuloong2e_defconfig
+++ b/trunk/arch/mips/configs/fuloong2e_defconfig
@@ -17,7 +17,7 @@ CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_PID_NS=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/mips/configs/gpr_defconfig b/trunk/arch/mips/configs/gpr_defconfig
index 48a40aefaf58..53edc134f274 100644
--- a/trunk/arch/mips/configs/gpr_defconfig
+++ b/trunk/arch/mips/configs/gpr_defconfig
@@ -11,7 +11,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/ip22_defconfig b/trunk/arch/mips/configs/ip22_defconfig
index d1606569b001..36de199f4c27 100644
--- a/trunk/arch/mips/configs/ip22_defconfig
+++ b/trunk/arch/mips/configs/ip22_defconfig
@@ -17,7 +17,7 @@ CONFIG_IPC_NS=y
CONFIG_USER_NS=y
CONFIG_PID_NS=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_COMPAT_BRK is not set
diff --git a/trunk/arch/mips/configs/ip27_defconfig b/trunk/arch/mips/configs/ip27_defconfig
index 0e36abcd39cc..4b16c48b0c36 100644
--- a/trunk/arch/mips/configs/ip27_defconfig
+++ b/trunk/arch/mips/configs/ip27_defconfig
@@ -15,7 +15,7 @@ CONFIG_CGROUPS=y
CONFIG_CPUSETS=y
CONFIG_RELAY=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/ip28_defconfig b/trunk/arch/mips/configs/ip28_defconfig
index 4dbf6269b3f9..98f2c7736e87 100644
--- a/trunk/arch/mips/configs/ip28_defconfig
+++ b/trunk/arch/mips/configs/ip28_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_RELAY=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/ip32_defconfig b/trunk/arch/mips/configs/ip32_defconfig
index 7bbd52194fc3..5bea99b26fa8 100644
--- a/trunk/arch/mips/configs/ip32_defconfig
+++ b/trunk/arch/mips/configs/ip32_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_RELAY=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
diff --git a/trunk/arch/mips/configs/jazz_defconfig b/trunk/arch/mips/configs/jazz_defconfig
index 92a60aecad5c..6ae46bcdb20b 100644
--- a/trunk/arch/mips/configs/jazz_defconfig
+++ b/trunk/arch/mips/configs/jazz_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_RELAY=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/jmr3927_defconfig b/trunk/arch/mips/configs/jmr3927_defconfig
index db5705e18b36..bf24e9309b9c 100644
--- a/trunk/arch/mips/configs/jmr3927_defconfig
+++ b/trunk/arch/mips/configs/jmr3927_defconfig
@@ -4,7 +4,7 @@ CONFIG_TOSHIBA_JMR3927=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/mips/configs/lasat_defconfig b/trunk/arch/mips/configs/lasat_defconfig
index d9f3db29ab95..6447261c61d0 100644
--- a/trunk/arch/mips/configs/lasat_defconfig
+++ b/trunk/arch/mips/configs/lasat_defconfig
@@ -8,7 +8,7 @@ CONFIG_HZ_1000=y
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
diff --git a/trunk/arch/mips/configs/lemote2f_defconfig b/trunk/arch/mips/configs/lemote2f_defconfig
index 167c1d07b809..f7033f3a5822 100644
--- a/trunk/arch/mips/configs/lemote2f_defconfig
+++ b/trunk/arch/mips/configs/lemote2f_defconfig
@@ -21,7 +21,7 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/malta_defconfig b/trunk/arch/mips/configs/malta_defconfig
index 7270f3183bda..b455d0f36486 100644
--- a/trunk/arch/mips/configs/malta_defconfig
+++ b/trunk/arch/mips/configs/malta_defconfig
@@ -15,7 +15,7 @@ CONFIG_UTS_NS=y
CONFIG_IPC_NS=y
CONFIG_PID_NS=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
@@ -369,10 +369,7 @@ CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_HWMON is not set
-CONFIG_FB=y
-CONFIG_FB_CIRRUS=y
# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_HID=m
CONFIG_LEDS_CLASS=m
CONFIG_LEDS_TRIGGER_TIMER=m
diff --git a/trunk/arch/mips/configs/markeins_defconfig b/trunk/arch/mips/configs/markeins_defconfig
index 9c9a123016c0..86bf001babe9 100644
--- a/trunk/arch/mips/configs/markeins_defconfig
+++ b/trunk/arch/mips/configs/markeins_defconfig
@@ -9,7 +9,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/mips/configs/mipssim_defconfig b/trunk/arch/mips/configs/mipssim_defconfig
index b5ad7387bbb0..4925f507dc21 100644
--- a/trunk/arch/mips/configs/mipssim_defconfig
+++ b/trunk/arch/mips/configs/mipssim_defconfig
@@ -7,7 +7,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/mips/configs/mpc30x_defconfig b/trunk/arch/mips/configs/mpc30x_defconfig
index c16de9812920..efb779f8f6fe 100644
--- a/trunk/arch/mips/configs/mpc30x_defconfig
+++ b/trunk/arch/mips/configs/mpc30x_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_RELAY=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/mips/configs/msp71xx_defconfig b/trunk/arch/mips/configs/msp71xx_defconfig
index d1142e9cd9a1..ab051458452b 100644
--- a/trunk/arch/mips/configs/msp71xx_defconfig
+++ b/trunk/arch/mips/configs/msp71xx_defconfig
@@ -8,7 +8,7 @@ CONFIG_LOCALVERSION="-pmc"
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/mtx1_defconfig b/trunk/arch/mips/configs/mtx1_defconfig
index a97a42c6b2c8..814699754e0d 100644
--- a/trunk/arch/mips/configs/mtx1_defconfig
+++ b/trunk/arch/mips/configs/mtx1_defconfig
@@ -11,7 +11,7 @@ CONFIG_AUDIT=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
diff --git a/trunk/arch/mips/configs/pb1100_defconfig b/trunk/arch/mips/configs/pb1100_defconfig
index 75eb1b1f316c..1597aa1842fa 100644
--- a/trunk/arch/mips/configs/pb1100_defconfig
+++ b/trunk/arch/mips/configs/pb1100_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_PCSPKR_PLATFORM is not set
diff --git a/trunk/arch/mips/configs/pb1200_defconfig b/trunk/arch/mips/configs/pb1200_defconfig
index dcbe2704e5ed..96f0d43cf08b 100644
--- a/trunk/arch/mips/configs/pb1200_defconfig
+++ b/trunk/arch/mips/configs/pb1200_defconfig
@@ -12,7 +12,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_PCSPKR_PLATFORM is not set
diff --git a/trunk/arch/mips/configs/pb1500_defconfig b/trunk/arch/mips/configs/pb1500_defconfig
index fa00487146f8..b4bfd4823458 100644
--- a/trunk/arch/mips/configs/pb1500_defconfig
+++ b/trunk/arch/mips/configs/pb1500_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_PCSPKR_PLATFORM is not set
diff --git a/trunk/arch/mips/configs/pb1550_defconfig b/trunk/arch/mips/configs/pb1550_defconfig
index e83d6497e8b4..5a660024d22a 100644
--- a/trunk/arch/mips/configs/pb1550_defconfig
+++ b/trunk/arch/mips/configs/pb1550_defconfig
@@ -11,7 +11,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_PCSPKR_PLATFORM is not set
diff --git a/trunk/arch/mips/configs/pnx8335-stb225_defconfig b/trunk/arch/mips/configs/pnx8335-stb225_defconfig
index f2925769dfa3..39926a1a96b6 100644
--- a/trunk/arch/mips/configs/pnx8335-stb225_defconfig
+++ b/trunk/arch/mips/configs/pnx8335-stb225_defconfig
@@ -11,7 +11,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/mips/configs/pnx8550-jbs_defconfig b/trunk/arch/mips/configs/pnx8550-jbs_defconfig
index 1d1f2067f3e6..3376bc8616cc 100644
--- a/trunk/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/trunk/arch/mips/configs/pnx8550-jbs_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/pnx8550-stb810_defconfig b/trunk/arch/mips/configs/pnx8550-stb810_defconfig
index 15c66a571f99..6514f1bf0afb 100644
--- a/trunk/arch/mips/configs/pnx8550-stb810_defconfig
+++ b/trunk/arch/mips/configs/pnx8550-stb810_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_HOTPLUG is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/mips/configs/powertv_defconfig b/trunk/arch/mips/configs/powertv_defconfig
index 3b0b6e8c8533..f1f58e91dd80 100644
--- a/trunk/arch/mips/configs/powertv_defconfig
+++ b/trunk/arch/mips/configs/powertv_defconfig
@@ -14,7 +14,7 @@ CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_GZIP is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS_ALL=y
# CONFIG_PCSPKR_PLATFORM is not set
diff --git a/trunk/arch/mips/configs/rb532_defconfig b/trunk/arch/mips/configs/rb532_defconfig
index 55902d9cd0f2..d6457bc38c71 100644
--- a/trunk/arch/mips/configs/rb532_defconfig
+++ b/trunk/arch/mips/configs/rb532_defconfig
@@ -13,7 +13,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
# CONFIG_ELF_CORE is not set
# CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/trunk/arch/mips/configs/rbtx49xx_defconfig b/trunk/arch/mips/configs/rbtx49xx_defconfig
index 9cba856277ff..29acfab31516 100644
--- a/trunk/arch/mips/configs/rbtx49xx_defconfig
+++ b/trunk/arch/mips/configs/rbtx49xx_defconfig
@@ -12,7 +12,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_HOTPLUG is not set
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_EPOLL is not set
diff --git a/trunk/arch/mips/configs/rm200_defconfig b/trunk/arch/mips/configs/rm200_defconfig
index 2c0230e76d20..2b3e47653f60 100644
--- a/trunk/arch/mips/configs/rm200_defconfig
+++ b/trunk/arch/mips/configs/rm200_defconfig
@@ -12,7 +12,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_RELAY=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/mips/configs/sb1250-swarm_defconfig b/trunk/arch/mips/configs/sb1250-swarm_defconfig
index 5b0463ef9389..64840d717750 100644
--- a/trunk/arch/mips/configs/sb1250-swarm_defconfig
+++ b/trunk/arch/mips/configs/sb1250-swarm_defconfig
@@ -15,7 +15,7 @@ CONFIG_RELAY=y
CONFIG_NAMESPACES=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/tb0219_defconfig b/trunk/arch/mips/configs/tb0219_defconfig
index 30036b4cbeb1..d9be37fc9cb7 100644
--- a/trunk/arch/mips/configs/tb0219_defconfig
+++ b/trunk/arch/mips/configs/tb0219_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/tb0226_defconfig b/trunk/arch/mips/configs/tb0226_defconfig
index 81bfa1d4d8e3..3d25dd08907b 100644
--- a/trunk/arch/mips/configs/tb0226_defconfig
+++ b/trunk/arch/mips/configs/tb0226_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
diff --git a/trunk/arch/mips/configs/tb0287_defconfig b/trunk/arch/mips/configs/tb0287_defconfig
index c415c4f0e5c2..be697c9b23c6 100644
--- a/trunk/arch/mips/configs/tb0287_defconfig
+++ b/trunk/arch/mips/configs/tb0287_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/mips/configs/workpad_defconfig b/trunk/arch/mips/configs/workpad_defconfig
index ee4b2be43c44..7ec9287254d8 100644
--- a/trunk/arch/mips/configs/workpad_defconfig
+++ b/trunk/arch/mips/configs/workpad_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/mips/configs/wrppmc_defconfig b/trunk/arch/mips/configs/wrppmc_defconfig
index 44a451be359e..a231b73b1a40 100644
--- a/trunk/arch/mips/configs/wrppmc_defconfig
+++ b/trunk/arch/mips/configs/wrppmc_defconfig
@@ -7,7 +7,7 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_EPOLL is not set
CONFIG_SLAB=y
diff --git a/trunk/arch/mips/configs/yosemite_defconfig b/trunk/arch/mips/configs/yosemite_defconfig
index f72d305a3f08..ab3a3dcec04d 100644
--- a/trunk/arch/mips/configs/yosemite_defconfig
+++ b/trunk/arch/mips/configs/yosemite_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_RELAY=y
-CONFIG_EXPERT=y
+CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/trunk/arch/mips/include/asm/cache.h b/trunk/arch/mips/include/asm/cache.h
index 650ac9ba734c..37f175c42bb5 100644
--- a/trunk/arch/mips/include/asm/cache.h
+++ b/trunk/arch/mips/include/asm/cache.h
@@ -17,6 +17,4 @@
#define SMP_CACHE_SHIFT L1_CACHE_SHIFT
#define SMP_CACHE_BYTES L1_CACHE_BYTES
-#define __read_mostly __attribute__((__section__(".data.read_mostly")))
-
#endif /* _ASM_CACHE_H */
diff --git a/trunk/arch/mips/include/asm/cpu-info.h b/trunk/arch/mips/include/asm/cpu-info.h
index c454550eb0c0..b39def3f6e03 100644
--- a/trunk/arch/mips/include/asm/cpu-info.h
+++ b/trunk/arch/mips/include/asm/cpu-info.h
@@ -78,7 +78,6 @@ struct cpuinfo_mips {
unsigned int watch_reg_use_cnt; /* Usable by ptrace */
#define NUM_WATCH_REGS 4
u16 watch_reg_masks[NUM_WATCH_REGS];
- unsigned int kscratch_mask; /* Usable KScratch mask. */
} __attribute__((aligned(SMP_CACHE_BYTES)));
extern struct cpuinfo_mips cpu_data[];
diff --git a/trunk/arch/mips/include/asm/inst.h b/trunk/arch/mips/include/asm/inst.h
index 7ebfc392e58d..444ff71aa0e8 100644
--- a/trunk/arch/mips/include/asm/inst.h
+++ b/trunk/arch/mips/include/asm/inst.h
@@ -72,7 +72,6 @@ enum spec2_op {
enum spec3_op {
ext_op, dextm_op, dextu_op, dext_op,
ins_op, dinsm_op, dinsu_op, dins_op,
- lx_op = 0x0a,
bshfl_op = 0x20,
dbshfl_op = 0x24,
rdhwr_op = 0x3b
@@ -179,19 +178,6 @@ enum mad_func {
nmadd_fp_op = 0x0c, nmsub_fp_op = 0x0e
};
-/*
- * func field for special3 lx opcodes (Cavium Octeon).
- */
-enum lx_func {
- lwx_op = 0x00,
- lhx_op = 0x04,
- lbux_op = 0x06,
- ldx_op = 0x08,
- lwux_op = 0x10,
- lhux_op = 0x14,
- lbx_op = 0x16,
-};
-
/*
* Damn ... bitfields depend from byteorder :-(
*/
diff --git a/trunk/arch/mips/include/asm/jump_label.h b/trunk/arch/mips/include/asm/jump_label.h
deleted file mode 100644
index 7622ccf75076..000000000000
--- a/trunk/arch/mips/include/asm/jump_label.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 2010 Cavium Networks, Inc.
- */
-#ifndef _ASM_MIPS_JUMP_LABEL_H
-#define _ASM_MIPS_JUMP_LABEL_H
-
-#include
-
-#ifdef __KERNEL__
-
-#define JUMP_LABEL_NOP_SIZE 4
-
-#ifdef CONFIG_64BIT
-#define WORD_INSN ".dword"
-#else
-#define WORD_INSN ".word"
-#endif
-
-#define JUMP_LABEL(key, label) \
- do { \
- asm goto("1:\tnop\n\t" \
- "nop\n\t" \
- ".pushsection __jump_table, \"a\"\n\t" \
- WORD_INSN " 1b, %l[" #label "], %0\n\t" \
- ".popsection\n\t" \
- : : "i" (key) : : label); \
- } while (0)
-
-
-#endif /* __KERNEL__ */
-
-#ifdef CONFIG_64BIT
-typedef u64 jump_label_t;
-#else
-typedef u32 jump_label_t;
-#endif
-
-struct jump_entry {
- jump_label_t code;
- jump_label_t target;
- jump_label_t key;
-};
-
-#endif /* _ASM_MIPS_JUMP_LABEL_H */
diff --git a/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
deleted file mode 100644
index cda1c8070b27..000000000000
--- a/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X SoC register definitions
- *
- * Copyright (C) 2008-2010 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * Parts of this file are based on Atheros' 2.6.15 BSP
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef __ASM_MACH_AR71XX_REGS_H
-#define __ASM_MACH_AR71XX_REGS_H
-
-#include
-#include
-#include
-#include
-
-#define AR71XX_APB_BASE 0x18000000
-#define AR71XX_SPI_BASE 0x1f000000
-#define AR71XX_SPI_SIZE 0x01000000
-
-#define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000)
-#define AR71XX_DDR_CTRL_SIZE 0x100
-#define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000)
-#define AR71XX_UART_SIZE 0x100
-#define AR71XX_GPIO_BASE (AR71XX_APB_BASE + 0x00040000)
-#define AR71XX_GPIO_SIZE 0x100
-#define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000)
-#define AR71XX_PLL_SIZE 0x100
-#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
-#define AR71XX_RESET_SIZE 0x100
-
-#define AR913X_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000)
-#define AR913X_WMAC_SIZE 0x30000
-
-/*
- * DDR_CTRL block
- */
-#define AR71XX_DDR_REG_PCI_WIN0 0x7c
-#define AR71XX_DDR_REG_PCI_WIN1 0x80
-#define AR71XX_DDR_REG_PCI_WIN2 0x84
-#define AR71XX_DDR_REG_PCI_WIN3 0x88
-#define AR71XX_DDR_REG_PCI_WIN4 0x8c
-#define AR71XX_DDR_REG_PCI_WIN5 0x90
-#define AR71XX_DDR_REG_PCI_WIN6 0x94
-#define AR71XX_DDR_REG_PCI_WIN7 0x98
-#define AR71XX_DDR_REG_FLUSH_GE0 0x9c
-#define AR71XX_DDR_REG_FLUSH_GE1 0xa0
-#define AR71XX_DDR_REG_FLUSH_USB 0xa4
-#define AR71XX_DDR_REG_FLUSH_PCI 0xa8
-
-#define AR724X_DDR_REG_FLUSH_GE0 0x7c
-#define AR724X_DDR_REG_FLUSH_GE1 0x80
-#define AR724X_DDR_REG_FLUSH_USB 0x84
-#define AR724X_DDR_REG_FLUSH_PCIE 0x88
-
-#define AR913X_DDR_REG_FLUSH_GE0 0x7c
-#define AR913X_DDR_REG_FLUSH_GE1 0x80
-#define AR913X_DDR_REG_FLUSH_USB 0x84
-#define AR913X_DDR_REG_FLUSH_WMAC 0x88
-
-/*
- * PLL block
- */
-#define AR71XX_PLL_REG_CPU_CONFIG 0x00
-#define AR71XX_PLL_REG_SEC_CONFIG 0x04
-#define AR71XX_PLL_REG_ETH0_INT_CLOCK 0x10
-#define AR71XX_PLL_REG_ETH1_INT_CLOCK 0x14
-
-#define AR71XX_PLL_DIV_SHIFT 3
-#define AR71XX_PLL_DIV_MASK 0x1f
-#define AR71XX_CPU_DIV_SHIFT 16
-#define AR71XX_CPU_DIV_MASK 0x3
-#define AR71XX_DDR_DIV_SHIFT 18
-#define AR71XX_DDR_DIV_MASK 0x3
-#define AR71XX_AHB_DIV_SHIFT 20
-#define AR71XX_AHB_DIV_MASK 0x7
-
-#define AR724X_PLL_REG_CPU_CONFIG 0x00
-#define AR724X_PLL_REG_PCIE_CONFIG 0x18
-
-#define AR724X_PLL_DIV_SHIFT 0
-#define AR724X_PLL_DIV_MASK 0x3ff
-#define AR724X_PLL_REF_DIV_SHIFT 10
-#define AR724X_PLL_REF_DIV_MASK 0xf
-#define AR724X_AHB_DIV_SHIFT 19
-#define AR724X_AHB_DIV_MASK 0x1
-#define AR724X_DDR_DIV_SHIFT 22
-#define AR724X_DDR_DIV_MASK 0x3
-
-#define AR913X_PLL_REG_CPU_CONFIG 0x00
-#define AR913X_PLL_REG_ETH_CONFIG 0x04
-#define AR913X_PLL_REG_ETH0_INT_CLOCK 0x14
-#define AR913X_PLL_REG_ETH1_INT_CLOCK 0x18
-
-#define AR913X_PLL_DIV_SHIFT 0
-#define AR913X_PLL_DIV_MASK 0x3ff
-#define AR913X_DDR_DIV_SHIFT 22
-#define AR913X_DDR_DIV_MASK 0x3
-#define AR913X_AHB_DIV_SHIFT 19
-#define AR913X_AHB_DIV_MASK 0x1
-
-/*
- * RESET block
- */
-#define AR71XX_RESET_REG_TIMER 0x00
-#define AR71XX_RESET_REG_TIMER_RELOAD 0x04
-#define AR71XX_RESET_REG_WDOG_CTRL 0x08
-#define AR71XX_RESET_REG_WDOG 0x0c
-#define AR71XX_RESET_REG_MISC_INT_STATUS 0x10
-#define AR71XX_RESET_REG_MISC_INT_ENABLE 0x14
-#define AR71XX_RESET_REG_PCI_INT_STATUS 0x18
-#define AR71XX_RESET_REG_PCI_INT_ENABLE 0x1c
-#define AR71XX_RESET_REG_GLOBAL_INT_STATUS 0x20
-#define AR71XX_RESET_REG_RESET_MODULE 0x24
-#define AR71XX_RESET_REG_PERFC_CTRL 0x2c
-#define AR71XX_RESET_REG_PERFC0 0x30
-#define AR71XX_RESET_REG_PERFC1 0x34
-#define AR71XX_RESET_REG_REV_ID 0x90
-
-#define AR913X_RESET_REG_GLOBAL_INT_STATUS 0x18
-#define AR913X_RESET_REG_RESET_MODULE 0x1c
-#define AR913X_RESET_REG_PERF_CTRL 0x20
-#define AR913X_RESET_REG_PERFC0 0x24
-#define AR913X_RESET_REG_PERFC1 0x28
-
-#define AR724X_RESET_REG_RESET_MODULE 0x1c
-
-#define MISC_INT_DMA BIT(7)
-#define MISC_INT_OHCI BIT(6)
-#define MISC_INT_PERFC BIT(5)
-#define MISC_INT_WDOG BIT(4)
-#define MISC_INT_UART BIT(3)
-#define MISC_INT_GPIO BIT(2)
-#define MISC_INT_ERROR BIT(1)
-#define MISC_INT_TIMER BIT(0)
-
-#define AR71XX_RESET_EXTERNAL BIT(28)
-#define AR71XX_RESET_FULL_CHIP BIT(24)
-#define AR71XX_RESET_CPU_NMI BIT(21)
-#define AR71XX_RESET_CPU_COLD BIT(20)
-#define AR71XX_RESET_DMA BIT(19)
-#define AR71XX_RESET_SLIC BIT(18)
-#define AR71XX_RESET_STEREO BIT(17)
-#define AR71XX_RESET_DDR BIT(16)
-#define AR71XX_RESET_GE1_MAC BIT(13)
-#define AR71XX_RESET_GE1_PHY BIT(12)
-#define AR71XX_RESET_USBSUS_OVERRIDE BIT(10)
-#define AR71XX_RESET_GE0_MAC BIT(9)
-#define AR71XX_RESET_GE0_PHY BIT(8)
-#define AR71XX_RESET_USB_OHCI_DLL BIT(6)
-#define AR71XX_RESET_USB_HOST BIT(5)
-#define AR71XX_RESET_USB_PHY BIT(4)
-#define AR71XX_RESET_PCI_BUS BIT(1)
-#define AR71XX_RESET_PCI_CORE BIT(0)
-
-#define AR724X_RESET_GE1_MDIO BIT(23)
-#define AR724X_RESET_GE0_MDIO BIT(22)
-#define AR724X_RESET_PCIE_PHY_SERIAL BIT(10)
-#define AR724X_RESET_PCIE_PHY BIT(7)
-#define AR724X_RESET_PCIE BIT(6)
-#define AR724X_RESET_OHCI_DLL BIT(3)
-
-#define AR913X_RESET_AMBA2WMAC BIT(22)
-
-#define REV_ID_MAJOR_MASK 0xfff0
-#define REV_ID_MAJOR_AR71XX 0x00a0
-#define REV_ID_MAJOR_AR913X 0x00b0
-#define REV_ID_MAJOR_AR7240 0x00c0
-#define REV_ID_MAJOR_AR7241 0x0100
-#define REV_ID_MAJOR_AR7242 0x1100
-
-#define AR71XX_REV_ID_MINOR_MASK 0x3
-#define AR71XX_REV_ID_MINOR_AR7130 0x0
-#define AR71XX_REV_ID_MINOR_AR7141 0x1
-#define AR71XX_REV_ID_MINOR_AR7161 0x2
-#define AR71XX_REV_ID_REVISION_MASK 0x3
-#define AR71XX_REV_ID_REVISION_SHIFT 2
-
-#define AR913X_REV_ID_MINOR_MASK 0x3
-#define AR913X_REV_ID_MINOR_AR9130 0x0
-#define AR913X_REV_ID_MINOR_AR9132 0x1
-#define AR913X_REV_ID_REVISION_MASK 0x3
-#define AR913X_REV_ID_REVISION_SHIFT 2
-
-#define AR724X_REV_ID_REVISION_MASK 0x3
-
-/*
- * SPI block
- */
-#define AR71XX_SPI_REG_FS 0x00 /* Function Select */
-#define AR71XX_SPI_REG_CTRL 0x04 /* SPI Control */
-#define AR71XX_SPI_REG_IOC 0x08 /* SPI I/O Control */
-#define AR71XX_SPI_REG_RDS 0x0c /* Read Data Shift */
-
-#define AR71XX_SPI_FS_GPIO BIT(0) /* Enable GPIO mode */
-
-#define AR71XX_SPI_CTRL_RD BIT(6) /* Remap Disable */
-#define AR71XX_SPI_CTRL_DIV_MASK 0x3f
-
-#define AR71XX_SPI_IOC_DO BIT(0) /* Data Out pin */
-#define AR71XX_SPI_IOC_CLK BIT(8) /* CLK pin */
-#define AR71XX_SPI_IOC_CS(n) BIT(16 + (n))
-#define AR71XX_SPI_IOC_CS0 AR71XX_SPI_IOC_CS(0)
-#define AR71XX_SPI_IOC_CS1 AR71XX_SPI_IOC_CS(1)
-#define AR71XX_SPI_IOC_CS2 AR71XX_SPI_IOC_CS(2)
-#define AR71XX_SPI_IOC_CS_ALL (AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1 | \
- AR71XX_SPI_IOC_CS2)
-
-/*
- * GPIO block
- */
-#define AR71XX_GPIO_REG_OE 0x00
-#define AR71XX_GPIO_REG_IN 0x04
-#define AR71XX_GPIO_REG_OUT 0x08
-#define AR71XX_GPIO_REG_SET 0x0c
-#define AR71XX_GPIO_REG_CLEAR 0x10
-#define AR71XX_GPIO_REG_INT_MODE 0x14
-#define AR71XX_GPIO_REG_INT_TYPE 0x18
-#define AR71XX_GPIO_REG_INT_POLARITY 0x1c
-#define AR71XX_GPIO_REG_INT_PENDING 0x20
-#define AR71XX_GPIO_REG_INT_ENABLE 0x24
-#define AR71XX_GPIO_REG_FUNC 0x28
-
-#define AR71XX_GPIO_COUNT 16
-#define AR724X_GPIO_COUNT 18
-#define AR913X_GPIO_COUNT 22
-
-#endif /* __ASM_MACH_AR71XX_REGS_H */
diff --git a/trunk/arch/mips/include/asm/mach-ath79/ath79.h b/trunk/arch/mips/include/asm/mach-ath79/ath79.h
deleted file mode 100644
index 6a9f168506fe..000000000000
--- a/trunk/arch/mips/include/asm/mach-ath79/ath79.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Atheros AR71XX/AR724X/AR913X common definitions
- *
- * Copyright (C) 2008-2011 Gabor Juhos
- * Copyright (C) 2008 Imre Kaloz
- *
- * Parts of this file are based on Atheros' 2.6.15 BSP
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef __ASM_MACH_ATH79_H
-#define __ASM_MACH_ATH79_H
-
-#include
-#include
-
-enum ath79_soc_type {
- ATH79_SOC_UNKNOWN,
- ATH79_SOC_AR7130,
- ATH79_SOC_AR7141,
- ATH79_SOC_AR7161,
- ATH79_SOC_AR7240,
- ATH79_SOC_AR7241,
- ATH79_SOC_AR7242,
- ATH79_SOC_AR9130,
- ATH79_SOC_AR9132
-};
-
-extern enum ath79_soc_type ath79_soc;
-
-static inline int soc_is_ar71xx(void)
-{
- return (ath79_soc == ATH79_SOC_AR7130 ||
- ath79_soc == ATH79_SOC_AR7141 ||
- ath79_soc == ATH79_SOC_AR7161);
-}
-
-static inline int soc_is_ar724x(void)
-{
- return (ath79_soc == ATH79_SOC_AR7240 ||
- ath79_soc == ATH79_SOC_AR7241 ||
- ath79_soc == ATH79_SOC_AR7242);
-}
-
-static inline int soc_is_ar7240(void)
-{
- return (ath79_soc == ATH79_SOC_AR7240);
-}
-
-static inline int soc_is_ar7241(void)
-{
- return (ath79_soc == ATH79_SOC_AR7241);
-}
-
-static inline int soc_is_ar7242(void)
-{
- return (ath79_soc == ATH79_SOC_AR7242);
-}
-
-static inline int soc_is_ar913x(void)
-{
- return (ath79_soc == ATH79_SOC_AR9130 ||
- ath79_soc == ATH79_SOC_AR9132);
-}
-
-extern void __iomem *ath79_ddr_base;
-extern void __iomem *ath79_pll_base;
-extern void __iomem *ath79_reset_base;
-
-static inline void ath79_pll_wr(unsigned reg, u32 val)
-{
- __raw_writel(val, ath79_pll_base + reg);
-}
-
-static inline u32 ath79_pll_rr(unsigned reg)
-{
- return __raw_readl(ath79_pll_base + reg);
-}
-
-static inline void ath79_reset_wr(unsigned reg, u32 val)
-{
- __raw_writel(val, ath79_reset_base + reg);
-}
-
-static inline u32 ath79_reset_rr(unsigned reg)
-{
- return __raw_readl(ath79_reset_base + reg);
-}
-
-void ath79_device_reset_set(u32 mask);
-void ath79_device_reset_clear(u32 mask);
-
-#endif /* __ASM_MACH_ATH79_H */
diff --git a/trunk/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h b/trunk/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
deleted file mode 100644
index aa2283e602fc..000000000000
--- a/trunk/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Platform data definition for Atheros AR71XX/AR724X/AR913X SPI controller
- *
- * Copyright (C) 2008-2010 Gabor Juhos