From ee36baa74b94b2d3ad2829555329f919cb9f5a91 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Wed, 16 Sep 2009 15:05:00 -0700 Subject: [PATCH] --- yaml --- r: 166010 b: refs/heads/master c: c1a1cdc159e211f045290f61ac95092e9708f5bc h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/i915_drv.h | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 3 +++ 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index c1ccd016fdb6..06c1fcf64685 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 06891e27a9b5dba5268bb80e41a283f51335afe7 +refs/heads/master: c1a1cdc159e211f045290f61ac95092e9708f5bc diff --git a/trunk/drivers/gpu/drm/i915/i915_drv.h b/trunk/drivers/gpu/drm/i915/i915_drv.h index d814b6957936..a9c671529885 100644 --- a/trunk/drivers/gpu/drm/i915/i915_drv.h +++ b/trunk/drivers/gpu/drm/i915/i915_drv.h @@ -941,7 +941,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev)) #define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev)) -#define I915_HAS_FBC(dev) (IS_I9XX(dev) || IS_I965G(dev)) +#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev))) #define PRIMARY_RINGBUFFER_SIZE (128*1024) diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index 42cd68da74ab..f9fe9894637a 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -1005,6 +1005,9 @@ void i8xx_disable_fbc(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; u32 fbc_ctl; + if (!I915_HAS_FBC(dev)) + return; + /* Disable compression */ fbc_ctl = I915_READ(FBC_CONTROL); fbc_ctl &= ~FBC_CTL_EN;