From ee3a604ce41508755ecc8d602287e86b697d5769 Mon Sep 17 00:00:00 2001 From: Grazvydas Ignotas Date: Sun, 6 May 2012 02:56:52 +0300 Subject: [PATCH] --- yaml --- r: 303149 b: refs/heads/master c: d723c17ab6e7f04f49cd715d5de4d4f6edf7b28a h: refs/heads/master i: 303147: 1f5c746eb637e3788041a34cfde94e9a5f2225a3 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-omap2/irq.c | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/[refs] b/[refs] index a0da10b64554..9627d23fcaa8 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 33ee0db53994a574b76e0261fc9a3daf71f4b0d7 +refs/heads/master: d723c17ab6e7f04f49cd715d5de4d4f6edf7b28a diff --git a/trunk/arch/arm/mach-omap2/irq.c b/trunk/arch/arm/mach-omap2/irq.c index 65f0d2571c9a..c11e8a84c947 100644 --- a/trunk/arch/arm/mach-omap2/irq.c +++ b/trunk/arch/arm/mach-omap2/irq.c @@ -149,7 +149,6 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) ct->chip.irq_mask = irq_gc_mask_disable_reg; ct->chip.irq_unmask = irq_gc_unmask_enable_reg; - ct->regs.ack = INTC_CONTROL; ct->regs.enable = INTC_MIR_CLEAR0; ct->regs.disable = INTC_MIR_SET0; irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,