From ee8ba31c017d339315ed8df6cc0a409572a35228 Mon Sep 17 00:00:00 2001
From: Pavel Pisa <ppisa@pikron.com>
Date: Mon, 12 Feb 2007 23:34:38 +0100
Subject: [PATCH] --- yaml --- r: 48896 b: refs/heads/master c:
 3b581f5485c180016a6c36c4c7007e21c53f8a63 h: refs/heads/master v: v3

---
 [refs]                                       |  2 +-
 trunk/include/asm-arm/arch-imx/entry-macro.S | 18 ++++++------------
 2 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/[refs] b/[refs]
index e89f68f0b0c6..3016564f76f0 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: cb36bb7516fdd1a2a7e9155413b83d4330e4c4a7
+refs/heads/master: 3b581f5485c180016a6c36c4c7007e21c53f8a63
diff --git a/trunk/include/asm-arm/arch-imx/entry-macro.S b/trunk/include/asm-arm/arch-imx/entry-macro.S
index 3b9ef6914627..61bb0bdc1b16 100644
--- a/trunk/include/asm-arm/arch-imx/entry-macro.S
+++ b/trunk/include/asm-arm/arch-imx/entry-macro.S
@@ -13,19 +13,13 @@
 		.endm
 #define AITC_NIVECSR   0x40
 		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-		ldr	\irqstat, =IO_ADDRESS(IMX_AITC_BASE)
+		ldr	\base, =IO_ADDRESS(IMX_AITC_BASE)
 		@ Load offset & priority of the highest priority
 		@ interrupt pending.
-		ldr	\irqnr, [\irqstat, #AITC_NIVECSR]
+		ldr	\irqstat, [\base, #AITC_NIVECSR]
 		@ Shift off the priority leaving the offset or
-		@ "interrupt number"
-		mov	\irqnr, \irqnr, lsr #16
- 		ldr	\irqstat, =1	@ dummy compare
-		ldr	\base, =0xFFFF		// invalid interrupt
-		cmp	\irqnr, \base
-		bne	1001f
-		ldr	\irqstat, =0
-1001:
-		tst	\irqstat, #1	@ to make the condition code = TRUE
+		@ "interrupt number", use arithmetic shift to
+		@ transform illegal source (0xffff) as -1
+		mov	\irqnr, \irqstat, asr #16
+		adds	\tmp, \irqnr, #1
 		.endm
-