From ef5b05cb60c634a7ff24b4442c299afb5c60381b Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Dec 2012 07:48:51 +1000 Subject: [PATCH] --- yaml --- r: 348063 b: refs/heads/master c: 5ddf4d4a543dd3303b20d7e9a4b3549589c5f095 h: refs/heads/master i: 348061: f353019e957daa67a1b0f789e2fa03ed64ab7670 348059: d9ca91fcd5ad5e8fae57313465173c6de9d3b8dd 348055: c67a3b147d62ccd4d6001d3b0dcfdf6ef98b32a5 348047: 0b90eda01c90c9dcbcfab7bc599fec6a94aa0d12 348031: 80cbe9e65d5163cdd82c1aced3f7e0a3be0eda27 v: v3 --- [refs] | 2 +- .../nouveau/core/include/subdev/bios/init.h | 1 + .../gpu/drm/nouveau/core/subdev/bios/init.c | 18 +++++++++++++++++- 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 1218f9fecf90..b7c2f68fee89 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 3d8ec277394ee0cf9fdd5a411017c3b4f1b0aff2 +refs/heads/master: 5ddf4d4a543dd3303b20d7e9a4b3549589c5f095 diff --git a/trunk/drivers/gpu/drm/nouveau/core/include/subdev/bios/init.h b/trunk/drivers/gpu/drm/nouveau/core/include/subdev/bios/init.h index e69a8bdc6e97..ca2f6bf37f46 100644 --- a/trunk/drivers/gpu/drm/nouveau/core/include/subdev/bios/init.h +++ b/trunk/drivers/gpu/drm/nouveau/core/include/subdev/bios/init.h @@ -13,6 +13,7 @@ struct nvbios_init { u32 nested; u16 repeat; u16 repend; + u32 ramcfg; }; int nvbios_exec(struct nvbios_init *); diff --git a/trunk/drivers/gpu/drm/nouveau/core/subdev/bios/init.c b/trunk/drivers/gpu/drm/nouveau/core/subdev/bios/init.c index 98f78cf318b0..2917d552689b 100644 --- a/trunk/drivers/gpu/drm/nouveau/core/subdev/bios/init.c +++ b/trunk/drivers/gpu/drm/nouveau/core/subdev/bios/init.c @@ -410,10 +410,26 @@ init_ram_restrict_group_count(struct nvbios_init *init) return 0x00; } +static u8 +init_ram_restrict_strap(struct nvbios_init *init) +{ + /* This appears to be the behaviour of the VBIOS parser, and *is* + * important to cache the NV_PEXTDEV_BOOT0 on later chipsets to + * avoid fucking up the memory controller (somehow) by reading it + * on every INIT_RAM_RESTRICT_ZM_GROUP opcode. + * + * Preserving the non-caching behaviour on earlier chipsets just + * in case *not* re-reading the strap causes similar breakage. + */ + if (!init->ramcfg || init->bios->version.major < 0x70) + init->ramcfg = init_rd32(init, 0x101000); + return (init->ramcfg & 0x00000003c) >> 2; +} + static u8 init_ram_restrict(struct nvbios_init *init) { - u32 strap = (init_rd32(init, 0x101000) & 0x0000003c) >> 2; + u8 strap = init_ram_restrict_strap(init); u16 table = init_ram_restrict_table(init); if (table) return nv_ro08(init->bios, table + strap);