From f03b48ef10a7a62ddb69b5437542750fb63e6f56 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Wed, 31 Oct 2012 18:12:40 -0200 Subject: [PATCH] --- yaml --- r: 345241 b: refs/heads/master c: 0540e4882f221d5979e02e2a225ad077ae8b40b4 h: refs/heads/master i: 345239: 48d3411143d19b7d1642400cba727181f0dbcb60 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index fd038adceb80..8635efa8b6e4 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7cbfd0653005d6c7a8f00d8ef5573b2976157780 +refs/heads/master: 0540e4882f221d5979e02e2a225ad077ae8b40b4 diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index 88dd4c1a4c88..58614f81c096 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -3183,8 +3183,7 @@ static void lpt_pch_enable(struct drm_crtc *crtc) lpt_program_iclkip(crtc); - /* set transcoder timing, panel must allow it */ - assert_panel_unlocked(dev_priv, pipe); + /* Set transcoder timing. */ I915_WRITE(TRANS_HTOTAL(pipe), I915_READ(HTOTAL(pipe))); I915_WRITE(TRANS_HBLANK(pipe), I915_READ(HBLANK(pipe))); I915_WRITE(TRANS_HSYNC(pipe), I915_READ(HSYNC(pipe)));