From f194f92eb9bbdcb014fb54ce157c54aa527d4989 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Mon, 3 Apr 2006 15:46:22 -0700 Subject: [PATCH] --- yaml --- r: 26757 b: refs/heads/master c: ccf77cc4af5b048e20cfd9327fcc286cb69c34cc h: refs/heads/master i: 26755: 16e42ab3c26f48b4ae89b238de5950bb9d2ed212 v: v3 --- [refs] | 2 +- trunk/drivers/spi/spi_bitbang.c | 11 ++++++++++- trunk/include/linux/spi/spi.h | 7 +++++-- 3 files changed, 16 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 6768ea2724a3..757933fcd6d1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: ff9f4771b5f017ee0f57629488b6cd7a6ef3d19b +refs/heads/master: ccf77cc4af5b048e20cfd9327fcc286cb69c34cc diff --git a/trunk/drivers/spi/spi_bitbang.c b/trunk/drivers/spi/spi_bitbang.c index 6c3da64d609a..0f7f5c64391c 100644 --- a/trunk/drivers/spi/spi_bitbang.c +++ b/trunk/drivers/spi/spi_bitbang.c @@ -187,13 +187,22 @@ int spi_bitbang_setup(struct spi_device *spi) if (!spi->max_speed_hz) return -EINVAL; + bitbang = spi_master_get_devdata(spi->master); + + /* REVISIT: some systems will want to support devices using lsb-first + * bit encodings on the wire. In pure software that would be trivial, + * just bitbang_txrx_le_cphaX() routines shifting the other way, and + * some hardware controllers also have this support. + */ + if ((spi->mode & SPI_LSB_FIRST) != 0) + return -EINVAL; + if (!cs) { cs = kzalloc(sizeof *cs, SLAB_KERNEL); if (!cs) return -ENOMEM; spi->controller_state = cs; } - bitbang = spi_master_get_devdata(spi->master); if (!spi->bits_per_word) spi->bits_per_word = 8; diff --git a/trunk/include/linux/spi/spi.h b/trunk/include/linux/spi/spi.h index 082006714b85..77add901691d 100644 --- a/trunk/include/linux/spi/spi.h +++ b/trunk/include/linux/spi/spi.h @@ -35,10 +35,13 @@ extern struct bus_type spi_bus_type; * @chip-select: Chipselect, distinguishing chips handled by "master". * @mode: The spi mode defines how data is clocked out and in. * This may be changed by the device's driver. + * The "active low" default for chipselect mode can be overridden, + * as can the "MSB first" default for each word in a transfer. * @bits_per_word: Data transfers involve one or more words; word sizes * like eight or 12 bits are common. In-memory wordsizes are * powers of two bytes (e.g. 20 bit samples use 32 bits). - * This may be changed by the device's driver. + * This may be changed by the device's driver, or left at the + * default (0) indicating protocol words are eight bit bytes. * The spi_transfer.bits_per_word can override this for each transfer. * @irq: Negative, or the number passed to request_irq() to receive * interrupts from this device. @@ -67,6 +70,7 @@ struct spi_device { #define SPI_MODE_2 (SPI_CPOL|0) #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) #define SPI_CS_HIGH 0x04 /* chipselect active high? */ +#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ u8 bits_per_word; int irq; void *controller_state; @@ -75,7 +79,6 @@ struct spi_device { // likely need more hooks for more protocol options affecting how // the controller talks to each chip, like: - // - bit order (default is wordwise msb-first) // - memory packing (12 bit samples into low bits, others zeroed) // - priority // - drop chipselect after each word