From f1c38225c74d0fc09e1333b035b3eb4c3fc8383c Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Thu, 13 Sep 2012 14:57:53 +0800 Subject: [PATCH] --- yaml --- r: 332766 b: refs/heads/master c: 3e70192c41ac607c63c31ea00be62dd9afb85575 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/include/linux/mtd/nand.h | 25 +++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index ee83a5d33d46..dd9005c8947a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7db03eccfc23783a95dd78383b3fad55224aaa7b +refs/heads/master: 3e70192c41ac607c63c31ea00be62dd9afb85575 diff --git a/trunk/include/linux/mtd/nand.h b/trunk/include/linux/mtd/nand.h index 922f313970d4..2beeb6e4e4e6 100644 --- a/trunk/include/linux/mtd/nand.h +++ b/trunk/include/linux/mtd/nand.h @@ -231,6 +231,15 @@ typedef enum { /* Keep gcc happy */ struct nand_chip; +/* ONFI timing mode, used in both asynchronous and synchronous mode */ +#define ONFI_TIMING_MODE_0 (1 << 0) +#define ONFI_TIMING_MODE_1 (1 << 1) +#define ONFI_TIMING_MODE_2 (1 << 2) +#define ONFI_TIMING_MODE_3 (1 << 3) +#define ONFI_TIMING_MODE_4 (1 << 4) +#define ONFI_TIMING_MODE_5 (1 << 5) +#define ONFI_TIMING_MODE_UNKNOWN (1 << 6) + /* ONFI feature address */ #define ONFI_FEATURE_ADDR_TIMING_MODE 0x1 @@ -684,4 +693,20 @@ struct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd) return chip->priv; } +/* return the supported asynchronous timing mode. */ +static inline int onfi_get_async_timing_mode(struct nand_chip *chip) +{ + if (!chip->onfi_version) + return ONFI_TIMING_MODE_UNKNOWN; + return le16_to_cpu(chip->onfi_params.async_timing_mode); +} + +/* return the supported synchronous timing mode. */ +static inline int onfi_get_sync_timing_mode(struct nand_chip *chip) +{ + if (!chip->onfi_version) + return ONFI_TIMING_MODE_UNKNOWN; + return le16_to_cpu(chip->onfi_params.src_sync_timing_mode); +} + #endif /* __LINUX_MTD_NAND_H */