From f2343a57b9ddd0cb80e7833270e719ae45088ca1 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 20 Mar 2012 17:18:31 -0400 Subject: [PATCH] --- yaml --- r: 293893 b: refs/heads/master c: 729b95ef03fbfc1b0587eedbcfbaf0cb6d27be93 h: refs/heads/master i: 293891: 81e1f36e76823069f2862425b8504a1cd820d15c v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/atombios_crtc.c | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 387d9b716434..1999c337b1c8 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: ca7db22bc59ced2f180f37db8470140225d75860 +refs/heads/master: 729b95ef03fbfc1b0587eedbcfbaf0cb6d27be93 diff --git a/trunk/drivers/gpu/drm/radeon/atombios_crtc.c b/trunk/drivers/gpu/drm/radeon/atombios_crtc.c index 6fe4a6dc4d6e..224775beb478 100644 --- a/trunk/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/trunk/drivers/gpu/drm/radeon/atombios_crtc.c @@ -767,7 +767,9 @@ static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev, * SetPixelClock provides the dividers */ args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk); - if (ASIC_IS_DCE6(rdev)) + if (ASIC_IS_DCE61(rdev)) + args.v6.ucPpll = ATOM_EXT_PLL1; + else if (ASIC_IS_DCE6(rdev)) args.v6.ucPpll = ATOM_PPLL0; else args.v6.ucPpll = ATOM_DCPLL;