From f29fc64930c2f93cf81598f44954826a11e6b7d2 Mon Sep 17 00:00:00 2001
From: Chao Xie <xiechao.mail@gmail.com>
Date: Tue, 31 Jul 2012 14:13:11 +0800
Subject: [PATCH] --- yaml --- r: 326703 b: refs/heads/master c:
 fa79b8d6a2f38bf2c612acf38787a7fcf60c5db7 h: refs/heads/master i:   326701:
 770b6c315b41c6d73f6dd00bdb73530b2d92fcb9   326699:
 6f3c2c0189c6372034d21b80c978870f6b4859d4   326695:
 00df50668dc95f345c238f15566a72443596d016   326687:
 7b2493ccf10e4a4eabc897020a35e3c25d07bd3e v: v3

---
 [refs]                            | 2 +-
 trunk/arch/arm/mm/cache-tauros2.c | 4 +---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/[refs] b/[refs]
index de5c9dc3c939..85d87cafdf6b 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5967b546dd7142e7747993bb4c79422cd7b6f34f
+refs/heads/master: fa79b8d6a2f38bf2c612acf38787a7fcf60c5db7
diff --git a/trunk/arch/arm/mm/cache-tauros2.c b/trunk/arch/arm/mm/cache-tauros2.c
index 97e2ac81399f..4b787bba2b58 100644
--- a/trunk/arch/arm/mm/cache-tauros2.c
+++ b/trunk/arch/arm/mm/cache-tauros2.c
@@ -17,6 +17,7 @@
 #include <linux/init.h>
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
+#include <asm/cputype.h>
 #include <asm/hardware/cache-tauros2.h>
 
 
@@ -161,8 +162,6 @@ static void __init disable_l2_prefetch(void)
 
 static inline int __init cpuid_scheme(void)
 {
-	extern int processor_id;
-
 	return !!((processor_id & 0x000f0000) == 0x000f0000);
 }
 
@@ -191,7 +190,6 @@ static inline void __init write_actlr(u32 actlr)
 
 void __init tauros2_init(void)
 {
-	extern int processor_id;
 	char *mode = NULL;
 
 	disable_l2_prefetch();